LSU423-TO-71 [Linear]

Small Signal Field-Effect Transistor, 2-Element, N-Channel, Silicon, Junction FET, TO-71, HERMETIC SEALED, TO-71, 6 PIN;


型号：	LSU423-TO-71
厂家：	Linear
描述：	Small Signal Field-Effect Transistor, 2-Element, N-Channel, Silicon, Junction FET, TO-71, HERMETIC SEALED, TO-71, 6 PIN 开关晶体管
文件：	总1页 (文件大小：272K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LSU423

HIGH INPUT IMPEDANCE

MONOLITHIC DUAL

N-CHANNEL JFET

Linear Systems replaces discontinued Siliconix U423

The LSU423 is a high input impedance Monolithic Dual N-Channel JFET

FEATURES

The LSU423 monolithic dual n-channel JFET is

HIGH INPUT IMPEDANCE

HIGH GAIN

LOW POWER OPERATION

ABSOLUTE MAXIMUM RATINGS

@ 25°C (unless otherwise noted)

I_G= 0.25pA MAX

gfs = 120µmho MIN

V_GS(OFF)= 2V MAX

designed

to provide very high input impedance for differential

amplification and impedance matching. Among its

many unique features, this series offers operating gate

current specified at -250 fA. The LSU423 is a direct

replacement for discontinued Siliconix U423.

Maximum Temperatures

Storage Temperature

Operating Junction Temperature

The hermetically sealed TO-71 & TO-78 packages are

well suited for military applications. The 8 Pin P-DIP

and 8 Pin SOIC provide ease of manufacturing, and the

symmetrical pinout prevents improper orientation.

‐65°C to +150°C

+150°C

Maximum Voltage and Current for Each Transistor – Note 1

‐V_GSS

‐V_DSO

‐I_G(f)

Gate Voltage to Drain or Source

Drain to Source Voltage

Gate Forward Current

40V

10mA

(See Packaging Information).

Maximum Power Dissipation

Device Dissipation @ Free Air – Total

LSU423 Applications:

400mW @ +125°C

MATCHING CHARACTERISTICS @ 25°C UNLESS OTHERWISE NOTED

Ultra Low Input Current Differential Amps

High-Speed Comparators

Impedance Converters

SYMBOL

CHARACTERISTICS VALUE UNITS CONDITIONS

|∆V _GS1‐2/∆T|max.

DRIFT VS.

TEMPERATURE

OFFSET VOLTAGE

µV/°C

V_DG=10V, I_D=30µA

T_A=‐55°C to +125°C

V_DG=10V, I_D=30µA

| V _GS1‐2| max.

ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)

SYMBOL

BV_GSS

BV_GGO

CHARACTERISTICS

Breakdown Voltage

Gate‐To‐Gate Breakdown

TRANSCONDUCTANCE

Full Conduction

MIN.

TYP.

‐‐

MAX.

‐‐

UNITS

CONDITIONS

V_DS= 0 I_G=1nA

I_G= 1µA I_D= 0 I_S= 0

Y_fSS

Y_fS

300

120

‐‐

200

1500

350

µmho

V_DS= 10V

V_DG= 10V

V_GS= 0V f = 1kHz

I_D= 30µA f = 1kHz

Typical Operation

DRAIN CURRENT

Click To Buy

I_DSS

Full Conduction

GATE VOLTAGE

Pinchoff voltage

Operating Range

GATE CURRENT

Operating

‐‐

1000

µA

V_DS= 10V

V_GS= 0V

V_GS(off)

V_GS

‐‐

2.0

1.8

V_DS= 10V

V_DG= 10V

I_D= 1nA

I_D= 30µA

I_Gmax.

‐I_Gmax.

I_GSSmax.

‐I_GSSmax.

‐‐

.25

250

1.0

V_DG= 10V

I_D= 30µA

V_GS= 20V

High Temperature

At Full Conduction

High Temperature

OUTPUT CONDUCTANCE

Full Conduction

Operating

T_A= +125°C

V_DS= 0V

T_A= +125°C

Y_OSS

Y_OS

‐‐

0.1

3.0

µmho

V_DS= 10V

V_GS= 0V

I_D= 30µA

V_DG= 10V

COMMON MODE REJECTION

‐20 log | ∆V _GS1‐2/ ∆V_DS|

NOISE

CMR

‐‐

∆V_DS= 10 to 20V

∆V_DS= 5 to 10V

V_DG= 10V I_D= 30µA R_G= 10MΩ

f = 10Hz

V_DG= 10V I_D= 30µA f = 10Hz

V_DG= 10V I_D= 30µA f = 1KHz

I_D= 30µA

e_n

Figure

Voltage

‐‐

nV/√Hz

CAPACITANCE

Input

Reverse Transfer

C_ISS

C_RSS

‐‐

3.0

1.5

V_DS= 10V

V_GS= 0 f = 1MHz

Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired

TO-71 / TO-78 (Top View)

P-DIP / SOIC (Top View)

Available Packages:

LSU423 in TO-71 & TO-78

LSU423 in PDIP & SOIC

LSU423 available as bare die

Please contact Micross for full package and die dimensions

Email: chipcomponents@micross.com

Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or

other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.

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