3573_技术文档

LT3573

Isolated Flyback Converter

Without an Opto-Coupler

FEATURES

DESCRIPTION

The LT^®3573 is a monolithic switching regulator speciﬁ-

cally designed for the isolated ﬂyback topology. No third

winding or optoisolator is required for regulation. The

part senses the isolated output voltage directly from the

primary side ﬂyback waveform. A 1.25A, 60V NPN power

switch is integrated along with all control logic into a 16-

lead MSOP package.

n

3V to 40V Input Voltage Range

n

1.25A, 60V Integrated NPN Power Switch

n

Boundary Mode Operation

n

No Transformer Third Winding or

Optoisolator Required for Regulation

n

Improved Primary-Side Winding Feedback

Load Regulation

n

V

Set with Two External Resistors

OUT

The LT3573 operates with input supply voltages from

3V to 40V, and can deliver output power up to 7W with

no external power devices.The LT3573 utilizes boundary

mode operation to provide a small magnetic solution with

improved load regulation.

n

BIAS Pin for Internal Bias Supply and Power

NPN Driver

Programmable Soft-Start

n

Programmable Power Switch Current Limit

Thermally Enhanced 16-Lead MSOP

LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners. Patents pending.

APPLICATIONS

n

Industrial, Automotive, Medical

Low Power PoE

n

TYPICAL APPLICATION

5V Isolated Flyback Converter

Load Regulation

V

IN

12V TO 24V

3

B340A

+

3:1

10μF

V

OUT

357k

2

1

0.22μF

2k

24μH

5V, 0.7A

V

IN

2.6μH

SHDN/UVLO

47μF

–

51.1k

1N4148

80.6k

V

OUT

0

V

IN

= 24V

R

FB

LT3573

V

IN

= 12V

R

REF

–1

–2

–3

TC

R

6.04k

ILIM

SS

SW

VC

GND TEST BIAS

400 600 800 1000 1200 1400

(mA)

0

200

I

10k

20k

1nF

28.7k

OUT

3573 TA01b

4.7μF

10nF

3573 TA01

3573f

1

LT3573

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

SW............................................................................60V

TOP VIEW

V , SHDN/UVLO, R , BIAS .....................................40V

IN

FB

1

16

GND

SS, V , T , R , R

...............................................5V

2

C

REF ILIM

TEST

15 TC

3

14

13

12

11

10

9

GND

R

REF

FB

C

Maximum Junction Temperature........................... 125°C

Operating Junction Temperature Range (Note 2)

LT3573E.............................................–40°C to 125°C

Storage Temperature Range...................–65°C to 150°C

4

SW

17

5

V

IN

V

6

7

8

BIAS

SHDN/UVLO

GND

R

ILIM

SS

GND

MSE PACKAGE

16-LEAD PLASTIC MSOP

T

= 125°C, θ = 50°C/W, θ = 10°C/W

JA JC

JMAX

EXPOSED PAD (PIN 17) IS GND, MUST BE CONNECTED TO GND

ORDER INFORMATION

LEAD FREE FINISH

LT3573EMSE#PBF

LT3573IMSE#PBF

TAPE AND REEL

PART MARKING*

3573

PACKAGE DESCRIPTION

TEMPERATURE RANGE

LT3573EMSE#TRPBF

LT3573IMSE#TRPBF

16-Lead Plastic MSOP

–40°C to 125°C

3573

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges. *The temperature grade is identiﬁed by a label on the shipping container.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_IN= 12V, unless otherwise noted.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

l

Input Voltage Range

Quiescent Current

3

40

V

SS = 0V

SHDN/UVLO

3.5

0

mA

μA

V

= 0V

1

Soft-Start Current

SS = 0.4V

UVLO Pin Voltage Rising

7

μA

V

l

SHDN/UVLO Pin Threshold

SHDN/UVLO Pin Hysteresis Current

Soft-Start Threshold

1.15

2

1.22

2.5

1.29

3

V

UVLO

= 1V

μA

V

0.7

Maximum Switching Frequency

Switch Current Limit

1000

1.55

200

150

1.23

kHz

A

R

= 10k

1.25

140

1.85

260

250

ILIM

Minimum Current Limit

V = 0V

C

mA

mV

V

Switch V

I

= 0.5A

= 3V

CESAT

SW

R

REF

Voltage

V

1.21

1.20

1.25

IN

l

R

Voltage Line Regulation

Pin Bias Current

3V < V < 40V

0.01

100

190

0.03

600

%/ V

nA

REF

IN

(Note 3)

REF

I

Reference Current

Measured at R Pin with R = 6.49k

μA

REF

FB

REF

3573f

2

LT3573

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_IN= 12V, unless otherwise noted.

PARAMETER

CONDITIONS

= 3V

MIN

TYP

150

40

MAX

UNITS

V/V

Error Ampliﬁer Voltage Gain

Error Ampliﬁer Transconductance

Minimum Switching Frequency

V

IN

μmhos

kHz

ΔI = 10μA, V = 3V

IN

V = 0.35V

C

TC Current into R

BIAS Pin Voltage

R

= 20.1k

27.5

3

μA

REF

TC

I

= 30mA

2.9

3.1

V

BIAS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

to 125°C operating junction temperature range are assured by design

characterization and correlation with statistical process controls. The

LT3573I is guaranteed over the full –40°C to 125°C operating junction

temperature range.

Note 2: The LT3573E is guaranteed to meet performance speciﬁcations

Note 3: Current ﬂows out of the R pin.

REF

from 0°C to 125°C junction temperature. Speciﬁcations over the –40°C

TYPICAL PERFORMANCE CHARACTERISTICS ^T_A^{= 25°C, unless otherwise noted.}

Bias Pin Voltage

Output Voltage

Quiescent Current

5.20

5.15

5.10

5.05

5.00

4.95

4.90

4.85

4.80

7

6

5

4

3

2

1

0

3.2

3.0

2.8

2.6

2.4

2.2

2.0

V

IN

= 40V

V

= 40V

= 5V

IN

V

IN

= 12V

V

IN

–50

0

25

50

75 100 125

–50

0

25

50

75 100 125

–50

0

25

50

75 100 125

–25

TEMPERATURE (°C)

3573 G01

3573 G02

3573 G03

3573f

3

LT3573

TYPICAL PERFORMANCE CHARACTERISTICS ^T_A^{= 25°C, unless otherwise noted.}

Switch V_CESAT

Switch Current Limit

Switch Current Limit vs R_ILIM

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

400

350

300

250

200

150

100

50

MAXIMUM CURRENT LIMIT

25°C

125°C

–50°C

RILIM = 10k

MINIMUM CURRENT LIMIT

0

–25

0

25

50

75 100 125

10

20

30

40

50

–50

0

0.25 0.50 0.75 1.00 1.25 1.50

SWITCH CURRENT (A)

TEMPERATURE (°C)

R

RESISTANCE (k)

ILIM

3573 G05

3573 G06

3573 G04

SS Pin Current

SHDN/UVLO Falling Threshold

1.28

1.26

1.24

1.22

1.20

1.18

12

10

8

6

4

2

0

–20

0

20 40 60

140

–20

0

20 40 60

140

–60 –40

80 100 120

–60 –40

80 100 120

TEMPERATURE (°C)

3573 G07

3573 G08

3573f

4

LT3573

PIN FUNCTIONS

GND: Ground.

SS: Soft-Start Pin. Place a soft-start capacitor here to

limit start-up inrush current and output voltage ramp

rate. Switching starts when the voltage at this pin reaches

~0.7V.

TEST: This pin is used for testing purposes only and must

be connected to ground for the part to operate properly.

SW: Collector Node of the Output Switch. This pin has

large currents ﬂowing through it. Keep the traces to the

switching components as short as possible to minimize

electromagnetic radiation and voltage spikes.

V :CompensationPinforInternalErrorAmpliﬁer.Connect

C

a series RC from this pin to ground to compensate the

switching regulator. A 100pF capacitor in parallel helps

eliminate noise.

V : Input Voltage. This pin supplies current to the internal

IN

R : Input Pin for External Feedback Resistor. This pin is

FB

start-up circuitry and as a reference voltage for the DCM

comparatorandfeedbackcircuitry.Thispinmustbelocally

bypassed with a capacitor.

connected to the transformer primary (V ). The ratio

SW

of this resistor to the R

resistor, times the internal

REF

bandgap reference, determines the output voltage (plus

the effect of any non-unity transformer turns ratio). The

average current through this resistor during the ﬂyback

period should be approximately 200μA. For nonisolated

BIAS: Bias Voltage. This pin supplies current to the switch

driver and internal circuitry of the LT3573. This pin must

be locally bypassed with a capacitor. This pin may also be

connected to V if a third winding is not used and if V

applications, this pin should be connected to V .

IN

≤ 15V. If a third winding is used, the BIAS voltage should

be lower than the input voltage for proper operation.

R

: Input Pin for External Ground-Referred Reference

REF

Resistor. This resistor should be in the range of 6k, but

for convenience, need not be precisely this value. For

nonisolated applications, a traditional resistor voltage

divider may be connected to this pin.

SHDN/UVLO:Shutdown/UndervoltageLockout.Aresistor

divider connected to V is tied to this pin to program the

IN

minimum input voltage at which the LT3573 will operate.

At a voltage below ~0.7V, the part draws no quiescent

current. When below 1.25V and above ~0.7V, the part will

draw 10μA of current, but internal circuitry will remain off.

Above 1.25V, the internal circuitry will start and a 10μA

current will be fed into the SS pin. When this pin falls

below 1.25V, 2.5μA will be pulled from the pin to provide

programmable hysteresis for UVLO.

T : Output Voltage Temperature Compensation. Connect

C

a resistor to ground to produce a current proportional to

absolute temperature to be sourced into the R

node.

REF

I

= 0.55V/R .

TC

Exposed Pad: Ground. The Exposed Pad of the package

providesbothelectricalcontacttogroundandgoodthermal

contacttotheprintedcircuitboard.TheExposedPadmust

be soldered to the circuit board for proper operation and

should be well connected with many vias to an internal

ground plane.

R

ILIM

: Maximum Current Limit Adjust Pin. A resistor

should be tied to this pin to ground to set the current

limit. Use a 10k resistor for the full current capabilities

of the switch.

3573f

5

LT3573

BLOCK DIAGRAM

D1

T1

+

–

V

IN

V

OUT

C1

L1A

L1B

C2

R3

N:1

R

V

SW

FB

IN

TC

CURRENT

TC

FLYBACK

ERROR

AMP

–

+

ONE

SHOT

Q3

Q2

A2

V1

CURRENT

COMPARATOR

+

–

g

m

–

R6

R4

I2

20μA

+

1.22V

A1

+

120mV

V

IN

R

REF

DRIVER

BIAS

S

R

Q1

Q

BIAS

MASTER

LATCH

+

A4

R

SENSE

C5

–

0.02Ω

GND

1.22V

R1

R2

+

–

SHDN/UVLO

INTERNAL

REFERENCE

AND

A5

OSCILLATOR

I1

7μA

REGULATORS

2.5μA

V

C

Q4

R7

C4

SS

R

ILIM

C3

3573 BD

R5

3573f

6

LT3573

OPERATION

The LT3573 is a current mode switching regulator IC

designed speciﬁcally for the isolated ﬂyback topology.

The special problem normally encountered in such cir-

cuits is that information relating to the output voltage on

the isolated secondary side of the transformer must be

communicated to the primary side in order to maintain

regulation. Historically, this has been done with optoisola-

tors or extra transformer windings. Optoisolator circuits

waste output power and the extra components increase

the cost and physical size of the power supply. Optoiso-

lators can also exhibit trouble due to limited dynamic

response, nonlinearity, unit-to-unit variation and aging

over life. Circuits employing extra transformer windings

also exhibit deﬁciencies. Using an extra winding adds to

the transformer’s physical size and cost, and dynamic

response is often mediocre.

The LT3573 features a boundary mode control method,

where the part operates at the boundary between continu-

ousconductionmodeanddiscontinuousconductionmode.

TheV pincontrolsthecurrentleveljustasitdoesinnormal

C

current mode operation, but instead of turning the switch

on at the start of the oscillator period, the part detects

when the secondary side winding current is zero.

Boundary Mode Operation

Boundary mode is a variable frequency, current-mode

switching scheme. The switch turns on and the inductor

currentincreasesuntilaV pincontrolledcurrentlimit.The

C

voltage on the SW pin rises to the output voltage divided

by the secondary-to-primary transformer turns ratio plus

the input voltage. When the secondary current through

the diode falls to zero, the SW pin voltage falls below V .

IN

A discontinuous conduction mode (DCM) comparator

detects this event and turns the switch back on.

The LT3573 derives its information about the isolated

output voltage by examining the primary side ﬂyback

pulse waveform. In this manner, no optoisolator nor extra

transformer winding is required for regulation. The output

voltageiseasilyprogrammedwithtworesistors.Sincethis

IC operates in boundary control mode, the output voltage

is calculated from the switch pin when the secondary cur-

rent is almost zero. This method improves load regulation

without external resistors and capacitors.

Boundary mode returns the secondary current to zero

every cycle, so the parasitic resistive voltage drops do not

cause load regulation errors. Boundary mode also allows

the use of a smaller transformer compared to continuous

conduction mode and no subharmonic oscillation.

At low output currents the LT3573 delays turning on the

switch, and thus operates in discontinuous mode. Unlike

a traditional ﬂyback converter, the switch has to turn on

to update the output voltage information. Below 0.6V on

The Block Diagram shows an overall view of the system.

Many of the blocks are similar to those found in traditional

switching regulators including: internal bias regulator,

oscillator, logic, current ampliﬁer and comparator, driver,

and output switch. The novel sections include a special

ﬂyback error ampliﬁer and a temperature compensation

circuit. In addition, the logic system contains additional

logic for boundary mode operation, and the sampling

error ampliﬁer.

the V pin, the current comparator level decreases to

C

its minimum value, and the internal oscillator frequency

decreases in frequency. With the decrease of the internal

oscillator, the part starts to operate in DCM. The output

current is able to decrease while still allowing a minimum

switch off-time for the error amp sampling circuitry. The

typical minimum internal oscillator frequency with V

C

equal to 0V is 40kHz.

3573f

7

LT3573

APPLICATIONS INFORMATION

ERROR AMPLIFIER—PSEUDO DC THEORY

programming resistors, transformer turns ratio and diode

forward voltage drop:

IntheBlockDiagram, theR (R4)andR (R3)resistors

REF

FB

can be found. They are external resistors used to program

the output voltage. The LT3573 operates much the same

way as traditional current mode switchers, the major

difference being a different type of error ampliﬁer which

derives its feedback information from the ﬂyback pulse.

⎛

⎞

⎛

⎞

R_FB

1

V_OUT= V_BG

− V_F−I_SEC(ESR)

⎜

⎟

⎜

⎟

R

α N

⎝

⎠

⎝

⎠

REF

PS

Additionally, it includes the effect of nonzero secondary

output impedance (ESR). This term can be assumed to

be zero in boundary control mode. More details will be

discussed in the next section.

Operation is as follows: when the output switch, Q1, turns

off, its collector voltage rises above the V rail. The am-

IN

plitude of this ﬂyback pulse, i.e., the difference between

Temperature Compensation

it and V , is given as:

IN

The ﬁrst term in the V

equation does not have a tem-

OUT

V

= (V

+ V + I

• ESR) • N

SEC PS

FLBK

OUT

F

perature dependence, but the diode forward drop has a

signiﬁcant negative temperature coefﬁcient. To compen-

sate for this, a positive temperature coefﬁcient current

V = D1 forward voltage

F

I

= Transformer secondary current

SEC

source is connected to the R pin. The current is set by

REF

ESR = Total impedance of secondary circuit

= Transformer effective primary-to-secondary turns ratio

a resistor to ground connected to the T pin. To cancel the

C

temperature coefﬁcient, the following equation is used:

N

PS

δV_F

δT

R_FB

R_TC

−R_FB

1

N_PS

1

δV_TC

δT

The ﬂyback voltage is then converted to a current by

= −

•

or,

the action of R and Q2. Nearly all of this current ﬂows

FB

through resistor R

to form a ground-referred volt-

REF

δV_TCR_FB

R_TC

=

•

≈

age. This voltage is fed into the ﬂyback error ampliﬁer.

The ﬂyback error ampliﬁer samples this output voltage

information when the secondary side winding current is

zero. The error ampliﬁer uses a bandgap voltage, 1.23V,

as the reference voltage.

N_PSδV_F/ δT δT

N_PS

(δV /δ ) = Diode’s forward voltage temperature coef-

F

T

ﬁcient

(δV /δT) = 2mV

TC

The relatively high gain in the overall loop will then cause

V

= 0.55V

TC

the voltage at the R

resistor to be nearly equal to the

REF

bandgap reference voltage V . The relationship between

The resistor value given by this equation should also be

veriﬁedexperimentally,andadjustedifnecessarytoachieve

optimal regulation over temperature.

BG

V

FLBK

and V may then be expressed as:

BG

⎛

⎞

V_BG

R_REF

V_FLBK

R_FB

α

=

or,

⎜

⎟

The revised output voltage is as follows:

⎝

⎠

⎛

⎞

⎛

⎞

R_FB

1

R_FB⎛ ⎞

1

V_OUT= V_BG

− V_F

V_FLBK= V_BG

⎟ ⎜

⎟

⎜

⎟ ⎜ ⎟

R

N

α

R

⎝ α⎠

⎠

⎝

⎠

⎝

⎠

⎝

REF

PS

REF

⎛

⎞

α = Ratio of Q1 I to I , typically

≈

0.986

V_TC

R_FB

N_PSα

C

E

−

⎜

•

–I_SEC(ESR)

⎟

R

⎝

⎠

V

BG

= Internal bandgap reference

TC

In combination with the previous V

expression yields

FLBK

an expression for V , in terms of the internal reference,

OUT

3573f

8

LT3573

APPLICATIONS INFORMATION

ERROR AMPLIFIER—DYNAMIC THEORY

Selecting R and R

Resistor Values

REF

FB

Due to the sampling nature of the feedback loop, there

are several timing signals and other constraints that are

required for proper LT3573 operation.

The expression for V

developed in the Operation sec-

OUT,

tion, can be rearranged to yield the following expression

for R :

FB

⎡

⎤

R_REF•N_PS

V

+ V α + V

(

)

OUT

F

TC

⎣

⎦

Minimum Current Limit

R_FB

=

V_BG

The LT3573 obtains output voltage information from the

SW pin when the secondary winding conducts current.

The sampling circuitry needs a minimum amount of time

to sample the output voltage. To guarantee enough time,

a minimum inductance value must be maintained. The

primary side magnetizing inductance must be chosen

above the following value:

where,

V

= Output voltage

OUT

V = Switching diode forward voltage

F

α = Ratio of Q1, IC to IE, typically 0.986

N

V

= Effective primary-to-secondary turns ratio

= 0.55V

PS

t_MIN

I_MIN

⎛

⎜

⎝

⎞

⎟

1.4µH

L_PRI≥ V_OUT

•

•N_PS= V_OUT•N_PS•

TC

V ⎠

The equation assumes the temperature coefﬁcients of

the diode and V are equal, which is a good ﬁrst-order

t

I

= minimum off-time, 350ns

MIN

TC

approximation.

= minimum current limit, 250mA

Strictly speaking, the above equation deﬁnes R not as

The minimum current limit is higher than that on the Elec-

trical Characteristics table due to the overshoot caused by

the comparator delay.

FB

an absolute value, but as a ratio of R . So the next ques-

REF

tion is, “What is the proper value for R ?” The answer

REF

is that R

should be approximately 6.04k. The LT3573

REF

Leakage Inductance Blanking

is trimmed and speciﬁed using this value of R . If the

REF

impedance of R

varies considerably from 6.04k, ad-

REF

When the output switch ﬁrst turns off, the ﬂyback pulse

appears.However,ittakesaﬁnitetimeuntilthetransformer

primary side voltage waveform approximately represents

the output voltage. This is partly due to the rise time on

the SW node, but more importantly due to the trans-

former leakage inductance. The latter causes a very fast

voltage spike on the primary side of the transformer that

is not directly related to output voltage (some time is also

required for internal settling of the feedback ampliﬁer

circuitry). The leakage inductance spike is largest when

the power switch current is highest.

ditional errors will result. However, a variation in R

of

REF

several percent is acceptable. This yields a bit of freedom

in selecting standard 1% resistor values to yield nominal

R /R ratios.

FB REF

Tables 1-4 are useful for selecting the resistor values for

R

and R with no equations. The tables provide R ,

REF

FB FB

and R values for common output voltages and

TC

common winding ratios.

Table 1. Common Resistor Values for 1:1 Transformers

V

(V)

N

R

FB

(kΩ)

R

(kΩ)

R

TC

(kΩ)

OUT

PS

REF

3.3

1.00

18.7

6.04

19.1

Inordertomaintainimmunitytothesephenomena, aﬁxed

delay is introduced between the switch turn-off command

andthebeginningofthesampling.Theblankingisinternally

set to 150ns. In certain cases, the leakage inductance may

not be settled by the end of the blanking period, but will

not signiﬁcantly affect output regulation.

5

27.4

64.9

80.6

107

6.04

28

12

15

20

66.5

80.6

105

3573f

9

LT3573

APPLICATIONS INFORMATION

Table 2. Common Resistor Values for 2:1 Transformers

relatively constant maximum output current regardless of

input voltage. This is due to the continuous nonswitching

behavior of the two currents. A ﬂyback converter has both

discontinuous input and output currents which makes it

similar to a nonisolated buck-boost. The duty cycle will

affect the input and output currents, making it hard to

predict output power. In addition, the winding ratio can

be changed to multiply the output current at the expense

of a higher switch voltage.

V

OUT

(V)

N

R

FB

(kΩ)

R

(kΩ)

R

TC

(kΩ)

PS

REF

3.3

2.00

37.4

6.04

18.7

5

56

6.04

28

12

15

130

162

66.5

80.6

Table 3. Common Resistor Values for 3:1 Transformers

(V) (kΩ) (kΩ)

V

OUT

N

R

FB

R

TC

(kΩ)

PS

REF

3.3

3.00

56.2

6.04

20

The graphs in Figures 1-3 show the maximum output

power possible for the output voltages 3.3V, 5V, and 12V.

Themaximumpoweroutputcurveisthecalculatedoutput

power if the switch voltage is 50V during the off-time. To

achieve this power level at a given input, a winding ratio

value must be calculated to stress the switch to 50V,

resulting in some odd ratio values. The curves below are

examplesofcommonwindingratiovaluesandtheamount

of output power at given input voltages.

5

80.6

165

6.04

28.7

54.9

10

Table 4. Common Resistor Values for 4:1 Transformers

(V) (kΩ) (kΩ)

V

N

R

(kΩ)

OUT

PS

FB

REF

TC

3.3

4.00

76.8

113

6.04

19.1

28

5

One design example would be a 5V output converter with

a minimum input voltage of 20V and a maximum input

voltageof30V. Athree-to-onewindingratioﬁtsthisdesign

example perfectly and outputs close to six watts at 30V

but lowers to ﬁve watts at 20V.

Output Power

A ﬂyback converter has a complicated relationship be-

tween the input and output current compared to a buck

or a boost. A boost has a relatively constant maximum

input current regardless of input voltage and a buck has a

8

MAXIMUM

OUTPUT

POWER

MAXIMUM

OUTPUT

POWER

MAXIMUM

OUTPUT

POWER

N = 5:1

N = 2:1

7

6

5

4

3

2

1

0

7

6

5

4

3

2

1

0

7

6

5

4

3

2

1

0

N = 2:1

N = 3:1

N = 7:1

N = 3:1

N = 1:1

N = 2:1

N = 1:1

10 15 20 25 30

INPUT VOLTAGE (V)

45

0

5

35 40

10 15 20 25 30

INPUT VOLTAGE (V)

45

0

5

35 40

10 15 20 25 30

INPUT VOLTAGE (V)

45

0

5

35 40

3573 F01

3573 F03

3573 F02

Figure 1. Output Power for 3.3V Output

Figure 2. Output Power for 5V Output

Figure 3. Output Power for 12V Output

3573f

10

LT3573

APPLICATIONS INFORMATION

TRANSFORMER DESIGN CONSIDERATIONS

Linear Technology has worked with several leading mag-

netic component manufacturers to produce pre-designed

ﬂybacktransformersforusewiththeLT3573.Table5shows

the details of several of these transformers.

Transformer speciﬁcation and design is perhaps the most

criticalpartofsuccessfullyapplyingtheLT3573.Inaddition

to the usual list of caveats dealing with high frequency

isolated power supply transformer design, the following

information should be carefully considered.

Table 5. Predesigned Transformers—Typical Speciﬁcations, Unless Otherwise Noted

TRANSFORMER

PART NUMBER

L

R

SEC

TARGET

SIZE (W × L × H)

PRI

LEAKAGE

PRI

(μH)

(nH)

N :N :N

B

(mΩ)

125

117

82

(mΩ)

5.6

7.5

9.5

11

VENDOR

APPLICATIONS

(mm)

P

S

PA2364NL

PA2363NL

PA2362NL

PA2454NL

PA2455NL

PA2456NL

25

1000

850

550

430

450

390

7:1:1

5:1:1

4:1:1

3:1:1

2:1:1

1:1:1

Pulse Engineering

12V- >3.3V, 1.5A

12V- >5V, 1A

15.24 × 13.1 × 11.45

25

24

24V- >3.3V, 1.5A

24V- >5V, 1A

24

25

82

22

24V- >12V, 0.5A

25

82

84

12V- >12V, 0.3A

24V- >12V, 0.4A

36V- >5V, 0.6A

PA2617NL

PA2626NL

PA2627NL

GA3429-BL

GA3430-BL

GA3431-BL

750310471

750310559

750310562

750310563

21

30

50

25

24

25

245

403

766

566

685

945

350

400

330

325

1:1:0.33

3:1:1

4:1:1

5:1:1

7:1:1

3:1:1

4:1:1

2:1:1

1:1:0.5

164

240

420

95

166

66

Pulse Engineering

Coilcraft

24V- >15V, 0.4A

24V- >5V, 1A

12.70 × 10.67 × 9.14

15.24 × 13.1 × 11.45

15.24 × 12.7 × 11.43

15.24 × 13.3 × 11.43

44

24V- >5V, 1A

7.5

5.5

11

24V- >3.3V, 1.5A

12V- >5V, 1A

90

Coilcraft

90

Coilcraft

12V- >3.3V, 1.5A

24V- >5V, 1A

57

Würth Elektronik

51

16

24V- >3.3V, 1.5A

24V- >12V, 0.5A

60

20

60

24V- >12V, 0.3A

24V- >12V, 0.4A

36V- >5V, 0.6A

750310564

750310799

750370040

750370041

750370047

L11-0059

63

25

30

50

30

24

18

450

125

150

450

150

3:1:1

1:1:0.33

3:1:1

3:1

115

60

50

74

Würth Elektronik

BH Electronics

24V- > 5V, 0.5A

24V- >15V, 0.4A

24V- >5V, 1A

5V- >5V, 0.2A

15.24 × 13.3 × 11.43

9.14 × 9.78 × 10.54

13.35 × 10.8 × 9.14

9.52 × 9.52 × 4.95

60

12.5

26

190

60

12.5

266

90

266

90

L10-1019

1:1

BH Electronics

3573f

11

LT3573

APPLICATIONS INFORMATION

Turns Ratio

Leakage Inductance

Note that when using an R /R

resistor ratio to set Transformer leakage inductance (on either the primary or

FB REF

output voltage, the user has relative freedom in selecting secondary)causesavoltagespiketoappearattheprimary

a transformer turns ratio to suit a given application.In after the output switch turns off. This spike is increasingly

contrast, simpler ratios of small integers, e.g., 1:1, 2:1, prominent at higher load currents where more stored

3:2, etc., can be employed to provide more freedom in energy must be dissipated. In most cases, a snubber

setting total turns and mutual inductance.

circuit will be required to avoid overvoltage breakdown at

the output switch node. Transformer leakage inductance

should be minimized.

Typically,thetransformerturnsratioischosentomaximize

availableoutputpower.Forlowoutputvoltages(3.3Vor5V),

aN:1turnsratiocanbeusedwithmultipleprimarywindings An RCD (resistor capacitor diode) clamp, shown in Figure

relative to the secondary to maximize the transformer’s 4, is required for most designs to prevent the leakage

current gain (and output power). However, remember that inductance spike from exceeding the breakdown voltage

the SW pin sees a voltage that is equal to the maximum of the power device. The ﬂyback waveform is depicted in

input supply voltage plus the output voltage multiplied by Figure 5. In most applications, there will be a very fast

the turns ratio. This quantity needs to remain below the voltage spike caused by a slow clamp diode that may not

ABS MAX rating of the SW pin to prevent breakdown of exceed60V.Oncethediodeclamps,theleakageinductance

the internal power switch. Together these conditions place current is absorbed by the clamp capacitor. This period

an upper limit on the turns ratio, N, for a given application. should not last longer than 150ns so as not to interfere

Choose a turns ratio low enough to ensure:

50V – V

with the output regulation, and the voltage during this

clamp period must not exceed 55V. The clamp diode turns

off after the leakage inductance energy is absorbed and

the switch voltage is then equal to:

IN(MAX)

N <

V_OUT+ V_F

For larger N:1 values, a transformer with a larger physical

size is needed to deliver additional current and provide a

largeenoughinductancevaluetoensurethattheoff-timeis

long enough to accurately measure the output voltage.

V

= V

+ N(V

+ V )

OUT F

SW(MAX)

IN(MAX)

This voltage must not exceed 50V. This same equation

also determines the maximum turns ratio.

When choosing the snubber network diode, careful atten-

tion must be paid to maximum voltage seen by the SW

pin. Schottky diodes are typically the best choice to be

used in the snubber, but some PN diodes can be used if

they turn on fast enough to limit the leakage inductance

spike. The leakage spike must always be kept below 60V.

For lower output power levels, a 1:1 or 1:N transformer

can be chosen for the absolute smallest transformer size.

A 1:N transformer will minimize the magnetizing induc-

tance (and minimize size), but will also limit the available

output power. A higher 1:N turns ratio makes it possible

to have very high output voltages without exceeding the

breakdown voltage of the internal power switch.

Figures 6 and 7 show the SW pin waveform for a 24V ,

IN

5V

application at a 1A load current. Notice that the

OUT

Linear Technology has worked with several magnetic

componentmanufacturerstoproducepredesignedﬂyback

transformers for use with the LT3573. Table 5 shows the

details of several of these transformers.

leakage spike is very high (more than 65V) with the “bad”

diode, while the “good” diode effectively limits the spike

to less than 55V.

3573f

12

LT3573

APPLICATIONS INFORMATION

V

SW

L

S

< 60V

–

< 55V

< 50V

C

R

+

D

t

> 350ns

OFF

TIME

3573 F05

t

< 150ns

3573 F04

SP

Figure 4. RCD Clamp

Figure 5. Maximum Voltages for SW Pin Flyback Waveform

10V/DIV

3573 F06

3573 F07

100ns/DIV

Figure 6. Good Snubber Diode Limits SW Pin Voltage

Figure 7. Bad Snubber Diode Does Not Limit SW Pin Voltage

3573f

13

LT3573

APPLICATIONS INFORMATION

Secondary Leakage Inductance

The Switch Current Limit vs R

plot in the Typical Per-

ILIM

formance Characteristics section depicts a more accurate

current limit.

In addition to the previously described effects of leakage

inductance in general, leakage inductance on the second-

ary in particular exhibits an additional phenomenon. It

forms an inductive divider on the transformer secondary

that effectively reduces the size of the primary-referred

ﬂyback pulse used for feedback. This will increase the

output voltage target by a similar percentage. Note that

unlike leakage spike behavior, this phenomenon is load

independent. To the extent that the secondary leakage

inductance is a constant percentage of mutual inductance

(overmanufacturingvariations),thiscanbeaccommodated

Undervoltage Lockout (UVLO)

The SHDN/UVLO pin is connected to a resistive voltage

divider connected to V as shown in Figure 8. The voltage

IN

threshold on the SHDN/UVLO pin for V rising is 1.22V.

IN

To introduce hysteresis, the LT3573 draws 2.5μA from the

SHDN/UVLOpinwhenthepinisbelow1.22V.Thehysteresis

is therefore user-adjustable and depends on the value of

R1. The UVLO threshold for V rising is:

IN

by adjusting the R /R resistor ratio.

FB REF

1.22V •(R1+ R2)

V

=

+ 2.5µA •R1

IN(UVLO,RISING)

R2

The UVLO threshold for V falling is:

Winding Resistance Effects

Resistance in either the primary or secondary will reduce

IN

overall efﬁciency (P /P ). Good output voltage regula-

OUT IN

1.22V •(R1+ R2)

V

=

tion will be maintained independent of winding resistance

IN(UVLO,FALLING)

R2

due to the boundary mode operation of the LT3573.

To implement external run/stop control, connect a small

NMOS to the UVLO pin, as shown in Figure 8. Turning the

NMOS on grounds the UVLO pin and prevents the LT3573

from operating, and the part will draw less than a 1μA of

quiescent current.

Biﬁlar Winding

A biﬁlar, or similar winding technique, is a good way to

minimize troublesome leakage inductances. However, re-

member that this will also increase primary-to-secondary

capacitanceandlimittheprimary-to-secondarybreakdown

voltage, so biﬁlar winding is not always practical. The

Linear Technology applications group is available and

extremely qualiﬁed to assist in the selection and/or design

of the transformer.

V

IN

R1

R2

SHDN/UVLO

LT3573

Setting the Current Limit Resistor

RUN/STOP

CONTROL

(OPTIONAL)

Themaximumcurrentlimitcanbesetbyplacingaresistor

between the RILIM pin and ground. This provides some

ﬂexibilityinpickingstandardoff-the-shelftransformersthat

may be rated for less current than the LT3573’s internal

power switch current limit. If the maximum current limit

is needed, use a 10k resistor. For lower current limits, the

following equation sets the approximate current limit:

GND

3573 F08

Figure 8. Undervoltage Lockout (UVLO)

R_ILIM= 65 • 10³(1.6A −I_LIM)+ 10k

3573f

14

LT3573

APPLICATIONS INFORMATION

Minimum Load Requirement

Loop Compensation

The LT3573 obtains output voltage information through

thetransformerwhilethesecondarywindingisconducting

current. During this time, the output voltage (multiplied

times the turns ratio) is presented to the primary side of

the transformer. The LT3573 uses this reﬂected signal to

regulate the output voltage. This means that the LT3573

must turn on every so often to sample the output voltage,

which delivers a small amount of energy to the output.

This sampling places a minimum load requirement on the

output of 1% to 2% of the maximum load.

The LT3573 is compensated using an external resistor-

capacitor network on the V pin. Typical values are in the

C

range of R = 50k and C = 1nF (see the numerous sche-

C

maticsintheTypicalApplicationssectionforotherpossible

values). If too large of an R value is used, the part will be

C

more susceptible to high frequency noise and jitter. If too

smallofanR valueisused,thetransientperformancewill

C

suffer. The value choice for C is somewhat the inverse

C

of the R choice: if too small a C value is used, the loop

C

may be unstable, and if too large a C value is used, the

C

transient performance will also suffer. Transient response

plays an important role for any DC/DC converter.

BIAS Pin Considerations

For applications with an input voltage less than 15V, the

Design Example

BIAS pin is typically connected directly to the V pin. For

IN

The following example illustrates the converter design

process using LT3573.

input voltages greater than 15V, it is preferred to leave the

BIAS pin separate form the V pin. In this condition, the

IN

BIAS pin is regulated with an internal LDO to a voltage of

3V.BykeepingtheBIASpinseparatefromtheinputvoltage

at high input voltages, the physical size of the capacitors

can be minimized (the BIAS pin can then use a 6.3V or

10V rated capacitor).

Given the input voltage of 20V to 28V, the required output

is 5V, 1A.

V

= 20V, V

= 1A

= 28V, V = 5V, V = 0.5V

OUT F

IN(MIN)

IN(MAX)

and I

OUT

1. Select the transformer turns ratio to accommodate

the output.

Overdriving the BIAS Pin with a Third Winding

The LT3573 provides excellent output voltage regulation

without the need for an optocoupler, or third winding, but

for some applications with higher input voltages (>20V),

it may be desirable to add an additional winding (often

called a third winding) to improve the system efﬁciency.

For proper operation of the LT3573, if a winding is used as

a supply for the BIAS pin, ensure that the BIAS pin voltage

is at least 3.15V and always less than the input voltage.

The output voltage is reﬂected to the primary side by a

factor of turns ratio N. The switch voltage stress V is

SW

expressed as:

N_P

N_S

N =

V_SW(MAX)= V + N(V_OUT+ V_F) < 50V

IN

Or rearranged to:

For a typical 24V application, overdriving the BIAS pin

IN

50 − V

will improve the efﬁciency gain 4-5%.

IN(MAX)

N <

(V_OUT+ V_F)

Ontheotherhand,theprimarysidecurrentismultipliedby

the same factor of N. The converter output capability is:

1

2

I_OUT(MAX)= 0.8 •(1− D) • NI_PK

N(V_OUT+ V_F)

D =

V + N(V_OUT+ V_F)

IN

3573f

15

LT3573

APPLICATIONS INFORMATION

Table 7.Switching Frequency at Different Primary Inductance

at I_PK

The transformer turns ratio is selected such that the

converter has adequate current capability and a switch

stress below 50V. Table 6 shows the switch voltage stress

and output current capability at different transformer

turns ratio.

f

SW

AT V

f

AT V

IN(MIN)

SW IN(MAX)

L (μH)

25

(kHz)

236

121

61

(kHz)

305

157

80

50

Table 6. Switch Voltage Stress and Output Current Capability vs

Turns-Ratio

100

Note: The switching frequency is calculated at maximum output.

V

AT V

I

AT V

IN(MIN)

DUTY CYCLE

(%)

SW(MAX)

IN(MAX)

OUT(MAX)

N

(V)

(A)

Inthisdesignexample,theminimumprimaryinductanceis

used to achieve a nominal switching frequency of 275kHz

at full load. The PA2454NL from Pulse Engineering is

chosen as the ﬂyback transformer.

1:1

2:1

3:1

4:1

33.5

39

0.53

0.88

1.12

1.30

16~22

28~35

37~45

44~52

44.5

50

Given the turns ratio and primary inductance, a custom-

izedtransformercanbedesignedbymagneticcomponent

manufacturer or a multi-winding transformer such as a

Coiltronics Versa-Pac may be used.

BIAS winding turns ratio is selected to program the BIAS

voltage to 3~5V. The BIAS voltage shall not exceed the

input voltage.

3. Select the output diodes and output capacitor.

The turns ratio is then selected as primary: secondary:

BIAS = 3:1:1.

The output diode voltage stress V is the summation of

D

the output voltage and reﬂection of input voltage to the

secondary side. The average diode current is the load

current.

2. Select the transformer primary inductance for target

switching frequency.

TheLT3573requiresaminimumamountoftimetosample

the output voltage during the off-time. This off-time,

V

N

IN

V_D= V_OUT

+

t

, shall be greater than 350ns over all operating

OFF(MIN)

conditions. The converter also has a minimum current

The output capacitor should be chosen to minimize the

output voltage ripple while considering the increase in

size and cost of a larger capacitor. The following equation

calculates the output voltage ripple.

limit, L , of 250mA to help create this off-time. This

deﬁnes the minimum required inductance as deﬁned as:

MIN

N(V_OUT+ V_F)

L_MIN

=

• t_OFF(MIN)

LI ²

2CV_OUT

I_MIN

PK

ΔV_MAX

=

The transformer primary inductance also affects the

switchingfrequencywhichisrelatedtotheoutputripple.If

abovetheminimuminductance,thetransformer’sprimary

inductancemaybeselectedforatargetswitchingfrequency

range in order to minimize the output ripple.

4. Select the snubber circuit to clamp the switch

voltage spike.

Aﬂybackconvertergeneratesavoltagespikeduringswitch

turn-off due to the leakage inductance of the transformer.

In order to clamp the voltage spike below the maximum

rating of the switch, a snubber circuit is used. There are

many types of snubber circuits, for example R-C, R-C-D

The following equation estimates the switching fre-

quency.

1

f_SW

=

I_PK

N_PS(V_OUT+ V_F)

t_ON+ t_OFF

+

V

^INL

L

3573f

16

LT3573

APPLICATIONS INFORMATION

andZenerclamps.Amongthem,RCDiswidelyused.Figure

9 shows the RCD snubber in a ﬂyback converter.

R

resistor for temperature compensation of the output

TC

voltage. R is selected as 6.04k.

REF

A typical switch node waveform is shown in Figure 10.

A small capacitor in parallel with R ﬁlters out the noise

REF

during the voltage spike, however, the capacitor should

limit to 10pF. A large capacitor causes distortion on volt-

age sensing.

During switch turn-off, the energy stored in the leakage

inductance is transferred to the snubber capacitor, and

eventually dissipated in the snubber resistor.

6. Optimize the compensation network to improve the

transient performance.

V_C(V_C− N • V_OUT

)

1

2

L_SI²_PKf_SW

=

R

The transient performance is optimized by adjusting the

compensationnetwork.Forbestrippleperformance,select

a compensation capacitor not less than 1nF, and select a

compensation resistor not greater than 50k.

The snubber resistor affects the spike amplitude V and

C

duration t , the snubber resistor is adjusted such that

SP

t

is about 150ns. Prolonged t may cause distortion

SP

to the output voltage sensing.

7. Current limit resistor, soft-start capacitor and UVLO

resistor divider

The previous steps ﬁnish the ﬂyback power stage de-

sign.

Use the current limit resistor R

to lower the current

LIM

5. Select the feedback resistor for proper output

voltage.

limitifacompacttransformerdesignisrequired.Soft-start

capacitorhelpsduringthestart-upoftheﬂybackconverter.

Select the UVLO resistor divider for intended input opera-

tion range. These equations are aforementioned.

Using the resistor Tables 1-4, select the feedback resis-

tor R , and program the output voltage to 5V. Adjust the

FB

L

S

–

+

C

R

V

C

NV

OUT

D

V

IN

3573 F10

t

SP

3573 F09

Figure 9. RCD Snubber in a Flyback Converter

Figure 10. Typical Switch Node Waveform

3573f

17

LT3573

TYPICAL APPLICATIONS

Low Input Voltage 5V Isolated Flyback Converter

D1

+

V

3:1

V

IN

OUT

5V

C1

R1

5V, 350mA

C6

0.22μF

R8

2k

T1

24μH

C5

10μF

200k

2.6μH

V

IN

47μF

SHDN/UVLO

–

V

R2

90.9k

OUT

D2

R3

80.6k

R

FB

LT3573

R

REF

R4

6.04k

TC

R

SW

ILIM

SS

VC

GND TEST BIAS

R5

10k

R6

28.7k

R7

57.6k

V

IN

T1: PULSE PA2454NL OR WÜRTH ELEKTRONIK 750310471

C2

10nF

C3

D1: B340A

1000pF

D2: 1N4148

C5: MURATA, GRM32ER71A476K

3573 TA02

12V Isolated Flyback Converter

D1

+

V

2:1:1

V

IN

OUT1

5V

12V, 100mA

C1

10μF

R1

C6

R8

2k

T1

C5

200k

10.9μH

D2

0.22μF

V

IN

43.6μH

47μF

SHDN/UVLO

–

+

V

OUT1

R2

90.9k

D3

R3

118k

V

OUT2

R

FB

C6

LT3573

10.9μH

R

47μF

REF

R4

6.04k

–

V

OUT2

–12V, 100mA

TC

SW

R

ILIM

SS

VC

GND TEST BIAS

R5

10k

R6

59k

R7

56.2k

V

IN

C2

10nF

C3

3300pF

T1: COILTRONICS VPH1-0076-R

D1, D2: B240A

D3: 1N4148

C5, C6: MURATA, GRM32ER71A476K

3573 TA03

3573f

18

LT3573

TYPICAL APPLICATIONS

5V Isolated Flyback Converter

D1

V

+

IN

3:1:1

V

OUT

12V TO

5V, 700mA

C1

10μF

24V

(*40V)

R1

499k

C6

0.22μF

R8

2k

T1

24μH

C5

2.6μH

V

IN

47μF

SHDN/UVLO

–

V

R2

71.5k

OUT

D3

R3

80.6k

R

FB

LT3573

R

REF

R4

6.04k

TC

R

SW

ILIM

SS

VC

GND

BIAS

TEST

D2

R6

R5

R7

28.7k 10k

45.3k

*OPTIONAL THIRD

WINDING FOR

40V OPERATION

C2

10nF

C4

4.7μF

L1C

2.6μH

C3

1000pF

3573 TA04

T1: PULSE PA2454NL

OR WÜRTH ELEKTRONIK 750370047

D1: B340A

D3: 1N4148

C5: MURATA, GRM32ER71A476K

Efﬁciency

90

80

70

60

50

40

30

20

10

0

V

= 24V

IN

V

= 12V

IN

400 600 800 1000 1200 1400

(mA)

0

200

I

OUT

3573 TA04b

3573f

19

LT3573

TYPICAL APPLICATIONS

3.3V Isolated Flyback Converter

D1

V

+

IN

4:1:1

V

OUT

12V TO 24V

3.3V, 1A

C1

10μF

(*40V)

R1

499k

C6

0.22μF

R8

2k

T1

24μH

C5

1.5μH

V

IN

47μF

SHDN/UVLO

–

V

R2

71.5k

OUT

D3

R3

76.8k

R

FB

LT3573

R

REF

R4

6.04k

TC

R

SW

ILIM

SS

VC

GND TEST BIAS

D2

R6

R5

R7

25.5k

19.1k 10k

*OPTIONAL THIRD

WINDING FOR

40V OPERATION

C4

4.7μF

C2

10nF

C3

1500pF

L1C

1.5μH

3573 TA05

T1: PULSE PA2362NL

OR COILCRAFT GA3429-BL

D1: B340A

D3: 1N4148

12V Isolated Flyback Converter

D1

3:1

V

OUT

V

IN

5V

12V, 400mA

C1

10μF

R1

C6

R8

2k

C5

T1

58.5μH

499k

6.5μH

0.22μF

V

IN

47μF

SHDN/UVLO

R2

71.5k

–

V

OUT

D2

R3

178k

LT3573

R

FB

R

REF

R4

6.04k

TC

R

ILIM

SW

SS

VC

GND TEST BIAS

R7

40.2k

R5

10k

R6

59k

V

IN

C2

10nF

C3

4700pF

T1: COILTRONICS VP1-0102-R

D1: B340A

D2: 1N4148

3573 TA06

3573f

20

LT3573

TYPICAL APPLICATIONS

Four Output 12V Isolated Flyback Converter

V

+

IN

2:1:1:1:1

T1

V

OUT1

12V TO

12V, 60mA

24V

C1

D1

D2

C5

C6

R8

2k

10.9μH

10μF

43.6μH

R1

V

47μF

0.22μF

IN

499k

–

+

V

OUT1

D5

SHDN/UVLO

V

OUT2

R2

71.5k

12V, 60mA

R3

118k

C6

10.9μH

47μF

LT3573

R

FB

–

V

OUT2

OUT3

R

REF

TC

R4

6.04k

+

V

R

12V, 60mA

ILIM

D3

D4

C7

10.9μH

47μF

V

SW

SS

–

OUT3

OUT4

VC

GND TEST BIAS

+

R5

10k

R6

59k

R7

20k

V

12V, 60mA

IN

C8

C2

10nF

C3

47μF

0.01μF

–

V

OUT4

T1: COILTRONICS VPH1-0076-R

D1-D4: B240A

D5: 1N4148

3573 TA07

5V Isolated Flyback Converter Using a Tiny Transformer

D1

3:1

V

OUT

V

12V

IN

5V, 600mA

C1

R1

C6

R8

2k

C5

T1

20μH

10μF

200k

2.2μH

0.22μF

V

IN

47μF

SHDN/UVLO

R2

90.9k

–

V

OUT

D2

R3

80.6k

LT3573

R

FB

R

REF

R4

6.04k

TC

ILIM

SS

R

SW

VC

GND TEST BIAS

R7

47.5k

R5

30k

R6

28.7k

V

IN

C2

10nF

C3

1000pF

T1: BH ELECTRONICS L11-0059

D1: B340A

D2: 1N4148

3573 TA08

3573f

21

LT3573

TYPICAL APPLICATIONS

5V Isolated Flyback Converter Using Coupling Inductor

D1

+

V

1:1

V

IN

OUT

5V

5V, 0.2A

C6

0.22μF

R8

2k

C5

47μF

C1

10μF

T1

23.6μH

R1

200k

23.6μH

V

IN

SHDN/UVLO

–

V

OUT

R2

90.9k

D2

R3

26.1k

LT3573

R

FB

R

REF

R4

6.04k

TC

R

SS

VC

ILIM

SW

GND TEST BIAS

R7

56.2k

R5

10k

R6

26.1k

V

IN

C2

10nF

C3

1500pF

T1: BH ELECTRONICS, L10-1022

D1: B220A

D2: CMD5H-3

3573 TA09

300V Isolated Flyback Converter

D1

+

V

1:17

OUT

IN

300V, 5mA

5V TO 15V

C6

0.22μF

R8

4.7k

C1

10μF

T1

26μH

C5, 0.47μF, 400V

POLY FILM

R1

100k

7.583mH

V

IN

SHDN/UVLO

–

V

OUT

R2

36k

D2

R3

90.9k

LT3573

R

FB

R

REF

R4

6.04k

TC

R

SS

ILIM

SW

VC

GND TEST BIAS

R5

10k

R6

20.5k

R7

10k

V

IN

C2

10nF

C3

1000pF

D1: TOSHIBA CRF02

D2: ZETEX ZHCS 506TA

3573 TA10

3573f

22

LT3573

PACKAGE DESCRIPTION

MSE Package

16-Lead Plastic MSOP, Exposed Die Pad

(Reference LTC DWG # 05-08-1667 Rev A)

BOTTOM VIEW OF

EXPOSED PAD OPTION

2.845 p 0.102

(.112 p .004)

2.845 p 0.102

(.112 p .004)

0.889 p 0.127

(.035 p .005)

1

8

0.35

REF

5.23

(.206)

MIN

1.651 p 0.102

(.065 p .004)

1.651 p 0.102

(.065 p .004)

3.20 – 3.45

(.126 – .136)

0.12 REF

DETAIL “B”

CORNER TAIL IS PART OF

THE LEADFRAME FEATURE.

FOR REFERENCE ONLY

DETAIL “B”

16

9

0.305 p 0.038

0.50

(.0197)

BSC

NO MEASUREMENT PURPOSE

4.039 p 0.102

(.159 p .004)

(NOTE 3)

(.0120 p .0015)

TYP

0.280 p 0.076

(.011 p .003)

RECOMMENDED SOLDER PAD LAYOUT

16151413121110

9

REF

DETAIL “A”

0o – 6o TYP

0.254

(.010)

3.00 p 0.102

(.118 p .004)

(NOTE 4)

4.90 p 0.152

(.193 p .006)

GAUGE PLANE

0.53 p 0.152

(.021 p .006)

1 2 3 4 5 6 7 8

DETAIL “A”

0.86

(.034)

REF

1.10

(.043)

MAX

0.18

(.007)

SEATING

PLANE

0.17 – 0.27

(.007 – .011)

TYP

0.1016 p 0.0508

(.004 p .002)

MSOP (MSE16) 0608 REV A

0.50

(.0197)

BSC

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

3573f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

23

LT3573

TYPICAL APPLICATION

9V to 30V_IN, +5V/–5V_OUTIsolated Flyback Converter

T1

3:1:1:1

D1

D2

+

V

IN

OUT

9V TO 30V

C1

+5V, 350mA

C6

R8

2k

C5

47μF

L1A

63μH

L1B

7μH

V

10μF

IN

0.22μF

R1

357k

COM

SHDN/UVLO

LT3573

D4

R2

51.1k

L1C

7μH

C6

R3

80.6k

47μF

R

FB

–

V

OUT

R

REF

–5V, 350mA

R4

6.04k

TC

R

ILIM

SS

VC

SW

GND TEST BIAS

D3

R7

23.7k

C3

R5

R6

28.7k 10k

*OPTIONAL THIRD

WINDING FOR

>24V OPERATION

C2

10nF

C4

4.7μF

L1D

7μH

2700pF

T1: WÜRTH ELEKTRONIK 750310564

3573 TA11

RELATED PARTS

PART NUMBER

LT1424-5

DESCRIPTION

COMMENTS

Isolated Flyback Switching Regulator

5V Output Voltage, No Optoisolator Required

LT1424-9

9V Output, Regulation Maintained Under Light Loads

No Optoisolator or “Third Winding” Required, Up to 6W Output

LT1425

Isolated Flyback Switching Regulator with No

External Power Devices

LTC^®1624

LT1725

Current Mode DC/DC Controller

300kHz Operating Frequency; Buck, Boost, SEPIC Topologies;

IN

V

Up to 36V, SO-8 Package

General Purpose Isolated Flyback Controller

No Optoisolator Required, V and V

Limited Only by External Power

OUT

IN

Components

LT1737

High Power Isolated Flyback Controller

No Optoisolator or “Third Winding” Required, Up to 50W Output

LTC1871/LTC1871-1, Wide Input Range, No R

^TMCurrent Mode

Adjustable Switching Frequency, 2.5V ≤ V ≤ 36V, Optional Burst Mode^®

SENSE

IN

LTC1871-7

Flyback, Boost and SEPIC Controller

Operation at Light Load

LTC1872, LTC1872B SOT-23 Constant-Frequency Current Mode Boost 550kHz Switching Frequency, 2.5V to 9.8V V Range

IN

DC/DC Controller

LT1950

Current Mode PWM Controller

Controller for Forward, Boost, Flyback and SEPIC Converters from 30W to 300W

LTC3803/LTC3803-5 200kHz Flyback DC/DC Controller

V

IN

V

IN

and V

Limited Only by External Components

OUT

LTC3805/LTC3805-5 Adjustable Frequency Flyback Controller

LTC3806

LT3825

LT3837

LTC3872

Synchronous Flyback Controller

High Efﬁciency (89%); Multiple Output with Excellent Cross Regulation

Isolated No-Opto Synchronous Flyback Controller

V

16V to 75V Limited by External Components, Up to 80W, Current Mode Control

IN

4.5V to 36V Limited by External Components, Up to 60W, Current Mode Control

IN

No R

Boost Controller

550kHz Fixed Frequency, 2.75V ≤ V ≤ 9.8V, ThinSOT^TMor DFN Package

SENSE

IN

LTC3873/LTC3873-5 No R

Constant-Frequency Boost/Flyback/

V

and V

Limited by External Components, 200kHz Frequency, ThinSOT or

OUT

SENSE

IN

SEPIC Controller

DFN Package

Burst Mode is a registered trademark of Linear Technology Corporation. No R

and ThinSOT are trademarks of Linear Technology Corporation.

SENSE

3573f

LT 1008 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

24

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	3573
厂家：	Linear
描述：	Isolated Flyback Converter Without an Opto-Coupler 隔离型反激式转换器无需光耦合器转换器光电
文件：	总24页 (文件大小：242K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

3573 [Linear]

相关型号：

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3573-006

3573-1000

3573-1001

3573-1002

3573-1006

3573-200

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