3509 [Linear]
Dual 36V, 700mA Step-Down Regulator; 双36V ， 700毫安降压型稳压器
| 型号： | 3509 |
| 厂家： | 
Linear |
| 描述： | Dual 36V, 700mA Step-Down Regulator |
| 文件： | 总24页 (文件大小：251K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT3509
Dual 36V, 700mA
Step-Down Regulator
FEATURES
DESCRIPTION
TheLT®3509isadual,currentmode,step-downswitching
regulator, with internal power switches each capable of
providing700mAoutputcurrent.Thisregulatorprovidesa
compactandrobustsolutionformulti-railsystemsinharsh
environments. It incorporates several protection features
including overvoltage lockout and cycle by cycle current
limit. Thermal shutdown provides additional protection.
Theloopcompensationcomponentsandtheboostdiodes
are integrated on-chip. Switching frequency is set by a
single external resistor. External synchronization is also
possible. The high maximum switching frequency allows
the use of small inductors and ceramic capacitors for low
ripple. Constant frequency operation above the AM band
avoidsinterferencewithradioreception,makingtheLT3509
well suited for automotive applications. Each regulator
has an independent shutdown and soft-start control pin.
When both converters are powered down, the common
circuitry enters a low current shutdown state.
n
Two 700mA Switching Regulators with Internal
Power Switches
n
Wide 3.6V to 36V Operating Range
n
Over-Voltage Lockout Protects Circuit Through 60V
Supply Transients
Short Circuit Robust
n
n
Low Dropout Voltage − 95% Maximum Duty Cycle
n
Adjustable 300kHz to 2.2MHz Switching Frequency
Synchronizable Over the Full Range
n
Uses Small Inductors and Ceramic Capacitors
n
Integrated Boost Diodes
Internal Compensation
n
n
Thermally Enhanced 14 Lead (4 mm × 3 mm)
DFN and 16 Lead MSOP Packages
APPLICATIONS
n
Automotive Electronics
n
Industrial Controls
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
n
Wall Transformer Regulation
n
Networking Devices
n
CPU, DSP, or FPGA Power
TYPICAL APPLICATION
3.3V and 5V Dual Output Step-Down Converter
Efficiency
6.5V TO 36V
(Transient
90
to 60V)
2.2μF
85
80
75
70
65
60
55
50
V
= 5V
OUT
V
BD
IN
BOOST1
BOOST2
V
= 3.3V
0.1μF
0.1μF
10μH
6.8μH
OUT
3.3V
700mA
5V
SW1
SW2
700mA
LT3509
31.6k
53.6k
DA1
FB1
DA2
FB2
MBRM140
MBRM140
22μF
RUN/SS1 RUN/SS2
10μF
V
SW
= 12V
= –700kHz
IN
1nF
SYNC
R
T
f
1nF
10.2k
GND
10.2k
60.4k
0.2 0.3 0.4 0.5 0.6
LOAD CURRENT (A)
0.0
0.7
0.1
3509 TA01a
f
= 700kHz
SW
3509 TA01b
3509f
1
LT3509
ABSOLUTE MAXIMUM RATINGS
(Note 1)
V Pin (Note 2) ........................................................60V
Operating Junction Temperature Range (Notes 3, 5)
LT3509E............................................. –40°C to 125°C
LT3509I.............................................. –40°C to 125°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec.)
IN
BD Pin.......................................................................20V
BOOST Pins ..............................................................60V
BOOST Pins above SW .............................................30V
RUN/SS, FB, R , SYNC pins........................................6V
T
MSE16 Package................................................ 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
DA1
BOOST1
SW1
1
2
3
4
5
6
7
14 FB1
1
2
3
4
5
6
7
8
DA1
BOOST1
SW1
16 FB1
13 RUN/SS1
12 BD
15 RUN/SS1
14 AGND
13 BD
V
V
IN
IN
15
17
V
11 SYNC
IN
12 SYNC
SW2
BOOST2
DA2
10
9
R
11 R
T
SW2
BOOST2
DA2
T
10 RUN/SS2
FB2
RUN/SS2
FB2
9
8
MSE PACKAGE
16-LEAD PLASTIC MSOP
DE14 PACKAGE
θ
= 43°C/W, θ = 4.3°C/W
JC
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
JA
14-LEAD (4mm s 3mm) PLASTIC DFN
θ
= 43°C/W, θ = 4.3°C/W
JC
JA
EXPOSED PAD (PIN 15) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LT3509EDE#PBF
LT3509IDE#PBF
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3509EDE#TRPBF
LT3509IDE#TRPBF
LT3509EMSE#TRPBF
LT3509IMSE#TRPBF
3509
3509
3509
3509
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
14-Lead (4mm × 3mm) Plastic DFN
14-Lead (4mm × 3mm) Plastic DFN
16-Lead Plastic MSOP with Exposed Pad
16-Lead Plastic MSOP with Exposed Pad
LT3509EMSE#PBF
LT3509IMSE#PBF
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3509f
2
LT3509
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 12V, VBD = 5V. (Note 3)
PARAMETER CONDITIONS
MIN
TYP
3.3
38.5
1.9
9
MAX
3.6
UNITS
V
V
V
Undervoltage Lockout
Overvoltage Lockout
IN
IN
37
40
V
Input Quiescent Current
Not Switching V > 0.8V
2.2
mA
μA
V
FB
Input Shutdown Current
V(RUN/SS[1,2]) < 0.3V
15
l
Feedback Pin Voltage
0.784
0.4
0.8
0.01
0.6
0.816
Reference Voltage Line Regulation
RUN/SS Shutdown Threshold
3.6V < V < 36V
%/V
V
IN
0.8
2
RUN/SS Voltage for Full I
V
OUT
RUN/SS Pin Pull-up Current
Feedback Pin Bias Current
Switch Current Limit
0.7
1
1.3
500
1.9
1.2
36
μA
nA
A
l
l
90
1.05
0.7
1.4
0.95
22
DA Comparator Current Threshold
Boost Pin Current
A
I
= 0.9A
mA
μA
V
SW
Switch Leakage Current
Switch Saturation Voltage
Minumum Boost Voltage above Switch
Boost Diode Forward Voltage
Boost Diode Leakage
0.01
0.32
1.5
0.7
0.1
1.0
I
I
I
= 0.9A (Note 4)
= 0.9A
SW
2.2
0.9
5
V
SW
= 20mA
V
BD
V = 30V
μA
R
l
l
Switching Frequency
R = 40.2kΩ
0.92
237
2.0
1.0
264
2.2
1.08
290
2.5
MHz
kHz
T
R = 180kΩ
T
R = 14.1kΩ
MHz
T
Switch Minimum Off Time
80
150
ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device reliability
and lifetime.
and correlation with statistical process controls. The LT3509I is guaranteed
over the full –40°C to 125°C temperature range.
Note 4. Switch Saturation Voltage is guaranteed by design.
Note5.ThisICincludesover-temperatureprotectionthatisintendedtoprotect
the device during momentary overload conditions. Junction temperature will
exceedthemaximumoperatingtemperaturewhenovertemperatureprotection
is active. Continuous operation above the specified maximum operating
junction temperature may impair device reliability.
Note 2. Absolute Maximum Voltage at the V pin is 60V for non-repetitive
IN
1 second transients and 36V for continuous operation.
Note 3. The LT3509E is guaranteed to meet performance specifications from
0°C to 125°C junction temperature. Specifications over the –40°C to 125°C
operating junction temperature range are assured by design, characterization
3509f
3
LT3509
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load Current
VOUT = 5V, fSW = 2.0MHz
Efficiency vs Load Current
VOUT = 1.8V, fSW = 0.7MHz
Efficiency vs Load Current
VOUT = 3.3V, fSW = 2.0MHz
95
90
95
90
85
80
75
70
65
60
T
= 25ºC
T
= 25ºC
A
T
= 25ºC
A
A
90
85
80
75
70
65
60
55
85
80
75
70
65
60
55
50
V
V
= 12V
= 24V
IN
IN
V
= 12V
IN
V
= 12V
IN
0.4
(A)
0.6
0
0.8
0.2
0.4
0.4
(A)
0.6
0
0.2
0.6
0.8
0
0.8
0.2
I
I
(A)
I
LOAD
LOAD
LOAD
3509 G02
3509 G03
3509 G01
Switch VCE(SAT) vs ISW
IBOOST vs ISW
0.35
0.3
25
20
T
= 25ºC
T
= 25ºC
A
A
0.25
0.2
15
10
5
0.15
0.1
0.05
0
0
0.4
0.6
(A)
0
0.8
1.0
0.2
0
0.4
0.6
(A)
0.8
1
0.2
I
I
SW
SW
3509 G04
3509 G05
Boost Diode Characteristics
Frequency vs RT
1.2
1
2.2
2.0
T
= 25ºC
A
T = 25ºC
A
1.5
1.0
0.5
0.8
0.6
0.4
0.2
0
0
50
BOOST DIODE CURRENT (mA)
0
100
150
20 40 60 80
0
100 120 140 160 180
R (kꢀ)
T
3509 G06
3509 G07
3509f
4
LT3509
TYPICAL PERFORMANCE CHARACTERISTICS
Max VIN for Constant Frequency
VOUT = 3.3V, fSW = 2MHz
FSW vs Temperature
FB Pin Voltage vs. Temperature
1.025
1.02
1.015
1.01
1.005
1
0.81
0.805
0.8
30
25
R
= 40.2k
T
T
T
= 25ºC
= 85ºC
A
A
20
15
10
0.995
0.99
0.985
0.98
0.795
0.79
5
0
0.975
−25
0
25
50
−25
0
25
50
0.2
−50
75 100 125
−50
75 100 125
0
0.4
0.6
0.8
TEMPERATURE(ºC)
TEMPERATURE(ºC)
I
(A)
LOAD
3509 G08
3509 G09
3509 G10
Max VIN for Constant Frequency
VOUT = 5V, fSW = 2MHz
Min ON Time vs. Temperature
ILOAD = 0.3A
140
120
100
80
45
40
35
T
= 25ºC
= 85ºC
A
T
A
30
25
20
15
10
5
60
40
20
0
0
−25
0
25
50
0.2
−50
75 100 125
0
0.4
0.6
0.8
TEMPERATURE(ºC)
I
(A)
LOAD
3509 G12
3509 G11
ILIM vs Temperature
ILIM vs Duty Cycle
1.8
1.6
1.4
1.2
1
2
T
= 25ºC
A
SWITCH
1.5
1
0.8
0.6
0.4
0.2
0
DA
0.5
0
40 50 60 70 80 90
100
40
80
0
10 20 30
–40
120
0
DUTY CYCLE (%)
TEMPERATURE (ºC)
3509 G14
3509 G13
3509f
5
LT3509
PIN FUNCTIONS (DFN/MSE)
DA1, DA2 (Pins 1, 7 / Pins 1, 8): The DA pins are the
anode connections for the catch diodes. These are con-
nected internally to the exposed ground pad by current
sensing resistors.
soft-start.Thepinsarepulleddownbyapproximately250μA
in the case of overvoltage or overtemperature conditions
in order to discharge the soft-start capacitors. The pins
can also be driven by a logic control signal of up to 5.0V.
In this case, it is necessary place a 10k to 50k resistor
in series along with a capacitor from the RUN/SS pin to
ground to ensure that there will be a soft-start for both
initial turn on and in the case of fault conditions. Do not
BOOST1, BOOST2 (Pins 2, 6 / Pins 2, 7): The BOOST
pins are used to dynamically boost the power transistor
base above V to minimize the voltage drop and power
IN
loss in the switch. These should be tied to the associated
tie these pins to V .
IN
switch pins through the boost capacitors.
R (Pin 10 / Pin 11): The R pin is used to set the internal
T
T
SW1, SW2 (Pins 3, 5 / Pins 3, 6): The SW pins are the
internalpowerswitchoutputs.Theseshouldbeconnected
to the associated inductors, catch diode cathodes, and the
boost capacitors.
oscillator frequency. A 40.2k resistor from R to ground
T
results in a nominal frequncy of 1MHz.
SYNC(Pin11/Pin12):TheSYNCpinallowstheswitching
frequency to be synchronized to a external clock. Choose
V (Pin 4 / Pins 4, 5): The V pins supply power to the
IN
IN
R resistor to set a free-run frequency at least 12% less
T
internal power switches and control circuitry. In the MSE
than the external clock frequency for correct operation.
package the V pins must be tied together. The input
IN
capacitor should be placed as close as possible to the
BD (Pin 12 / Pin 13): The BD pin is common anode con-
nectionoftheinternalSchottkyboostdiodes.Thisprovides
the power for charging the BOOST capacitors. It should
be locally bypassed for best performance.
supply pins.
FB1, FB2 (Pins 14, 8 / Pins 16, 9): The FB pins are used
to set the regulated output voltage relative to the internal
reference. These pins should be connected to a resistor
divider from the regulated output such that the FB pin is
at 0.8V when the output is at the desired voltage.
GND (Exposed Pad): This is the reference and supply
groundfortheregulator.Theexposedpadmustbesoldered
to the PCB and electrically connected to supply ground.
Use a large ground plane and thermal vias to optimize
thermal performance. The current in the catch diodes also
flows through the GND pad to the DA pins.
RUN/SS1,RUN/SS2(Pins13,9/Pins15,10):TheRUN/SS
pins enable the associated regulator channel. If both pins
are pulled to ground, the device will shut-down to a low
power state. In the range 0.7V to 2.0V, the regulators are
enabled but the peak switch current and the DA pin maxi-
mum current are limited to provide a soft-start function.
Above 2V, the full output current is available. The inputs
incorporate a 1μA pull-up so that they will float high or
charge an external capacitor to provide a current limited
AGND (Pin 14, MSE Package Only): This is the connected
to the ground connection of the chip and may be used as a
separatereturnforthelowcurrentcontrolsidecomponents.
It should not be used as the only ground connection or as
a connection return for load side components.
3509f
6
LT3509
BLOCK DIAGRAM
COMMON
CIRCUITRY
1 OF 2 REGULATOR CHANNELS SHOWN
V
IN
BD
C1
NOTE: THE BD PIN
IS COMMON TO
BOTH CHANNELS.
OVERVOLTAGE
DETECT
BOOST
DIODE
BOOST
RUN/SS1
RUN/SS2
MAIN CURRENT
COMPARATOR
SHUTDOWN
AND
SOFT-START
CONTROL
POWER
SWITCH
C4
L1
SWITCH
LOGIC
SWITCH
DRIVER
C3
SW
DA
V
OUT
DA CURRENT
C2
V
AND
REF
COMPARATOR
CORE
D1
–17mV
VOLTAGE
REGULATOR
V
C
C5
–
SLOPE
R1
ERROR
AMPLIFIER
SYNC
18m7
V
REF
0.8V
OSCILLATOR
FB
R
T
R2
CLAMP
R
T
3509 BD
GND
Figure 1. Functional Block Diagram
3509f
7
LT3509
OPERATION
Overview
that when the voltage at FB reaches 0.8V, the Main Current
Comparatorthresholdwillfallandreducethepeakinductor
current and hence the average current, until it matches the
load current. By making current the controlled variable in
the loop, the inductor impedance is effectively removed
from the transfer function and the compensation network
is simplified. The Main Current Comparator threshold is
reduced by the slope compensation signal to eliminate
sub-harmonic oscillations at duty cycles >50%.
The LT3509 is a dual, constant frequency, current mode
switching regulator with internal power switches. The two
independent channels share a common voltage reference
andoscillatorandoperateinphase.Theswitchingfrequency
is set by a single resistor and can also be synchronized to
an external clock. Operation can be best understood by
referring to the Block Diagram (Figure 1).
Startup and Shutdown
Current Limiting
When the RUN/SS[1,2] pins are pulled low (<0.3V) the
associatedregulatorchannelisshut-down.Ifbothchannels
are shut down, the common circuitry also enters a low
currentstate.WhentheRUN/SSpinsexceedapproximately
0.7V, the common circuitry and the associated regulator
areenabled but theoutputcurrentis limited. From 0.7Vup
to 2.0V the current limit increases until it reaches the full
value. The RUN/SS pins also incorporate a 1μA pull-up to
approximately 3V, so the regulator will run if they are left
open. A capacitor to ground will cause a current limited
soft-starttooccuratpower-up.Inthecaseofundervoltage,
overvoltage or over-temperature conditions the internal
circuitry will pull the RUN/SS pins down with a current
of approximately 250μA. Thus a new soft-start cycle will
occur when the fault condition ends.
Current mode control provides cycle by cycle current
limiting by means of a clamp on the maximumcurrentthat
can be provided by the switch. A comparator monitors the
current flowing through the catch diode via the DA pin.
This comparator delays switching if the diode current is
higher than 0.95A (typical). This current level is indicative
of a fault condition such as a shorted output with a high
input voltage. Switching will only resume once the diode
current has fallen below the 0.95A limit. This way the DA
comparator regulates the valley current of the inductor to
0.95A during a short circuit. This will ensure the part will
survive a short circuit event.
Over and Under Voltage Shutdown
A basic under voltage lockout prevents switching if V
IN
Voltage and Current Regulation
is below 3.3V (typical). The overvoltage shutdown stops
the part from switching when V is greater than 38.5V
IN
The power switches are controlled by a current-mode
regulator architecture. The power switch is turned on at
the beginning of each clock cycle and turned off by the
Main Current Comparator. The inductor current will ramp
up while the switch is on until it reaches the peak current
threshold. The current at which it turns off is determined
by the Error Amp and the internal compensation network.
When the switch turns off, the current in the inductor
will cause the SW pin to fall rapidly until the catch diode,
D1, conducts. The voltage applied to the inductor will
now reverse and the current will linearly fall. The resistor
divider, R1 and R2, sets the desired output voltage such
(typical). This protects the device and its load during
momentary overvoltage events. After the input voltage
falls below 38.5V, the part initiates a soft start sequence
and resumes switching.
BOOST Circuit
To ensure best efficiency and minimum dropout voltage
the output transistor base drive is boosted above V by
IN
the external boost capacitors (C4). When the SW pin is
low the capacitors are charged via the BOOST diodes and
the supply on BD.
3509f
8
LT3509
APPLICATIONS INFORMATION
Shutdown and Soft Start
Setting The Output Voltage
When the RUN/SS pins are pulled to ground, the part will
shut down to its lowest current state of approximately
10μA. If driving a large capacitive load it may be desirable
to use the current limiting soft start feature. Connecting
capacitors to ground from the RUN/SS pins will control
the delay until full current is available. The pull-up current
is 1μA and the full current threshold is 2V so the start-up
time is given by:
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the resistors
according to:
V
0.8
⎛
⎝
⎞
⎠
R1=R2• OUT –1
⎜
⎟
The designators correspond to Figure 1. R2 should be
20kΩ or less to avoid bias current errors.
6
T = 2 × C × 10 s
Frequency Setting
For example a 0.005μF capacitor will give a time to full
current of 10ms. If both outputs can come up together
then the two inputs can be paralleled and tied to one ca-
pacitor. In this case use twice the capacitor value to obtain
the same start-up time. During the soft-start time both
the peak current threshold and the DA current threshold
will track so the part will skip pulses as required to limit
the maximum inductor current. Starting up into a large
capacitor is not much different to starting into a short-
circuit in this respect.
The timing resistor R for any desired frequency in the
T
range 270kHz to 2.2MHz can be calculated from the
following formula:
⎛
⎞
1.166
fSW
R =
–0.166 •40.2
⎜
⎟
T
⎝
⎠
Where f is in MHz and R is in kΩ.
SW
T
Table 1. Standard E96 Resistors for Common Frequencies
FREQUENCY
270 kHz
300 kHz
400kHz
500kHz
1MHz
TIMING RESISTOR R (kΩ)
T
165
150
113
88.7
40.2
16.2
14
V
SW
10V/DIV
I
L
0.2A/DIV
2MHz
V
OUT
5V/DIV
2.2MHz
3509 F02
TIME 1ms/DIV
Figure 2. Soft-Start
3509f
9
LT3509
APPLICATIONS INFORMATION
External Synchronization
the input voltage during the switch on time. Depending
on the input and output voltages the boost supply can be
providedbytheinputvoltage, oneoftheregulatedoutputs
or an independent supply such as an LDO.
The external synchronization provides a trigger to the
internal oscillator. As such, it can only raise the frequency
above the free-run value. To allow for device and
component tolerances, the free run frequency should be
set to at least 12% lower than the lowest supplied external
synchronization reference. The oscillator and hence the
switching frequency can then pushed up from 12% above
Input Voltage Range
Firstly, the LT3509 imposes some hard limits due to the
undervoltage lock-out and the overvoltage protection. A
givenapplicationwillalsohaveareduced,normaloperating
range over which maximum efficiency and lowest ripple
are obtained. This usually requires that the device is
operating at a fixed frequency without skipping pulses.
There may also be zones above and below the normal
range where regulation is maintained but efficiency and
ripple may be compromised. At the low end, insufficient
input voltage will cause loss of regulation and increased
ripple–this is the dropout range. At the high end if the
duty cycle becomes too low this will cause pulse skipping
and excessive ripple. This is the pulse-skip region. Both
situationsalsoleadtohighernoiseatfrequenciesotherthan
the chosen switching frequency. Occasional excursions
into pulse-skip mode, during surges for example, may be
tolerable. Pulse skipping will also occur at light loads even
within the normal operating range but ripple is usually not
degraded because at light load the output capacitor can
hold the voltage steady between pulses.
thefree-run frequency,setbytheselectedR .Forexample,
T
if the minimum external clock is 300kHz, the R should
T
be chosen for 264KHz.
The SYNC input has a threshold of 1.0V nominal so it is
compatible with most logic levels. The duty cycle is not
critical provided the high or low pulse width is at least
80ns.
Design Procedure
Before starting detailed design a number of key design
parameters should be established as these may affect
design decisions and component choices along the way.
Oneofthemainthingstodetermineapartfromthedesired
outputvoltagesistheinputvoltagerange. Boththenormal
operating range and the extreme conditions of surges
and/or dips or brown-outs need to be known. Then the
operating frequency should be considered and if there
are particular requirements to avoid interference. If there
are very specific frequencies that need to be avoided then
externalsynchronizationmaybeneeded.Thiscouldalsobe
desirable if multiple switchers are used as low frequency
beating between similar devices can be undesirable. For
efficientoperationthisconverterrequiresaboostsupplyso
thatthebaseoftheoutputtransistorcanbepumpedabove
To ensure the regulator is operating in continuous mode
it is necessary to calculate the duty cycle for the required
output voltage over the full input voltage range. This must
then be compared with minimum and maximum practical
duty cycles.
3509f
10
LT3509
APPLICATIONS INFORMATION
In any step-down switcher the duty cycle when operating
in continuous, or fixed frequency, mode is dependent
on the step-down ratio. This is because for a constant
average load current the decay of the inductor current
when the switch is off must match the increase in inductor
current when the switch is on. The can be estimated by
the following formula:
The minimum on time increases with increasing tempera-
ture so the value for the maximum operating temperature
should be used. See the Minimum ON Time vs Load graph
in the Typical Performance Characteristics.
The maximum input voltage for this duty cycle is given by:
VOUT + V
DCMIN
VIN(MAX)
=
F − VF + VSW
VOUT + VF
DC =
VIN − VSW + VF
Above this voltage the only way the LT3509 can maintain
regulation is to skip cycles so the effective freqeuncy will
reduce.Thiswillcauseanincreaseinrippleandtheswitch-
ing noise will shift to a lower frequency. This calculation
will in practice drive the maximum switching frequency
for a desired step-down ratio.
Where:
DC = Duty Cycle (Fraction of Cycle when Switch is On)
V
= Output Voltage
OUT
V = Input Voltage
IN
V = Catch Diode Forward Voltage
F
V
= Switch Voltage Drop
SW
Note:Thisformulaneglectsswitchingandinductorlosses
so in practice the duty cycle may be slightly higher.
V
OUT
100mV/DIV
(AC COUPLED)
Itisclearfromthisequationthatthedutycyclewillapproach
100% as the input voltage is reduced and become smaller
as the input voltage increases. There are practical limits to
the minimum and maximum duty cycles for continuous
operation due to the switch minimum off and on times.
Theseareindependentofoperatingfrequencysoitisclear
thatrangeofusabledutycycleisinverserlyproportionalto
frequency. Therefore at higher frequency the input voltage
range (for constant frequncy operation) will narrow.
I
L
0.5A/DIV
3509 F03
TIME 1μs/DIV
Figure 3. Continuous Mode
V
OUT
The minimum duty cycle is given by:
100mV/DIV
(AC COUPLED)
DCMIN = fSW • tON(MIN)
I
L
0.5A/DIV
Where: f = Switching Frequency
SW
t
= Switch Minimum on Time
MINON
3509 F04
TIME 1μs/DIV
Figure 4. Pulse Skipping
3509f
11
LT3509
APPLICATIONS INFORMATION
Minimum Input Voltage and Boost Architecture
boost capacitors to fully saturate the switch. This is most
problematicwhentheBDpinissuppliedfromtheregulated
output. The net result is that a higher input voltage will be
requiredtostartuptheboostsystem.Thetypicalminimum
input voltage over a range of loads is shown in Figure 5
for 3.3V and Figure 6 for 5.0V.
The minimum operating voltage is determined either by
the LT3509’s internal undervoltage lockout of ~3.6V or
by its maximum duty cycle. The maximum duty cycle for
fixed frequency operation is given by:
DCMAX =1− tOFF(MIN) • fSW
Whenoperatingatsuchhighdutycyclesthepeakcurrents
in the boost diodes are greater and this will require a the
BD supply to be somewhat higher than would be required
atlessextremedutycycles.Ifoperationatlowinput/output
ratios and low BD supply voltages is required it may be
desirabletoaugmenttheinternalboostdiodeswithexternal
discrete diodes in parallel.
It follows that:
VOUT + V
DCMAX
VIN(MIN)
=
F − VF + VSW
If a reduction in switching frequency can be tolerated the
minimum input voltage can drop to just above output
voltage. Not only is the output transistor base pumped
above the input voltage by the boost capacitor, the
switch can remain on through multiple switching cycles
resulting in a high effective duty cycle. Thus, this is a
true low-dropout regulator. As it is necessary to recharge
the boost capacitor from time to time, a minimum width
off-cyclewillbeforcedoccasionallytomaintainthecharge.
Depending on the operating frequency, the duty cycle can
reach 97-98%, although at this point the output pulses
will be at a sub-multiple of the programmed frequency.
One other consideration is that at very light loads or no
load the part will go into pulse skipping mode. The part
will then have trouble getting enough voltage on to the
Boost Pin Considerations
The boost capacitor, in conjunction with the internal boost
diode,providesabootstrappedsupplyforthepowerswitch
that is above the input voltage. For operation at 1MHz and
above and at reasonable duty cycles a 0.1μF capacitor
will work well. For operation at lower frequencies and/or
higher duty cycles something larger may be needed. A
good rule of thumb is:
VOUT + V
DCMAX
VIN(MIN)
=
F − VF + VSW
where f is in MHz and C
is in μF
SW
BOOST
5.5
7
TO START
5
TO START
6.5
4.5
6
4
TO RUN
TO RUN
5.5
3.5
5
4.5
4
3
2.5
2
0.1
0.01
LOAD CURRENT (A)
0.1
0.001
1
0.001
1
0.01
LOAD CURRENT (A)
3509 F05
3509 F06
Figure 5. Minimum VIN for 3.3V VOUT
Figure 6. Minimum VIN for 5.0V VOUT
3509f
12
LT3509
APPLICATIONS INFORMATION
Boost Pin Considerations
In any case, be sure that the maximum voltage at the
BOOST pin is less than 60V and the voltage difference
between the BOOST and SW pins is less than 30V.
Figure 7 through Figure 9 show several ways to arrange
the boost circuit. The BOOST pin must be more than 2.0V
above the SW pin for full efficiency. For outputs of 3.3V
and higher, the standard circuit Figure 7 is best. For lower
output voltages, the boost diode can be tied to the input
Figure 8. The circuit in Figure 7 is more efficient because
the boost pin current comes from a lower voltage source.
Finally, as shown in Figure 9, the BD pin can be tied to
another source that is at least 3V. For example, if you are
generating 3.3V and 1.8V, and the 3.3V is on whenever
the 1.8V is on, the 1.8V boost diode can be connected to
the 3.3V output.
Inductor Selection and Maximum Output Current
A good first choice for the inductor value is:
2.1MHz
L =(VOUT + VF)•
fSW
where V is the voltage drop of the catch diode (~0.5V)
F
and L is in μH.
Theinductor’sRMScurrentratingmustbegreaterthanthe
maximum load current and its saturation current should
be at least 30% higher. For highest efficiency, the series
resistance (DCR) should be less than 0.15Ω. Table 2 lists
several vendors and types that are suitable.
BD
V
V
IN
IN
BOOST
C
BOOST
LT3509
L1
Thecurrentintheinductorisatrianglewavewithanaverage
value equal to the load current. The peak switch current
is equal to the output current plus half the peak-to-peak
inductorripplecurrent.TheLT3509limitsitsswitchcurrent
in order to protect itself and the system from over-current
faults. Therefore, the maximum output current that the
LT3509 will deliver depends on the switch current limit,
the inductor value and the input and output voltages.
V
C
SW
DA
OUT
C
IN
D1
OUT
GND
OUT
3509 F07
V
– V V
SW
BOOST
MAX V
V
V ꢀ V
IN OUT
BOOST
r 3V
OUT
Figure 7. BD Tied to Regulated Output
V
BD
BD
BD
BOOST
LT3509
V
V
IN
IN
C
BOOST
BOOST
C
BOOST
V
IN
V
IN
L1
V
C
LT3509
SW
OUT
L1
C
IN
V
C
SW
DA
OUT
D1
C
IN
OUT
D1
DA
GND
OUT
GND
3509 F09
V
– V V
SW BD
3509 F08
BOOST
MAX V
V ꢀ V
IN BD
BOOST
V
– V V
SW
BOOST
IN
IN
V
BD
r 3V
MAX V
2V
BOOST
Figure 9. Separate Boost Supply
Figure 8. Supplied from VIN
3509f
13
LT3509
APPLICATIONS INFORMATION
When the switch is off, the potential across the inductor is
theoutputvoltageplusthecatchdiodeforwardvoltage.This
gives the peak-to-peak ripple current in the inductor:
There is a limit to the actual minimum duty cycle imposed
bytheminimumontimeoftheswitch. Forarobustdesign
it is important that inductor that will not saturate when
the switch is at its minimum on time, the input voltage
is at maximum and the output is short-circuited. In this
case the full input voltage, less the drop in the switch, will
appear across the inductor. This doesn’t require an actual
short, just starting into a capacitive load will provide the
same conditions. The Diode current sensing scheme will
ensure that the switch will not turn-on if the inductor
current is above the DA current limit threshold, which has
a maximum of 1.1A. The peak current under short-circuit
conditions can then be calculated from:
VOUT + VF
ΔIL =(1–DC)
L • fSW
where:
DC = Duty Cycle
f
= switching frequency
SW
L = inductor value
V = diode forward voltage.
F
V • t
IN
The peak inductor and switch current is:
IPEAK
=
ON(MIN) +1.1A
L
ΔIL
2
ISWPK =ILPK =IOUT
+
Theinductorshouldhaveasaturationcurrentgreaterthan
this value. For safe operation with high input voltages this
canoftenmeanusingaphysicallylargerinductorashigher
value inductors often have lower saturation currents for
a given core size. As a general rule the saturation current
should be at least 1.8A to be short-circuit proof. However,
it’s generally better to use an inductor larger than the
minimum value. The minimum inductor has large ripple
currents which increase core losses and require large
output capacitors to keep output voltage ripple low. Select
To maintain output regulation, this peak current must be
less than the LT3509’s switch current limit I . This is
LIM
dependent on duty cycle due to the slope compensation.
For I is at least 1.4A at low duty cycles and decreases
LIM
linearly to 1.0A at DC = 0.8.
The theoretical minimum inductance can now be calcu-
lated as:
VOUT + VF
ILIM –IOUT
1–DCMIN
f
an inductor greater than L
below 30% of ILIM.
that keeps the ripple current
MIN
LMIN
=
•
Where DC
is the minimum duty cycle called for by the
MIN
application i.e.
VOUT(MAX) + VF
DCMIN
=
V
IN(MIN) – VSW + VF
3509f
14
LT3509
APPLICATIONS INFORMATION
Table 2. Recommended Inductors
The prior analysis is valid for continuous mode operation
MANUFACTURER/
PART NUMBER
VALUE
(μH)
ISAT
(A)
DCR
(Ω)
HEIGHT
(mm)
(I
> ΔI / 2). For details of maximum output current
OUT
LIM
indiscontinuousmodeoperation, seeLinearTechnology’s
Coilcraft
Application Note AN44. Finally, for duty cycles greater
LPS4018-222ML
2.2
3.3
4.7
6.8
10
2.8
2.5
2.5
2.7
2.1
0.07
0.066
0.083
0.095
0.105
1.7
2.9
2.9
2.4
2.4
than 50% (V /V > 0.5), a minimum inductance is
OUT IN
LPS5030-332ML
LPS5030-472ML
LPS6225-682ML
LPS6225-103ML
Sumida
requiredtoavoidsubharmonicoscillations.Thisminimum
inductance is
1.4
LMIN =(VOUT + VF)•
fSW
where f is in MHz and L
is in μH.
CDRH4D22/HP-2R2N
CDRH4D22/HP-3R5N
CDRH4D22/HP-4R7N
CDRH5D28/HP-6R8N
CDRH5D28/HP-8R2N
CDRH5D28R/HP-100N
Cooper
2.2
3.5
4.7
6.8
8.2
10
3.2
2.5
2.2
3.1
2.7
2.45
0.0035
0.052
0.066
0.049
0.071
0.074
2.4
2.4
2.4
3.0
3.0
3.0
SW
MIN
If using external synchronization, calculate L using the
R frequency and not the SYNC frequency.
T
MIN
Frequency Compensation
The LT3509 uses current mode control to regulate the
output, which simplifies loop compensation and allows
thenecessaryfiltercomponentstobeintegrated.Thefixed
internal compensation network has been chosen to give
stable operation over a wide range of operating conditions
but assumes a minimum load capacitance. The LT3509
does not depend on the ESR of the output capacitor for
stability so the designer is free to use ceramic capacitors
to achieve low output ripple and small PCB footprint.
SD52-2R2-R
2.2
3.5
4.7
5.8
8.0
10.0
2.30
1.82
1.64
1.8
0.0385
0.0503
0.0568
0.045
2.0
2.0
2.0
3.0
3.0
3.0
SD52-3R5-R
SD52-4R7-R
SD6030-5R8-R
SD7030-8R0-R
SD7030-100-R
Toko
1.85
1.7
0.058
0.065
Figure10showsanequivalentcircuitfortheLT3509control
loop. The error amp is a transconductance amplifier with
finite output impedance. The power section, consisting of
the modulator, power switch and inductor is modeled as a
transconductance amplifier generating an output current
proportional to the voltage at the COMP-NODE. The gain
of the power stage (gmp) is 1.1S. Note that the output
capacitor integrates this current and that the internal
capacitor integrates the error amplifier output current,
resulting in two poles in the loop. In most cases, a zero is
required and comes either from the output capacitor ESR
A997AS-2R2N
A997AS-3R3N
A997AS-4R7M
Würth
2.2
3.3
4.7
1.6
1.2
0.06
0.07
0.1
1.8
1.8
1.8
1.07
7447745022
2.2
3.3
4.7
3.5
3.0
2.4
0.036
0.045
0.057
2.0
2.0
2.0
7447745033
7447745047
7447745076
7447445100
7.6
10
1.8
1.6
0.095
0.12
2.0
2.0
3509f
15
LT3509
APPLICATIONS INFORMATION
For ceramic capacitors where low capacitance value is
more significant than ESR:
or from R . This model works well as long as the inductor
C
current ripple is not too low (ΔI
> 5% I ) and the
SW
RIPPLE
OUT
loop crossover frequency is less than f /5. An optional
VRIPPLE = ΔIL /(8• fSW •COUT
)
phase lead capacitor (CPL) across the feedback divider
For electrolytic capacitors where ESR is high relative to
capacitive reactance:
may improve the transient response.
LT3509
1.1S
VRIPPLE = ΔIL •ESR
V
V
OUT
IN
C
PL
whereΔI isthepeak-to-peakripplecurrentintheinductor.
L
R1
R2
COMP-
NODE
–
+
260μS
1.73M
The RMS content of this ripple is very low so the RMS
current rating of the output capacitor is usually not of
concern. It can be estimated with the formula:
R
75k
95pF
C
C
OUT
V
REF
= 0.8V
IC(RMS) = ΔIL / 12
Another constraint on the output capacitor is that it must
havegreaterenergystoragethantheinductor;ifthestored
energyintheinductortransferstotheoutput, theresulting
voltage step should be small compared to the regulation
voltage. For a 5% overshoot, this requirement indicates:
3509 F10
Figure 10. Small Signal Equivalent Circuit
Output Capacitor Selection
2
COUT >10•L •(ILIM / VOUT
)
Theoutputcapacitorfilterstheinductorcurrenttogenerate
an output with low voltage ripple. It also stores energy in
order to satisfy transient loads and stabilize the LT3509’s
control loop. Because the LT3509 operates at a high
frequency, minimal output capacitance is necessary. In
addition, the control loop operates well with or without
the presence of output capacitor series resistance (ESR).
Ceramic capacitors, which achieve very low output ripple
and small circuit size, are therefore an option.
ThelowESRandsmallsizeofceramiccapacitorsmakethem
the preferred type for LT3509 applications. Not all ceramic
capacitors are the same, however. Many of the higher value
capacitors use poor dielectrics with high temperature and
voltage coefficients. In particular, Y5V and Z5U types lose
a large fraction of their capacitance with applied voltage
and at temperature extremes. Because loop stability and
transient response depend on the value of C , this loss
OUT
You can estimate output ripple with the following equations:
may be unacceptable. Use X7R and X5R types.
3509f
16
LT3509
APPLICATIONS INFORMATION
The value of the output capacitor greatly affects the
transient response to a load step. It has to supply extra
current demand or absorb excess current delivery until
the feedback loop can respond. The loop response is
dependent on the error amplifier transconductance, the
internal compensation capacitor and the feedback net-
work. Higher output voltages necessarily require a larger
feedback divider ratio. This will also reduce the loop gain
and slow the response time. Fortunately this effect can be
to give insight to an empirical design. Figure 11 shows
someloadstepresponseswithdifferingoutputcapacitors
and C combinations.
PL
Input Capacitor
The input capacitor needs to supply the pulses of charge
demanded during the on time of the switches. Little total
capacitanceisrequiredasafewhundredmillivoltsofripple
at the V pin will not cause any problems to the device.
IN
mitigated by use of a feed-forward capacitor C across
PL
When operating at 2MHz and 12V, 2μF will work well. At
thelowestoperatingfrequencyand/oratlowinputvoltages
a larger capacitor such as 4.7μF is preferred.
the top feedback resistor. The small signal model shown
in Figure 10 can be used to model this in a simulator or
I
I
LOAD
700mA
300mA
LOAD
700mA
300mA
V
(AC)
V
(AC)
OUT
OUT
50mV/DIV
50mV/DIV
TIME 20μs/DIV
= 10μF C = 0
TIME 20μs/DIV
= 10μF C = 82pF
C
C
OUT
OUT
PL
PL
3509 F11
Figure 11. Transient Load Response with Different Combinations
of COUT and CPL Load Current Step from 300mA to 700mA
R1 = 10kΩ, R2 = 32.4kΩ, VIN = 12V, VOUT = 3.3V, fSW = 2.0MHz
3509f
17
LT3509
APPLICATIONS INFORMATION
Diode Selection
providing the boost supply to the BD pin. In this case the
voltagedropoftheotherswitchwillincreaseandlowerthe
efficiency. This could eventually cause the part to reach
the thermal shutdown limit. One other important feature
of the part that needs to be considered is that there is a
parasitic diode in parallel with the power switch. In normal
operation this is reverse biased but it could conduct if the
load can be powered from an alternate source when the
LT3509 has no input. This may occur in battery charging
applications or in battery backup systems where a bat-
tery or some other supply is diode OR-ed with one of the
LT3509 regulated outputs. If the SW pin is at more than
The catch diode (D1 from Figure 1) conducts current only
during switch off time. Average forward current in normal
operation can be calculated from:
ID(AVG) =IOUT(VIN – VOUT)/ VIN
The only reason to consider a diode with a larger current
rating than necessary for nominal operation is for the
worst-case condition of shorted output. The diode current
will then increase to the typical peak switch current limit.
If transient input voltages exceed 40V, use a Schottky
diode with a reverse voltage rating of 45V or higher. If
the maximum transient input voltage is under 40V, use a
Schottky diode with a reverse voltage rating greater than
the maximum input voltage. Table 3 lists several Schottky
diodes and their manufacturers:
about4VtheV pincanattainsufficientvoltageforLT3509
IN
control circuitry to power-up to the quiescent bias level
and up to 2mA could be drawn from the backup supply.
This can be minimized if some discrete FETs or open drain
buffers are used to pull down the RUN/SS pins. Of course
the gates need to be driven from the standby or battery
backed supply. If there is the possibility of a short-circuit
Table 3. Schottky Diodes
MANUFACTURER/
PART NUMBER
VR
(V)
IAVE
(A)
VF at 1A
(mV)
at the input or just other parallel circuits connected to V
IN
On Semiconductor
it would be best to add a protection diode in series with
MBRM140
40
40
1
1
550
450
V . This will also protect against a reversed input polarity.
IN
MicroSemi
UPS140
These concepts are illustrated in Figure 12.
D2
V
Diodes Inc.
DFLS140L
1N5819HW
V
IN
BD
IN
BOOST
40
40
1
1
550
450
C
IN
C
BOOST
L1
LT3509
RUN/SS1
V
OUT
SW
DA
Short and Reverse Protection
Provided the inductors are chosen to not go deep into
their saturation region at the maximum I current the
D1
C
OUT
RUN/SS2
GND
LIMIT
LT3509 will tolerate a short-circuit on one or both outputs.
The excess current in the inductor will be detected by the
DA comparator and the frequency will reduced until the
valley current is below the limit. This shouldn’t affect the
other channel unless the channel that is shorted is also
3509 F12
SLEEP
Figure 12. Reverse Bias Protection
3509f
18
LT3509
APPLICATIONS INFORMATION
Hot Plugging Considerations
• The loop from the regulated outputs through the
output capacitor back to the ground plane. Excess
impedance here will result in excessive ripple at the
output.
The small size, reliability and low impedance of ceramic
capacitors make them attractive for the input capacitor.
Unfortunately they can be hazardous to semiconductor
devices if combined with an inductive supply loop and a
fastpowertransitionsuchasthroughamechanicalswitch
or connector. The low-loss ceramic capacitor combined
with the just a small amount of wiring inductance forms
an underdamped resonant tank circuit and the voltage at
The area of the SW and BOOST nodes should as small as
possible. Also the feedback components should be placed
as close as possible to the FB pins so that the traces are
short and shielded from the SW and BOOST nodes by the
ground planes.
the V pin of the LT3509 can ring to twice the nominal
IN
Figure 13 shows a detail view of a practical board layout
showingjustthetoplayer.Thecompleteboardissomewhat
larger at 7.5cm x 7.5cm. The device has been evaluated
on this board in still air running at 700kHz switching fre-
quency. One channel was set to 5V and the other to 3.3V
and both channels were fully loaded to 700mA. The device
temperature reached approximately 15˚C above ambient
for input voltages below 12V. At 24V input it was slightly
higher at 17˚ above ambient.
input voltage. See Linear Technology Application Note 88
for more details.
PCB Layout and Thermal Design
The PCB layout is critical to both the electrical and thermal
performanceoftheLT3509.Mostimportantistheconnec-
tion to the exposed pad which provides the main ground
connection and also a thermal path for cooling the chip.
This must be soldered to a topside copper plane which
is also tied to backside and/or internal plane(s) with an
array of thermal vias.
To obtain the best electrical performance particular at-
tention should be paid to keeping the following current
paths short:
• The loop from the V pin through the input capaci-
IN
tor back to the ground pad and plane. This sees high
di/dt transitions as the power switches turn on an
off. Excess impedance will degrade the minimum us-
able input voltage and could cause crosstalk between
channels.
• The loops from the switch pins to the catch diodes
and back to the DA pins. The fast changing currents
and voltage here combined with long PCB traces will
cause ringing on the switch pin and may result in
unwelcome EMI.
Figure 13. Sample PCB Layout (Top Layer Only)
3509f
19
LT3509
TYPICAL APPLICATIONS
1.8V and 3.3V Outputs, Synchronized to 300kHz to 600kHz
V
= 4.5V TO 36V
IN
TRANSIENT TO 60V
2.2μF
V
IN
BD
BOOST1
BOOST2
0.22μF
0.22μF
10μH
15μH
31.6k
V
= 1.8V
0.7A
V
= 3.3V
OUT
OUT
SW1
SW2
0.7A
LT3509
UPS140
UPS140
DA1
FB1
DA2
FB2
12.4k
CLOCK
RUN/SS1 RUN/SS2
SYNC GND
10k
10k
R
T
22μF
22nF
22nF
22μF
1.6V
0.4V
178k
3509 TA03
NOTE: R CHOSEN FOR 264kHz
T
3509f
20
LT3509
TYPICAL APPLICATIONS
Automotive Accessory Application
5V Logic Supply and 8V for LCD Display with
Display Power Controlled by Logic
V
IN
= 9.4V TO 36V
2.2μF
V
BD
IN
BOOST1
BOOST2
0.22μF
0.22μF
10μH
6.8μH
V
OUT
= 5V
0.7A
V
OUT
0.7A
= 8V
SW1
SW2
LT3509
DFLS140L
52.3k
DFLS140L
90.9k
DA1
FB1
DA2
FB2
RUN/SS1 RUN/SS2
SYNC GND
10k
R
10k
10k
T
22nF
0.1μF
10μF
10μF
40.2k
3509 TA04
DISPLAY POWER
CONTROL
0V = OFF
f
= 1MHz
SW
3.3V = ON
3509f
21
LT3509
PACKAGE DESCRIPTION
DE Package
14-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1708 Rev B)
0.70 p0.05
3.30 p0.05
1.70 p 0.05
3.60 p0.05
2.20 p0.05
PACKAGE
OUTLINE
0.25 p 0.05
0.50 BSC
3.00 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.115
TYP
0.40 p 0.10
4.00 p0.10
(2 SIDES)
8
14
R = 0.05
TYP
3.30 p0.10
3.00 p0.10
(2 SIDES)
1.70 p 0.10
PIN 1 NOTCH
R = 0.20 OR
PIN 1
TOP MARK
(SEE NOTE 6)
0.35 s 45o
CHAMFER
(DE14) DFN 0806 REV B
7
1
0.25 p 0.05
0.75 p0.05
0.200 REF
0.50 BSC
3.00 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3509f
22
LT3509
PACKAGE DESCRIPTION
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev A)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 p 0.102
(.112 p .004)
2.845 p 0.102
(.112 p .004)
0.889 p 0.127
(.035 p .005)
1
8
0.35
REF
5.23
(.206)
MIN
1.651 p 0.102
(.065 p .004)
1.651 p 0.102
(.065 p .004)
3.20 – 3.45
(.126 – .136)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
16
9
0.305 p 0.038
0.50
(.0197)
BSC
NO MEASUREMENT PURPOS
4.039 p 0.102
(.159 p .004)
(NOTE 3)
(.0120 p .0015)
TYP
0.280 p 0.076
(.011 p .003)
RECOMMENDED SOLDER PAD LAYOUT
16151413121110
9
REF
DETAIL “A”
0o – 6o TYP
0.254
(.010)
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
GAUGE PLANE
0.53 p 0.152
(.021 p .006)
1 2 3 4 5 6 7 8
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 p 0.0508
(.004 p .002)
MSOP (MSE16) 0608 REV A
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
3509f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LT3509
TYPICAL APPLICATIONS
2MHz, 5V and 3.3V Outputs
V
= 6.5V TO 16V
IN
TRANSIENT TO 60V
2.2μF
V
BD
IN
BOOST1
BOOST2
0.1μF
6.8μH
0.1μF
4.7μH
V
OUT
= 5V
0.7A
V
OUT
0.7A
= 3.3V
SW1
SW2
LT3509
MBRM140
31.6k
MBRM140
DA1
FB1
DA2
FB2
52.3k
RUN/SS1 RUN/SS2
SYNC GND
10μF
10μF
R
22nF
10k
T
22nF
16.9k
10k
3509 TA02
f
= 2MHz
SW
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OUT
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V : 3.6V to 34V, V : 1.26V, I = 50μA, I < 1μA, 3mm × 3mm
OUT
IN
OUT
Q
SD
Efficiency Step-Down DC/DC Converter with Burst Mode Operation
DFN-10, MSOP-10E Package
36V, 1.4A(I ), 750kHz High Efficiency Step-Down DC/DC
V : 36V to 36V, V : 0.8V, I = 1.9mA, I < 1μA, 2mm × 3mm
OUT
IN
OUT
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Converter
DFN-6 Package
36V, 40Vmax, 2A, 2.5MHz High Efficiency DC/DC Converter
and LDO Controller
V : 3.6V to 36V, V : 0.8V, I = 2.5mA, I < 10μA, 3mm × 3mm
IN
OUT
Q
SD
DFN-10
25V, Dual 3A (I ), 1.5MHz High Efficiency Step-Down
V : 3.3V to 25V, V : 0.8V, I = 3.7mA, I = 10μA, TSSOP-20E
OUT
IN
OUT
Q
SD
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Package
36V with Transient Protection to 40V, 1.4A (I ), 3MHz,
V : 3.6V to 34V, V : 0.78V, I = 2mA, I < 2μA, 3mm × 3mm
OUT
IN
OUT
Q
SD
High Efficiency Step-Down DC/DC Converter
DFN-8, MSOP-8E Package
LT3506/
LT3506A
25V, Dual 1.6A (I ), 575kHz,/1.1MHz High Efficiency
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OUT
IN
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LT3507
LT3508
LT3510
LT3684
LT3685
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V : 4V to 36V, V : 0.8V, I = 7mA, I = 1μA, 5mm × 7mm
OUT
IN
OUT
Q
SD
Controller High Efficiency Step-Down DC/DC Converter
QFN-38
36V with Transient Protection to 40V, Dual 1.4A (I ), 3MHz,
V : 3.7V to 37V, V : 0.8V, I = 4.6mA, I = 1μA, 4mm × 4mm
OUT
IN
OUT
Q
SD
High Efficiency Step-Down DC/DC Converter
QFN-24, TSSOP-16E Package
25V, Dual 2A (I ), 1.5MHz High Efficiency Step-Down
V : 3.3V to 25V, V : 0.8V, I = 3.7mA, I = 10μA, TSSOP-20E
OUT
IN
OUT
Q
SD
DC/DC Converter
Package
34V with Transient Protection to 36V, 2A (I ), 2.8MHz,
V : 3.6V to 34V, V : 1.26V, I = 850μA, I < 1μA, 3mm × 3mm
OUT
IN
OUT
Q
SD
High Efficiency Step-Down DC/DC Converter
DFN-10, MSOP-10E Package
36V with Transient Protection to 60V, 2A (I ), 2.4MHz,
V : 3.6V to 38V, V : 0.78V, I = 70μA, I < 1μA, 3mm × 3mm
OUT
IN
OUT
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SD
High Efficiency Step-Down DC/DC Converter
DFN-10, MSOP-10E Package
Burst Mode is a trademark of Linear Technology Corporation.
3509f
LT 0109 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
© LINEAR TECHNOLOGY CORPORATION 2007
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
相关型号：
35097-9702
MP-Lock™ Quick Disconnect with Vibration Support, Female, for 20-26 AWG(0.50-0.12mm²), Metal Strip, Tab 2.79 by 0.50mm (.110 by .020"), Pre-Tin Plated
MOLEX
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