LTC1628IG#TR_技术文档

LTC1628/LTC1628-PG

High Efficiency, 2-Phase

Synchronous Step-Down Switching Regulators

U

FEATURES

DESCRIPTIO

The LTC^®1628/LTC1628-PG are high performance dual

step-down switching regulator controllers that drive all

N-channel synchronous power MOSFET stages. A con-

stant frequency current mode architecture allows adjust-

mentofthefrequencyupto300kHz. Powerlossandnoise

due to the ESR of the input capacitors are minimized by

operating the two controller output stages out of phase.

■

Out-of-Phase Controllers Reduce Required Input

Capacitance and Power Supply Induced Noise

OPTI-LOOP^TMCompensation Minimizes C_OUT

Dual N-Channel MOSFET Synchronous Drive

±1% Output Voltage Accuracy

Power Good Output Voltage Monitor (LTC1628-PG)

DC Programmed Fixed Frequency 150kHz to 300kHz

Wide V_INRange: 3.5V to 36V Operation

Very Low Dropout Operation: 99% Duty Cycle

Adjustable Soft-Start Current Ramping

Foldback Output Current Limiting

■

OPTI-LOOP compensation allows the transient response

tobeoptimizedoverawiderangeofoutputcapacitanceand

ESRvalues. Theprecision0.8Vreferenceandpowergood

output indicator are compatible with future microproces-

sor generations, and a wide 3.5V to 30V (36V maximum)

input supply range encompasses all battery chemistries.

Latched Short-Circuit Shutdown with Defeat Option

Output Overvoltage Protection

Remote Output Voltage Sense

A RUN/SS pin for each controller provides both soft-start

and optional timed, short-circuit shutdown. Current

foldback limits MOSFET dissipation during short-circuit

conditions when overcurrent latchoff is disabled. Output

overvoltage protection circuitry latches on the bottom

MOSFET until V_OUTreturns to normal. The FCB mode pin

can select among Burst Mode, constant frequency mode

and continuous inductor current mode or regulate a

secondary winding. The LTC1628-PG includes a power

good output pin that replaces the FLTCPL, fault coupling

control pin of the LTC1628.

Low Shutdown I_Q: 20µA

5V and 3.3V Standby Regulators

Small 28-Lead SSOP Package

Selectable Constant Frequency or Burst Mode^TM

Operation

U

APPLICATIO S

■

Notebook and Palmtop Computers, PDAs

■

Battery Chargers

■

Portable Instruments

■

Battery-Operated Digital Devices

, LTC and LT are registered trademarks of Linear Technology Corporation.

Burst Mode and OPTI-LOOP are trademarks of Linear Technology Corporation.

■

DC Power Distribution Systems

U

V

IN

5.2V TO 28V

TYPICAL APPLICATIO

C

IN

+

1µF

22µF

4.7µF

D3

CERAMIC

50V

D4

V

INTV

IN

CC

CERAMIC

M1

M3

M4

TG1

TG2

L1

6.3µH

L2

6.3µH

C

, 0.1µF

C

, 0.1µF

B2

B1

BOOST1

SW1

BOOST2

SW2

LTC1628

M2

BG1

BG2

D1

D2

SGND

SENSE1

PGND

+

SENSE2

R

SENSE2

0.01Ω

SENSE1

1000pF

0.01Ω

–

SENSE1

SENSE2

V

3.3V

5A

OUT1

5V

5A

OUT2

V

OSENSE2

OSENSE1

R2

105k

1%

R4

63.4k

1%

I

TH1

TH2

C

C2

C

C1

220pF

C

56µF

6V

OUT1

OUT

RUN/SS1

RUN/SS2

+

R1

20k

1%

R3

20k

1%

220pF

R

C2

47µF

6V

R

C1

C

SS1

0.1µF

SS2

0.1µF

15k

SP

M1, M2, M3, M4: FDS6680A

1628 F01

Figure 1. High Efficiency Dual 5V/3.3V Step-Down Converter

1

LTC1628/LTC1628-PG

W W U W

U W

U

ABSOLUTE AXI U RATI GS

PACKAGE/ORDER I FOR ATIO

(Note 1)

Input Supply Voltage (V_IN).........................36V to –0.3V

ORDER PART

NUMBER

TOP VIEW

Top Side Driver Voltages

1

2

FLTCPL

TG1

28

27

26

25

24

23

22

21

20

19

18

17

16

15

RUN/SS1

(BOOST1, BOOST2) ...................................42V to –0.3V

Switch Voltage (SW1, SW2) .........................36V to –5V

INTV_CC,EXTV_CC, RUN/SS1, RUN/SS2, (BOOST1-SW1),

(BOOST2-SW2), PGOOD .............................7V to –0.3V

SENSE1⁺, SENSE2⁺, SENSE1^–,

+

SENSE1

LTC1628CG

LTC1628IG

LTC1628CG-PG

LTC1628IG-PG

–

3

SW1

SENSE1

4

BOOST1

V

OSENSE1

5

V

IN

FREQSET

STBYMD

FCB

6

BG1

SENSE2^–Voltages........................ (1.1)INTV_CCto –0.3V

FREQSET, STBYMD, FCB,

7

EXTV

CC

8

INTV

CC

I

TH1

9

PGND

BG2

SGND

FLTCPL Voltage ................................... INTV_CCto –0.3V

10

11

12

13

14

3.3V

OUT

I_{TH1, TH2}, V_OSENSE1, V_OSENSE2Voltages ...2.7V to –0.3V

I

BOOST2

SW2

I

TH2

Peak Output Current <10µs (TG1, TG2, BG1, BG2) ... 3A

INTV_CCPeak Output Current ................................ 50mA

Operating Temperature Range

V

OSENSE2

–

TG2

SENSE2

+

RUN/SS2

LTC1628C/LTC1628C-PG ........................ 0°C to 85°C

LTC1628I/LTC1628I-PG ..................... –40°C to 85°C

Junction Temperature (Note 2)............................. 125°C

Storage Temperature Range ................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

G PACKAGE

28-LEAD PLASTIC SSOP

T_JMAX= 125°C, θ_JA= 95°C/W

*PGOOD ON THE LTC1628-PG

Consult factory for Military grade parts.

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V_IN= 15V, V_{RUN/SS1, 2}= 5V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Main Control Loops

V

Regulated Feedback Voltage

Feedback Current

(Note 3); I

(Note 3)

Voltage = 1.2V

TH1, 2

●

0.792

0.800

–5

0.808

–50

V

nA

OSENSE1, 2

I

VOSENSE1, 2

V

Reference Voltage Line Regulation

Output Voltage Load Regulation

V

= 3.6V to 30V (Note 3)

IN

0.002

0.02

%/V

REFLNREG

LOADREG

(Note 3)

Measured in Servo Loop; ∆I Voltage = 1.2V to 0.7V

Measured in Servo Loop; ∆I Voltage = 1.2V to 2.0V

●

0.1

–0.1

0.5

–0.5

%

TH

g

Transconductance Amplifier g

I

= 1.2V; Sink/Source 5uA; (Note 3)

= 1.2V; (Note 3)

1.3

3

mmho

MHz

m1, 2

m

TH1, 2

Transconductance Amplifier GBW

mGBW1, 2

I

Input DC Supply Current

Normal Mode

Standby

(Note 4)

Q

V

= 15V; EXTV Tied to V ; V = 5V

350

125

20

µA

IN

CC

= 0V, V

OUT1 OUT1

> 2V

RUN/SS1, 2

STBYMD

Shutdown

= Open;

35

0.84

–0.1

4.8

V

Forced Continuous Threshold

Forced Continuous Pin Current

●

0.76

0.800

–0.18

4.3

V

µA

V

FCB

I

V

= 0.85V

–0.30

FCB

V

Burst Inhibit (Constant Frequency)

Threshold

Measured at FCB pin

BINHIBIT

UVLO

Undervoltage Lockout

V

Ramping Down

●

3.5

0.86

–60

0.6

4

V

IN

V

Feedback Overvoltage Lockout

Sense Pins Total Source Current

Master Shutdown Threshold

Measured at V

0.84

–85

0.4

0.88

OVL

OSENSE1, 2

I

(Each Channel); V

–

– = V + + = 0V

SENSE1 , 2

µA

V

SENSE

SENSE1 , 2

V

Ramping Down

STBYMD

STBYMD MS

2

LTC1628/LTC1628-PG

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V_IN= 15V, V_{RUN/SS1, 2}= 5V unless otherwise noted.

SYMBOL

KA

PARAMETER

CONDITIONS

Ramping Up, RUN = 0V

SS1, 2

MIN

TYP

1.5

MAX

UNITS

V

Keep-Alive Power On-Threshold

Maximum Duty Factor

V

2

V

STBYMD

DF

MAX

In Dropout

0.5V > V

FLTCPL

98

99.4

%

I

V

Input Current

–3

3

µA

FLTCPL

LTC1628 Only

INTV – 0.5V < V

< INTV

FLTCPL CC

CC

V

Fault Coupling Threshold;

LTC1628 Only

For FCB Signal and Individual Overcurrent

Faults to Affect Both Controllers

2

V

FLTCPL

I

Soft-Start Charge Current

ON RUN/SS Pin ON Threshold

LT RUN/SS Pin Latchoff Arming Threshold

RUN/SS Discharge Current

V

= 1.9V

RUN/SS1, 2

0.5

1.0

1.2

1.5

4.1

2

µA

V

RUN/SS1, 2

V

V Rising

RUN/SS1, RUN/SS2

1.9

4.5

4

RUN/SS1, 2

SCL1, 2

V

Rising from 3V

V

RUN/SS1, RUN/SS2

I

Soft Short Condition V

V

= 0.5V;

0.5

µA

OSENSE1, 2

= 4.5V

RUN/SS1, 2

I

Shutdown Latch Disable Current

Maximum Current Sense Threshold

V

= 0.5V

1.6

5

µA

SDLHO

OSENSE1, 2

V

= 0.7V,V

–

= 5V

●

62

65

75

88

85

mV

SENSE(MAX)

OSENSE1, 2

SENSE1 , 2

–

= 5V, LTC1628 Only

SENSE1 , 2

TG Transition Time:

Rise Time

Fall Time

(Note 5)

TG1, 2 t

C

= 3300pF

50

90

ns

r

f

LOAD

= 3300pF

LOAD

BG Transition Time:

Rise Time

Fall Time

(Note 5)

LOAD

BG1, 2 t

C

= 3300pF

40

90

80

ns

r

f

TG/BG t

Top Gate Off to Bottom Gate On Delay

Synchronous Switch-On Delay Time

1D

C

= 3300pF Each Driver

90

ns

LOAD

BG/TG t

Bottom Gate Off to Top Gate On Delay

Top Switch-On Delay Time

2D

C

= 3300pF Each Driver

90

ns

t

Minimum On-Time

Tested with a Square Wave (Note 6)

180

ON(MIN)

INTV Linear Regulator

CC

V

Internal V Voltage

6V < V < 30V, V = 4V

4.8

4.5

5.0

0.2

120

80

5.2

1.0

V

%

INTVCC

CC

IN

EXTVCC

INT

INTV Load Regulation

I

= 0 to 20mA, V

= 4V

LDO

CC

EXTVCC

EXT

EXTV Voltage Drop

= 20mA, V

= 5V, LTC1628

240

160

mV

V

LDO

CC

EXTVCC

EXT-PG EXTV Voltage Drop

= 5V, LTC1628-PG

LDO

CC

EXTV Switchover Voltage

= 20mA, EXTV Ramping Positive

●

4.7

0.2

EXTVCC

LDOHYS

CC

EXTV Hysteresis

V

CC

Oscillator

f

I

Oscillator frequency

Lowest Frequency

V

= Open (Note 7)

= 0V

190

120

280

220

140

310

–2

250

160

360

–1

kHz

µA

OSC

FREQSET

LOW

Highest Frequency

FREQSET Input Current

= 2.4V

HIGH

= 0V

FREQSET

3.3V Linear Regulator

V

3.3V Regulator Output Voltage

3.3V Regulator Load Regulation

3.3V Regulator Line Regulation

No Load

= 0 to 10mA

●

3.25

3.35

0.5

3.45

2

V

%

3.3OUT

3.3IL

I

3.3

6V < V < 30V

0.05

0.2

3.3VL

IN

PGOOD Output (LTC1628-PG Only)

V

PGOOD Voltage Low

I

= 2mA

= 5V

0.1

0.3

V

PGL

PGOOD

I

PGOOD Leakage Current

PGOOD Trip Level, Either Controller

V

±1

µA

PGOOD

V

Respect to Set Output Voltage

Ramping Negative

Ramping Positive

PG

OSENSE

V

–6

6

–7.5

7.5

–9.5

9.5

%

OSENSE

3

LTC1628/LTC1628-PG

ELECTRICAL CHARACTERISTICS

Note 1: Absolute Maximum Ratings are those values beyond which the life

Note 4: Dynamic supply current is higher due to the gate charge being

of a device may be impaired.

delivered at the switching frequency. See Applications Information.

Note 2: T is calculated from the ambient temperature T and power

Note 5: Rise and fall times are measured using 10% and 90% levels. Delay

times are measured using 50% levels.

J

A

dissipation P according to the following formulas:

D

LTC1628/LTC1628-PG: T = T + (P • 95 °C/W)

Note 3: The LTC1628/LTC1628-PG are tested in a feedback loop that

Note 6: The minimum on-time condition is specified for an inductor

J

A

D

peak-to-peak ripple current ≥40% of I

(see minimum on-time

MAX

considerations in the Applications Information section).

servos V

ITH1, 2

OSENSE1, 2.

to a specified voltage and measures the resultant

V

Note 7: V

pin internally tied to 1.19V reference through a large

FREQSET

resistance.

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Efficiency vs Output Current

and Mode (Figure 13)

Efficiency vs Output Current

(Figure 13)

Efficiency vs Input Voltage

(Figure 13)

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

100

V

= 15V

= 5V

V

I

= 5V

Burst Mode

OPERATION

IN

OUT

V

= 7V

IN

= 3A

90

80

70

60

50

V

= 10V

IN

FORCED

CONTINUOUS

MODE

V

= 15V

IN

V

= 20V

IN

CONSTANT

FREQUENCY

(BURST DISABLE)

V

OUT

= 15V

IN

V

= 5V

0.001

0.01

0.1

1

10

0.001

0.01

0.1

1

5

15

25

35

10

OUTPUT CURRENT (A)

INPUT VOLTAGE (V)

1628 G01

1628 G02

1628 G03

Supply Current vs Input Voltage

and Mode (Figure 13)

INTV_CCand EXTV_CCSwitch

Voltage vs Temperature

EXTV_CCVoltage Drop

1000

800

600

400

200

0

250

5.05

5.00

4.95

4.90

4.85

4.80

4.75

4.70

INTV VOLTAGE

CC

200

150

100

50

BOTH

CONTROLLERS ON

EXTV SWITCHOVER THRESHOLD

CC

STANDBY

SHUTDOWN

0

5

10

15

20

25

30

35

0

10

20

30

40

50

–50 –25

0

25

50

TEMPERATURE (°C)

75

100 125

INPUT VOLTAGE (V)

CURRENT (mA)

1628 G05

1628 G04

1628 G06

4

LTC1628/LTC1628-PG

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Maximum Current Sense Threshold

vs Percent of Nominal Output

Voltage (Foldback)

Maximum Current Sense Threshold

vs Duty Factor

Internal 5V LDO Line Reg

75

50

25

0

5.1

5.0

80

70

60

50

40

30

20

10

0

I

= 1mA

LOAD

4.9

4.8

4.7

4.6

4.5

4.4

0

20

40

60

80

100

50

20

INPUT VOLTAGE (V)

30

35

0

25

75

100

0

5

10

15

25

DUTY FACTOR (%)

PERCENT ON NOMINAL OUTPUT VOLTAGE (%)

1628 G08

1628 G09

1628 G07

Maximum Current Sense Threshold

vs V_RUN/SS(Soft-Start)

Maximum Current Sense Threshold

vs Sense Common Mode Voltage

Current Sense Threshold

vs I_THVoltage

90

80

76

72

68

64

60

80

60

40

20

V

= 1.6V

SENSE(CM)

70

60

50

40

30

20

10

0

–10

–20

–30

0

1

2

3

4

5

6

0

1

2

3

4

5

0

0.5

1

1.5

(V)

2

2.5

V

(V)

COMMON MODE VOLTAGE (V)

V

ITH

RUN/SS

1628 G10

1628 G11

1628 G12

Load Regulation

V_ITHvs V_RUN/SS

SENSE Pins Total Source Current

0.0

–0.1

–0.2

–0.3

–0.4

2.5

2.0

1.5

1.0

100

50

V

= 0.7V

FCB = 0V

= 15V

OSENSE

V

IN

FIGURE 1

0

–50

–100

0.5

0

1

2

3

LOAD CURRENT (A)

4

5

0

1

2

3

4

5

6

0

2

4

6

V

(V)

V

COMMON MODE VOLTAGE (V)

RUN/SS

SENSE

1628 G14

1628 G13

1628 G15

5

LTC1628/LTC1628-PG

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Maximum Current Sense

Threshold vs Temperature

Dropout Voltage vs Output Current

(Figure 13)

RUN/SS Current vs Temperature

80

78

76

74

72

70

4

3

2

1

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

V

= 5V

OUT

R

= 0.015Ω

SENSE

R

= 0.010Ω

SENSE

0

50

75 100 125

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

OUTPUT CURRENT (A)

–50 –25

0

25

–50 –25

0

25

125

50

75 100

TEMPERATURE (°C)

1628 G18

1628 G17

1628 G25

Soft-Start Up (Figure 13)

Load Step (Figure 13)

V_OUT

5V/DIV

V_OUT

200mV/DIV

V_OUT

200mV/DIV

V_RUN/SS

5V/DIV

I_OUT

2A/DIV

I_OUT

2A/DIV

I_OUT

2A/DIV

V

_IN= 15V

5ms/DIV

1628 G19

V

_IN= 15V

20µs/DIV

1628 G20

V_IN= 15V

V_OUT= 5V

20µs/DIV

1628 G21

V_OUT= 5V

LOAD STEP = 0A TO 3A

Burst Mode OPERATION

LOAD STEP = 0A TO 3A

CONTINUOUS MODE

Input Source/Capacitor

Instantaneous Current (Figure 13)

Constant Frequency (Burst Inhibit)

Operation (Figure 13)

Burst Mode Operation (Figure 13)

I_IN

V_OUT

20mV/DIV

2A/DIV

V_OUT

20mV/DIV

V_IN

200mV/DIV

V_SW1

10V/DIV

V_SW2

10V/DIV

I_OUT

0.5A/DIV

I_OUT

0.5A/DIV

V_IN= 15V

1µs/DIV

1628 G22

V_IN= 15V

10µs/DIV

1628 G23

V_IN= 15V

V_OUT= 5V

V_FCB= 5V

I_OUT= 20mA

2µs/DIV

1628 G24

V_OUT= 5V

I_OUT5= I_OUT3.3= 2A

V_FCB= OPEN

I_OUT= 20mA

6

LTC1628/LTC1628-PG

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Current Sense Pin Input Current

vs Temperature

EXTV_CCSwitch Resistance

vs Temperature

Oscillator Frequency

vs Temperature

35

33

31

29

27

25

10

8

350

V

OUT

= 5V

V

= 5V

FREQSET

300

250

200

150

100

50

V

= OPEN

= 0V

FREQSET

6

V

FREQSET

4

2

0

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

TEMPERATURE (°C)

1628 G26

1628 G27

1628 G28

Undervoltage Lockout

vs Temperature

Shutdown Latch Thresholds

vs Temperature

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

3.50

3.45

3.40

3.35

LATCH ARMING

LATCHOFF

THRESHOLD

3.30

3.25

3.20

0

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

125

–50 –25

0

25

75

50

75 100

TEMPERATURE (°C)

1628 G29

1628 G30

7

LTC1628/LTC1628-PG

U

PI FU CTIO S

RUN/SS1, RUN/SS2 (Pins 1, 15): Combination of soft-

start,runcontrolinputsandshort-circuitdetectiontimers.

A capacitor to ground at each of these pins sets the ramp

time to full output current. Forcing either of these pins

back below 1.0V causes the IC to shut down the circuitry

requiredforthatparticularcontroller.Latchoffovercurrent

protection is also invoked via this pin as described in the

Applications Information section.

SENSE1⁺, SENSE2⁺(Pins 2, 14): The (+) Input to the

Differential Current Comparators. The I_thpin voltage and

controlled offsets between the SENSE^–and SENSE⁺pins

in conjunction with R_SENSEset the current trip threshold.

SGND (Pin 9): Small Signal Ground common to both

controllers, must be routed separately from high current

grounds to the common (–) terminals of the C_OUT

capacitors.

3.3V_OUT(Pin 10): Output of a linear regulator capable of

supplying 10mA DC with peak currents as high as 50mA.

PGND (Pin 20): Driver Power Ground. Connects to the

sources of bottom (synchronous) N-channel MOSFETs, an-

odes of the Schottky rectifiers and the (–) terminal(s) of C_IN.

INTV_CC(Pin 21): Output of the Internal 5V Linear Low

Dropout Regulator and the EXTV_CCSwitch. The driver and

control circuits are powered from this voltage source. Must

be decoupled to power ground with a minimum of 4.7µF

tantalum or other low ESR capacitor. The INTV_CCregulator

standby function is determined by the STBYMD pin.

SENSE1^–, SENSE2^–(Pins 3, 13): The (–) Input to the

Differential Current Comparators.

V_OSENSE1, V_OSENSE2(Pins 4, 12): Receives the remotely-

sensed feedback voltage for each controller from an

external resistive divider across the output.

EXTV_CC(Pin 22): External Power Input to an Internal

Switch Connected to INTV_CC. This switch closes and

supplies V_CCpower, bypassing the internal low dropout

regulator, whenever EXTV_CCis higher than 4.7V. See

EXTV_CCconnectioninApplicationssection. Donotexceed

7V on this pin.

FREQSET (Pin 5): Frequency Control Input to the Oscilla-

tor. Thispincanbeleftopen, tiedtoground, tiedtoINTV_CC

or driven by an external voltage source. This pin can also

be used with an external phase detector to build a true

phase-locked loop.

BG1, BG2 (Pins 23, 19): High Current Gate Drives for

Bottom (Synchronous) N-Channel MOSFETs. Voltage

swing at these pins is from ground to INTV_CC.

STBYMD (Pin 6): Control pin that determines which cir-

cuitry remains active when the controllers are shut down

and/or provides a common control point to shut down

both controllers. See the Operation section for details.

V_IN(Pin 24): Main Supply Pin. A bypass capacitor should

be tied between this pin and the signal ground pin.

FCB(Pin7):ForcedContinuousControl Input. Thisinput

acts on the first controller (or both controllers depending

upon the FLTCPL pin—see pin description), and is

normally used to regulate a secondary winding. Pulling

this pin below 0.8V will force continuous synchronous

operation for the first and optionally the second control-

ler. Do not leave this pin floating.

BOOST1, BOOST2 (Pins 25, 18): Bootstrapped Supplies

to the Top Side Floating Drivers. Capacitors are connected

between the boost and switch pins and Schottky diodes

aretied betweentheboostandINTV_CCpins.Voltageswing

at the boost pins is from INTV_CCto (V_IN+ INTV_CC).

SW1, SW2 (Pins 26, 17): Switch Node Connections to

Inductors. Voltage swing at these pins is from a Schottky

diode (external) voltage drop below ground to V_IN.

I_{TH1, TH2}(Pins 8, 11): Error Amplifier Output and Switch-

I

ingRegulatorCompensationPoint.Eachassociatedchan-

nels’ current comparator trip point increases with this

control voltage.

TG1, TG2 (Pins 27, 16): High Current Gate Drives for Top

N-Channel MOSFETs. These are the outputs of floating

drivers with a voltage swing equal to INTV_CC– 0.5V

superimposed on the switch node voltage SW.

8

LTC1628/LTC1628-PG

U

PI FU CTIO S

FLTCPL (Pin 28): (LTC1628 Only) Fault Coupling Control

Pin that determines if fault/normal conditions on one

controllerwillactontheothercontroller.FLTCPL=INTV_CC

to couple channels; FLTCPL = 0V to decouple.

PGOOD (Pin 28): (LTC1628-PG Only) Open-Drain Logic

Output. PGOOD is pulled to ground when the voltage on

either V_OSENSEpin is not within ±7.5% of its set point.

U

W

FU CTIO AL DIAGRA

INTV

CC

V

IN

D

C

DUPLICATE FOR SECOND

CONTROLLER CHANNEL

B

1.19V

BOOST

TG

1M

FREQSET

B

DROP

OUT

DET

+

CLK1

TOP

BOT

C

IN

D

OSCILLATOR

1

CLK2

BOT

FCB

SW

TOP ON

S

Q

SWITCH

LOGIC

INTV

CC

R

FLTCPL

RUN/SS1

RUN/SS2

BG

MERGE LOGIC

OUT

PGND

V

B

SEC

3V

+

–

0.55V

V

OUT

–

+

4.5V

0.18µA

FCB

BINH

SHDN

R

SENSE

R6

+

–

INTV

FCB

CC

I1

I2

R5

+

–

+

–

+ +

–

+

–

SENSE

D

C

SEC

30k

3.3V

OUT

0.8V

3mV

+

–

V

REF

0.86V

4(V

–

)

FB

SLOPE

COMP

V

45k

IN

V

IN

2.4V

V

OSENSE

R2

V

FB

+

–

4.8V

–

+

5V

LDO

REG

EA

EXTV

CC

0.80V

0.86V

R1

OV

+

–

INTV

CC

5V

+

C

I

TH

1.2µA

INTERNAL

SUPPLY

SGND

SHDN

RST

RUN

SOFT

START

R

C

C2

C

6V

4(V

FB

)

STBYMD

RUN/SS

C

SS

1628 FD/F02

Figure 2

9

LTC1628/LTC1628-PG

U

OPERATIO

(Refer to Functional Diagram)

Main Control Loop

controller 1 (or both controllers depending upon the

FLTCPL pin); and 2) select between two modes of low

current operation. When the FCB pin voltage is below

0.800V, the controller forces continuous PWM current

mode operation. In this mode, the top and bottom

MOSFETsarealternatelyturnedontomaintaintheoutput

voltage independent of direction of inductor current.

When the FCB pin is below V_INTVCC– 2V but greater than

0.80V, the controller enters Burst Mode operation. Burst

Mode operation sets a minimum output current level

beforeinhibitingthetopswitchandturnsoffthesynchro-

nous MOSFET(s) when the inductor current goes nega-

tive. This combination of requirements will, at low cur-

rents, force the I_THpin below a voltage threshold that will

temporarily inhibit turn-on of both output MOSFETs until

the output voltage drops. There is 60mV of hysteresis in

the burst comparator B tied to the I_THpin. This hysteresis

produces output signals to the MOSFETs that turn them

on for several cycles, followed by a variable “sleep”

interval depending upon the load current. The resultant

output voltage ripple is held to a very small value by

having the hysteretic comparator after the error amplifier

gain block.

The LTC1628 uses a constant frequency, current mode

step-down architecture with the two controller channels

operating180degreesoutofphase. Duringnormalopera-

tion, eachtopMOSFETisturnedonwhentheclockforthat

channel sets the RS latch, and turned off when the main

current comparator, I₁, resets the RS latch. The peak

inductor current at which I₁resets the RS latch is con-

trolled by the voltage on the I_THpin, which is the output of

each error amplifier EA. The V_OSENSEpin receives the

voltage feedback signal, which is compared to the internal

reference voltage by the EA. When the load current in-

creases, it causes a slight decrease in V_OSENSErelative to

the 0.8V reference, which in turn causes the I_THvoltage to

increase until the average inductor current matches the

new load current. After the top MOSFET has turned off, the

bottom MOSFET is turned on until either the inductor

currentstartstoreverse, asindicatedbycurrentcompara-

tor I₂, or the beginning of the next cycle.

The top MOSFET drivers are biased from floating boot-

strap capacitor C_B, which normally is recharged during

each off cycle through an external diode when the top

MOSFET turns off. As V_INdecreases to a voltage close to

V_OUT, the loop may enter dropout and attempt to turn on

the top MOSFET continuously. The dropout detector de-

tects this and forces the top MOSFET off for about 500ns

every tenth cycle to allow C_Bto recharge.

Constant Frequency Operation

When the FCB pin is tied to INTV_CC, Burst Mode operation

is disabled and the forced minimum output current re-

quirement is removed. This provides constant frequency,

discontinuous (preventing reverse inductor current) cur-

rent operation over the widest possible output current

range.Thisconstantfrequencyoperationisnotasefficient

as Burst Mode operation, but does provide a lower noise,

constant frequency operating mode down to approxi-

mately 1% of designed maximum output current.

The main control loop is shut down by pulling the RUN/SS

pin low. Releasing RUN/SS allows an internal 1.2µA

current source to charge soft-start capacitor C_SS. When

C_SSreaches1.5V,themaincontrolloopisenabledwiththe

I_THvoltageclampedatapproximately30%ofitsmaximum

value. As C_SScontinues to charge, the I_THpin voltage is

gradually released allowing normal, full-current opera-

tion. When both RUN/SS1 and RUN/SS2 are low, all

LTC1628 controller functions are shut down, and the

STBYMD pin determines if the standby 5V and 3.3V

regulators are kept alive.

Continuous Current (PWM) Operation

Tying the FCB pin to ground will force continuous current

operation. This is the least efficient operating mode, but

may be desirable in certain applications. The output can

source or sink current in this mode. When sinking current

while in forced continuous operation, current will be

forced back into the main power supply potentially boost-

ing the input supply to dangerous voltage levels—

BEWARE!

Low Current Operation

The FCB pin is a multifunction pin providing two func-

tions:1)toprovideregulationforasecondarywindingby

temporarily forcing continuous PWM operation on

10

LTC1628/LTC1628-PG

U

OPERATIO

(Refer to Functional Diagram)

Frequency Setting

Fault Coupling Pin

The FREQSET pin provides frequency adjustment of the

internal oscillator from approximately 140kHz to 310kHz.

This input is nominally biased through an internal resistor

to the 1.19V reference, setting the oscillator frequency to

approximately 220kHz. This pin can be driven from an

external AC or DC signal source to control the instanta-

neous frequency of the oscillator.

The FLTCPL pin (LTC1628 only) controls two functions

that can operate individually (FLTCPL = 0V) or unilaterally

(FLTCPL=INTV_CC)betweenthetwocontrollers. Whenthe

FLTCPL pin is grounded (internally tied default mode for

the LTC1628-PG), 1) the FCB input forces continuous

operation only on the first controller when the applied

voltage drops below 0.8V and 2) the short-circuit latchoff

function only latches off the controller having the shorted

output. When the FLTCPL pin is tied to INTV_CC, 1) the FCB

input forces continuous operation on both controllers

when the applied voltage drops below 0.8V and 2) the

short-circuit latchoff function latches off both controllers

when either has a shorted output.

INTV_CC/EXTV_CCPower

Power for the top and bottom MOSFET drivers and most

other internal circuitry is derived from the INTV_CCpin.

When the EXTV_CCpin is left open, an internal 5V low

dropoutlinearregulatorsuppliesINTV_CCpower.IfEXTV_CC

is taken above 4.7V, the 5V regulator is turned off and an

internalswitchisturnedonconnectingEXTV_CCtoINTV_CC.

This allows the INTV_CCpower to be derived from a high

efficiency external source such as the output of the regu-

lator itself or a secondary winding, as described in the

Applications Information.

Power Good (PGOOD) Pin

The PGOOD pin (LTC1628-PG only) is connected to an

open drain of an internal MOSFET. The MOSFET turns on

and pulls the pin low when both the outputs are not within

±7.5% of their nominal output levels as determined by

their resistive feedback dividers. When both outputs meet

the ±7.5% requirement, the MOSFET is turned off within

10µs and the pin is allowed to be pulled up by an external

resistor to a source of up to 7V.

Standby Mode Pin

The STBYMD pin is a three-state input that controls

common circuitry within the IC as follows: When the

STBYMD pin is held at ground, both controller RUN/SS

pins are pulled to ground providing a single control pin to

shut down both controllers. When the pin is left open, the

internal RUN/SS currents are enabled to charge the

RUN/SS capacitor(s), allowing the turn-on of either con-

troller and activating necessary common internal biasing.

When the STBYMD pin is taken above 2V, both internal

linear regulators are turned on independent of the state on

the RUN/SS pins of the two switching regulator control-

lers, providing an output power source for “wake-up”

circuitry. Decouple the pin with a small capacitor (0.01µF)

to ground if the pin is not connected to a DC potential.

Foldback Current, Short-Circuit Detection

and Short-Circuit Latchoff

TheRUN/SScapacitorsareusedinitiallytolimittheinrush

current of each switching regulator. After the controller

has been started and been given adequate time to charge

up the output capacitors and provide full load current, the

RUN/SS capacitor is used in a short-circuit time-out

circuit. If the output voltage falls to less than 70% of its

nominal output voltage, the RUN/SS capacitor begins

discharging on the assumption that the output is in an

overcurrentand/orshort-circuitcondition.Ifthecondition

lasts for a long enough period as determined by the size of

the RUN/SS capacitor, the controller (or both controllers

as determined by the FLTCPL pin, LTC1628 only) will be

shutdownuntiltheRUN/SSpin(s)voltage(s)arerecycled.

This built-in latchoff can be overridden by providing a

>5µA pull-up at a compliance of 5V to the RUN/SS pin(s).

This current shortens the soft start period but also pre-

vents net discharge of the RUN/SS capacitor(s) during an

Output Overvoltage Protection

An overvoltage comparator, OV, guards against transient

overshoots (>7.5%) as well as other more serious condi-

tions that may overvoltage the output. In this case, the top

MOSFETisturnedoffandthebottomMOSFETisturnedon

until the overvoltage condition is cleared.

11

LTC1628/LTC1628-PG

U

OPERATIO

(Refer to Functional Diagram)

overcurrent and/or short-circuit condition. Foldback cur-

rent limiting is also activated when the output voltage falls

below 70% of its nominal level whether or not the short-

circuit latchoff circuit is enabled. Even if a short is present

and the short-circuit latchoff is not enabled, a safe, low

output current is provided due to internal current foldback

and actual power wasted is low due to the efficient nature

of the current mode switching regulator.

With 2-phase operation, the two channels of the dual-

switching regulator are operated 180 degrees out of

phase.Thiseffectivelyinterleavesthecurrentpulsesdrawn

by the switches, greatly reducing the overlap time where

they add together. The result is a significant reduction in

total RMS input current, which in turn allows less expen-

sive input capacitors to be used, reduces shielding re-

quirements for EMI and improves real world operating

efficiency.

THEORY AND BENEFITS OF 2-PHASE OPERATION

Figure 3 compares the input waveforms for a representa-

tive single-phase dual switching regulator to the new

LTC1628 2-phase dual switching regulator. An actual

measurement of the RMS input current under these con-

ditions shows that 2-phase operation dropped the input

current from 2.53A_RMSto 1.55A_RMS. While this is an

impressive reduction in itself, remember that the power

losses are proportional to I_RMS², meaning that the actual

power wasted is reduced by a factor of 2.66. The reduced

input ripple voltage also means less power is lost in the

inputpowerpath, whichcouldincludebatteries, switches,

trace/connector resistances and protection circuitry. Im-

provements in both conducted and radiated EMI also

directly accrue as a result of the reduced RMS input

current and voltage.

The LTC1628 dual high efficiency DC/DC controller brings

the considerable benefits of 2-phase operation to portable

applicationsforthefirsttime.Notebookcomputers,PDAs,

handheld terminals and automotive electronics will all

benefitfromthelowerinputfilteringrequirement, reduced

electromagnetic interference (EMI) and increased effi-

ciency associated with 2-phase operation.

Whytheneedfor2-phaseoperation?UpuntiltheLTC1628,

constant-frequency dual switching regulators operated

both channels in phase (i.e., single-phase operation). This

means that both switches turned on at the same time,

causing current pulses of up to twice the amplitude of

those for one regulator to be drawn from the input capaci-

tor and battery. These large amplitude current pulses

increased the total RMS current flowing from the input

capacitor, requiring the use of more expensive input

capacitorsandincreasingbothEMIandlossesintheinput

capacitor and battery.

Of course, the improvement afforded by 2-phase opera-

tion is a function of the dual switching regulator’s relative

duty cycles which, in turn, are dependent upon the input

voltage V_IN(Duty Cycle = V_OUT/V_IN). Figure 4 shows how

5V SWITCH

20V/DIV

3.3V SWITCH

20V/DIV

INPUT CURRENT

5A/DIV

INPUT VOLTAGE

500mV/DIV

I_IN(MEAS)= 2.53A_RMS

I_IN(MEAS)= 1.55A_RMS

DC236 F03a

DC236 F03b

(a)

(b)

Figure 3. Input Waveforms Comparing Single-Phase (a) and 2-Phase (b) Operation

for Dual Switching Regulators Converting 12V to 5V and 3.3V at 3A Each. The

Reduced Input Ripple with the LTC1628 2-Phase Regulator Allows Less Expensive

Input Capacitors, Reduces Shielding Requirements for EMI and Improves Efficiency

12

LTC1628/LTC1628-PG

U

OPERATIO

(Refer to Functional Diagram)

3.0

2.5

2.0

1.5

1.0

0.5

0

theinputcapacitorrequirementtothatforjustonechannel

operating at maximum current and 50% duty cycle.

SINGLE PHASE

DUAL CONTROLLER

A final question: If 2-phase operation offers such an

advantage over single-phase operation for dual switching

regulators, why hasn’t it been done before? The answer is

that, while simple in concept, it is hard to implement.

Constant-frequency current mode switching regulators

require an oscillator derived “slope compensation” signal

to allow stable operation of each regulator at over 50%

duty cycle. This signal is relatively easy to derive in single-

phasedualswitchingregulators,butrequiredthedevelop-

ment of a new and proprietary technique to allow 2-phase

operation. In addition, isolation between the two channels

becomes more critical with 2-phase operation because

switch transitions in one channel could potentially disrupt

the operation of the other channel.

2-PHASE

DUAL CONTROLLER

V

= 5V/3A

O1

O2

= 3.3V/3A

0

10

20

30

40

INPUT VOLTAGE (V)

1628 F04

Figure 4. RMS Input Current Comparison

theRMSinputcurrentvariesforsingle-phaseand2-phase

operation for 3.3V and 5V regulators over a wide input

voltage range.

It can readily be seen that the advantages of 2-phase

operation are not just limited to a narrow operating range,

but in fact extend over a wide region. A good rule of thumb

for most applications is that 2-phase operation will reduce

The LTC1628 is proof that these hurdles have been sur-

mounted.Thenewdeviceoffersuniqueadvantagesforthe

ever-expanding number of high efficiency power supplies

required in portable electronics.

W U U

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APPLICATIO S I FOR ATIO

Figure 1 on the first page is a basic LTC1628 application

circuit. External component selection is driven by the

loadrequirement,andbeginswiththeselectionofR_SENSE

andtheinductorvalue. Next, thepowerMOSFETsandD1

are selected. Finally, C_INand C_OUTare selected. The

circuit shown in Figure 1 can be configured for operation

up to an input voltage of 28V (limited by the external

MOSFETs).

50mV

R

=

SENSE

I

MAX

When using the controller in very low dropout conditions,

the maximum output current level will be reduced due to

the internal compensation required to meet stability crite-

rion for buck regulators operating at greater than 50%

duty factor. A curve is provided to estimate this reducton

in peak output current level depending upon the operating

duty factor.

R_SENSESelection For Output Current

R_SENSEis chosen based on the required output current.

The LTC1628 current comparator has a maximum thresh-

old of 75mV/R_SENSEand an input common mode range of

SGND to 1.1(INTV_CC). The current comparator threshold

sets the peak of the inductor current, yielding a maximum

average output current I_MAXequal to the peak value less

half the peak-to-peak ripple current, ∆I_L.

Selection of Operating Frequency

The LTC1628 uses a constant frequency architecture with

the frequency determined by an internal oscillator capaci-

tor. This internal capacitor is charged by a fixed current

plus an additional current that is proportional to the

voltage applied to the FREQSET pin.

Allowing a margin for variations in the LTC1628 and

external component values yields:

A graph for the voltage applied to the FREQSET pin vs

frequency is given in Figure 5. As the operating frequency

13

LTC1628/LTC1628-PG

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APPLICATIO S I FOR ATIO

2.5

25% of the current limit determined by R_SENSE. Lower

inductor values (higher ∆I_L) will cause this to occur at

lower load currents, which can cause a dip in efficiency in

the upper range of low current operation. In Burst Mode

operation, lower inductance values will cause the burst

frequency to decrease.

2.0

1.5

1.0

0.5

0

Inductor Core Selection

Once the value for L is known, the type of inductor must

be selected. High efficiency converters generally cannot

afford the core loss found in low cost powdered iron

cores, forcing the use of more expensive ferrite,

molypermalloy, or Kool Mµ^®cores. Actual core loss is

independent of core size for a fixed inductor value, but it

is very dependent on inductance selected. As inductance

increases, core losses go down. Unfortunately, increased

inductance requires more turns of wire and therefore

copper losses will increase.

120

170

220

270

320

OPERATING FREQUENCY (kHz)

1628 F05

Figure 5. FREQSET Pin Voltage vs Frequency

isincreasedthegatechargelosseswillbehigher,reducing

efficiency (see Efficiency Considerations). The maximum

switching frequency is approximately 310kHz.

Inductor Value Calculation

Ferrite designs have very low core loss and are preferred

at high switching frequencies, so design goals can con-

centrate on copper loss and preventing saturation. Ferrite

core material saturates “hard,” which means that induc-

tance collapses abruptly when the peak design current is

exceeded. This results in an abrupt increase in inductor

ripple current and consequent output voltage ripple. Do

not allow the core to saturate!

The operating frequency and inductor selection are inter-

related in that higher operating frequencies allow the use

of smaller inductor and capacitor values. So why would

anyone ever choose to operate at lower frequencies with

larger components? The answer is efficiency. A higher

frequency generally results in lower efficiency because of

MOSFET gate charge losses. In addition to this basic

trade-off, the effect of inductor value on ripple current and

low current operation must also be considered.

Molypermalloy (from Magnetics, Inc.) is a very good, low

losscorematerialfortoroids,butitismoreexpensivethan

ferrite. A reasonable compromise from the same manu-

facturer is Kool Mµ. Toroids are very space efficient,

especially when you can use several layers of wire. Be-

cause they generally lack a bobbin, mounting is more

difficult. However, designsforsurfacemountareavailable

that do not increase the height significantly.

Theinductorvaluehasadirecteffectonripplecurrent.The

inductor ripple current ∆I_Ldecreases with higher induc-

tance or frequency and increases with higher V_IN:

1

V

OUT

V

IN

∆I =

V

1–

L

OUT

(f)(L)

Power MOSFET and D1 Selection

Accepting larger values of ∆I_Lallows the use of low

inductances, but results in higher output voltage ripple

and greater core losses. A reasonable starting point for

setting ripple current is ∆I_L=0.3(I_MAX). Remember, the

maximum ∆I_Loccurs at the maximum input voltage.

Two external power MOSFETs must be selected for each

controller with the LTC1628: One N-channel MOSFET for

the top (main) switch, and one N-channel MOSFET for the

bottom (synchronous) switch.

The inductor value also has secondary effects. The transi-

tion to Burst Mode operation begins when the average

inductor current required results in a peak current below

The peak-to-peak drive levels are set by the INTV_CC

voltage. This voltage is typically 5V during start-up (see

Kool Mµ is a registered trademark of Magnetics, Inc.

14

LTC1628/LTC1628-PG

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APPLICATIO S I FOR ATIO

U

EXTV_CCPin Connection). Consequently, logic-level

threshold MOSFETs must be used in most applications.

The only exception is if low input voltage is expected

(V_IN< 5V); then, sub-logic level threshold MOSFETs

(V_GS(TH)< 3V) should be used. Pay close attention to the

BV_DSSspecification for the MOSFETs as well; most of the

logic level MOSFETs are limited to 30V or less.

Theterm(1+δ)isgenerallygivenforaMOSFETintheform

of a normalized R_DS(ON)vs Temperature curve, but

δ = 0.005/°C can be used as an approximation for low

voltage MOSFETs. C_RSSis usually specified in the MOS-

FET characteristics. The constant k = 1.7 can be used to

estimate the contributions of the two terms in the main

switch dissipation equation.

SelectioncriteriaforthepowerMOSFETsincludethe“ON”

The Schottky diode D1 shown in Figure 1 conducts during

the dead-time between the conduction of the two power

MOSFETs. This prevents the body diode of the bottom

MOSFET from turning on, storing charge during the dead-

time and requiring a reverse recovery period that could

cost as much as 3% in efficiency at high V_IN. A 1A to 3A

Schottky is generally a good compromise for both regions

of operation due to the relatively small average current.

Larger diodes result in additional transition losses due to

their larger junction capacitance.

resistance R_DS(ON), reverse transfer capacitance C_RSS

,

input voltage and maximum output current. When the

LTC1628 is operating in continuous mode the duty cycles

for the top and bottom MOSFETs are given by:

V

OUT

Main SwitchDuty Cycle =

V

IN

V – V

IN

OUT

Synchronous SwitchDuty Cycle =

V

IN

C_INand C_OUTSelection

The MOSFET power dissipations at maximum output

current are given by:

The selection of C_INis simplified by the multiphase archi-

tecture and its impact on the worst-case RMS current

drawnthroughtheinputnetwork(battery/fuse/capacitor).

It can be shown that the worst case RMS current occurs

when only one controller is operating. The controller with

the highest (V_OUT)(I_OUT) product needs to be used in the

formula below to determine the maximum RMS current

requirement. Increasing the output current, drawn from

the other out-of-phase controller, will actually decrease

the input RMS ripple current from this maximum value

(see Figure 4). The out-of-phase technique typically re-

duces the input capacitor’s RMS ripple current by a factor

of 30% to 70% when compared to a single phase power

supply solution.

2

) (

V

OUT

P

=

I

1+δ R

+

(

)

MAIN

MAX

DS(ON)

IN

2

) (

k V

(

I

C

f

)(

)( )

IN

MAX RSS

2

) (

V – V

IN

OUT

P

=

I

(

1+δ R

)

SYNC

MAX

DS(ON)

V

IN

where δ is the temperature dependency of R_DS(ON)and k

is a constant inversely related to the gate drive current.

BothMOSFETshaveI²RlosseswhilethetopsideN-channel

equation includes an additional term for transition losses,

which are highest at high input voltages. For V_IN< 20V the

high current efficiency generally improves with larger

MOSFETs, while for V_IN> 20V the transition losses rapidly

increasetothepointthattheuseofahigherR_DS(ON)device

with lower C_RSSactually provides higher efficiency. The

synchronous MOSFET losses are greatest at high input

voltage when the top switch duty factor is low or during a

short-circuit when the synchronous switch is on close to

100% of the period.

The type of input capacitor, value and ESR rating have

efficiency effects that need to be considered in the selec-

tion process. The capacitance value chosen should be

sufficient to store adequate charge to keep high peak

battery currents down. 20µF to 40µF is usually sufficient

for a 25W output supply operating at 200kHz. The ESR of

the capacitor is important for capacitor power dissipation

as well as overall battery efficiency. All of the power (RMS

ripple current • ESR) not only heats up the capacitor but

wastes power from the battery.

15

LTC1628/LTC1628-PG

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APPLICATIO S I FOR ATIO

Medium voltage (20V to 35V) ceramic, tantalum, OS-CON

and switcher-rated electrolytic capacitors can be used as

inputcapacitors,buteachhasdrawbacks:ceramicvoltage

coefficients are very high and may have audible piezoelec-

tric effects; tantalums need to be surge-rated; OS-CONs

suffer from higher inductance, larger case size and limited

surface-mount applicability; electrolytics’ higher ESR and

dryout possibility require several to be used. Multiphase

systems allow the lowest amount of capacitance overall.

As little as one 22µF or two to three 10µF ceramic capaci-

tors are an ideal choice in a 20W to 35W power supply due

to their extremely low ESR. Even though the capacitance

at 20V is substantially below their rating at zero-bias, very

low ESR loss makes ceramics an ideal candidate for

highest efficiency battery operated systems. Also con-

sider parallel ceramic and high quality electrolytic capaci-

tors as an effective means of achieving ESR and bulk

capacitance goals.

operatingduetotheinterleavingofcurrentpulsesthrough

theinputcapacitor’sESR. Thisiswhytheinputcapacitor’s

requirement calculated above for the worst-case control-

ler is adequate for the dual controller design. Remember

that input protection fuse resistance, battery resistance

and PC board trace resistance losses are also reduced due

to the reduced peak currents in a multiphase system. The

overall benefit of a multiphase design will only be fully

realized when the source impedance of the power supply/

battery is included in the efficiency testing. The drains of

thetwotopMOSFETSshouldbeplacedwithin1cmofeach

other and share a common C_IN(s). Separating the drains

and C_INmay produce undesirable voltage and current

resonances at V_IN.

The selection of C_OUTis driven by the required effective

series resistance (ESR). Typically once the ESR require-

ment is satisfied the capacitance is adequate for filtering.

The output ripple (∆V_OUT) is determined by:

Incontinuousmode, thesourcecurrentofthetopN-chan-

nel MOSFET is a square wave of duty cycle V_OUT/V_IN. To

preventlargevoltagetransients, alowESRinputcapacitor

sized for the maximum RMS current of one channel must

beused. ThemaximumRMScapacitorcurrentisgivenby:

1

∆V_OUT≈ ∆I_LESR +

8fC_OUT

Wheref=operatingfrequency,C_OUT=outputcapacitance,

and ∆I_L= ripple current in the inductor. The output ripple

is highest at maximum input voltage since ∆I_Lincreases

with input voltage. With ∆I_L= 0.3I_OUT(MAX)the output

ripple will typically be less than 50mV at max V_INassum-

ing:

1/2

]

V

V − V

OUT

(

)

OUT IN

[

C RequiredI

≈I

IN

RMS MAX

V

IN

This formula has a maximum at V_IN= 2V_OUT, where

I_RMS= I_OUT/2. This simple worst case condition is com-

monlyusedfordesignbecauseevensignificantdeviations

donotoffermuchrelief.Notethatcapacitormanufacturer’s

ripple current ratings are often based on only 2000 hours

of life. This makes it advisable to further derate the

capacitor, or to choose a capacitor rated at a higher

temperaturethanrequired.Severalcapacitorsmayalsobe

paralleled to meet size or height requirements in the

design. Always consult the manufacturer if there is any

question.

C_OUTRecommended ESR < 2 R_SENSE

and C_OUT> 1/(8fR_SENSE

)

ThefirstconditionrelatestotheripplecurrentintotheESR

of the output capacitance while the second term guaran-

tees that the output capacitance does not significantly

discharge during the operating frequency period due to

ripple current. The choice of using smaller output capaci-

tance increases the ripple voltage due to the discharging

term but can be compensated for by using capacitors of

very low ESR to maintain the ripple voltage at or below

50mV. The I_THpin OPTI-LOOP compensation compo-

nents can be optimized to provide stable, high perfor-

mancetransientresponseregardlessoftheoutputcapaci-

tors selected.

The benefit of the LTC1628 multiphase can be calculated

by using the equation above for the higher power control-

ler and then calculating the loss that would have resulted

if both controller channels switch on at the same time. The

total RMS power lost is lower when both controllers are

16

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Manufacturers such as Nichicon, United Chemicon and

Sanyo can be considered for high performance through-

hole capacitors. The OS-CON semiconductor dielectric

capacitor available from Sanyo has the lowest (ESR)(size)

product of any aluminum electrolytic at a somewhat

higher price. An additional ceramic capacitor in parallel

with OS-CON capacitors is recommended to reduce the

inductance effects.

recommended. Good bypassing is necessary to supply

the high transient currents required by the MOSFET gate

drivers and to prevent interaction between channels.

Higher input voltage applications in which large MOSFETs

are being driven at high frequencies may cause the maxi-

mum junction temperature rating for the LTC1628 to be

exceeded. The system supply current is normally domi-

nated by the gate charge current. Additional external

loading of the INTV_CCand 3.3V linear regulators also

needs to be taken into account for the power dissipation

calculations. The total INTV_CCcurrent can be supplied by

either the 5V internal linear regulator or by the EXTV_CC

input pin. When the voltage applied to the EXTV_CCpin is

less than 4.7V, all of the INTV_CCcurrent is supplied by the

internal 5V linear regulator. Power dissipation for the IC in

this case is highest: (V_IN)(I_INTVCC), and overall efficiency

is lowered. The gate charge current is dependent on

operatingfrequencyasdiscussedintheEfficiencyConsid-

erations section. The junction temperature can be esti-

mated by using the equations given in Note 2 of the

Electrical Characteristics. For example, the LTC1628 V_IN

current is limited to less than 24mA from a 24V supply

when not using the EXTV_CCpin as follows:

In surface mount applications multiple capacitors may

need to be used in parallel to meet the ESR, RMS current

handling and load step requirements of the application.

Aluminum electrolytic, dry tantalum and special polymer

capacitors are available in surface mount packages. Spe-

cial polymer surface mount capacitors offer very low ESR

buthavelowerstoragecapacityperunitvolumethanother

capacitor types. These capacitors offer a very cost-effec-

tiveoutputcapacitorsolutionandareanidealchoicewhen

combined with a controller having high loop bandwidth.

Tantalum capacitors offer the highest capacitance density

and are often used as output capacitors for switching

regulators having controlled soft-start. Several excellent

surge-tested choices are the AVX TPS, AVX TPSV or the

KEMET T510 series of surface mount tantalums, available

in case heights ranging from 2mm to 4mm. Aluminum

electrolytic capacitors can be used in cost-driven applica-

tionsprovidingthatconsiderationisgiventoripplecurrent

ratings, temperature and long term reliability. A typical

application will require several to many aluminum electro-

lytic capacitors in parallel. A combination of the above

mentioned capacitors will often result in maximizing per-

formance and minimizing overall cost. Other capacitor

types include Nichicon PL series, NEC Neocap, Pansonic

SP and Sprague 595D series. Consult manufacturers for

other specific recommendations.

T_J= 70°C + (24mA)(24V)(95°C/W) = 125°C

UseoftheEXTV_CCinputpinreducesthejunctiontempera-

ture to:

T_J= 70°C + (24mA)(5V)(95°C/W) = 81°C

Dissipationshouldbecalculatedtoalsoincludeanyadded

current drawn from the internal 3.3V linear regulator. To

prevent maximum junction temperature from being ex-

ceeded, the input supply current must be checked operat-

ing in continuous mode at maximum V_IN.

EXTV_CCConnection

INTV_CCRegulator

The LTC1628 contains an internal P-channel MOSFET

switch connected between the EXTV_CCand INTV_CCpins.

When the voltage applied to EXTV_CCrises above 4.7V, the

internal regulator is turned off and the switch closes,

connecting the EXTV_CCpin to the INTV_CCpin thereby

supplying internal power. The switch remains closed as

longasthevoltageappliedtoEXTV_CCremainsabove4.5V.

This allows the MOSFET driver and control power to be

An internal P-channel low dropout regulator produces 5V

at the INTV_CCpin from the V_INsupply pin. INTV_CCpowers

the drivers and internal circuitry within the LTC1628. The

INTV_CCpin regulator can supply a peak current of 50mA

and must be bypassed to ground with a minimum of

4.7µF tantalum, 10µF special polymer, or low ESR type

electrolytic capacitor. A 1µF ceramic capacitor placed

directlyadjacenttotheINTV_CCandPGNDICpinsishighly

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derived from the output during normal operation (4.7V <

4. EXTV_CCConnected to an Output-Derived Boost Net-

work. For3.3Vandotherlowvoltageregulators, efficiency

gains can still be realized by connecting EXTV_CCto an

output-derived voltage that has been boosted to greater

than 4.7V. This can be done with either the inductive boost

winding as shown in Figure 6a or the capacitive charge

pump shown in Figure 6b. The charge pump has the

advantage of simple magnetics.

V

_OUT<7V)andfromtheinternalregulatorwhentheoutput

is out of regulation (start-up, short-circuit). If more cur-

rent is required through the EXTV_CCswitch than is speci-

fied, an external Schottky diode can be added between the

EXTV_CCand INTV_CCpins. Do not apply greater than 7V to

the EXTV_CCpin and ensure that EXTV_CC< V_IN.

Significant efficiency gains can be realized by powering

INTV_CCfrom the output, since the V_INcurrent resulting

from the driver and control currents will be scaled by a

factor of (Duty Cycle)/(Efficiency). For 5V regulators this

Topside MOSFET Driver Supply (C_B, D_B)

External bootstrap capacitors C_Bconnected to the BOOST

pinssupplythegatedrivevoltagesforthetopsideMOSFETs.

Capacitor C_Bin the functional diagram is charged though

external diode D_Bfrom INTV_CCwhen the SW pin is low.

When one of the topside MOSFETs is to be turned on, the

driver places the C_Bvoltage across the gate-source of the

desiredMOSFET.ThisenhancestheMOSFETandturnson

the topside switch. The switch node voltage, SW, rises to

V_INand the BOOST pin follows. With the topside MOSFET

supply means connecting the EXTV_CCpin directly to V_OUT

.

However, for 3.3V and other lower voltage regulators,

additional circuitry is required to derive INTV_CCpower

from the output.

The following list summarizes the four possible connec-

tions for EXTV_CC:

1. EXTV_CCLeftOpen(orGrounded).ThiswillcauseINTV_CC

to be powered from the internal 5V regulator resulting in

an efficiency penalty of up to 10% at high input voltages.

on, the boost voltage is above the input supply: V_BOOST

=

V_IN+ V_INTVCC. The value of the boost capacitor C_Bneeds

to be 100 times that of the total input capacitance of the

topside MOSFET(s). The reverse breakdown of the exter-

nal Schottky diode must be greater than V_IN(MAX). When

adjusting the gate drive level, the final arbiter is the total

input current for the regulator. If a change is made and the

input current decreases, then the efficiency has improved.

If there is no change in input current, then there is no

change in efficiency.

2. EXTV_CCConnected directly to V_OUT. This is the normal

connection for a 5V regulator and provides the highest

efficiency.

3. EXTV_CCConnected to an External supply. If an external

supply is available in the 5V to 7V range, it may be used to

powerEXTV_CCprovidingitiscompatiblewiththeMOSFET

gate drive requirements.

+

V

IN

1µF

OPTIONAL EXTV

CONNECTION

CC

+

5V < V

< 7V

SEC

C

IN

0.22µF

BAT85

V

IN

SEC

IN

+

N-CH

LTC1628

1µF

VN2222LL

TG1

SW

TG1

SW

R

SENSE

V

OUT

T1

1:N

L1

EXTV

CC

R6

R5

+

C

OUT

FCB

BG1

OUT

BG1

N-CH

SGND

PGND

1628 F06a

1628 F06b

Figure 6b. Capacitive Charge Pump for EXTV_CC

Figure 6a. Secondary Output Loop & EXTV_CCConnection

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Output Voltage

Soft-Start/Run Function

The LTC1628 output voltages are each set by an external

feedback resistive divider carefully placed across the

output capacitor. The resultant feedback signal is com-

pared with the internal precision 0.800V voltage reference

by the error amplifier. The output voltage is given by the

equation:

The RUN/SS1 and RUN/SS2 pins are multipurpose pins

that provide a soft-start function and a means to shut

down the LTC1628. Soft-start reduces the input power

source’s surge currents by gradually increasing the

controller’s current limit (proportional to V_ITH). This pin

can also be used for power supply sequencing.

An internal 1.2µA current source charges up the C_SS

capacitor_.When the voltage on RUN/SS1 (RUN/SS2)

reaches 1.5V, the particular controller is permitted to start

operating. As the voltage on RUN/SS increases from 1.5V

to 3.0V, the internal current limit is increased from 25mV/

R_SENSEto 75mV/R_SENSE. The output current limit ramps

up slowly, taking an additional 1.25s/µF to reach full

current. The output current thus ramps up slowly, reduc-

ing the starting surge current required from the input

power supply. If RUN/SS has been pulled all the way to

ground there is a delay before starting of approximately:

R2

R1

V

= 0.8V 1+

OUT

SENSE⁺/SENSE^–Pins

The common mode input range of the current comparator

sense pins is from 0V to (1.1)INTV_CC. Continuous linear

operation is guaranteed throughout this range allowing

output voltage setting from 0.8V to 7.7V, depending upon

the voltage applied to EXTV_CC. A differential NPN input

stage is biased with internal resistors from an internal

2.4V source as shown in the Functional Diagram. This

requires that current either be sourced or sunk from the

SENSE pins depending on the output voltage. If the output

voltage is below 2.4V current will flow out of both SENSE

pinstothemainoutput.Theoutputcanbeeasilypreloaded

by the V_OUTresistive divider to compensate for the current

comparator’s negative input bias current. The maximum

current flowing out of each pair of SENSE pins is:

1.5V

1.2µA

t_DELAY

=

C

_SS= 1.25s / µF C_SS

(

)

3V − 1.5V

1.2µA

t_IRAMP

C

_SS= 1.25s / µF C_SS

(

)

By pulling both RUN/SS pins below 1V and/or pulling the

STBYMD pin below 0.2V, the LTC1628 is put into low

current shutdown (I_Q= 20µA). The RUN/SS pins can be

driven directly from logic as shown in Figure 7. Diode D1

in Figure 7 reduces the start delay but allows C_SSto ramp

up slowly providing the soft-start function. Each RUN/SS

pin has an internal 6V zener clamp (See Functional

Diagram).

I_SENSE⁺+ I_SENSE^–= (2.4V – V_OUT)/24k

SinceV_OSENSEisservoedtothe0.8Vreferencevoltage, we

can choose R1 in Figure 2 to have a maximum value to

absorb this current.

0.8V

2.4V – V

R1

= 24k

(MAX)

V

INTV

IN

CC

OUT

3.3V OR 5V

RUN/SS

R

*

R

*

SS

D1

for V_OUT< 2.4V

RUN/SS

Regulating an output voltage of 1.8V, the maximum value

of R1 should be 32K. Note that for an output voltage above

2.4V, R1 has no maximum value necessary to absorb the

sense currents; however, R1 is still bounded by the

V_OSENSEfeedback current.

C

SS

C

SS

*OPTIONAL TO DEFEAT OVERCURRENT LATCHOFF

(a)

1628 F07

(b)

Figure 7. RUN/SS Pin Interfacing

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Fault Conditions: Overcurrent Latchoff

short-circuit and foldback current limiting still remains

active, thereby protecting the power supply system from

failure. After the design is complete, a decision can be

made whether to enable the latchoff feature.

The RUN/SS pins also provide the ability to latch off the

controller(s) when an overcurrent condition is detected.

The RUN/SS capacitor, C_SS, is used initially to turn on and

limit the inrush current. After the controller has been

started and been given adequate time to charge up the

outputcapacitorandprovidefullloadcurrent, theRUN/SS

capacitorisusedforashort-circuittimer. Iftheregulator’s

output voltage falls to less than 70% of its nominal value

after C_SSreaches 4.1V, C_SSbegins discharging on the

assumption that the output is in an overcurrent condition.

If the condition lasts for a long enough period as deter-

mined by the size of the C_SSand the specified discharge

current, the controller will be shut down until the RUN/SS

pin voltage is recycled. If the overload occurs during start-

up, the time can be approximated by:

The value of the soft-start capacitor C_SSmay need to be

scaled with output voltage, output capacitance and load

current characteristics. The minimum soft-start capaci-

tance is given by:

_SS> (C_OUT)(V_OUT) (10^–4) (R_SENSE

The minimum recommended soft-start capacitor of

_SS= 0.1µF will be sufficient for most applications.

C

)

C

Fault Conditions: Current Limit and Current Foldback

The LTC1628 current comparator has a maximum sense

voltage of 75mV resulting in a maximum MOSFET current

of 75mV/R_SENSE. The maximum value of current limit

generally occurs with the largest V_INat the highest ambi-

ent temperature, conditions that cause the highest power

dissipation in the top MOSFET.

t_LO1≈ [C_SS(4.1 – 1.5 + 4.1 – 3.5)]/(1.2µA)

= 2.7 • 10⁶(C_SS)

If the overload occurs after start-up the voltage on C_SSwill

begin discharging from the zener clamp voltage:

The LTC1628 includes current foldback to help further

limit load current when the output is shorted to ground.

The foldback circuit is active even when the overload

shutdown latch described above is overridden. If the

outputfallsbelow70%ofitsnominaloutputlevel,thenthe

maximum sense voltage is progressively lowered from

75mV to 25mV. Under short-circuit conditions with very

low duty cycles, the LTC1628 will begin cycle skipping in

order to limit the short-circuit current. In this situation the

bottom MOSFET will be dissipating most of the power but

less than in normal operation. The short-circuit ripple

current is determined by the minimum on-time t_ON(MIN)of

the LTC1628 (less than 200ns), the input voltage and

inductor value:

t

_LO2≈ [C_SS(6 – 3.5)]/(1.2µA) = 2.1 • 10⁶(C_SS)

The FLTCPL pin (LTC1628 only) determines whether an

overload on one channel will latch off only that channel

(FLTCPL = 0V) or both channels (FLTCPL = INTV_CC). This

built-in overcurrent latchoff can be overridden by provid-

ing a pull-up resistor to the RUN/SS pin as shown in

Figure 7. This resistance shortens the soft-start period

and prevents the discharge of the RUN/SS capacitor

during an over current condition. Tying this pull-up resis-

tor to V_INas in Figure 7a, defeats overcurrent latchoff.

Diode-connecting this pull-up resistor to INTV_CC, as in

Figure 7b, eliminates any extra supply current during

controller shutdown while eliminating the INTV_CCloading

from preventing controller start-up.

∆I_L(SC)= t_ON(MIN)(V_IN/L)

The resulting short-circuit current is:

Why should you defeat overcurrent latchoff? During the

prototyping stage of a design, there may be a problem

with noise pickup or poor layout causing the protection

circuit to latch off. Defeating this feature will easily allow

troubleshooting of the circuit and PC layout. The internal

25mV

1

I_SC

=

+ ∆I_L(SC)

R_SENSE

2

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Fault Conditions: Overvoltage Protection (Crowbar)

provide power to keep-alive functions such as a keyboard

controller.Thispincanalsobeusedasalatching“on”and/

or latching “off” power switch if so designed.

The overvoltage crowbar is designed to blow a system

input fuse when the output voltage of the regulator rises

much higher than nominal levels. The crowbar causes

huge currents to flow, that blow the fuse to protect against

a shorted top MOSFET if the short occurs while the

controller is operating.

Frequency of Operation

The LTC1628 has an internal voltage controlled oscillator.

The frequency of this oscillator can be varied over a 2 to 1

range. The pin is internally self-biased at 1.19V, resulting

in a free-running frequency of approximately 220kHz. The

FREQSET pin can be grounded to lower this frequency to

approximately 140kHz or tied to the INTV_CCpin to yield

approximately 310kHz. The FREQSET pin may be driven

with a voltage from 0 to INTV_CCto fix or modulate the

oscillator frequency as shown in Figure 5.

A comparator monitors the output for overvoltage condi-

tions. The comparator (OV) detects overvoltage faults

greater than 7.5% above the nominal output voltage.

When this condition is sensed, the top MOSFET is turned

off and the bottom MOSFET is turned on until the overvolt-

age condition is cleared. The output of this comparator is

only latched by the overvoltage condition itself and will

thereforeallowaswitchingregulatorsystemhavingapoor

PC layout to function while the design is being debugged.

The bottom MOSFET remains on continuously for as long

as the OV condition persists; if V_OUTreturns to a safe level,

normal operation automatically resumes. A shorted top

MOSFET will result in a high current condition which will

open the system fuse. The switching regulator will regu-

late properly with a leaky top MOSFET by altering the duty

cycle to accommodate the leakage.

Minimum On-Time Considerations

Minimum on-time t_ON(MIN)is the smallest time duration

thattheLTC1628iscapableofturningonthetopMOSFET.

It is determined by internal timing delays and the gate

chargerequiredtoturnonthetopMOSFET.Lowdutycycle

applications may approach this minimum on-time limit

and care should be taken to ensure that

V_OUT

V (f)

IN

t_ON(MIN)

<

The Standby Mode (STBYMD) Pin Function

TheStandbyMode(STBYMD)pinprovidesseveralchoices

for start-up and standby operational modes. If the pin is

pulled to ground, the RUN/SS pins for both controllers are

internallypulledtoground,preventingstart-upandthereby

providing a single control pin for turning off both control-

lers at once. If the pin is left open or decoupled with a

capacitor to ground, the RUN/SS pins are each internally

provided with a starting current enabling external control

for turning on each controller independently. If the pin is

provided with a current of >3µA at a voltage greater than

2V, both internal linear regulators (INTV_CCand 3.3V) will

be on even when both controllers are shut down. In this

mode, the onboard 3.3V and 5V linear regulators can

Ifthedutycyclefallsbelowwhatcanbeaccommodatedby

the minimum on-time, the LTC1628 will begin to skip

cycles. The output voltage will continue to be regulated,

but the ripple voltage and current will increase.

The minimum on-time for the LTC1628 is generally less

than200ns.However,asthepeaksensevoltagedecreases

the minimum on-time gradually increases up to about

300ns. This is of particular concern in forced continuous

applications with low ripple current at light loads. If the

duty cycle drops below the minimum on-time limit in this

situation, a significant amount of cycle skipping can occur

with correspondingly larger current and voltage ripple.

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FCB Pin Operation

internal current source pulling the pin high. Include this

current when choosing resistor values R5 and R6.

The FCB pin can be used to regulate a secondary winding

or as a logic level input. Continuous operation is forced

when the FCB pin drops below 0.8V. During continuous

mode, current flows continuously in the transformer pri-

mary. The secondary winding(s) draw current only when

the bottom, synchronous switch is on. When primary load

currents are low and/or the V_IN/V_OUTratio is low, the

synchronous switch may not be on for a sufficient amount

of time to transfer power from the output capacitor to the

secondary load. Forced continuous operation will support

secondary windings providing there is sufficient synchro-

nous switch duty factor. Thus, the FCB input pin removes

the requirement that power must be drawn from the

inductor primary in order to extract power from the

auxiliary windings. With the loop in continuous mode, the

auxiliary outputs may nominally be loaded without regard

to the primary output load.

The following table summarizes the possible states avail-

able on the FCB pin:

Table 1

FCB Pin

Condition

0V to 0.75V

Forced Continuous (Current Reversal

Allowed—Burst Inhibited)

0.85V < V < 4.3V

Minimum Peak Current Induces

Burst Mode Operation

FCB

No Current Reversal Allowed

Feedback Resistors

>4.8V

Regulating a Secondary Winding

Burst Mode Operation Disabled

Constant Frequency Mode Enabled

No Current Reversal Allowed

No Minimum Peak Current

The FLTCPL pin determines whether only the first or both

controllers are temporarily forced into continuous mode

when the FCB pin falls below 0.8V. Tying the FLTCPL pin

togroundwillsendonlythefirstcontrollerintocontinuous

operation while tying the FLTCPL pin to INTV_CCwill send

both controllers into continuous operation.

The secondary output voltage V_SECis normally set as

shown in Figure 6a by the turns ratio N of the transformer:

V_SEC(N + 1) V_OUT

However, if the controller goes into Burst Mode operation

and halts switching due to a light primary load current,

then V_SECwill droop. An external resistive divider from

Voltage Positioning

Voltage positioning can be used to minimize peak-to-peak

output voltage excursions under worst-case transient

loading conditions. The open-loop DC gain of the control

loop is reduced depending upon the maximum load step

specifications. Voltage positioning can easily be added to

the LTC1628 by loading the I_THpin with a resistive divider

having a Thevenin equivalent voltage source equal to the

midpoint operating voltage of the error amplifier, or 1.2V

(see Figure 8).

V_SECto the FCB pin sets a minimum voltage V_SEC(MIN)

:

R6

R5

V

≈ 0.8V 1+

SEC(MIN)

If V_SECdrops below this level, the FCB voltage forces

temporary continuous switching operation until V_SECis

again above its minimum.

The resistive load reduces the DC loop gain while main-

taining the linear control range of the error amplifier. The

maximum output voltage deviation can theoretically be

In order to prevent erratic operation if no external connec-

tions are made to the FCB pin, the FCB pin has a 0.18µA

INTV

CC

R

T2

T1

I

TH

LTC1628

R

C

1628 F08

Figure 8. Active Voltage Positioning Applied to the LTC1628

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U

reduced to half or alternatively the amount of output

capacitance can be reduced for a particular application. A

complete explanation is included in Design Solutions 10.

(See www.linear-tech.com)

loss from 10% or more (if the driver was powered directly

from V_IN) to only a few percent.

3. I²R losses are predicted from the DC resistances of the

fuse (if used), MOSFET, inductor, current sense resistor,

and input and output capacitor ESR. In continuous mode

Efficiency Considerations

the average output current flows through L and R_SENSE

,

The percent efficiency of a switching regulator is equal to

the output power divided by the input power times 100%.

It is often useful to analyze individual losses to determine

what is limiting the efficiency and which change would

produce the most improvement. Percent efficiency can be

expressed as:

but is “chopped” between the topside MOSFET and the

synchronous MOSFET. If the two MOSFETs have approxi-

mately the same R_DS(ON), then the resistance of one

MOSFET can simply be summed with the resistances of L,

R

_SENSEand ESR to obtain I²R losses. For example, if each

R_DS(ON)= 30mΩ, R_L= 50mΩ, R_SENSE= 10mΩ and R_ESR

= 40mΩ (sum of both input and output capacitance

losses), then the total resistance is 130mΩ. This results in

losses ranging from 3% to 13% as the output current

increases from 1A to 5A for a 5V output, or a 4% to 20%

loss for a 3.3V output. Efficiency varies as the inverse

square of V_OUTfor the same external components and

output power level. The combined effects of increasingly

lower output voltages and higher currents required by

high performance digital systems is not doubling but

quadrupling the importance of loss terms in the switching

regulator system!

%Efficiency = 100% – (L1 + L2 + L3 + ...)

whereL1, L2, etc. aretheindividuallossesasapercentage

of input power.

Although all dissipative elements in the circuit produce

losses, four main sources usually account for most of the

losses in LTC1628 circuits: 1) LTC1628 V_INcurrent (in-

cluding loading on the 3.3V internal regulator), 2) INTV_CC

regulator current, 3) I²R losses, 4) Topside MOSFET

transition losses.

1. The V_INcurrent has two components: the first is the DC

supply current given in the Electrical Characteristics table,

which excludes MOSFET driver and control currents; the

second is the current drawn from the 3.3V linear regulator

output.V_INcurrenttypicallyresultsinasmall(<0.1%)loss.

4. Transition losses apply only to the topside MOSFET(s),

and become significant only when operating at high input

voltages (typically 15V or greater). Transition losses can

be estimated from:

2

Transition Loss = (1.7) V_INI_O(MAX)C_RSS

f

2. INTV_CCcurrent is the sum of the MOSFET driver and

control currents. The MOSFET driver current results from

switching the gate capacitance of the power MOSFETs.

Each time a MOSFET gate is switched from low to high to

low again, a packet of charge dQ moves from INTV_CCto

ground. The resulting dQ/dt is a current out of INTV_CCthat

is typically much larger than the control circuit current. In

continuous mode, I_GATECHG=f(Q_T+Q_B), where Q_Tand Q_B

are the gate charges of the topside and bottom side

MOSFETs.

Other “hidden” losses such as copper trace and internal

battery resistances can account for an additional 5% to

10% efficiency degradation in portable systems. It is very

important to include these “system” level losses during

the design phase. The internal battery and fuse resistance

losses can be minimized by making sure that C_INhas

adequate charge storage and very low ESR at the switch-

ing frequency. A 25W supply will typically require a

minimum of 20µF to 40µF of capacitance having a maxi-

mum of 20mΩ to 50mΩ of ESR. The LTC1628 2-phase

architecture typically halves this input capacitance re-

quirement over competing solutions. Other losses includ-

ing Schottky conduction losses during dead-time and

inductor core losses generally account for less than 2%

total additional loss.

SupplyingINTV_CCpowerthroughtheEXTV_CCswitchinput

from an output-derived source will scale the V_INcurrent

required for the driver and control circuits by a factor of

(Duty Cycle)/(Efficiency). For example, in a 20V to 5V

application, 10mA of INTV_CCcurrent results in approxi-

mately2.5mAofV_INcurrent. Thisreducesthemid-current

23

LTC1628/LTC1628-PG

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APPLICATIO S I FOR ATIO

Checking Transient Response

full-load current having a rise time of 1µs to 10µs will

produce output voltage and I_THpin waveforms that will

give a sense of the overall loop stability without breaking

the feedback loop. Placing a power MOSFET directly

across the output capacitor and driving the gate with an

appropriate signal generator is a practical way to produce

a realistic load step condition. The initial output voltage

step resulting from the step change in output current may

not be within the bandwidth of the feedback loop, so this

signal cannot be used to determine phase margin. This is

why it is better to look at the I_THpin signal which is in the

feedback loop and is the filtered and compensated control

loop response. The gain of the loop will be increased by

increasing R_Cand the bandwidth of the loop will be

increased by decreasing C_C. If R_Cis increased by the same

factor that C_Cis decreased, the zero frequency will be kept

the same, thereby keeping the phase shift the same in the

most critical frequency range of the feedback loop. The

outputvoltagesettlingbehaviorisrelatedtothestabilityof

the closed-loop system and will demonstrate the actual

overall supply performance.

The regulator loop response can be checked by looking at

the load current transient response. Switching regulators

take several cycles to respond to a step in DC (resistive)

load current. When a load step occurs, V_OUTshifts by an

amount equal to ∆I_LOAD(ESR), where ESR is the effective

series resistance of C_OUT. ∆I_LOADalso begins to charge or

discharge C_OUTgenerating the feedback error signal that

forces the regulator to adapt to the current change and

return V_OUTto its steady-state value. During this recovery

time V_OUTcan be monitored for excessive overshoot or

ringing, which would indicate a stability problem. OPTI-

LOOP compensation allows the transient response to be

optimized over a wide range of output capacitance and

ESR values. The availability of the I_THpin not only allows

optimization of control loop behavior but also provides a

DC coupled and AC filtered closed loop response test

point. The DC step, rise time and settling at this test point

truly reflects the closed loop response. Assuming a pre-

dominantly second order system, phase margin and/or

damping factor can be estimated using the percentage of

overshoot seen at this pin. The bandwidth can also be

estimated by examining the rise time at the pin. The I_TH

external components shown in the Figure 1 circuit will

provide an adequate starting point for most applications.

A second, more severe transient is caused by switching in

loads with large (>1µF) supply bypass capacitors. The

dischargedbypasscapacitorsareeffectivelyputinparallel

with C_OUT, causing a rapid drop in V_OUT. No regulator can

alter its delivery of current quickly enough to prevent this

sudden step change in output voltage if the load switch

resistance is low and it is driven quickly. If the ratio of

C_LOADto C_OUTis greater than1:50, the switch rise time

should be controlled so that the load rise time is limited to

approximately 25 • C_LOAD. Thus a 10µF capacitor would

require a 250µs rise time, limiting the charging current to

about 200mA.

The I_THseries R_C-C_Cfilter sets the dominant pole-zero

loop compensation. The values can be modified slightly

(from 0.5 to 2 times their suggested values) to optimize

transient response once the final PC layout is done and the

particular output capacitor type and value have been

determined. The output capacitors need to be selected

because the various types and values determine the loop

gain and phase. An output current pulse of 20% to 80% of

24

LTC1628/LTC1628-PG

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APPLICATIO S I FOR ATIO

U

Automotive Considerations: Plugging into the

just what it says, while double-battery is a consequence of

tow-truck operators finding that a 24V jump start cranks

cold engines faster than 12V.

Cigarette Lighter

As battery-powered devices go mobile, there is a natural

interest in plugging into the cigarette lighter in order to

conserveorevenrechargebatterypacksduringoperation.

But before you connect, be advised: you are plugging into

thesupplyfromhell. Themainpowerlineinanautomobile

is the source of a number of nasty potential transients,

including load-dump, reverse-battery, and double-bat-

tery.

ThenetworkshowninFigure9isthemoststraightforward

approach to protect a DC/DC converter from the ravages

of an automotive power line. The series diode prevents

current from flowing during reverse-battery, while the

transient suppressor clamps the input voltage during

load-dump. Note that the transient suppressor should not

conduct during double-battery operation, but must still

clamptheinputvoltagebelowbreakdownoftheconverter.

Although the LTC1628 has a maximum input voltage of

36V, most applications will be limited to 30V by the

MOSFET BVDSS.

Load-dump is the result of a loose battery cable. When the

cablebreaksconnection,thefieldcollapseinthealternator

can cause a positive spike as high as 60V which takes

several hundred milliseconds to decay. Reverse-battery is

50A I RATING

PK

V

IN

12V

LTC1628

TRANSIENT VOLTAGE

SUPPRESSOR

GENERAL INSTRUMENT

1.5KA24A

1628 F09

Figure 9. Automotive Application Protection

25

LTC1628/LTC1628-PG

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APPLICATIO S I FOR ATIO

Design Example

Choosing 1% resistors; R1 = 25.5k and R2 = 32.4k yields

an output voltage of 1.816V.

As a design example for one channel, assume V_IN

=

12V(nominal), V_IN= 22V(max), V_OUT= 1.8V, I_MAX= 5A,

and f = 300kHz.

The power dissipation on the top side MOSFET can be

easily estimated. Choosing a Siliconix Si4412DY results

in; R_DS(ON)= 0.042Ω, C_RSS= 100pF. At maximum input

voltage with T(estimated) = 50°C:

Theinductancevalueischosenfirstbasedona30%ripple

current assumption. The highest value of ripple current

occursatthemaximuminputvoltage.TietheFREQSETpin

to the INTV_CCpin for 300kHz operation. The minimum

inductance for 30% ripple current is:

2

( )

1.8V

22V

P

=

(

5 1+(0.005)(50°C – 25°C)

MAIN

[

]

2

0.042Ω + 1.7 22V 5A 100pF 300kHz

)

(

) ( )(

)(

)

V

(f)(L)

V

OUT

∆I =

1–

L

V

= 220mW

IN

Ashort-circuittogroundwillresultinafoldedbackcurrent

of:

A 4.7µH inductor will produce 23% ripple current and a

3.3µH will result in 33%. The peak inductor current will be

the maximum DC value plus one half the ripple current, or

5.84A, for the 3.3µH value. Increasing the ripple current

will also help ensure that the minimum on-time of 200ns

is not violated. The minimum on-time occurs at maximum

V_IN:

25mV 1 200ns(22V)

I_SC

=

+

= 3.2A

0.01Ω

2

3.3µH

with a typical value of R_DS(ON)and δ = (0.005/°C)(20) =

0.1. TheresultingpowerdissipatedinthebottomMOSFET

is:

V_OUT

1.8V

t_ON(MIN)

=

= 273ns

2

22V – 1.8V

22V

= 434mW

V

_IN(MAX)f 22V(300kHz)

P_SYNC

=

3.2A 1.1 0.042Ω

(

) ( )(

)

The R_SENSEresistor value can be calculated by using the

maximum current sense voltage specification with some

accommodation for tolerances:

which is less than under full-load conditions.

C_INis chosen for an RMS current rating of at least 3A at

temperature assuming only this channel is on. C_OUTis

chosen with an ESR of 0.02Ω for low output ripple. The

output ripple in continuous mode will be highest at the

maximum input voltage. The output voltage ripple due to

ESR is approximately:

60mV

5.84A

R_SENSE

≤

≈ 0.01Ω

Since the output voltage is below 2.4V the output resistive

divider will need to be sized to not only set the output

voltage but also to absorb the SENSE pins specified input

current.

V_ORIPPLE= R_ESR(∆IL)= 0.02Ω(1.67A) = 33mV_P–P

0.8V

R1

= 24k

= 24K

(MAX)

2.4V – V

OUT

0.8V

2.4V – 1.8V

= 32k

26

LTC1628/LTC1628-PG

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APPLICATIO S I FOR ATIO

U

PC Board Layout Checklist

2. Are the signal and power grounds kept separate? The

combined LTC1628 signal ground pin and the ground

return of C_INTVCCmust return to the combined C_OUT(–)

terminals. ThepathformedbythetopN-channelMOSFET,

Schottky diode and the C_INcapacitor should have short

leads and PC trace lengths. The output capacitor (–)

terminals should be connected as close as possible to the

(–) terminals of the input capacitor by placing the capaci-

tors next to each other and away from the Schottky loop

described above.

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of the

LTC1628. These items are also illustrated graphically in

the layout diagram of Figure 10. The Figure 11 illustrates

the current waveforms present in the various branches of

the 2-phase synchronous regulators operating in the

continuous mode. Check the following in your layout:

1. Are the top N-channel MOSFETs M1 and M3 located

within 1cm of each other with a common drain connection

at C_IN? Do not attempt to split the input decoupling for the

two channels as it can cause a large resonant loop.

3. Do the LTC1628 V_OSENSEpins resistive dividers con-

nect to the (+) terminals of C_OUT? The resistive divider

must be connected between the (+) terminal of C_OUTand

FLTCPL

R

PU

V

PULL-UP

(<7V)

1

2

28

27

26

25

24

23

22

21

20

19

18

17

16

15

FLTCPL

PGOOD

RUN/SS1

(PGOOD)*

L1

R

SENSE

+

V

SENSE1

TG1

SW1

OUT1

3

–

SENSE1

R2

M1

M2

C

B1

4

D1

V

BOOST1

OSENSE1

R1

5

FREQSET

STBYMD

FCB

V

IN

6

C

OUT1

BG1

R

IN

7

C

IN

INTV

EXTV

CC

C

VIN

GND

LTC1628

8

I

INTV

TH1

V

IN

C

INTVCC

9

SGND

PGND

BG2

OUT2

D2

10

11

12

13

14

3.3V

OUT

I

BOOST2

SW2

TH2

C

B2

M3

M4

L2

V

OSENSE2

–

R

R3

R4

SENSE

V

SENSE2

TG2

OUT2

+

RUN/SS2

1628 F10

*PGOOD ON THE LTC1628-PG

Figure 10. LTC1628 Recommended Printed Circuit Layout Diagram

27

LTC1628/LTC1628-PG

U

W

U U

APPLICATIO S I FOR ATIO

SW1

L1

R

SENSE1

V

OUT1

+

D1

C

OUT1

R

L1

V

IN

R

IN

+

C

IN

SW2

L2

R

SENSE2

V

OUT2

+

D2

C

OUT2

R

L2

BOLD LINES INDICATE

HIGH, SWITCHING

CURRENT LINES.

KEEP LINES TO A

MINIMUM LENGTH.

1628 F11

Figure 11. Branch Current Waveforms

signal ground and a small V_OSENSEdecoupling capacitor

should be as close as possible to the LTC1628 SGND pin.

The R2 and R4 connections should not be along the high

current input feeds from the input capacitor(s).

This capacitor carries the MOSFET drivers current peaks.

An additional 1µF ceramic capacitor placed immediately

next to the INTV_CCand PGND pins can help improve noise

performance substantially.

4. Are the SENSE ^–and SENSE⁺leads routed together

with minimum PC trace spacing? The filter capacitor

between SENSE⁺and SENSE^–should be as close as

possible to the IC. Ensure accurate current sensing with

Kelvin connections at the SENSE resistor.

6. Keep the switching nodes (SW1, SW2), top gate nodes

(TG1, TG2), and boost nodes (BOOST1, BOOST2) away

from sensitive small-signal nodes, especially from the

oppositeschannel’svoltageandcurrentsensingfeedback

pins. All of these nodes have very large and fast moving

signals and therefore should be kept on the “output side”

of the LTC1628 and occupy minimum PC trace area.

5. Is the INTV_CCdecoupling capacitor connected close to

the IC, between the INTV_CCand the power ground pins?

28

LTC1628/LTC1628-PG

U

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APPLICATIO S I FOR ATIO

7. Use a modified “star ground” technique: a low imped-

ance, large copper area central grounding point on the

same side of the PC board as the input and output

capacitors with tie-ins for the bottom of the INTV_CC

decoupling capacitor, the bottom of the voltage feedback

resistive divider and the SGND pin of the IC.

Short-circuit testing can be performed to verify proper

overcurrent latchoff, or 5µA can be provided to the RUN/

SS pin(s) by resistors from V_INto prevent the short-circuit

latchoff from occurring.

ReduceV_INfromitsnominalleveltoverifyoperationofthe

regulator in dropout. Check the operation of the

undervoltage lockout circuit by further lowering V_INwhile

monitoring the outputs to verify operation.

PC Board Layout Debugging

Start with one controller on at a time. It is helpful to use a

DC-50MHz current probe to monitor the current in the

inductor while testing the circuit. Monitor the output

switching node (SW pin) to synchronize the oscilloscope

to the internal oscillator and probe the actual output

voltage as well. Check for proper performance over the

operating voltage and current range expected in the appli-

cation. The frequency of operation should be maintained

over the input voltage range down to dropout and until the

output load drops below the low current operation thresh-

old—typically 10% to 20% of the maximum designed

current level in Burst Mode operation.

Investigate whether any problems exist only at higher

output currents or only at higher input voltages. If prob-

lems coincide with high input voltages and low output

currents,lookforcapacitivecouplingbetweentheBOOST,

SW, TG, and possibly BG connections and the sensitive

voltage and current pins. The capacitor placed across the

current sensing pins needs to be placed immediately

adjacent to the pins of the IC. This capacitor helps to

minimize the effects of differential noise injection due to

high frequency capacitive coupling. If problems are en-

countered with high current output loading at lower input

voltages,lookforinductivecouplingbetweenC_IN,Schottky

and the top MOSFET components to the sensitive current

and voltage sensing traces. In addition, investigate com-

mon ground path voltage pickup between these compo-

nents and the SGND pin of the IC.

The duty cycle percentage should be maintained from

cycle to cycle in a well-designed, low noise PCB imple-

mentation. Variation in the duty cycle at a subharmonic

rate can suggest noise pickup at the current or voltage

sensing inputs or inadequate loop compensation. Over-

compensation of the loop can be used to tame a poor PC

layout if regulator bandwidth optimization is not required.

Only after each controller is checked for their individual

performance should both controllers be turned on at the

same time. A particularly difficult region of operation is

when one controller channel is nearing its current com-

parator trip point when the other channel is turning on its

topMOSFET. Thisoccursaround50%dutycycleoneither

channel due to the phasing of the internal clocks and may

cause minor duty cycle jitter.

An embarrassing problem, which can be missed in an

otherwise properly working switching regulator, results

when the current sensing leads are hooked up backwards.

Theoutputvoltageunderthisimproperhookupwillstillbe

maintained but the advantages of current mode control

will not be realized. Compensation of the voltage loop will

be much more sensitive to component selection. This

behavior can be investigated by temporarily shorting out

the current sensing resistor—don’t worry, the regulator

will still maintain control of the output voltage.

29

LTC1628/LTC1628-PG

U

TYPICAL APPLICATIO

59k

1M

FLTCPL

100k

MBRS1100T3

+

V

PULL-UP

(<7V)

33µF

T1, 1:1.8

10µH

1

2

28

27

26

25

24

23

22

21

20

19

18

17

16

15

25V

FLTCPL*

(PGOOD)

PGOOD

RUN/SS1

0.015Ω

V

0.1µF

OUT1

+

5V

SENSE1

TG1

SW1

3A; 4A PEAK

180pF

1000pF

3

8

–

SENSE1

105k, 1%

5

M1

M2

0.1µF

D1

MBRM

140T3

LT1121

ON/OFF

4

V

BOOST1

OSENSE1

3

2

1

20k

1%

220k

V

5

OUT2

INTV

FREQSET

STBYMD

FCB

V

CC

12V

IN

120mA

6

150µF, 6.3V

BG1

+

PANASONIC SP

33pF

1µF

25V

10Ω

22µF

50V

100k

0.01µF

7

CMDSH-3TR

EXTV

INTV

CC

0.1µF

GND

LTC1628

8

I

TH1

1µF

10V

15k

4.7µF

1000pF

9

180µF, 4V

SGND

PGND

BG2

PANASONIC SP

V

33pF

IN

CMDSH-3TR

7V TO

28V

10

11

12

13

14

3.3V

OUT

D2

MBRM

140T3

I

BOOST2

SW2

TH2

15k

0.1µF

M3

M4

1000pF

V

OSENSE2

20k

1%

V

OUT2

3.3V

5A; 6A PEAK

–

SENSE2

TG2

63.4k

1%

0.01Ω

1000pF

L1

6.3µH

+

RUN/SS2

180pF

0.1µF

1628 F12

V

: 7V TO 28V

*PGOOD ON THE LTC1628-PG

IN

: 5V, 3A/3.3V, 6A, 12V, 150mA

OUT

SWITCHING FREQUENCY = 300kHz

MI, M2, M3, M4: NDS8410A

L1: SUMIDA CEP123-6R3MC

T1: 10µH 1:1.8 — DALE LPE6562-A262 GAPPED E-CORE OR BH ELECTRONICS #501-0657 GAPPED TOROID

Figure 12. LTC1628 High Efficiency Low Noise 5V/3A, 3.3V/5A, 12/120mA Regulator

30

LTC1628/LTC1628-PG

U

PACKAGE DESCRIPTIO

Dimensions in inches (millimeters) unless otherwise noted.

G Package

28-Lead Plastic SSOP (0.209)

(LTC DWG # 05-08-1640)

10.07 – 10.33*

(0.397 – 0.407)

28 27 26 25 24 23 22 21 20 19 18

16 15

17

7.65 – 7.90

(0.301 – 0.311)

5

7

8

1

2

3

4

6

9 10 11 12 13 14

5.20 – 5.38**

(0.205 – 0.212)

1.73 – 1.99

(0.068 – 0.078)

0° – 8°

0.65

(0.0256)

BSC

0.13 – 0.22

0.55 – 0.95

(0.005 – 0.009)

(0.022 – 0.037)

0.05 – 0.21

(0.002 – 0.008)

0.25 – 0.38

(0.010 – 0.015)

NOTE: DIMENSIONS ARE IN MILLIMETERS

*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.152mm (0.006") PER SIDE

**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE

G28 SSOP 1098

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

31

LTC1628/LTC1628-PG

U

TYPICAL APPLICATIO

FLTCPL

V

PULL-UP

(<7V)

1

28

27

26

25

24

23

22

21

20

19

18

17

16

15

FLTCPL*

(PGOOD)

L1

RUN/SS1

PGOOD

8µH

0.015Ω

V

0.1µF

OUT1

2

+

SENSE1

TG1

SW1

5V

3A; 4A PEAK

27pF

1000pF

105k

1%

3

4

–

SENSE1

M1A

M1B

0.1µF

D1

MBRM

140T3

V

BOOST1

OSENSE1

20k

1%

5

INTV

FREQSET

STBYMD

FCB

V

CC

IN

47µF

6

6.3V

BG1

33pF

10Ω

22µF

50V

0.01µF

7

CMDSH-3TR

EXTV

INTV

CC

0.1µF

LTC1628

GND

8

I

TH1

1µF

10V

15k

4.7µF

220pF

9

SGND

PGND

BG2

56µF, 4V

V

33pF

IN

CMDSH-3TR

5.2V TO

28V

10

11

12

13

14

3.3V

OUT

D2

MBRM

140T3

I

BOOST2

SW2

TH2

15k

0.1µF

M2A

M2B

220pF

V

OSENSE2

20k

1%

V

OUT2

–

3.3V

SENSE2

TG2

63.4k

1%

0.015Ω

3A; 4A PEAK

1000pF

L2

8µH

+

27pF

RUN/SS2

0.1µF

: 5.2V TO 28V

1628 F13

V

IN

V

SWITCHING FREQUENCY = 300kHz

MI, M2: FDS8936A

L1, L2: 8µH SUMIDA CEP1238R0MC

OUTPUT CAPACITORS: PANASONIC SP SERIES

*PGOOD ON THE LTC1628-PG

: 5V, 4A/3.3V, 4A

OUT

Figure 13. LTC1628 5V/4A, 3.3V/4A Regulator

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No R

^TMCurrent Mode Synchronous Step-Down Controller

High Efficiency 5V to 3.3V Conversion at Up to 15A

97% Efficiency, No Sense Resistor, 16-Pin SSOP

LTC1625/LTC1775

LTC1629

SENSE

20A to 200A PolyPhase^TMSynchronous Controller

Expandable from 2-Phase to 12-Phase, Uses All

Surface Mount Components, No Heat Sink

LTC1702

LTC1703

No R

2-Phase Dual Synchronous Step-Down Controller

550kHz, No Sense Resistor

SENSE

Mobile Pentium^®III Processors, 550kHz,

SENSE

with 5-Bit Mobile VID Control

V ≤ 7V

IN

LT1709

High Efficiency, 2-Phase Synchronous Step-Down Switching Regulator

with 5-Bit VID

1.3V ≤ V

≤ 3.5V, Current Mode Ensures

OUT

Accurate Current Sharing, 3.5V ≤ V ≤ 36V

IN

LTC1735

LTC1736

High Efficiency Synchronous Step-Down Switching Regulator

Output Fault Protection, 16-Pin SSOP

High Efficiency Synchronous Controller with 5-Bit Mobile VID Control

Output Fault Protection, 24-Pin SSOP,

3.5V ≤ V ≤ 36V

IN

LTC1929

2-Phase Synchronous Controller

Up to 42A, Uses All Surface Mount Components,

No Heat Sink, 3.5V ≤ V ≤ 36V

IN

Adaptive Power, No R

and PolyPhase are trademarks of Linear Technology Corporation. Pentium is a registered trademark of Intel Corporation.

SENSE

1628fa LT/TP 0300 2K REV A • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

32

LINEAR TECHNOLOGY CORPORATION 1998

●

(408)432-1900 FAX:(408)434-0507 www.linear-tech.com


型号：	LTC1628IG#TR
厂家：	Linear
描述：	LTC1628 - High Efficiency, 2-Phase Synchronous Step-Down Switching Regulator; Package: SSOP; Pins: 28; Temperature Range: -40°C to 85°C 稳压器开关
文件：	总32页 (文件大小：362K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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