C2220H124B2GALT250_技术文档

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature 200°C, C0G Dielectric, 10 – 200 VDC

(Industrial Grade)

Overview

KEMET’s high temperature surface mount C0G Multilayer

Ceramic Capacitors (MLCCs) feature a robust, proprietary

base metal dielectric system that offers industry-leading

performance relative to capacitance and case size combined

with capacitance stability at extreme temperatures up to

+200°C. This new platform promotes downsizing opportunities

of existing high temperature C0G technology, and offers

replacement opportunities of existing X7R, BX and BR dielectric

technologies.

and are suited for resonant circuit applications or those where

Q and stability of capacitance characteristics are required. C0G

exhibits no change in capacitance with respect to time and voltage

and boasts a negligible change in capacitance with reference to

ambient temperature. Capacitance change is limited to ±30 ppm/

ºC from -55°C to +200°C.

KEMET’s high temperature C0G dielectric features a 200°C

maximum operating temperature and is considered “stable.” The

Electronics Components, Assemblies & Materials Association

(EIA) characterizes C0G dielectric as a Class I material.

Components of this classiﬁcation are temperature compensating

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Ordering Information

C

1210

H

124

J

5

G

A

C

TU

Case Size Speciﬁcation/

Capacitance

Code (pF)

Capacitance

Tolerance¹

Failure Rate/ Termination

Design

Ceramic

Voltage

Dielectric

G = C0G

Packaging/Grade (C-Spec)³

(L" x W")

Series

Finish²

0402

0603

0805

1206

1210

1812

2220

H= High

Temperature

(200°C)

2 signiﬁcant digits + B = ±0.10 pF 8 = 10 V

number of zeros. C = ±0.25 pF 4 = 16 V

Use 9 for 1.0 – 9.9 pF D = ±0.5 pF

Use 8 for 0.5 – .99 pF F = ±1%

e.g., 2.2 pF = 229

e.g., 0.5 pF = 508

A = N/A

C = 100%

Matte Sn

Blank = Bulk

TU = 7" Reel - Unmarked

(full reel quantity)

T050 = 50 pcs / 7” Reel -

Unmarked

T100 = 100 pcs / 7” Reel -

Unmarked

3 = 25 V

5 = 50 V

1 = 100 V

2 = 200 V

L = SnPb (5%

minimum)

G = ±2%

J = ±5%

K = ±10%

M = ±20%

T250 = 250 pcs / 7” Reel -

Unmarked

T500 = 500 pcs / 7” Reel -

Unmarked

T1K0 = 1,000 pcs / Reel -

Unmarked

¹Additional capacitance tolerance offerings may be available. Contact KEMET for details.

²Additional termination ﬁnish options may be available. Contact KEMET for details.

³Reeling quantities are dependent upon chip size and thickness dimension. When ordering using the “T1K0” packaging option, 1812 thru 2225 case size devices

with chip thickness of ≥ 1.9mm (nominal) may be shipped on multiple 7” reels or a single 13” reel . The term “Unmarked” pertains to laser marking of components.

All packaging options labeled as “Unmarked” will contain capacitors that have not been laser marked. Additional reeling or packaging options may be available.

Contact KEMET for details.

One world. One KEMET

C1001_C0G_200C_SMD • 7/23/2014

1

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Dimensions – Millimeters (Inches)

L

W

T

B

S

EIA

Size

Code

Metric

Size

Code

S

L

W

Width

T

B

Mounting

Technique

Separation

Minimum

Length

Thickness

Bandwidth

0402

0603

0805

1206

1210

1812

2220

1005

1608

2012

3216

3225

4532

5650

1.00 (.040) ±0.05 (.002) 0.50 (.020) ±0.05 (.002)

1.60 (.063) ±0.15 (.006) 0.80 (.032) ±0.15 (.006)

2.00 (.079) ±0.20 (.008) 1.25 (.049) ±0.20 (.008)

3.20 (.126) ±0.20 (.008) 1.60 (.063) ±0.20 (.008)

3.20 (.126) ±0.20 (.008) 2.50 (.098) ±0.20 (.008)

4.50 (.177) ±0.30 (.012) 3.20 (.126) ±0.30 (.012)

5.70 (.224) ±0.40 (.016) 5.00 (.197) ±0.40 (.016)

0.30 (.012) ±0.10 (.004)

0.35 (.014) ±0.15 (.006)

0.50 (0.02) ±0.25 (.010)

0.60 (.024) ±0.35 (.014)

0.30 (.012)

0.70 (.028)

0.75 (.030)

Solder Reﬂow Only

Solder Wave or

Solder Reﬂow

See Table 2 for

Thickness

N/A

Solder Reﬂow Only

Beneﬁts

• -55°C to +200°C operating temperature range

• Lead (Pb)-Free, RoHS and REACH compliant

• Preferred capacitance solution at line frequencies and into the

MHz range

• EIA 0402, 0603, 0805, 1206, 1210, 1812, and 2220 case sizes • No capacitance change with respect to applied rated DC voltage

• DC voltage ratings of 10 V, 16 V, 25 V, 50 V, 100 V, and 200 V

• Capacitance offerings ranging from 0.5 pF up to 0.47 μF

• Available capacitance tolerances of ±0.10 pF, ±0.25 pF,

±0.5 pF, ±1%, ±2%, ±5%, ±10% or ±20%

• No piezoelectric noise• Extremely low ESR and ESL

• High thermal stability

• Negligible capacitance change with respect to temperature from

-55°C to +200°C

• No capacitance decay with time

• Non-polar device, minimizing installation concerns

• 100% pure matte tin-plated termination ﬁnish allowing for

excellent solderability

• High ripple current capability

Applications

Typical applications include critical timing, tuning, circuits requiring low loss, circuits with pulse, high current, decoupling, bypass,

ﬁltering, transient voltage suppression, blocking and energy storage for use in extreme environments such as down-hole exploration,

aerospace engine compartments and geophysical probes.

C1001_C0G_200C_SMD • 7/23/2014

2

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Qualiﬁcation/Certiﬁcation

High temperature (200ºC) Industrial grade products meet or exceed the requirements outlined in Table 4, Performance & Reliability.

Qualiﬁcation packages are available for review and download on our website at www.kemet.com/hightemp

Environmental Compliance

Lead (Pb)-Free, RoHS, and REACH compliant without exemptions (excluding SnPb termination ﬁnish option).

Electrical Parameters/Characteristics

Item

Parameters/Characteristics

Operating Temperature Range

-55°C to +200°C

Capacitance Change with Reference to +25°C and 0 VDC Applied (TCC)

±30 ppm/ºC (up to +200ºC)

Aging Rate (Maximum % Capacitance Loss/Decade Hour)

0%

250% of rated voltage

Dielectric Withstanding Voltage (DWV)

Dissipation Factor (DF) Maximum Limit @ 25ºC

Insulation Resistance (IR) Limit @ 25°C

(5 ±1 second and charge/discharge not exceeding 50 mA)

0.1%

1,000 megohm microfarads or 100 GΩ

(Rated voltage applied for 120 ±5 seconds @ 25°C)

To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.

Capacitance and Dissipation Factor (DF) measured under the following conditions:

1 MHz ±100 kHz and 1.0 Vrms ±0.2 V if capacitance ≤ 1,000 pF

1 kHz ± 50 Hz and 1.0 Vrms ±0.2 V if capacitance > 1,000 pF

Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known as

Automatic Level Control (ALC). The ALC feature should be switched to "ON."

Post Environmental Limits

High Temperature Life, Biased Humidity, Moisture Resistance

Rated DC

Voltage

Capacitance

Value

Dissipation Factor

(Maximum %)

Capacitance

Shift

Insulation

Resistance

Dielectric

C0G

All

0.5

0.3% or ±0.25 pF 10% of Initial Limit

C1001_C0G_200C_SMD • 7/23/2014

3

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Electrical Characteristics

C1210H104J1GAC - Life Test IR Distribution (Lognormal)

Delta Cap vs. Temperature (Typical)

20

15

10

5

99

0 hrs

2000 hrs

95

90

80

70

60

50

40

30

0

-5

20

10

5

-10

0 Vr

-15

100% Vr

1

-20

0.1

1.0

10.0

100.0

25°C IR (GOhms)

Capacitance vs. Temperature with 25 V DC Bias

(Rated Voltage)

DF vs. Temperature without DC Bias.

1.00

200

200ºC C0G 100nF no DC

200ºC C0G MLCC 100nF

200ºC C0G 100nF 25V DC

0.50

0.00

150

100

50

-0.50

-1.00

0

Temperature (°C)

BME vs. PME/IR vs. Temperature with 25 V DC Bias

(Rated Voltage)

IR vs. Temperature with 25 V DC Bias (Rated Voltage)

1.E+08

1.E+07

1.E+06

1.E+05

1.E+04

1.E+08

1.E+07

1.E+06

1.E+05

1.E+04

1.E+03

1.E+02

1.E+03

PME C0G MLCC 1206/10nF

1.E+02

1.E+01

1.E+00

200ºC C0G MLCC 100nF

BME C0G MLCC 1206/10nF

1.E+01

Temperature (°C)

C1001_C0G_200C_SMD • 7/23/2014

4

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Table 1A – Capacitance Range/Selection Waterfall (0402 – 1206 Case Sizes)

Case Size / Series

Voltage Code

C0402H

C0603H

C0805H

C1206H

8

4

3

5

1

8

4

3

5

1

2

8

4

3

5

1

2

8

4

3

5

1

2

Cap

Capacitance

Rated Voltage (VDC)

Code

Product Availability and Chip Thickness Codes

See Table 2 for Chip Thickness Dimensions

Capacitance Tolerance

0.5 & 0.75 pF

1.0 – 9.0 pF*

10 – 91 pF*

100 – 180 pF*

200 – 430 pF*

470 pF

510 pF

560 pF

620 pF

680 pF

508 & 758

109 – 919*

100 – 910*

101 – 181*

201 – 431*

471

511

561

621

681

751

821

911

102

112

122

132

152

162

182

202

222

242

272

302

332

362

392

432

472

512

562

622

682

752

822

912

103

123

153

183

223

273

333

473

563

683

823

104

B

C

D

BB BB BB BB

CF CF CF CF CF CF DC DC DC DC DC DC

CF CF CF CF CF CF DC DC DC DC DC DC EB EB EB EB EB EB

F

G

J

K

M

BB BB BB BB BB CF CF CF CF CF CF DC DC DC DC DC DC EB EB EB EB EB EB

BB BB BB BB BB CF CF CF CF CF

DC DC DC DC DC DC EB EB EB EB EB EB

DC DC DC DC DC DD EB EB EB EB EB EB

DC DC DC DC DC DC EB EB EB EB EB EB

DC DC DC DC DD DD EB EB EB EB EB EB

DC DC DC DC DD DD EB EB EB EB EB EE

750 pF

820 pF

910 pF

1,000 pF

1,100 pF

1,200 pF

1,300 pF

1,500 pF

1,600 pF

1,800 pF

2,000 pF

2,200 pF

2,400 pF

2,700 pF

3,000 pF

3,300 pF

3,600 pF

3,900 pF

4,300 pF

4,700 pF

5,100 pF

5,600 pF

6,200 pF

6,800 pF

7,500 pF

8,200 pF

9,100 pF

10,000 pF

12,000 pF

15,000 pF

18,000 pF

22,000 pF

27,000 pF

33,000 pF

47,000 pF

56,000 pF

68,000 pF

82,000 pF

0.10 µF

BB BB BB BB

CF CF CF CF CF

CF CF CF CF

CF CF CF

DC DC DC DC DC

DD DD DD DD DD

DC DC DC DC DC

DD DD DD DD DC

DE DE DE DE DC

DC DC DC DC DC

DC DC DC DC DD

DC DC DC DC DE

DC DC DC DD DG

DC DC DC DD

EB EB EB EB EB EB

EB EB EB EB EC EC

EB EB EB EB ED EC

EB EB EB EB ED ED

EB EB EB EB EE EE

EB EB EB EB EC EC

EC EC EC EC EC

EC EC EC EC EE

EC EC EC EC EF

EC EC EC EC EC

ED ED ED ED ED

EB EB EB EB EB

EC EC EC EC EB

ED ED ED ED EB

EB EB EB EB EB

EB EB EB EB EC

EB EB EB EB EE

EC EC EC EE EH

ED ED ED EF

DD DD DD DF

DF DF DF

DG DG DG

EF EF EF EH

EH EH EH EH

EH EH EH

Rated Voltage (VDC)

Voltage Code

Cap

Code

8

4

3

5

1

8

4

3

5

1

2

8

4

3

5

1

2

8

4

3

5

1

2

Capacitance

Case Size / Series

C0402H

C0603H

C0805H

C1206H

*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82 and 91)

KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage capability within

the same form factor (conﬁguration and dimensions).

These products are protected under US Patents 7,172,985 and 7,670,981, other patents pending, and any foreign counterparts..

C1001_C0G_200C_SMD • 7/23/2014

5

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Table 1B – Capacitance Range/Selection Waterfall (1210 – 2220 Case Sizes)

Case Size / Series

Voltage Code

C1210H

C1812H

C2220H

8

4

3

5

1

2

8

4

3

5

1

2

8

4

3

5

1

2

Cap

Capacitance

Rated Voltage (VDC)

Code

Product Availability and Chip Thickness Codes

See Table 2 for Chip Thickness Dimensions

Capacitance Tolerance

1.0 - 9.1 pF*

10 - 91 pF*

100 - 910 pF*

1,000 pF

1,100 pF

1,200 pF

1,300 pF

1,500 pF

1,600 pF

1,800 pF

2,000 pF

2,200 pF

2,400 pF

2,700 pF

3,000 pF

3,300 pF

3,600 pF

3,900 pF

4,300 pF

4,700 pF

5,100 pF

5,600 pF

6,200 pF

6,800 pF

7,500 pF

8,200 pF

9,100 pF

10,000 pF

12,000 pF

15,000 pF

18,000 pF

22,000 pF

27,000 pF

33,000 pF

47,000 pF

56,000 pF

68,000 pF

82,000 pF

0.10 µF

109 - 919*

100 - 910*

101 - 911*

102

112

122

132

152

162

182

202

222

242

272

302

332

362

392

432

472

512

562

622

682

752

822

912

103

123

153

183

223

273

333

473

563

683

823

104

124

154

184

B

C

D

FB FB FB FB FB FB

FB FB FB FB FB FC

FB FB FB FB FB FE

FB FB FB FB FC FE

FB FB FB FB FC FG

FB FB FB FB FC FC

FB FB FB FB FC FF

FB FB FB FB FF FF

FF FF FF FF FG FG

FB FB FB FB FG FG

FB FB FB FB FG

F

G

J

K

M

FB FB FB FB FG

FC FC FC FC FC

FE FE FE FE FE

FF FF FF FF FF

FG FG FG FG FB

FB FB FB FB FB

FB FB FB FB FE

FB FB FB FB FF

FB FB FB FC FG

FC FC FC FF FH

FE FE FE FG FM

FG FG FG FH

FH FH FH FM

GB GB GB GB GB

GB GB GB GB GD

GB GB GB GB GH

GD GD GD GD GN

GH GH GH GH

0.12 µF

0.15 µF

0.18 µF

0.22 µF

224

474

GK GK GK GK

0.47 µF

JJ

Rated Voltage (VDC)

Voltage Code

8

4

3

5

1

2

8

4

3

5

1

2

8

4

3

5

1

2

Capacitance

Cap Code

Case Size / Series

C1210H

C1812H

C2220H

*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82 and 91)

KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage capability within

the same form factor (conﬁguration and dimensions).

These products are protected under US Patents 7,172,985 and 7,670,981, other patents pending, and any foreign counterparts..

C1001_C0G_200C_SMD • 7/23/2014

6

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Table 2 – Chip Thickness/Packaging Quantities

Paper Quantity

Plastic Quantity

7" Reel 13" Reel

Thickness Case Thickness ±

Code

Size

Range (mm)

7" Reel

13" Reel

BB

CF

DC

DD

DE

DF

DG

EB

EC

ED

EE

EF

EH

FB

FC

FE

FF

FG

FH

FM

GB

GD

GH

GK

GN

JJ

0402

0603

0805

1206

1210

1812

2220

0.50 ± 0.05

0.80 ± 0.07

0.78 ± 0.10

0.90 ± 0.10

1.00 ± 0.10

1.10 ± 0.10

1.25 ± 0.15

0.78 ± 0.10

0.90 ± 0.10

1.00 ± 0.10

1.10 ± 0.10

1.20 ± 0.15

1.60 ± 0.20

0.78 ± 0.10

0.90 ± 0.10

1.00 ± 0.10

1.10 ± 0.10

1.25 ± 0.15

1.55 ± 0.15

1.70 ± 0.20

1.00 ± 0.10

1.25 ± 0.15

1.40 ± 0.15

1.60 ± 0.20

1.70 ± 0.20

2.20 ± 0.15

10,000

4,000

0

50,000

15,000

10,000

0

2,500

4,000

2,500

2,000

4,000

2,500

2,000

1,000

500

10,000

8,000

10,000

8,000

4,000

2,000

4,000

10,000

0

7" Reel

13" Reel

7" Reel

13" Reel

Thickness

Code

Case

Size

Thickness ±

Range (mm)

Paper Quantity

Plastic Quantity

Package quantity based on ﬁnished chip thickness speciﬁcations.

C1001_C0G_200C_SMD • 7/23/2014

7

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351

Density Level A:

Maximum (Most)

Land Protrusion (mm)

Density Level B:

Median (Nominal)

Land Protrusion (mm)

Density Level C:

Minimum (Least)

Land Protrusion (mm)

EIA

Size

Code

Metric

Size

Code

C

V2

C

V2

C

Y

X

V1

Y

X

V1

Y

X

V1

V2

0402

0603

0805

1206

1210

1210¹

1812

2220

1005

1608

2012

3216

3225

4532

5650

0.50

0.72

2.20

1.20

0.45

0.62

1.90

1.00

0.40

0.52

1.60

0.80

0.90

1.00

1.60

1.50

2.15

2.75

1.15

1.35

1.60

1.70

1.10

1.55

1.90

2.80

2.90

3.60

5.50

4.00

4.40

5.60

5.65

5.60

6.90

8.20

2.10

2.60

2.90

3.80

3.90

4.60

6.50

0.80

0.90

1.50

1.40

2.05

2.65

0.95

1.15

1.40

1.50

1.00

1.45

1.80

2.70

2.80

3.50

5.40

3.10

3.50

4.70

6.00

7.30

1.50

2.00

2.30

3.20

3.30

4.00

5.90

0.60

0.75

1.40

1.30

1.95

2.55

0.75

0.95

1.20

1.30

0.90

1.35

1.70

2.60

2.70

3.40

5.30

2.40

2.80

4.00

5.30

6.60

1.20

1.70

2.00

2.90

3.00

3.70

5.60

¹Only for capacitance values ≥ 22 µF

Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reﬂow solder

processes. KEMET only recommends wave soldering of EIA 0603, 0805 and 1206 case sizes.

Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reﬂow solder processes.

Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform qualiﬁcation

testing based on the conditions outlined in IPC Standard 7351 (IPC–7351).

Image below based on Density Level B for an EIA 1210 case size.

V1

Y

V2

X

C

Grid Placement Courtyard

C1001_C0G_200C_SMD • 7/23/2014

8

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Soldering Process

Recommended Soldering Technique:

• Solder wave or solder reﬂow for EIA case sizes 0603, 0805 and 1206

• All other EIA case sizes are limited to solder reﬂow only

Recommended Reﬂow Soldering Proﬁle:

KEMET’s families of surface mount multilayer ceramic capacitors (SMD MLCCs) are compatible with wave (single or dual), convection,

IR or vapor phase reﬂow techniques. Preheating of these components is recommended to avoid extreme thermal stress. KEMET’s

recommended proﬁle conditions for convection and IR reﬂow reﬂect the proﬁle conditions of the IPC/J-STD-020 standard for moisture

sensitivity testing. These devices can safely withstand a maximum of three reﬂow passes at these conditions.

T_P

T_L

Termination Finish

t_P

Maximum Ramp Up Rate = 3°C/sec

Maximum Ramp Down Rate = 6°C/sec

Proﬁle Feature

SnPb

100% Matte Sn

t_L

Preheat/Soak

T_smax

T_smin

Temperature Minimum (T_Smin

Temperature Maximum (T_Smax

Time (t_S) from T_Sminto T_Smax

)

100°C

150°C

200°C

)

t_S

60 – 120 seconds

Ramp-Up Rate (T_Lto T_P)

Liquidous Temperature (T_L)

Time Above Liquidous (t_L)

Peak Temperature (T_P)

3°C/second maximum 3°C/second maximum

25

183°C

60 – 150 seconds

235°C

217°C

60 – 150 seconds

260°C

25° C to Peak

Time

Time Within 5°C of Maximum

Peak Temperature (t_P)

20 seconds maximum 30 seconds maximum

Ramp-Down Rate (T_Pto T_L) 6°C/second maximum 6°C/second maximum

Time 25°C to Peak

6 minutes maximum

8 minutes maximum

Temperature

Note 1: All temperatures refer to the center of the package, measured on the

capacitor body surface that is facing up during assembly reﬂow.

C1001_C0G_200C_SMD • 7/23/2014

9

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Table 4 – Performance & Reliability: Test Methods and Conditions

Product Qualiﬁcation Test Plan

Reliability/Environmental Tests per MIL–STD–202//JESD22

High Temperature Life

Load Humidity

200°C rated voltage 2,000 hours

85°C /85%RH rated voltage 1,000 hours

85°C /85%RH, 1.5 V, 1,000 hours

Low Voltage Humidity

Temperature Cycling

Thermal Shock

-55°C to +200°C, 50 Cycles

-55°C to +150°C, 20 seconds transfer, 15 minute dwell, 300 cycles

Cycled Temp/RH 0 V, 10 cycles @ 24 hours each

Moisture Resistance

Physical, Mechanical & Process Tests per MIL–STD 202/JIS–C–6429

Resistance to Solvents

Include Aqueous wash chemical, OKEM Clean or equivalent

Method 213: Figure 1, Condition F Method 204: 5 gs for 20 minutes 12 cycles

Condition B, no per-heat of samples, Single Wave Solder

Force of 1.8 kg for 60 seconds

Mechanical Shock and Vibration

Resistance to Soldering Heat

Terminal Strength

Board Flex

Appendix 2, Note: 3.0 mm (minimum)

Storage and Handling

Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in other

environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres, and long term

storage. In addition, packaging materials will be degraded by high temperature– reels may soften or warp and tape peel force may

increase. KEMET recommends that maximum storage temperature not exceed 40ºC and maximum storage humidity not exceed 70%

relative humidity. Temperature ﬂuctuations should be minimized to avoid condensation on the parts and atmospheres should be free of

chlorine and sulfur bearing compounds. For optimized solderability chip stock should be used promptly, preferably within 1.5 years of

receipt.

C1001_C0G_200C_SMD • 7/23/2014 10

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Construction

Detailed Cross Section

Dielectric Material

(CaZrO₃)

Dielectric Material

(CaZrO₃)

Barrier Layer

(Ni)

Termination Finish

(100% Matte Sn /

SnPb - 5% min)

Base Metal

(Cu)

Inner Electrodes

(Ni)

Base Metal

(Cu)

Barrier Layer

(Ni)

Termination Finish

(100% Matte Sn /

SnPb - 5% min)

Inner Electrodes

(Ni)

Capacitor Marking (Optional):

Laser marking option is not available on:

• C0G, Ultra Stable X8R and Y5V dielectric devices

• EIA 0402 case size devices

• EIA 0603 case size devices with Flexible Termination option.

• KPS Commercial and Automotive grade stacked devices.

These capacitors are supplied unmarked only.

C1001_C0G_200C_SMD • 7/23/2014 11

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Tape & Reel Packaging Information

KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with EIA

Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for details on

reeling quantities for commercial chips.

Bar Code Label

Anti-Static Reel

®

Embossed Plastic* or

Punched Paper Carrier.

Chip and KPS Orientation in Pocket

(except 1825 Commercial, and 1825 and 2225 Military)

KEMET

Sprocket Holes

Embossment or Punched Cavity

8 mm, 12 mm

or 16 mm Carrier Tape

Anti-Static Cover Tape

(.10 mm (.004") Maximum Thickness)

178 mm (7.00")

or

330 mm (13.00")

*EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only.

Table 5 – Carrier Tape Conﬁguration – Embossed Plastic & Punched Paper (mm)

EIA Case Size

01005 – 0402

0603 – 1210

Tape Size (W)*

Pitch (P₁)*

8

2

4

1805 – 1808

12

16

8

4

≥ 1812

8

KPS 1210

8

KPS 1812 & 2220

Array 0508 & 0612

12

4

*Refer to Figures 1 & 2 for W and P₁carrier tape reference locations.

*Refer to Tables 6 & 7 for tolerance speciﬁcations.

C1001_C0G_200C_SMD • 7/23/2014 12

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Figure 1 – Embossed (Plastic) Carrier Tape Dimensions

T

P2

[10 pitches cumulative

tolerance on tape ± 0.2 mm]

2

E

1

Po

ØDo

Ao

F

Ko

W

E

2

B

1

Bo

S

1

P

1

T

1

Embossment

For cavity size,

see Note 1 Table 4

Center Lines of Cavity

ØD

1

Cover Tape

is for tape feeder reference only,

including draft concentric about B

B

1

o

.

User Direction of Unreeling

Table 6 – Embossed (Plastic) Carrier Tape Dimensions

Metric will govern

Constant Dimensions — Millimeters (Inches)

D₁Minimum

Note 1

1.0

(0.039)

R Reference S₁Minimum

T

T₁

Tape Size

8 mm

D₀

E₁

P₀

P₂

Note 2

Note 3

Maximum

25.0

(0.984)

1.5 +0.10/-0.0

(0.059 +0.004/-0.0)

1.75 ±0.10

4.0 ±0.10

2.0 ±0.05

0.600

(0.024)

0.600

(0.024)

0.100

(0.004)

12 mm

16 mm

(0.069 ±0.004) (0.157 ±0.004) (0.079 ±0.002)

1.5

(0.059)

30

(1.181)

Variable Dimensions — Millimeters (Inches)

B₁Maximum

Note 4

4.35

(0.171)

E₂

T₂

W

Tape Size

8 mm

Pitch

F

P₁

A₀,B₀& K₀

Minimum

6.25

(0.246)

Maximum

2.5

(0.098)

Maximum

8.3

(0.327)

3.5 ±0.05

(0.138 ±0.002) (0.157 ±0.004)

4.0 ±0.10

Single (4 mm)

Single (4 mm) &

Double (8 mm)

8.2

10.25

5.5 ±0.05

8.0 ±0.10

4.6

12.3

12 mm

16 mm

Note 5

(0.323)

(0.404)

(0.217 ±0.002) (0.315 ±0.004)

(0.181)

(0.484)

12.1

(0.476)

14.25

(0.561)

7.5 ±0.05 12.0 ±0.10

(0.138 ±0.002) (0.157 ±0.004)

4.6

(0.181)

16.3

(0.642)

Triple (12 mm)

1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and

hole location shall be applied independent of each other.

2. The tape with or without components shall pass around R without damage (see Figure 6).

3. If S₁< 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b).

4. B₁dimension is a reference dimension for tape feeder clearance only.

5. The cavity deﬁned by A₀, B₀and K₀shall surround the component with sufﬁcient clearance that:

(a) the component does not protrude above the top surface of the carrier tape.

(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.

(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3).

(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see Figure 4).

(e) for KPS Series product, A₀and B₀are measured on a plane 0.3 mm above the bottom of the pocket.

(f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.

C1001_C0G_200C_SMD • 7/23/2014 13

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Figure 2 – Punched (Paper) Carrier Tape Dimensions

T

P2

[10 pitches cumulative

tolerance on tape ± 0.2 mm]

E

1

Po

ØDo

0

A

F

W

2

E

0

B

Bottom Cover Tape

P

1

G

Cavity Size,

See

1

T

1

T

Top Cover Tape

Center Lines of Cavity

Note 1, Table 7

Bottom Cover Tape

User Direction of Unreeling

Table 7 – Punched (Paper) Carrier Tape Dimensions

Metric will govern

Constant Dimensions — Millimeters (Inches)

R Reference

Note 2

Tape Size

8 mm

D₀

E₁

P₀

P₂

T₁Maximum

0.10

G Minimum

1.5 +0.10 -0.0

(0.059 +0.004 -0.0)

1.75 ±0.10

(0.069 ±0.004)

4.0 ±0.10

(0.157 ±0.004)

2.0 ±0.05

(0.079 ±0.002) (0.004) Maximum

0.75

(0.030)

25

(0.984)

Variable Dimensions — Millimeters (Inches)

Tape Size

8 mm

Pitch

E2 Minimum

F

P₁

T Maximum

W Maximum

A₀B₀

2.0 ±0.05

(0.079 ±0.002)

4.0 ±0.10

8.3

(0.327)

8.3

Half (2 mm)

Single (4 mm)

6.25

(0.246)

3.5 ±0.05

(0.138 ±0.002)

1.1

(0.098)

Note 1

8 mm

(0.157 ±0.004)

(0.327)

1. The cavity deﬁned by A₀, B₀and T shall surround the component with sufﬁcient clearance that:

a) the component does not protrude beyond either surface of the carrier tape.

b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.

c) rotation of the component is limited to 20° maximum (see Figure 3).

d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4).

e) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.

2. The tape with or without components shall pass around R without damage (see Figure 6).

C1001_C0G_200C_SMD • 7/23/2014 14

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Packaging Information Performance Notes

1. Cover Tape Break Force: 1.0 Kg minimum.

2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be:

Tape Width

8 mm

Peel Strength

0.1 to 1.0 Newton (10 to 100 gf)

0.1 to 1.3 Newton (10 to 130 gf)

12 and 16 mm

The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier tape shall be 165° to 180°

from the plane of the carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of 300 ±10 mm/minute.

3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA

Standards 556 and 624.

Figure 3 – Maximum Component Rotation

°

T

Maximum Component Rotation

Top View

Maximum Component Rotation

Side View

Typical Pocket Centerline

Tape

Maximum

°

T

s

Width (mm) Rotation (

)

8,12

16 – 200

20

10

Bo

Tape

Maximum

°

S

Width (mm) Rotation (

)

8,12

16 – 56

72 – 200

20

10

5

Typical Component Centerline

Ao

Figure 4 – Maximum Lateral Movement

Figure 5 – Bending Radius

Embossed

Carrier

Punched

Carrier

8 mm & 12 mm Tape

16 mm Tape

0.5 mm maximum

1.0 mm maximum

R

Bending

Radius

R

C1001_C0G_200C_SMD • 7/23/2014 15

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Figure 6 – Reel Dimensions

Full Radius,

W3 (Includes

flange distortion

at outer edge)

Access Hole at

Slot Location

(Ø 40 mm minimum)

See Note

W

2 (Measured at hub)

D

(See Note)

A

N

C

(Arbor hole

W

1 (Measured at hub)

diameter)

If present,

tape slot in core

for tape start:

2.5 mm minimum width x

10.0 mm minimum depth

B

(see Note)

Note: Drive spokes optional; if used, dimensions B and D shall apply.

Table 8 – Reel Dimensions

Metric will govern

Constant Dimensions — Millimeters (Inches)

Tape Size

8 mm

A

B Minimum

C

D Minimum

178 ±0.20

(7.008 ±0.008)

or

330 ±0.20

(13.000 ±0.008)

1.5

(0.059)

13.0 +0.5/-0.2

(0.521 +0.02/-0.008)

20.2

(0.795)

12 mm

16 mm

Variable Dimensions — Millimeters (Inches)

Tape Size

8 mm

N Minimum

W₁

W₂Maximum

W₃

8.4 +1.5/-0.0

(0.331 +0.059/-0.0)

14.4

(0.567)

50

(1.969)

12.4 +2.0/-0.0

18.4

Shall accommodate tape width

without interference

12 mm

16 mm

(0.488 +0.078/-0.0)

(0.724)

16.4 +2.0/-0.0

(0.646 +0.078/-0.0)

22.4

(0.882)

C1001_C0G_200C_SMD • 7/23/2014 16

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Figure 7 – Tape Leader & Trailer Dimensions

Embossed Carrier

Carrier Tape

Round Sprocket Holes

Punched Carrier

8 mm & 12 mm only

START

END

Top Cover Tape

Elongated Sprocket Holes

(32 mm tape and wider)

100 mm

Minimum Leader

400 mm Minimum

Trailer

160 mm Minimum

Components

Top Cover Tape

Figure 8 – Maximum Camber

Elongated sprocket holes

(32 mm & wider tapes)

Carrier Tape

Round Sprocket Holes

1 mm Maximum, either direction

Straight Edge

250 mm

Bulk Cassette Packaging (Ceramic Chips Only)

Meets Dimensional Requirements IEC–286 and EIAJ 7201

Unit mm *Reference

53 3*

10*

1.5 ± ⁰₀^.1

2.0 ± ₀⁰_.1

3.0 ± ⁰₀^.2

5 0*

110 ± 0.7

Capacitor Dimensions for Bulk Cassette

Cassette Packaging – Millimeters

EIA Size Metric Size

S Separation

Minimum

Number of

Pieces/Cassette

L Length

W Width

B Bandwidth

T Thickness

Code

0402

1005

1.0 ±0.05

1.6 ±0.07

0.5 ±0.05

0.8 ±0.07

0.2 to 0.4

0.2 to 0.5

0.3

0.5 ±0.05

0.8 ±0.07

50,000

0603

1608

0.7

15,000

C1001_C0G_200C_SMD • 7/23/2014 17

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

KEMET Corporation

World Headquarters

Europe

Asia

Southern Europe

Paris, France

Tel: 33-1-4646-1006

Northeast Asia

Hong Kong

Tel: 852-2305-1168

2835 KEMET Way

Simpsonville, SC 29681

Sasso Marconi, Italy

Tel: 39-051-939111

Shenzhen, China

Tel: 86-755-2518-1306

Mailing Address:

P.O. Box 5928

Greenville, SC 29606

Beijing, China

Central Europe

Landsberg, Germany

Tel: 49-8191-3350800

Tel: 86-10-5829-1711

www.kemet.com

Tel: 864-963-6300

Fax: 864-963-6521

Shanghai, China

Tel: 86-21-6447-0707

Kamen, Germany

Tel: 49-2307-438110

Corporate Ofﬁces

Fort Lauderdale, FL

Tel: 954-766-2800

Taipei, Taiwan

Tel: 886-2-27528585

Northern Europe

Bishop’s Stortford, United Kingdom

Tel: 44-1279-460122

North America

Southeast Asia

Singapore

Southeast

Tel: 65-6586-1900

Lake Mary, FL

Tel: 407-855-8886

Espoo, Finland

Tel: 358-9-5406-5000

Penang, Malaysia

Tel: 60-4-6430200

Northeast

Wilmington, MA

Tel: 978-658-1663

Bangalore, India

Tel: 91-806-53-76817

Central

Novi, MI

Tel: 248-306-9353

West

Milpitas, CA

Tel: 408-433-9950

Mexico

Guadalajara, Jalisco

Tel: 52-33-3123-2141

Note: KEMET reserves the right to modify minor details of internal and external construction at any time in the interest of product improvement. KEMET does not

assume any responsibility for infringement that might result from the use of KEMET Capacitors in potential circuit designs. KEMET is a registered trademark of

KEMET Electronics Corporation.

C1001_C0G_200C_SMD • 7/23/2014 18

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Temperature (200°C), C0G Dielectric, 10 – 200 VDC (Industrial Grade)

Disclaimer

All product speciﬁcations, statements, information and data (collectively, the “Information”) in this datasheet are subject to change. The customer is responsible for checking and

verifying the extent to which the Information contained in this publication is applicable to an order at the time the order is placed.

All Information given herein is believed to be accurate and reliable, but it is presented without guarantee, warranty, or responsibility of any kind, expressed or implied.

Statements of suitability for certain applications are based on KEMET Electronics Corporation’s (“KEMET”) knowledge of typical operating conditions for such applications, but are

not intended to constitute – and KEMET speciﬁcally disclaims – any warranty concerning suitability for a speciﬁc customer application or use. The Information is intended for use only

by customers who have the requisite experience and capability to determine the correct products for their application. Any technical advice inferred from this Information or otherwise

provided by KEMET with reference to the use of KEMET’s products is given gratis, and KEMET assumes no obligation or liability for the advice given or results obtained.

Although KEMET designs and manufactures its products to the most stringent quality and safety standards, given the current state of the art, isolated component failures may still

occur. Accordingly, customer applications which require a high degree of reliability or safety should employ suitable designs or other safeguards (such as installation of protective

circuitry or redundancies) in order to ensure that the failure of an electrical component does not result in a risk of personal injury or property damage.

Although all product–related warnings, cautions and notes must be observed, the customer should not assume that all safety measures are indicted or that other measures may not

be required.

C1001_C0G_200C_SMD • 7/23/2014 19


型号：	C2220H124B2GALT250
厂家：	KEMET CORPORATION
描述：	Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
文件：	总19页 (文件大小：1810K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

C2220H124B2GALT250 [KEMET]

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