C2220C106K3R1C7186_技术文档

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Overview

KEMET Power Solutions (KPS) Commercial Series stacked

capacitors utilize a proprietary lead-frame technology to

vertically stack one or two multilayer ceramic chip capacitors

into a single compact surface mount package. The attached

lead-frame mechanically isolates the capacitor/s from the

printed circuit board, therefore offering advanced mechanical

and thermal stress performance. Isolation also addresses

concerns for audible, microphonic noise that may occur when

a bias voltage is applied. A two chip stack offers up to double

the capacitance in the same or smaller design footprint when

compared to traditional surface mount MLCCs devices.

Providing up to 10 mm of board ﬂex capability, KPS Series

capacitors are environmentally friendly and in compliance with

RoHS legislation. Available in X7R dielectric, these devices are

capable of Pb-Free reﬂow proﬁles and provide lower ESR, ESL

and higher ripple current capability when compared to other

dielectric solutions.

Combined with the stability of an X7R dielectric, KEMET’s KPS

Series devices exhibit a predictable change in capacitance

with respect to time and voltage and boast a minimal change in

capacitance with reference to ambient temperature. Capacitance

change is limited to ±15% from -55°C to +125°C.

Beneﬁts

• -55°C to +125°C operating temperature range

• Reliable and robust termination system

• EIA 1210, 1812, and 2220 case sizes

• DC voltage ratings of 10 V, 16 V, 25 V, 50 V, 100 V, and 250 V

• Capacitance offerings ranging from 0.1 μF up to 47 μF

• Available capacitance tolerances of ±10% and ±20%

• Higher capacitance in the same footprint

• Reduces audible, microphonic noise

• Extremely low ESR and ESL

• Pb-Free and RoHS Compliant

• Capable of Pb-Free reﬂow proﬁles

• Non-polar device, minimizing

installation concerns

• Tantalum and electrolytic alternative

• Potential board space savings

• Advanced protection against thermal and mechanical stress

• Provides up to 10 mm of board ﬂex capability

Ordering Information

C

1210

C

225

M

4

R

1

C

7186

Case Size Speciﬁcation/

Capacitance

Code (pF)

Capacitance

Tolerance¹

Leadframe Packaging/Grade

Finish²(C-Spec)³

Ceramic

Voltage

Dielectric

Failure Rate/Design

(L" x W")

Series

1210

1812

2220

C = Standard

2 signiﬁcant

digits + number M = ±20%

of zeros

K = ±10%

8 = 10 V

4 = 16 V

3 = 25 V

5 = 50 V

1 = 100 V

A = 250 V

R = X7R 1 = KPS Single Chip Stack C = 100% 7186 = 7" Reel

2 = KPS Double Chip Stack Matte Sn

Unmarked

7289 = 13" Reel

Unmarked

¹Double chip stacks ("2" in the 13th character position of the ordering code) are only available in M (±20%) capacitance tolerance. Single chip stacks ("1" in the

13th character position of the ordering code) are available in K (±10%) or M (±20%) tolerances.

²Additional leadframe ﬁnish options may be available. Contact KEMET for details.

³Additional reeling or packaging options may be available. Contact KEMET for details.

One world. One KEMET

C1020_X7R_KPS_SMD • 5/30/2013

1

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Dimensions – Millimeters (Inches)

Top View

Single or Double

Proﬁle View

Double Chip Stack

Single Chip Stack

Chip Stack

Number EIA Size Metric Size

Mounting

Technique

L Length

W Width

H Height

LW Lead Width

of Chips Code

Code

3225

4532

5650

3225

4532

5650

1210

3.50 (.138) ±0.30 (.012) 2.60 (.102) ±0.30 (.012) 3.35 (.132) ±0.10 (.004) 0.80 (.032) ±0.15 (.006)

5.00 (.197) ±0.50 (.020) 3.50 (.138) ±0.50 (.020) 2.65 (.104) ±0.35 (.014) 1.10 (.043) ±0.30 (.012)

6.00 (.236) ±0.50 (.020) 5.00 (.197) ±0.50 (.020) 3.50 (.138) ±0.30 (.012) 1.60 (.063) ±0.30 (.012)

3.50 (.138) ±0.30 (.012) 2.60 (.102) ±0.30 (.012) 6.15 (.242) ±0.15 (.006) 0.80 (.031) ±0.15 (.006)

5.00 (.197) ±0.50 (.020) 3.50 (.138) ±0.50 (.020) 5.00 (.197) ±0.50 (.020) 1.10 (.043) ±0.30 (.012)

6.00 (.236) ±0.50 (.020) 5.00 (.197) ±0.50 (.020) 5.00 (.197) ±0.50 (.020) 1.60 (.063) ±0.30 (.012)

Single

1812

2220

1210

1812

2220

Solder Reﬂow

Only

Double

Applications

Typical applications include smoothing circuits, DC/DC converters, power supplies (input/output ﬁlters), noise reduction (piezoelectric/

mechanical), circuits with a direct battery or power source connection, critical and safety relevant circuits without (integrated) current

limitation and any application that is subject to high levels of board ﬂexure or temperature cycling. Markets include industrial, military,

automotive and telecom.

Qualiﬁcation/Certiﬁcation

Commercial Grade products are subject to internal qualiﬁcation. Details regarding test methods and conditions are referenced in

Table 4, Performance & Reliability.

Environmental Compliance

Pb-Free and RoHS Compliant.

C1020_X7R_KPS_SMD • 5/30/2013

2

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Electrical Parameters/Characteristics

Item

Parameters/Characteristics

Operating Temperature Range

-55°C to +125°C

±15%

Capacitance Change with Reference to +25°C and 0 VDC Applied (TCC)

Aging Rate (Maximum % Capacitance Loss/Decade Hour)

3.0%

250% of rated voltage

(5 ±1 seconds and charge/discharge not exceeding 50 mA)

Dielectric Withstanding Voltage (DWV)

Dissipation Factor (DF) Maximum Limit @ 25ºC

Insulation Resistance (IR) Limit @ 25°C

5%(10 V), 3.5%(16 V and 25 V) and 2.5%(50 V to 250 V)

See Insulation Resistance Limit Table

(Rated voltage applied for 120 ±5 seconds @ 25°C)

Regarding aging rate: Capacitance measurements (including tolerance) are indexed to a referee time of 48 or 1,000 hours. Please refer to a part number speciﬁc

datasheet for referee time details.

To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.

Capacitance and dissipation factor (DF) measured under the following conditions:

1 kHz ±50 Hz and 1.0 ±0.2 Vrms if capacitance ≤ 10 µF

120 Hz ±10 Hz and 0.5 ±0.1 Vrms if capacitance > 10 µF

Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known as

Automatic Level Control (ALC). The ALC feature should be switched to "ON."

Post Environmental Limits

High Temperature Life, Biased Humidity, Moisture Resistance

Rated DC

Voltage

Capacitance

Value

Dissipation Factor

(Maximum %)

Capacitance

Shift

Insulation

Resistance

Dielectric

X7R

> 25

16/25

< 16

3.0

5.0

7.5

All

±20%

10% of Initial Limit

Insulation Resistance Limit Table

1,000 Megohm

Microfarads or 100 GΩ

500 Megohm

Microfarads or 10 GΩ

EIA Case Size

1210

1812

2220

< 0.39 µF

< 2.2 µF

< 10 µF

≥ 0.39 µF

≥ 2.2 µF

≥ 10 µF

C1020_X7R_KPS_SMD • 5/30/2013

3

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Electrical Characteristics

Z and ESR C2220C225MAR2C

Z and ESR C1210C475M5R1C

10⁴

10³

10²

10¹

10⁰

10^-1

10^-2

10^-3

10³

ESR

Z

10²

10¹

10⁰

10^-1

10^-2

10^-3

10⁰

10²

10⁴

10⁶

10⁸

10¹⁰

10⁰

10²

10⁴

10⁶

10⁸

10¹⁰

Frequency (Hz)

Z and ESR C2220C476M3R2C

10⁴

ESR

Z

10²

10⁰

10^-2

10^-4

10^-6

10⁰

10²

10⁴

10⁶

10⁸

10¹⁰

Frequency (Hz)

C1020_X7R_KPS_SMD • 5/30/2013

4

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Electrical Characteristics cont'd

Impedance – 1812, .10 µF, 50 V X7R

ESR – 1812, .10 µF, 50 V X7R

Impedance vs. Frequency

ESR vs. Frequency

10000

1000

100

10

C1812C104K5R2C (2 Chip Stack)

C1812C104K5R1C (1 Chip Stack)

C1812C104K5R2C (2 Chip Stack)

C1812C104K5R1C (1 Chip Stack)

1

0.1

1

0.1

0.01

1.E+03

1.E+04

1.E+05

Frequency (Hz)

1.E+06

1.E+07

1.E+08

1.E+03

1.E+04

1.E+05

1.E+06

1.E+07

1.E+08

Frequency (Hz)

ESR – 1210, .22 µF, 50 V X7R

Impedance – 1210, .22 µF, 50 V X7R

ESR vs. Frequency

Impedance vs. Frequency

10

1000

100

10

C1210C224K5R2C (2 Chip Stack)

C1210C224K5R1C (1 Chip Stack)

C1210C224K5R2C (2 Chip Stack)

C1210C224K5R1C (1 Chip Stack)

1

0.1

1

0.1

0.01

1.E+03

1.E+04

1.E+05

1.E+06

1.E+07

1.E+08

1.E+03

1.E+04

1.E+05

1.E+06

1.E+07

1.E+08

Frequency (Hz)

C1020_X7R_KPS_SMD • 5/30/2013

5

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Electrical Characteristics cont'd

Microphonics – 2220, 22 µF, 50 V, X7R

Microphonics – 1210, 4.7 µF, 50 V, X7R

60

50

40

30

20

50

40

30

20

10

0

Standard SMD MLCC

KPS - 2 Chip Stack

Standard SMD MLCC

KPS - 1 Chip Stack

10

0

2

4

6

0

5

10

15

Vp-p

Microphonics – 2220, 47 µF, 25 V, X7R

Microphonics – 1210, 22 µF, 25 V, X7R

50

40

30

20

10

0

50

40

30

20

10

0

Standard SMD MLCC

KPS - 2 Chip Stack

Standard SMD MLCC

KPS - 2 Chip Stack

0

5

10

15

20

0

2

4

6

Vp-p

Competitive Comparision

Microphonics – 1210, 4.7 µF, 50 V, X7R

Ripple Current (Arms) 2220, 22 µF, 50 V

120

60

50

40

30

20

10

0

100

80

60

40

20

0

KEMET KPS, 2220, 22µF, 50V rated (2 Chip Stack)

Competitor 2220, 22µF, 50V rated (2 Chip Stack)

Competitor

KEMET - KPS

0

10

20

30

0

5

10

15

Ripple Current (Arms)

Vp-p

Note: Refer to Table 4 for test method.

6

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Electrical Characteristics cont'd

Board Flex vs. Termination Type

Weibull

X7R 1210 10 uF – (22uF KPS Stacked)

X7R 2220 22uF 25V – (47uF KPS Stacked)

2

Standard Termination

KPS – 2 Chip Stack

90

Standard Termination

KPS – 2 Chip Stack

90

80

70

60

50

80

70

60

50

40

30

20

10

20

10

0

5

0

.

0

.

1

2

3

4

5

6

7

8

9

1

Board Flexure (mm)

Board Flexure to 10 mm

Weibull

X7R 1812 47uF 16V

2

Weibull

X7R 1210 4.7 uF 50V

2

90

80

70

60

50

40

80

70

60

50

40

30

20

10

1

10

Board Flexure (mm)

C1020_X7R_KPS_SMD • 5/30/2013

7

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Table 1 – Capacitance Range/Selection Waterfall (1210 – 2220 Case Sizes)

Series

Voltage Code

Voltage DC

C1210

C1812

5

C2220

8

4

3

5

1

A

4

3

1

A

4

3

5

1

A

Cap

Code

Capacitance

10

16

25

50

100

250

16

25

50

100

250

16

25

50

100

250

Product Availability and Chip Thickness Codes

See Table 2 for Chip Thickness Dimensions

Capacitance Tolerance

Single Chip Stack

0.10 µF

0.22 µF

0.47 µF

1.0 µF

2.2 µF

3.3 µF

4.7 µF

10 µF

15 µF

22 µF

33 µF

47 µF

104

224

474

105

225

335

475

106

156

226

336

476

107

K

M

FV

GP

JP

100 µF

Double Chip Stack

0.10 µF

0.22 µF

0.47 µF

1.0 µF

2.2 µF

3.3 µF

4.7 µF

10 µF

22 µF

33 µF

47 µF

100 µF

220 µF

104

224

474

105

225

335

475

106

226

336

476

107

227

M

FW

GR

JR

Voltage DC

10

8

16

4

25

3

50

5

100

1

250

A

16

4

25

3

50

5

100

1

250

A

16

4

25

3

50

5

100

1

250

A

Cap

Code

Voltage Code

Capacitance

Series

C1210

C1812

C2220

These products are protected under US Patent 8,331,078 other patents pending, and any foreign counterparts.

Table 2 – Chip Thickness/Packaging Quantities

Paper Quantity

7" Reel 13" Reel

Plastic Quantity

7" Reel 13" Reel

Thickness Case Thickness ±

Code

Size

Range (mm)

FV

FW

GP

GR

1210

3.35 ± 0.10

6.15 ± 0.15

0

600

300

500

2,000

1,000

0

1812

2.65 ± 0.35

2,000

C

1210

C

225

M

4

R

1

C

7186

1812

5.00 ± 0.50

400

1,700

Case Size Speciﬁcation/

Capacitance

Code (pF)

Capacitance

Tolerance

Leadframe Packaging/Grade

Finish (C-Spec)

JP

2220

3.50 ± 0.30

300

1,300

Ceramic

Voltage

Dielectric

Failure Rate/Design

800

(L" x W")

Series

JR

2220

5.00 ± 0.50

C = Standard

Thickness ±

200

1210

2 signiﬁcant

K = ±10%

8 = 10 V

R = X7R 1 = KPS Single Chip Stack C = 100% 7186 = 7" Reel

7" Reel

13" Reel

7" Reel

13" Reel

2 = KPS Double Chip Stack Matte Sn

Thickness

Code

Case

1812

digits + number M = ±20%

Range (mm)

4 = 16 V

3 = 25 V

Unmarked

7289 = 13" Reel

Unmarked

Size

2220

of zeros

Paper Quantity

Plastic Quantity

5 = 50 V

1 = 100 V

A = 250 V

Package quantity based on ﬁnished chip thickness speciﬁcations.

C1020_X7R_KPS_SMD • 5/30/2013

8

Roll Over for

Order Info.

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Table 3 – KPS Land Pattern Design Recommendations (mm)

METRIC

SIZE

CODE

Median (Nominal) Land Protrusion

EIA SIZE

CODE

C

Y

X

V1

V2

1210

1812

2220

3225

4532

5650

1.50

1.14

1.75

5.05

3.40

2.20

2.69

1.35

2.08

2.87

4.78

6.70

7.70

4.50

6.00

Soldering Process

KEMET’s KPS Series devices are compatible with IR reﬂow

Proﬁle Feature

SnPb Assembly Pb-Free Assembly

techniques. Preheating of these components is recommended

to avoid extreme thermal stress. KEMET's recommended proﬁle

conditions for IR reﬂow reﬂect the proﬁle conditions of the

IPC/J–STD–020D standard for moisture sensitivity testing.

Preheat/Soak

Temperature Minimum (T_Smin

)

100°C

150°C

200°C

Temperature Maximum (T_Smax

)

Time (t_s) from T_sminto T_smax

Ramp-up Rate (T_Lto T_P)

)

60 – 120 seconds

3°C/seconds maximum

183°C

60 – 120 seconds

3°C/seconds maximum

217°C

To prevent degradation of temperature cycling capability, care

must be taken to prevent solder from ﬂowing into the inner side

of the lead frames (inner side of "J" lead in contact with the

circuit board).

Liquidous Temperature (T_L)

Time Above Liquidous (t_L)

Peak Temperature (T_P)

60 – 150 seconds

235°C

60 – 150 seconds

250°C

Time within 5°C of Maximum

Peak Temperature (t_P)

20 seconds maximum

10 seconds maximum

Ramp-down Rate (T_Pto T_L)

6°C/seconds maximum

6 minutes maximum

6°C/seconds maximum

8 minutes maximum

After soldering, the capacitors should be air cooled to room

temperature before further processing. Forced air cooling is not

recommended.

Time 25°C to Peak Temperature

Note: All temperatures refer to the center of the package, measured on the

package body surface that is facing up during assembly reﬂow.

Hand soldering should be performed with care due to the

difﬁculty in process control. If performed, care should be taken

to avoid contact of the soldering iron to the capacitor body. The

iron should be used to heat the solder pad, applying solder

between the pad and the lead, until reﬂow occurs. Once reﬂow

occurs, the iron should be removed immediately. (Preheating is

required when hand soldering to avoid thermal shock.)

T_P

t_P

Maximum Ramp Up Rate = 3ºC/seconds

Maximum Ramp Down Rate = 6ºC/seconds

T_L

t_L

T

smax

T

smin

t_S

25

25ºC to Peak

Time

C1020_X7R_KPS_SMD • 5/30/2013

9

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Table 4 – Performance & Reliability: Test Methods and Conditions

Stress

Terminal Strength

Board Flex

Reference

JIS–C–6429

Test or Inspection Method

Appendix 1, Note: Force of 1.8 kg for 60 seconds.

Appendix 2, Note: 5.0 mm minimum

Magniﬁcation 50 X. Conditions:

a) Method B, 4 hours @ 155°C, dry heat @ 235°C

b) Method B @ 215°C category 3

Solderability

J–STD–002

c) Method D, category 3 @ 250°C

Temperature Cycling

Biased Humidity

JESD22 Method JA–104

MIL–STD–202 Method 103

1,000 cycles (-55°C to +125°C). Measurement at 24 hours +/- 2 hours after test conclusion.

Load Humidity: 1,000 hours 85°C/85% RH and 200 VDC maximum. Add 100 K ohm resistor.

Measurement at 24 hours +/- 2 hours after test conclusion.

Low Volt Humidity: 1,000 hours 85°C/85% RH and 1.5 V. Add 100 K ohm resistor.

Measurement at 24 hours +/- 2 hours after test conclusion.

t = 24 hours/cycle. Steps 7a and 7b not required. Unpowered.

Measurement at 24 hours +/- 2 hours after test conclusion.

-55°C/+125°C. Note: Number of cycles required – 300. Maximum transfer time – 20 seconds. Dwell

time – 15 minutes. Air-Air.

Moisture Resistance

Thermal Shock

MIL–STD–202 Method 106

MIL–STD–202 Method 107

High Temperature Life MIL–STD–202 Method 108 1,000 hours at 125°C with rated voltage applied.

Storage Life

Vibration

MIL–STD–202 Method 108 150°C, 0 VDC for 1,000 hours.

5 g's for 20 minutes, 12 cycles each of 3 orientations. Note: Use 8" X 5" PCB .031" thick, 7 secure

MIL–STD–202 Method 204 points on one long side and 2 secure points at corners of opposite sides. Parts mounted within 2"

from any secure point. Test from 10 – 2,000 Hz.

Mechanical Shock

MIL–STD–202 Method 213 Figure 1 of Method 213, Condition F.

Resistance to Solvents MIL–STD–202 Method 215 Add aqueous wash chemical, OKEM Clean or equivalent.

Storage & Handling

Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in other

environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres, and long term

storage. In addition, packaging materials will be degraded by high temperature– reels may soften or warp and tape peel force may

increase. KEMET recommends that maximum storage temperature not exceed 40ºC and maximum storage humidity not exceed 70%

relative humidity. Temperature ﬂuctuations should be minimized to avoid condensation on the parts and atmospheres should be free of

chlorine and sulfur bearing compounds. For optimized solderability chip stock should be used promptly, preferably within 1.5 years of

receipt.

C1020_X7R_KPS_SMD • 5/30/2013 10

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Construction

Reference

Item

Material

A

B

C

D

E

F

Leadframe

Phosphor Bronze – Alloy 510

Leadframe Attach

HMP Solder

Cu

Ni

Termination

Sn

Inner Electrode

Ni

G

Dielectric Material

BaTiO₃

Note: Image is exaggerated in order to clearly identify all components of construction.

HMP = High Melting Point

Product Marking

Laser marking option is not available on:

• C0G, Ultra Stable X8R and Y5V dielectric devices

• EIA 0402 case size devices

• EIA 0603 case size devices with Flexible Termination option.

• KPS Commercial and Automotive grade stacked devices.

These capacitors are supplied unmarked only.

C1020_X7R_KPS_SMD • 5/30/2013 11

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Tape & Reel Packaging Information

KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with EIA

Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for details on

reeling quantities for commercial chips.

Table 5 – Carrier Tape Conﬁguration – Embossed Plastic (mm)

EIA Case Size

01005 – 0402

0603 – 1210

Tape Size (W)*

Pitch (P₁)*

8

2

4

1805 – 1808

12

16

8

4

≥ 1812

8

KPS 1210

8

KPS 1812 & 2220

Array 0508 & 0612

12

4

*Refer to Figure 1 for W and P₁carrier tape reference locations.

*Refer to Table 5 for tolerance speciﬁcations.

C1020_X7R_KPS_SMD • 5/30/2013 12

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Figure 1 – Embossed (Plastic) Carrier Tape Dimensions

T

P2

[10 pitches cumulative

tolerance on tape ± 0.2 mm]

2

E

1

Po

ØDo

Ao

F

Ko

W

E

2

B

1

Bo

S

1

P

1

T

1

Embossment

For cavity size,

see Note 1 Table 4

Center Lines of Cavity

ØD

1

Cover Tape

is for tape feeder reference only,

including draft concentric about B

B

1

o

.

User Direction of Unreeling

Table 6 – Embossed (Plastic) Carrier Tape Dimensions

Metric will govern

Constant Dimensions — Millimeters (Inches)

D₁Minimum

Note 1

1.0

(0.039)

R Reference S₁Minimum

T

T₁

Tape Size

8 mm

D₀

E₁

P₀

P₂

Note 2

Note 3

Maximum

25.0

(0.984)

1.5 +0.10/-0.0

(0.059 +0.004/-0.0)

1.75 ±0.10

4.0 ±0.10

2.0 ±0.05

0.600

(0.024)

0.600

(0.024)

0.100

(0.004)

12 mm

16 mm

(0.069 ±0.004) (0.157 ±0.004) (0.079 ±0.002)

1.5

(0.059)

30

(1.181)

Variable Dimensions — Millimeters (Inches)

B₁Maximum

Note 4

4.35

(0.171)

E₂

T₂

W

Tape Size

8 mm

Pitch

F

P₁

A₀,B₀& K₀

Minimum

6.25

(0.246)

Maximum

2.5

(0.098)

Maximum

8.3

(0.327)

3.5 ±0.05

(0.138 ±0.002) (0.157 ±0.004)

4.0 ±0.10

Single (4 mm)

Single (4 mm) &

Double (8 mm)

8.2

10.25

5.5 ±0.05

8.0 ±0.10

4.6

12.3

12 mm

16 mm

Note 5

(0.323)

(0.404)

(0.217 ±0.002) (0.315 ±0.004)

(0.181)

(0.484)

12.1

(0.476)

14.25

(0.561)

7.5 ± 0.05 12.0 ± 0.10

(0.138 ± 0.002) (0.157 ± 0.004)

4.6

(0.181)

16.3

(0.642)

Triple (12 mm)

1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and

hole location shall be applied independent of each other.

2. The tape with or without components shall pass around R without damage (see Figure 5).

3. If S₁< 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b).

4. B₁dimension is a reference dimension for tape feeder clearance only.

5. The cavity deﬁned by A₀, B₀and K₀shall surround the component with sufﬁcient clearance that:

(a) the component does not protrude above the top surface of the carrier tape.

(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.

(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 2).

(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see Figure 3).

(e) for KPS Series product, A₀and B₀are measured on a plane 0.3 mm above the bottom of the pocket.

(f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.

C1020_X7R_KPS_SMD • 5/30/2013 13

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Packaging Information Performance Notes

1. Cover Tape Break Force: 1.0 Kg minimum.

2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be:

Tape Width

8 mm

Peel Strength

0.1 to 1.0 Newton (10 to 100 gf)

0.1 to 1.3 Newton (10 to 130 gf)

12 and 16 mm

The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier tape shall be 165° to 180°

from the plane of the carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of 300 ±10 mm/minute.

3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA

Standards 556 and 624.

Figure 2 – Maximum Component Rotation

°

T

Maximum Component Rotation

Top View

Maximum Component Rotation

Side View

Typical Pocket Centerline

Tape

Maximum

°

T

s

Width (mm) Rotation (

)

8,12

16 – 200

20

10

Bo

Tape

Maximum

°

S

Width (mm) Rotation (

)

8,12

16 – 56

72 – 200

20

10

5

Typical Component Centerline

Ao

Figure 3 – Maximum Lateral Movement

Figure 4 – Bending Radius

Embossed

Carrier

Punched

Carrier

8 mm & 12 mm Tape

16 mm Tape

0.5 mm maximum

1.0 mm maximum

R

Bending

Radius

R

C1020_X7R_KPS_SMD • 5/30/2013 14

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Figure 5 – Reel Dimensions

Full Radius,

See Note

W3 (Includes

flange distortion

at outer edge)

Access Hole at

Slot Location

(Ø 40 mm minimum)

W

2 (Measured at hub)

D

(See Note)

A

N

C

(Arbor hole

W

1 (Measured at hub)

diameter)

If present,

tape slot in core

for tape start:

2.5 mm minimum width x

10.0 mm minimum depth

B

(see Note)

Note: Drive spokes optional; if used, dimensions B and D shall apply.

Table 7 – Reel Dimensions

Metric will govern

Constant Dimensions — Millimeters (Inches)

Tape Size

8 mm

A

B Minimum

C

D Minimum

178 ±0.20

(7.008 ±0.008)

or

330 ±0.20

(13.000 ±0.008)

1.5

(0.059)

13.0 +0.5/-0.2

(0.521 +0.02/-0.008)

20.2

(0.795)

12 mm

16 mm

Variable Dimensions — Millimeters (Inches)

Tape Size

8 mm

N Minimum

W₁

W₂Maximum

W₃

8.4 +1.5/-0.0

(0.331 +0.059/-0.0)

14.4

(0.567)

50

(1.969)

12.4 +2.0/-0.0

18.4

Shall accommodate tape width

without interference

12 mm

16 mm

(0.488 +0.078/-0.0)

(0.724)

16.4 +2.0/-0.0

(0.646 +0.078/-0.0)

22.4

(0.882)

C1020_X7R_KPS_SMD • 5/30/2013 15

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Figure 6 – Tape Leader & Trailer Dimensions

Embossed Carrier

Carrier Tape

Round Sprocket Holes

Punched Carrier

8 mm & 12 mm only

START

END

Top Cover Tape

Elongated Sprocket Holes

(32 mm tape and wider)

100 mm

Minimum Leader

400 mm Minimum

Trailer

160 mm Minimum

Components

Top Cover Tape

Figure 7 – Maximum Camber

Elongated sprocket holes

(32 mm & wider tapes)

Carrier Tape

Round Sprocket Holes

1 mm Maximum, either direction

Straight Edge

250 mm

C1020_X7R_KPS_SMD • 5/30/2013 16

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

KEMET Corporation

World Headquarters

Europe

Asia

Southern Europe

Paris, France

Tel: 33-1-4646-1006

Northeast Asia

Hong Kong

Tel: 852-2305-1168

2835 KEMET Way

Simpsonville, SC 29681

Sasso Marconi, Italy

Tel: 39-051-939111

Shenzhen, China

Tel: 86-755-2518-1306

Mailing Address:

P.O. Box 5928

Greenville, SC 29606

Beijing, China

Central Europe

Landsberg, Germany

Tel: 49-8191-3350800

Tel: 86-10-5829-1711

www.kemet.com

Tel: 864-963-6300

Fax: 864-963-6521

Shanghai, China

Tel: 86-21-6447-0707

Kamen, Germany

Tel: 49-2307-438110

Corporate Ofﬁces

Fort Lauderdale, FL

Tel: 954-766-2800

Taipei, Taiwan

Tel: 886-2-27528585

Northern Europe

Bishop’s Stortford, United Kingdom

Tel: 44-1279-460122

North America

Southeast Asia

Singapore

Southeast

Tel: 65-6586-1900

Lake Mary, FL

Tel: 407-855-8886

Espoo, Finland

Tel: 358-9-5406-5000

Penang, Malaysia

Tel: 60-4-6430200

Northeast

Wilmington, MA

Tel: 978-658-1663

Bangalore, India

Tel: 91-806-53-76817

Central

Novi, MI

Tel: 248-994-1030

West

Milpitas, CA

Tel: 408-433-9950

Mexico

Guadalajara, Jalisco

Tel: 52-33-3123-2141

Note: KEMET reserves the right to modify minor details of internal and external construction at any time in the interest of product improvement. KEMET does not

assume any responsibility for infringement that might result from the use of KEMET Capacitors in potential circuit designs. KEMET is a registered trademark of

KEMET Electronics Corporation.

C1020_X7R_KPS_SMD • 5/30/2013 17

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Other KEMET Resources

Tools

Resource

Location

Conﬁgure A Part: CapEdge

http://capacitoredge.kemet.com

http://www.kemet.com/spice

http://www.kemet.com/keask

http://www.kemet.com:8080/elc

SPICE & FIT Software

Search Our FAQs: KnowledgeEdge

Electrolytic LifeCalculator

Product Information

Resource

Location

Products

Technical Resources (Including Soldering Techniques)

RoHS Statement

http://www.kemet.com/products

http://www.kemet.com/technicalpapers

http://www.kemet.com/rohs

Quality Documents

http://www.kemet.com/qualitydocuments

Product Request

Resource

Location

http://www.kemet.com/sample

http://www.kemet.com/kits

Sample Request

Engineering Kit Request

Contact

Location

Website

Contact Us

Investor Relations

Call Us

www.kemet.com

http://www.kemet.com/contact

http://www.kemet.com/ir

1-877-MyKEMET

Twitter

http://twitter.com/kemetcapacitors

Disclaimer

All product speciﬁcations, statements, information and data (collectively, the “Information”) in this datasheet are subject to change. The customer is responsible for checking and

verifying the extent to which the Information contained in this publication is applicable to an order at the time the order is placed.

All Information given herein is believed to be accurate and reliable, but it is presented without guarantee, warranty, or responsibility of any kind, expressed or implied.

Statements of suitability for certain applications are based on KEMET Electronics Corporation’s (“KEMET”) knowledge of typical operating conditions for such applications, but are

not intended to constitute – and KEMET speciﬁcally disclaims – any warranty concerning suitability for a speciﬁc customer application or use. The Information is intended for use only

by customers who have the requisite experience and capability to determine the correct products for their application. Any technical advice inferred from this Information or otherwise

provided by KEMET with reference to the use of KEMET’s products is given gratis, and KEMET assumes no obligation or liability for the advice given or results obtained.

Although KEMET designs and manufactures its products to the most stringent quality and safety standards, given the current state of the art, isolated component failures may still

occur. Accordingly, customer applications which require a high degree of reliability or safety should employ suitable designs or other safeguards (such as installation of protective

circuitry or redundancies) in order to ensure that the failure of an electrical component does not result in a risk of personal injury or property damage.

Although all product–related warnings, cautions and notes must be observed, the customer should not assume that all safety measures are indicted or that other measures may not

be required.

C1020_X7R_KPS_SMD • 5/30/2013 18

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)

Digitally signed by Jeannette Calvo

DN: c=US, st=FL, l=Fort Lauderdale, o=KEMET Corp., ou=Marketing

Communications, cn=Jeannette Calvo, email=jeannettecalvo@kemet.com

Date: 2013.06.07 15:57:29 -04'00'

C1020_X7R_KPS_SMD • 5/30/2013 19


型号：	C2220C106K3R1C7186
厂家：	KEMET CORPORATION
描述：	KPS SMD Comm X7R, Ceramic, 10 uF, 10%, 25 VDC, X7R, 2220-1 电容器
文件：	总19页 (文件大小：1920K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

C2220C106K3R1C7186 [KEMET]

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