HE83003_技术文档

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

- Table of Contents -

1. General Description ___________________________________________________________________2

2. Features _____________________________________________________________________________2

3. Internal Block ________________________________________________________________________3

4. Pin Description _______________________________________________________________________3

5. Oscillators ___________________________________________________________________________4

6. General Purpose I/O___________________________________________________________________5

7. Timer1 ______________________________________________________________________________6

8. Timer2 ______________________________________________________________________________7

9. Watch Dog Timer _____________________________________________________________________8

10.

11.

12.

13.

14.

15.

16.

17.

PWM & DAC ______________________________________________________________________8

Pad Diagram & Location____________________________________________________________12

Absolute Maximum Rating __________________________________________________________20

Recommended Operating Conditions _________________________________________________20

AC/DC Characteristics _____________________________________________________________20

Application Circuit_________________________________________________________________22

Important Note____________________________________________________________________23

Updated History ___________________________________________________________________23

September 8, 2004

1

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

1.General Description

HE83003 is a member of 8-bit micro-controller series developed by King Billion. It’s a power speech

controller. The built-in OP comparator can be used with (light, voice, temperature, humility) sensor and

used as battery low detection. And the 7-bit current-type D/A converter and PWM device provide the

complete speech output mechanism. The 36K ROM size can be used in the storage of speech (20 seconds

at 3Kbytes per second)

The instruction set of HE83003 are quite easy to learn and simple to use. Only about thirty instructions

with four-type addressing mode are provided. Most of instructions take only 3 oscillator clocks (machine

cycles). The processing power is enough to most of battery operation system.

2.Features

z Operation Voltage:

z System Clock:

2.4V – 5.5V

DC ~ 8MHz @ 5.0V

DC ~ 4MHz @ 2.4V

36K Bytes (36K Program ROM)

128 Bytes.

Normal (Fast) clock:

Slow clock:

z Internal ROM:

z Internal RAM:

z Dual Clock System:

32.768 KHz ~ 8MHz

32.768 KHz

z Operation modes:

Dual, Fast, Slow, Idle, Sleep modes.

z With WDT (Watch Dog Timer) to prevent deadlock condition.

z 16 bit Bi-directional I/O port. Mask Option can select Push-Pull or Open Drain output mode for

each I/O pin.

z One built-in OP comparator.

z One 7-bit current-type DAC output (VO).

z PWM device.

z Two external interrupts and two internal timer interrupts.

z Two 16-bit timers. (Clock Source reference by Fast Clock)

z Instruction set: 32 instructions, 4 addressing modes.

September 8, 2004

2

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

3.Internal Block

Please always take in mind that ICE is different from IC. ICE is the whole set of HE80000 series IC, but

each IC is a subset of ICE. Never use any hardware resources that real IC don’t have, especially RAM

and register. KBIDS and compiler cannot prevent user to use some hardware resources that don’t exist.

Please check the following table and refer the abbreviation in HE80000 user's manual.

FXI, FXO

Fast Clock

8 Bit CPU

OSC.

SXI, SXO

36 KB ROM

128B RAM

TC1

Slow Clock

OSC

PWM/PWMN

PWM

DAC

VO

TC2

WDT

OPO, OPIN, OPIP

PRTC[7:0], PRTD[7:0]

OP Amp

I/O Port

4.Pin Description

Pin Name I/O

Description

External fast clock pin. Two types of oscillator can be selected by MO_FXTAL (‘0’ for RC type and

B, ‘1’ for crystal type). For RC type oscillator, one resistor needs to be connected between FXI and GND.

FXI,

FXO

For crystal oscillator, one crystal needs to be placed between FXI and FXO. Please refer to

application circuit for details.

O

External slow clock pins. Slow clock is clock source for LCD display, TIMER1, Time-Base and other

internal blocks. Both crystal and RC oscillator are provided. The slow clock type can be selected by

mask option MO_SXTAL. Choose ‘0’ for RC type and ‘1’ for crystal oscillator.

System reset input pin. Level trigger, active low on this pin will put the chip in reset state.

Test input pin. Please bond this pad and reserve a test point on PCB for debugging. But for improving

ESD, please connect this point with zero Ohm resistor to GND.

SXI,

SXO

I,

O

RSTP_N

TSTP_P

I

8-bit bi-directional I/O port C. The output type of I/O pad can also be selected by mask option

MO_CPP[7: 0] (‘1’ for push-pull and ‘0’ for open-drain). As the output structure of I/O pad does not

contain tri-state buffer. When using the I/O as input, ‘1’ must be outputted before reading the pin.

8-bit bi-directional I/O port D. The output type of I/O pad can also be selected by mask option

MO_DPP[7: 0] (‘1’ for push-pull and ‘0’ for open-drain).

PRTC[7:0]

B

As the output structure of I/O pad does not contain tri-state buffer. When using the I/O as input, ‘1’

must be outputted before reading the pin.

PRTD[7:0]

B

PRTD[7..2] can be used as wake-up pins.

PRTD[7..6] can be as external interrupt sources.

September 8, 2004

3

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

Pin Name I/O

Description

PRTD[1..0] general I/O bi-direction pins.

The PWM output can drive speaker or buzzer directly. Using PWMP & PWMN to drive output

device.

PWMP/PWMN O

VO

O Current DAC Output.

OPIN

OPIP

OPO

I Inverting input of OP Amp.

I Non-inverting input of OP Amp.

O Output of OP Amp.

Positive power Input. A 0.1 µF decoupling capacitors should be placed as close to IC VDD

and GND pads as possible for best decoupling effect.

P Power ground Input.

VDD

GND

P

I: Input, O: Output, B: Bidirectional, P: Power.

5.Oscillators

The MCU is equipped with two clock sources with a variety of selections on the types of oscillators to

choose from. System designer can select oscillator types based on the cost target, timing accuracy

requirements etc. Crystal, Resonator or the RC oscillator can be used as fast clock source, components

should be placed as close to the pins as possible. The type of oscillator used is selected by mask option

MO_FXTAL.

FXI (Bi-direction), FXO (Output)

VDD

FXI

10P

R

C

X'tal

FXI

FXO

10P

Mask Option

MO_FXTAL

Description

0: RC Oscillator.

1: Crystal Oscillator.

0: Fast clock disable

1: Fast clock enable

MO_FCK

SXI (Bi-direction), SXO (Output)

Two types of oscillator, crystal and RC, can be used as slow clock selectable by mask option

MO_SXTAL. If used time keeping function or other applications that required the accurate timing, crystal

oscillator is recommended. If the timing accuracy is not important, then RC type oscillator can be used to

save cost.

September 8, 2004

4

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

SXI

SXO

Crystal Osc.

RC Osc.

Mask Option

Description

MO_SXTAL

0: RC Oscillator.

1: Crystal Oscillator.

0: Slow clock enable

1: Slow clock disable

MO_SCKN

With two clock sources available, the system can switch among operation modes of Normal, Slow, Idle,

and Sleep modes by the setting of OP1 and OP2 registers as shown in tables below to suit the needs of

application such as power saving, etc.

OP1

Field

Mode

Reset

Bit 7

DRDY

R/W

1

Bit 6

STOP

R/W

0

Bit 5

SLOW

R/W

0

Bit 4

INTE

R/W

0

Bit 3

T2E

R/W

0

Bit 2

T1E

R/W

0

Bit 1

Z

R/W

-

Bit 0

C

R/W

-

OP2

Field

Mode

Reset

Bit 7

IDLE

R/W

0

Bit 6

PNWK

Bit 5

TCWK

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

-

R

-

R

-

6.General Purpose I/O

The PRTC[7..0] and PRTD[7..0] are dedicated general purpose I/O port. All the I/O ports are

bi-directional and non-tristate output structure. The output has weak sourcing (50µA) and stronger

sinking (1mA) capability and each can be configured as push-pull or open-drain output structure

individually by mask option.

When the I/O port is used as input, the weakly high sourcing can be used as weakly pull-up. Open drain

can be used if the pull-up is not required and let the external driver to drive the pin. Please note that a

floating pad could cause more power consumption since the noise could interfere with the circuit and

cause the input to toggle. A ‘1’ needs to be written to port first before reading the input data from the I/O

pin. If the PMOS is used as pull-up, care should be taken to avoid the constant power drain by DC path

between pull-up and external circuit.

The input port has built-in Schmidt trigger to prevent it from chattering. The hysteresis level of Schmidt

trigger is 1/3*VDD.

September 8, 2004

5

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

VDD

DOUT

Q

LATCH

Q'

MO_?PP

PAD

DIN

SCHMIDT Trigger input

7.Timer1

The Timer1 consists of two 8-bit write-only preload registers T1H and T1L and 16-bit down counter. If

Timer1 is enabled, the counter will decrement by one with each incoming clock pulse. Timer1 interrupt

will be generated when the counter underflows - counts down to FFFFH. And the counter will be

automatically reloaded with the value of T1H and T1L.

The clock source of Timer1 is derived from slow clock “SCK” at dual clock or slow clock only mode.

And it comes from the fast clock “FCK” at fast clock only mode.

Please note that the interrupt is generated when counter counts from 0000H to FFFFH. If the value of

T1H and T1L is N, and count down to FFFFH, the total count is N+1. The content of counter is zero

when system resets. Once it is enabled to count at this moment, interrupt will be generated immediately

and value of T1H and T1L will be loaded since it counts to FFFFH. So the T1H and T1L value should be

set before enabling Timer1.

The Timer1 related control registers are list as below:

Register

IER

Address

0x02

Field

TC1_IER

Bit position

2

Mode

R/W

Description

0: TC1 interrupt is disabled. (default)

1: TC1 interrupt is enabled.

Low byte of TC1 pre-load value

High byte of TC1 pre-load value

0: TC1 is disabled. (default)

1: TC1 is enabled.

T1L

T1H

OP1

0x03

0x04

0x09

T1L[7:0]

T1H[7:0]

TC1E

7~0

2

W

R/W

September 8, 2004

6

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

Auto reload

when Timer1

is underflow

T1H

T1L

The contents of

T1H and T1L are

almost loaded into

Timer1 immediately

when Timer1 is

< Timer1 Counter >

Decreases 1

enabled after reset.

Count To

0xFFFFh

No

Yes

Timer1

Interrupt

Request

T1_INT

8.Timer2

Timer2 is similar in structure to Timer1 except that clock source of Timer2 comes from the system clock

“Fsys”/1.5. The system clock “Fsys” varies depending on the operation modes of the MCU.

The Timer2 consists of two 8-bit write-only preload registers T2H and T2L and 16-bit down counter. If

Timer2 is enabled, counter will decrement by one with each incoming clock pulse. Timer2 interrupt will

be generated when the counter underflows - counts down to FFFFH. And it will be automatically

reloaded with the value of T2H and T2L.

Please note that the interrupt signal is generated when counter counts from 0000H to FFFFH. If the value

of counter is N, and count down to FFFFH, the total count is N+1. The content of counter is zero when

system resets. Once it is enabled to count at this time, the interrupt will be generated immediately and

value of T2H and T2L will be loaded since the counter counts to FFFFH. So the T2H and T2L value

should be set before enabling Timer2.

The Timer2 related control registers are list as below:

Register

IER

Address

0x02

Field

TC2_IER

Bit Position

1

Mode

R/W

Description

0: TC2 interrupt is disabled. (default)

1: TC2 interrupt is enabled.

Low byte of TC2 pre-load value

High byte of TC2 pre-load value

0: TC2 is disabled. (default)

1: TC2 is enabled.

T2L

T2H

OP1

0x05

0x06

0x09

T2L[7:0]

T2H[7:0]

TC2E

7~0

3

W

R/W

September 8, 2004

7

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

Auto reload

when Timer2

is underflow

T2H

T2L

The contents of

T2H and T2L are

almost loaded into

Timer2 immediately

when Timer2 is

< Timer2 Counter >

Decreases 1

enabled after reset.

Count To

0xFFFFh

No

Yes

Timer2

Interrupt

Request

T2_INT

9.Watch Dog Timer

Watch Dog Timer (WDT) is designed to reset system automatically prevent system dead lock caused by

abnormal hardware activities or program execution. WDT needs to be enabled in Mask Option.

MO_WDTE

Function

WDT disable

WDT enable

0

1

To use WDT function, “CLRWDT” instruction needs to be executed in every possible program path

when the program runs normally in order to clears the WDT counter before it overflows, so that the

program can operate normally. When abnormal conditions happen to cause the MCU to divert from

normal path, the WDT counter will not be cleared and reset signal will be generated.

WDT is the enabling signal generated by calculating 32768-clock overflow. Reset Register content is

same as TC1 (Timer1 clock), which uses the same clock count source. WDT function can be generated

in Normal, Slow and Idle Mode. However, WDT will not function during Sleep Mode (as the TC1

clock has stopped.)

10. PWM & DAC

The current DAC output pin is VO and its primary function is intended for speech generation, but the

DAC output path can be used in conjunction with built-in OP comparator to function as an

Analog-to-Digital Converter for applications such as speech recording, speech recognition or sensor

interfaces.

September 8, 2004

8

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

7-bit Voice Output Architecture

VOC[2]

#reset

PWMC_REG[6..4]

PWMP

PWMN

PWM

PWMC[6..0]

PWM

Command

Driver

Register

PWMC[7]

#reset

PWMC_

REG[0]

Write_Strobe

clk

Fast_clock

VOC[2]

7-bit

PWM Data

Register

PWMO_REG[6..0]

DAC

VO

clk

VOC[1]

The 7-bit voice output is controlled by PWMC and VOC register, and the PWMC is a command/data

register which is determined by PWMC[7] bit. The voice output control (VOC) register is used to control

the PWM and DAC enable/disable. These two functions can be enabled simultaneously.

VOC

address

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Field

Reset

0x13

-

PWM

0

DAC Reserved

0

Bit

Name Value

Function description

PWM Module Enable

PWM Module Disable

Digital-to-Analog Converter Enable

Digital-to-Analog Converter Disable

1

VOC[2] PWM

VOC[1] DAC

0

1

0

September 8, 2004

9

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

VOC

VOC[2]

VOC[1]

Output Function

All Disabled

VO

0

1

0

1

0

1

PWM

PWM+VO

PWMC register

DAC & PWM Data

Control

Bit 7

0

1

Bit 6

Bit 5

Bit 4

DAC and PWM output value

PWM O/P driver

Reserved

Bit 3

Bit 2

Bit 1

Bit 0

PWME

In the PWMC register, the PWMC[7] bit determines the written PWMC[6..0] value is PWM/DAC data or

commands. If the PWMC[1] is ‘0’, the PWMC[6..0] is stored into the data register, otherwise

PWMC[6..0] is stored into command register shown on the above diagram. The command register

controls the PWM output driver current and its enable/disable. If user want to enable the PWM function,

both VOC[2] and PWME bits shall be set to ‘1’.

The fast clock is used to provide as PWM driver time base, and user shall set the PWMC[7]=’1’ and

VOC[2]=’1’ to enable the PWM output. When the system enters into sleep or idle mode, it will

automatically turn off the voice device by clearing VOC[2:0] to ”000”. In order to activate voice output

again when the system returns and enters into normal mode, the related bits of VOC register need to be

set again.

PWM

Data=0x40h

Data=0x10h

Data=0x70h

subframe

When the DAC is used as sound generator, the bias & filter circuit is used for bias voltage setting and

waveform filter regulation and the DAC is output to the VO (Voice Output) pin and please see

application notes for detailed calculation example and application. The driving capability of DAC is

shown below.

Condition

V_DD=3V;VO=0~2V;Data=7Fh

Min.

2.5

Typ.

3

Max.

Unit

mA

VO/DAO

September 8, 2004

10

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

VDD

bias &

VO(DAO)

SPEAKER

CPU

filter

circuit

The PWM output volume can be adjusted by command register PWMC[6..4]. The PWMC[6] and

PWMC[5] control 2 time driver, while PWMC [4] controls 1 time driver, thus it has maximum 5 levels of

driver output. The sound volume of PWM output can be controlled by these PWMC[6..4] bits. Please

note that this adjustment only apply to PWM. When the system enters into sleep mode or idle mode, it

will automatically disable all voice outputs by clearing VOC[6..0] to ”0000000”. To activate voice

output again when returning to normal mode, the VOC register needs to be set again.

PWMC[6..4] Number of PWM Output Driver

000

001

010

011

100

101

110

111

off

1

2

3

2

3

4

5

September 8, 2004

11

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

11. Pad Diagram & Location

Which version of HE83003 delivered to customer is decided by KingBillion, user shall make sure the

delivered version before PCB is manufactured. The locations of chips logo are different from each

other.

A1 Version:Die Size= 2050 µm * 2180 µm

September 8, 2004

12

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

A1 Version HE83003

PIN Number PIN Name

X Coordinate

X= -923.95

X= -895.15

X= -682.35

X= -499.15

X= -286.35

Y Coordinate

1

2

3

4

5

6

7

8

PRTD[3]

PRTD[2]

PRTD[1]

PRTD[0]

PRTC[7]

PRTC[6]

PRTC[5]

PRTC[4]

PRTC[3]

PRTC[2]

PRTC[1]

PRTC[0]

PWMP

PWMN

GND

Y= 646.60

Y= 433.80

Y= 250.60

Y=

37.80

Y= -145.40

Y= -331.80

Y= -515.00

Y= -701.40

Y= -992.85

Y= -890.70

Y= -707.90

Y= -524.40

Y= -341.60

Y= -158.10

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

X=

-89.35

122.25

X= 319.05

X= 934.70

VO

OPIN

OPIP

OPO

X=

934.70

X= 934.70

RSTP_N

FXO

X=

934.70

Y=

24.70

FXI

TSTP_P

SXO

X= 934.70

Y= 208.85

Y= 392.65

X=

X= 206.35

X= 22.85

391.15

Y=

990.00

SXI

VDD

Y= 990.00

PRTD[7]

PRTD[6]

PRTD[5]

PRTD[4]

X= -160.15

X= -373.00

X= -556.20

X= -769.00

September 8, 2004

13

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

A2 Version:Die Size= 1980 µm * 2210 µm

September 8, 2004

14

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

A2 Version HE83003

PIN Number

PIN Name

PRTD[3]

PRTD[2]

PRTD[1]

PRTD[0]

PRTC[7]

PRTC[6]

PRTC[5]

PRTC[4]

PRTC[3]

PRTC[2]

PRTC[1]

PRTC[0]

PWMP

PWMN

GND

VO

OPIN

OPIP

OPO

RSTP_N

FXO

FXI

TSTP_P

SXO

X Coordinate

X= -885.80

X= -855.75

X= -642.95

X= -459.75

X= -246.95

Y Coordinate

Y= 543.30

Y= 330.50

Y= 147.30

Y= -65.50

Y= -248.70

Y= -435.10

Y= -618.30

Y= -804.70

Y= -1002.00

Y= -826.30

Y= -632.30

Y= -448.20

Y= -264.20

Y= -80.40

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

X=

-48.75

162.85

X= 361.45

X= 884.20

X=

884.20

X= 884.20

X=

884.20

Y=

103.00

X= 884.20

Y= 287.45

Y= 471.25

Y= 1002.00

X=

329.75

SXI

VDD

PRTD[7]

PRTD[6]

PRTD[5]

PRTD[4]

X= 147.50

X= -36.60

X= -220.20

X= -433.00

X= -616.20

X= -829.00

September 8, 2004

15

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

C Version:Die Size= 1970 µm * 2170 µm

September 8, 2004

16

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

C Version HE83003

PIN Number

PIN Name

PRTD[3]

X Coordinate

X= -1057.45

X= -1052.90

X= -874.30

X= -696.50

X= -517.90

X= -332.30

X= -126.40

Y Coordinate

Y= 742.30

Y= 564.50

Y= 385.90

Y= 208.10

1

2

3

4

5

6

7

8

PRTD[2]

PRTD[1]

PRTD[0]

PRTC[7]

PRTC[6]

PRTC[5]

PRTC[4]

PRTC[3]

PRTC[2]

PRTC[1]

PRTC[0]

PWMP

PWMN

GND

VO

OPIN

OPIP

OPO

RSTP_N

FXO

FXI

TSTP_P

SXO

SXI

Y=

29.50

Y= -148.30

Y= -326.90

Y= -504.70

Y= -1058.50

Y= -803.20

Y= -625.40

Y= -446.80

Y= -269.00

Y= -90.40

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

X=

X= 709.15

59.20

X= 709.15

X=

709.15

Y=

87.40

X= 709.15

Y= 266.00

Y= 443.80

X=

240.70

62.90

Y=

909.10

Y= 909.10

VDD

X= -115.70

X= -293.50

X= -472.10

X= -649.90

X= -828.50

PRTD[7]

PRTD[6]

PRTD[5]

PRTD[4]

September 8, 2004

17

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

D1 Version: Die Size= 1970 µm * 2280 µm

Logo location

September 8, 2004

18

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

D1 Version HE83003

PIN Number

PIN Name

PRTD[3]

PRTD[2]

PRTD[1]

PRTD[0]

PRTC[7]

PRTC[6]

PRTC[5]

PRTC[4]

PRTC[3]

PRTC[2]

PRTC[1]

PRTC[0]

PWMP

PWMN

GND

VO

OPIN

OPIP

OPO

RSTP_N

FXO

FXI

TSTP_P

SXO

X Coordinate

X= -921.50

X= -804.25

X= -649.25

X= -494.25

X= -339.25

X= -130.20

Y Coordinate

Y= 318.40

Y= 193.40

1

2

3

4

5

6

7

8

Y=

68.40

Y= -57.10

Y= -175.10

Y= -293.15

Y= -418.15

Y= -556.05

Y= -1070.65

Y= -807.85

Y= -677.85

Y= -547.85

Y= -314.60

Y= -184.60

Y= -55.10

Y= 170.70

Y= 305.70

Y= 1064.65

Y= 1069.45

Y= 1069.35

Y= 1069.30

Y= 1069.35

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

X=

31.20

X= 164.20

X= 905.40

X=

905.40

X= 905.40

X=

217.25

64.15

SXI

VDD

PRTD[7]

PRTD[6]

PRTD[5]

PRTD[4]

X= -82.95

X= -233.45

X= -383.45

X= -533.45

X= -683.45

September 8, 2004

19

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

12. Absolute Maximum Rating

Item

Supply Voltage

Input Voltage

Output Voltage

Operating Temperature

Storage Temperature

Symbol

V_DD

V_IN

Rating

-0.5V ~ 7.0V

-0.5V ~ V_DD+0.5V

0℃ ~ 70℃

Condition

V_o

T_op

T_st

-50℃ ~ 100℃

13. Recommended Operating Conditions

Item

Supply Voltage

Input Voltage

Symbol

V_DD

Rating

2.4V ~ 5.56V

0.9 V_DD~ V_DD

0.0V ~ 0.1 V_DD

8M Hz

Condition

V_IH

V_IL

Operating Frequency

V_DD=5.0V

V_DD=2.4V

Fmax.

4M Hz

Operating Temperature

Storage Temperature

T_op

T_st

0⁰C ~ 70⁰C

-50⁰C ~ 100⁰C

14. AC/DC Characteristics

Testing Condition: TEMP=25℃, VDD=3V±10%

PARAMETER

CONDITION

2M ext. R/C

32.768K X’tal

32.769K X’tal

MIN TYP MAX UNIT

I_Fast

I_SlowSLOW Mode Current

I_Idle

IDLE Mode Current

NORMAL Mode Current System

0.75

6

1

9

7

1

mA

µA

mA

System

4

I_SleepSleep Mode Current

I_oHPWMPWM Output Drive Current PWMP, PWMN^*2V_DD=3V; V_OH=2V

12 15

33 40

I_oLPWMPWM Output Sink Current PWMP, PWMN^*2V_DD=3V; V_OL=1V

I_oVODAC Output Current

VO

V_DD=3V;VO=0~2V,Data=7F 2.5

3

0.8

V_DD

V_iH

Input High Voltage

I/O pins

V

0.2

V_DD

V_iL

Input Low Voltage

I/O pins

V

Threshold=2/3V_DD(input

from low to high)

1/3

V_DD

V_hysInput Hysteresis Width I/O, RSTP_N

V

Threshold=1/3V_DD(input

from high to low)

I_OH

Output Drive Current

I/O pull-high^*1V_OL=2.0V

50

1.0

µA

mA

I_{OL_1}Output Sink Current

I/O pull-low^*1

RSTP_N

V_OL=0.4V

V_IL=GND, pull high

Internally

I_{IL_1}Input Low Current

20

µA

September 8, 2004

20

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

V_IL=GND, if pull high

Internally by user

I_{IL_2}Input Low Current

I/O

100 µA

Note:

*1: Drive Current Spec. for Push-Pull I/O port only Sink Current Spec. for both Push-Pull and

Open-Drain I/O port.

*2: This Spec. base on one driver only. There are five build-in drivers, so users just multiply the number

of driver he used to one driver current to get the total amount of current. ( I_oHPWM、I_oLPWM* N;

N=0,1,2,3,4,5)

September 8, 2004

21

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

15. Application Circuit

No External Parts is

necessary if user adopt

Internal Fast RC Clock

VDD

C2

FXI

VDD

FXI

FXO

External Fast Clock:

Crystal osc.

R1

50K

FXO

SXI

BATTERY1

C1

SXI

FXI

20P

3V

RSTP_N

GND

0.1uF 100uF

SXO

C3

0.1uF

SW1

2MHZ

PRTD[7:0]

PRTC[7:0]

RESET

20P

FXO

External Fast Clock:

RC osc.

VDD

R > 8.2 KOhm

FXI

OPIN

OPIP

OPO

C: Please Ref. AN016

Buzzer

or

External Slow Clock:

Crystal osc.

PWMP

PWMN

Speaker

Circuit

VDD

Q1

SXI

20P

SP1

32.768K

Passive

Bias &

Filter

Circuit

20P

SXO

SPEAKER

VO

NPN

Please Refer

AN022 for Speech

Output Circuit

External Slow Clock:

RC osc.

SXI

R: Please ref . AN016

SXO

HE83005

September 8, 2004

22

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.

King Billion Electronics Co., Ltd

駿億電子股份有限公司

HE83003

HE80000 SERIES

16. Important Note

1. Please note the ICE is a superset of HE80000 series IC. Each member of the family only has parts of

all resources. Do not use any hardware resource that your target chip doesn’t have, for example,

RAM and register. KBIDS and compiler can’t prevent user from using some hardware resources that

don’t exist in your target chip.

2. Please bond the TSTP_P, RSTP_N and PRTD [7:0] with test points on PCB (can be soldered and

probed) as you can, then some testing can be performed on PCB when it’s necessary. The TSTP_P is

suggested to connect to ground by a 0 ohm resistor.

3. Users should turn off the PWM and DAC function by firmware before the system enters into the

sleep and idle modes. Otherwise, there are some current leakages in the PWM/DAC circuit, and the

current will be large in the sleep and idle mode.

17. Updated History

Version

Date

New Content

V1.0

V1.1

9/30/03 New create

9/30/03 ROM size 32KB -> 36 KB

September 8, 2004

23

V1.1

This specification is subject to change without notice. Please contact sales person for the latest version before use.


型号：	HE83003
厂家：	King blillion Electronics Co.,Ltd.
描述：	8-BIT MICRO-CONTROLLER 8位微控制器微控制器
文件：	总23页 (文件大小：214K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

HE83003 [KB]

相关型号：

HE83005

HE83005(S)

HE83006

HE83006(S)

HE83007(S)

HE83015

HE83015(S)

HE83016

HE83016(S)

HE831

HE83115

HE83115(S)