BF904WR_15 [JMNIC]
N-channel dual-gate MOS-FET;
| 型号： | BF904WR_15 |
| 厂家： | 
QUANZHOU JINMEI ELECTRONIC CO.,LTD. |
| 描述： | N-channel dual-gate MOS-FET |
| 文件： | 总12页 (文件大小：91K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DISCRETE SEMICONDUCTORS
DATA SHEET
BF904WR
N-channel dual-gate MOS-FET
1995 Apr 25
Product specification
File under Discrete Semiconductors, SC07
Philips Semiconductors
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FET
BF904WR
FEATURES
PINNING
PIN
• Specially designed for use at 5 V supply voltage
SYMBOL
DESCRIPTION
• Short channel transistor with high forward transfer
admittance to input capacitance ratio
1
2
3
4
s, b
d
source
drain
• Low noise gain controlled amplifier up to 1 GHz
g2
g1
gate 2
gate 1
• Superior cross-modulation performance during AGC.
APPLICATIONS
• VHF and UHF applications with 3 to 7 V supply voltage
such as television tuners and professional
communications equipment.
d
handbook, halfpage
3
4
DESCRIPTION
g
2
g
Enhancement type field-effect transistor in a plastic
microminiature SOT343R package. The transistor
consists of an amplifier MOS-FET with source and
substrate interconnected and an internal bias circuit to
ensure good cross-modulation performance during AGC.
1
2
1
s,b
Top view
MAM192
CAUTION
Marking code: MC.
The device is supplied in an antistatic package. The
gate-source input must be protected against static
discharge during transport or handling.
Fig.1 Simplified outline (SOT343R) and symbol.
QUICK REFERENCE DATA
SYMBOL
VDS
PARAMETER
drain-source voltage
CONDITIONS
MIN.
TYP.
MAX.
UNIT
−
−
−
−
−
−
−
−
7
V
ID
drain current
30
mA
mW
°C
Ptot
Tj
total power dissipation
operating junction temperature
forward transfer admittance
input capacitance at gate 1
reverse transfer capacitance
noise figure
280
150
30
yfs
22
−
25
2.2
25
2
mS
pF
Cig1-s
Crs
F
2.6
35
f = 1 MHz
−
fF
f = 800 MHz
−
−
dB
1995 Apr 25
2
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FET
BF904WR
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VDS
PARAMETER
drain-source voltage
drain current
CONDITIONS
MIN.
MAX.
UNIT
−
−
−
−
−
7
V
ID
30
mA
mA
mA
mW
IG1
IG2
Ptot
gate 1 current
±10
±10
280
gate 2 current
total power dissipation
up to Tamb = 50 °C; see Fig.2;
note 1
Tstg
Tj
storage temperature
−65
+150
+150
°C
°C
operating junction temperature
−
Note
1. Device mounted on a printed-circuit board.
MLD150
300
handbook, halfpage
P
tot
(mW)
200
100
0
0
50
100
150
200
o
T
( C)
amb
Fig.2 Power derating curve.
1995 Apr 25
3
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FET
BF904WR
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
note 1
Ts = 91 °C; note 2
VALUE
UNIT
K/W
K/W
Rth j-a
Rth j-s
thermal resistance from junction to ambient
thermal resistance from junction to soldering point
350
210
Notes
1. Device mounted on a printed-circuit board.
2. Ts is the temperature at the soldering point of the source lead.
STATIC CHARACTERISTICS
Tj = 25 °C; unless otherwise specified.
SYMBOL
V(BR)G1-SS
V(BR)G2-SS
V(F)S-G1
V(F)S-G2
VG1-S(th)
VG2-S(th)
IDSX
PARAMETER
CONDITIONS
MIN.
MAX.
15
UNIT
gate 1-source breakdown voltage VG2-S = VDS = 0; IG1-S = 10 mA
gate 2-source breakdown voltage VG1-S = VDS = 0; IG2-S = 10 mA
6
6
V
15
1.5
1.5
1
V
forward source-gate 1 voltage
forward source-gate 2 voltage
gate 1-source threshold voltage
gate 2-source threshold voltage
drain-source current
VG2-S = VDS = 0; IS-G1 = 10 mA
VG1-S = VDS = 0; IS-G2 = 10 mA
VG2-S = 4V; VDS = 5 V; ID = 20 µA
VG1-S = VDS = 5 V; ID = 20 µA
0.5
0.5
0.3
0.3
8
V
V
V
1.2
13
V
VG2-S = 4 V; VDS = 5 V; RG1 = 120 kΩ;
mA
note 1
IG1-SS
IG2-SS
gate 1 cut-off current
gate 2 cut-off current
VG2-S = VDS = 0; VG1-S = 5 V
VG1-S = VDS = 0; VG2-S = 5 V
−
−
50
50
nA
nA
Note
1. RG connects gate 1 to VGG = 5 V.
DYNAMIC CHARACTERISTICS
Common source; Tamb = 25 °C; VDS = 5 V; VG2-S = 4 V; ID = 10 mA; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
22
TYP.
25
MAX.
UNIT
yfs
Cig1-s
Cig2-s
Cos
Crs
forward transfer admittance pulsed; Tj = 25 °C
input capacitance at gate 1 f = 1 MHz
input capacitance at gate 2 f = 1 MHz
30
2.6
2
mS
pF
pF
pF
fF
−
1
1
−
−
−
2.2
1.5
1.3
25
1
drain-source capacitance
reverse transfer capacitance f = 1 MHz
noise figure f = 200 MHz; GS = 2 mS; BS = BSopt
f = 800 MHz; GS = GSopt; BS = BSopt
f = 1 MHz
1.6
35
1.5
2.8
F
dB
dB
2
1995 Apr 25
4
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FET
BF904WR
MRA769
MLD268
40
0
handbook, halfpage
gain
reduction
Y
fs
(dB)
10
(mS)
30
20
30
40
20
10
0
50
0
1
2
3
4
50
0
50
100
150
( C)
o
V
(V)
T
AGC
j
f = 50 MHz.
Tj = 25 °C.
Fig.3 Forward transfer admittance as a function
of junction temperature; typical values.
Fig.4 Typical gain reduction as a function of
AGC voltage.
MLD270
MRA771
120
20
handbook, halfpage
V
= 4 V
G2 S
3 V 2.5 V
2 V
V
unw
(dB µV)
110
I
D
(mA)
15
100
90
10
5
1.5 V
1 V
0
80
0
10
20
30
40
50
0
0.4
0.8
1.2
1.6
V
2.0
(V)
gain reduction (dB)
G1
S
VGG = 5 V; fw = 50 MHz.
funw = 60 MHz; Tamb = 25 °C; RG1 = 120 kΩ.
VDS = 5 V.
Tj = 25 °C.
Fig.5 Unwanted voltage for 1% cross-modulation
as a function of gain reduction; typical
values; see Fig.19.
Fig.6 Transfer characteristics; typical values.
1995 Apr 25
5
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FET
BF904WR
MLD269
MLD271
20
150
handbook, halfpage
handbook, halfpage
V
= 1.4 V
S
V
= 4 V
G2 S
I
G1
D
I
3.5 V
(mA)
G1
16
(µA)
1.3 V
3 V
100
1.2 V
1.1 V
12
8
2.5 V
2 V
1.0 V
0.9 V
50
4
0
0
0
0
2
4
6
8
10
(V)
0.5
1.0
1.5
2.0
2.5
(V)
V
V
G1
DS
S
VDS = 5 V.
VG2-S = 4 V.
Tj = 25 °C.
Tj = 25 °C.
Fig.8 Gate 1 current as a function of gate 1
voltage; typical values.
Fig.7 Output characteristics; typical values.
MLD272
MLD273
16
40
handbook, halfpage
handbook, halfpage
I
y
D
fs
(mS)
(mA)
V
= 4 V
S
G2
12
30
3.5 V
3 V
8
4
0
20
2.5 V
10
0
2 V
0
10
20
30
40
50
(µA)
0
4
8
12
16
20
(mA)
I
I
G1
D
VDS = 5 V.
VDS = 5 V; VG2-S = 4 V.
Tj = 25 °C.
Tj = 25 °C.
Fig.9 Forward transfer admittance as a
function of drain current; typical values.
Fig.10 Drain current as a function of gate 1 current;
typical values.
1995 Apr 25
6
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FET
BF904WR
MLD275
MLD274
12
20
handbook, halfpage
handbook, halfpage
R
= 47 kΩ 68 kΩ
G1
I
D
I
D
82 kΩ
(mA)
(mA)
15
100 kΩ
120 kΩ
150 kΩ
8
10
5
180 kΩ
220 kΩ
4
0
0
0
0
1
2
3
4
5
2
4
6
8
V
(V)
V
= V
(V)
DS
GG
GG
VDS = 5 V; VG2-S = 4 V.
G1 = 120 kΩ (connected to VGG); Tj = 25 °C.
VG2-S = 4 V.
R
RG1 connected to VGG; Tj = 25 °C.
Fig.11 Drain current as a function of gate 1
supply voltage (= VGG); typical values;
see Fig.19.
Fig.12 Drain current as a function of gate 1
(= VGG) and drain supply voltage;
typical values; see Fig.19.
MLD276
MLB945
12
40
handbook, halfpage
handbook, halfpage
V
= 5 V
4.5 V
GG
I
G1
(µA)
I
D
V
= 5 V
GG
4 V
(mA)
30
3.5 V
3 V
4.5 V
8
4 V
3.5 V
3 V
20
10
4
0
0
0
0
2
4
6
2
4
6
V
(V)
S
V
(V)
S
G2
G2
VDS = 5 V; Tj = 25 °C.
VDS = 5 V; Tj = 25 °C.
RG = 120 kΩ (connected to VGG).
RG = 120 kΩ (connected to VGG).
Fig.13 Drain current as a function of gate 2 voltage;
typical values; see Fig.19.
Fig.14 Gate 1 current as a function of gate 2
voltage; typical values; see Fig.19.
1995 Apr 25
7
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FET
BF904WR
MLD277
MLD278
2
10
3
2
3
10
rs
10
handbook, halfpage
y
y
ϕ
is
(mS)
rs
(deg)
(µS)
ϕ
rs
2
10
10
10
y
rs
b
is
1
10
10
g
is
1
1
3
10
1
2
3
2
10
10
10
10
10
10
f (MHz)
f (MHz)
VDS = 5 V; VG2 = 4 V.
VDS = 5 V; VG2 = 4 V.
ID =10 mA; Tamb = 25 °C.
ID = 10 mA; Tamb = 25 °C.
Fig.15 Input admittance as a function of frequency;
typical values.
Fig.16 Reverse transfer admittance and phase as
a function of frequency; typical values.
MLD280
MLD279
2
2
10
fs
10
10
handbook, halfpage
y
os
(mS)
ϕ
y
fs
y
fs
fs
(deg)
b
g
(mS)
os
os
1
ϕ
10
10
1
2
10
10
1
1
2
3
2
3
10
10
10
10
10
10
f (MHz)
f (MHz)
VDS = 5 V; VG2 = 4 V.
VDS = 5 V; VG2 = 4 V.
ID = 10 mA; Tamb = 25 °C.
ID = 10 mA; Tamb = 25 °C.
Fig.17 Forward transfer admittance and phase as
a function of frequency; typical values.
Fig.18 Output admittance as a function of
frequency; typical values.
1995 Apr 25
8
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FET
BF904WR
V
AGC
R1
10 kΩ
C1
4.7 nF
C3 12 pF
R
L
L1
C2
DUT
50 Ω
≈450 nH
C4
4.7 nF
R
R2
GEN
R
G1
50 Ω
50Ω
4.7 nF
V
I
V
MLD171
GG
V
DS
Fig.19 Cross-modulation test set-up.
1995 Apr 25
9
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FET
BF904WR
Table 1 Scattering parameters: VDS =5 V; VG2-S = 4 V; ID = 10 mA
s11
s21
s12
s22
f
MAGNITUDE ANGLE MAGNITUDE ANGLE MAGNITUDE ANGLE MAGNITUDE ANGLE
(MHz)
(ratio)
(deg)
(ratio)
(deg)
(ratio)
(deg)
(ratio)
(deg)
40
100
0.989
0.985
0.976
0.958
0.942
0.918
0.899
0.876
0.852
0.823
0.800
0.750
0.719
0.682
0.642
0.602
0.547
0.596
0.682
0.771
0.793
−3.4
−8.3
2.420
2.414
2.368
2.301
2.251
2.170
2.080
2.001
1.924
1.829
1.747
1.621
1.535
1.424
1.349
1.283
1.130
1.018
0.979
0.804
0.541
175.7
169.1
158.8
148.5
138.8
129.5
120.7
112.1
103.2
94.7
0.000
0.001
0.003
0.004
0.005
0.005
0.005
0.005
0.005
0.005
0.005
0.005
0.008
0.010
0.013
0.018
0.014
0.040
0.077
0.120
0.149
79.9
78.3
0.993
0.992
0.987
0.980
0.974
0.966
0.958
0.951
0.944
0.937
0.933
0.928
0.930
0.924
0.928
0.928
0.887
0.837
0.778
0.629
0.479
−1.6
−3.9
200
−16.4
−24.1
−32.0
−39.3
−46.0
−52.6
−58.8
−64.9
−70.9
−82.4
−92.7
−102.5
−109.8
−116.5
−124.9
−128.7
−132.6
−142.5
−157.5
80.3
−7.8
300
73.7
−11.4
−15.2
−18.7
−22.2
−25.5
−28.9
−32.1
−35.2
−41.7
−48.4
−54.9
−62.9
−73.1
−81.0
−95.8
−109.6
−119.5
−119.9
400
70.7
500
67.2
600
67.8
700
68.6
800
72.9
900
78.7
1000
1200
1400
1600
1800
2000
2200
2400
2600
2800
3000
86.5
88.3
70.7
120.5
139.8
137.8
156.8
175.1
172.6
−163.9
−164.0
178.8
158.3
54.6
39.4
22.5
1.1
−15.1
−49.1
−79.4
−116.2
−153.5
Table 2 Noise data: VDS = 5 V; VG2-S = 4 V; ID = 10 mA
Γopt
f
Fmin
(dB)
rn
50.40
(MHz)
(ratio)
(deg)
49.6
800
2.00
.686
1995 Apr 25
10
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FET
BF904WR
PACKAGE OUTLINE
1.00
max
0.1
max
0.4
0.2
0.2
A
0.2
B
M
M
0.2
3
4
A
1.35
1.15
2.2
2.0
0.3
0.1
2
1
0.25
0.10
0.7
0.5
1.4
1.2
2.2
1.8
B
MSB367
Dimensions in mm.
Fig.20 SOT343R.
1995 Apr 25
11
Philips Semiconductors
Product specification
N-channel dual-gate MOS-FET
BF904WR
DEFINITIONS
Data Sheet Status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1995 Apr 25
12
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