IXDS502 [IXYS]
2 Ampere Single Low-Side Ultrafast MOSFET Drivers;型号: | IXDS502 |
厂家: | IXYS CORPORATION |
描述: | 2 Ampere Single Low-Side Ultrafast MOSFET Drivers |
文件: | 总11页 (文件大小:216K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Preliminary Technical Information
IXDR502 / IXDS502
2 Ampere Single Low-Side Ultrafast MOSFET Drivers
General Description
Features
• Built using the advantages and compatibility
of CMOS and IXYS HDMOSTM processes
• Latch-Up Protected up to 2 Amps
• High 2A Peak Output Current
• Wide Operating Range: 4.5V to 25V
• -55°C to +125°C Extended Operating
Temperature
• High Capacitive Load Drive Capability: 1000pF
in <10ns
• Matched Rise And Fall Times
• Low Propagation Delay Time
• Low Output Impedance
The IXDR502, and IXDS502 each consist of a single 2A
CMOS high speed gate driver for driving the latest IXYS
MOSFETs & IGBTs. Each type can source and sink 2
Amps of peak current while producing voltage rise and
fall times of less than 15ns. The input of each driver is
TTL or CMOS compatible and is virtually immune to
latch up. Patented* design innovations eliminate cross
conduction and current "shoot-through". Improved
speed and drive capabilities are further enhanced by
very quick & matched rise and fall times.
The IXDR502 is configured as a single inverting gate
driver, and the IXDS502 is configured as a single non-
inverting gate driver.
• Low Supply Current
The IXDR502, and IXDS502 are available in the 6-Lead
DFN (D1) package, which occupies less than 20% of
the board area of a typical 8-Pin SOIC package.
Applications
• Driving MOSFETs and IGBTs
• Motor Controls
• Line Drivers
• Pulse Generators
• Local Power ON/OFF Switch
• Switch Mode Power Supplies (SMPS)
• DC to DC Converters
• Pulse Transformer Driver
• Class D Switching Amplifiers
• Power Charge Pumps
*United States Patent 6,917,227
Ordering Information
Package
Type
Pack
Qty
Part Number
Description
Packing Style
Configuration
IXDR502D1B
2A Low Side Gate Driver I.C.
2A Low Side Gate Driver I.C.
2A Low Side Gate Driver I.C.
2A Low Side Gate Driver I.C.
6-Lead DFN
2” x 2” Waffle Pack 121
7” Tape and Reel 2500
2” x 2” Waffle Pack 121
Single Inverting
Driver
IXDR502D1BT/R
IXDS502D1B
6-Lead DFN
6-Lead DFN
6-Lead DFN
Single Non-
Inverting Driver
IXDS502D1BT/R
7” Tape and Reel
2500
NOTE: All parts are lead-free and RoHS Compliant
DS99909(10/07)
Copyright © 2007 IXYS CORPORATION All rights reserved
First Release
IXDR502 / IXDS502
Figure 1 - IXDS502 Non-Inverting 2A Gate Driver Functional Block Diagram
Vcc
P
N
ANTI-CROSS
CONDUCTION
CIRCUIT *
IN
OUT
GND
GND
Figure 2 - IXDR502 Inverting 2A Gate Driver Functional Block Diagram
Vcc
P
N
ANTI-CROSS
CONDUCTION
IN
OUT
GND
CIRCUIT *
GND
* United States Patent 6,917,227
2
Copyright © 2007 IXYS CORPORATION All rights reserved
IXDR502 / IXDS502
Operating Ratings (2)
Absolute Maximum Ratings (1)
Parameter
Value
Parameter
Value
Supply Voltage
All Other Pins
Junction Temperature
Storage Temperature
Lead Temperature (10 Sec)
35V
Operating Supply Voltage
Operating Temperature Range
Package Thermal Resistance *
4.5V to 25V
-55 °C to 125 °C
-0.3 V to VCC + 0.3V
150 °C
-65 °C to 150 °C
300 °C
6-Lead DFN
6-Lead DFN
6-Lead DFN
(D1)
(D1)
(D1)
θ
(typ) 125-200 °C/W
θJ-A(max)3.3 °C/W
θJJ--CS(typ) 7.3 °C/W
Electrical Characteristics @ TA = 25 oC (3)
Unless otherwise noted, 4.5V ≤ VCC ≤ 25V .
All voltage measurements with respect to GND. IXD_502 configured as described in Test Conditions.
(4)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
V
2.5
4.5V ≤ VCC ≤ 18V
4.5V ≤ VCC ≤ 18V
VIH
VIL
VIN
IIN
High input voltage
Low input voltage
Input voltage range
Input current
1.0
VCC + 0.3
10
V
-5
-10
V
0V ≤ VIN ≤ VCC
µA
V
VCC - 0.025
VOH
VOL
High output voltage
Low output voltage
0.025
4
V
High state output
resistance
Low state output
resistance
VCC = 15V
VCC = 15V
VCC = 15V
3
2.2
2
Ω
ROH
3
Ω
ROL
IPEAK
IDC
A
A
Peak output current
Continuous output
current
0.5
CLOAD = 1000pF VCC = 15V
CLOAD = 1000pF VCC = 15V
CLOAD = 1000pF VCC = 15V
CLOAD = 1000pF VCC = 15V
7.5
6.5
25
12
10
35
30
25
ns
ns
ns
ns
V
tR
Rise time
tF
Fall time
tONDLY
tOFFDLY
VCC
ON propagation delay
OFF propagation delay
Power supply voltage
20
4.5
15
VIN = 3.5V
VIN = 0V
VIN = +VCC, (4.5V≤ VCC ≤ 18V)
1
0
2
15
15
mA
µA
µA
ICC
Power supply current
IXYS reserves the right to change limits, test conditions, and dimensions.
3
IXDR502 / IXDS502
Electrical Characteristics @ temperatures over -55 oC to 125 oC (3)
Unless otherwise noted, 4.5V ≤ VCC ≤ 22V , Tj < 150oC
All voltage measurements with respect to GND. IXD_502 configured as described in Test Conditions.
Symbol
VIH
Parameter
Test Conditions
Min
Typ
Max
Units
V
High input voltage
Low input voltage
Input voltage range
Input current
3.5
4.5V ≤ VCC ≤ 15V
4.5V ≤ VCC ≤ 15V
VIL
0.8
VCC + 0.3
20
V
VIN
-5
-20
V
IIN
0V ≤ VIN ≤ VCC
µA
V
VOH
VOL
ROH
High output voltage
Low output voltage
VCC - 0.05
0.05
6
V
Output resistance
@ Output high
Output resistance
@ Output Low
Continuous output
current
VCC = 15V
VCC = 15V
Ω
ROL
IDC
4
Ω
0.3
A
tR
Rise time
CL=1000pF Vcc=15V
CL=1000pF Vcc=15V
CL=1000pF Vcc=15V
14
12
40
ns
ns
ns
tF
Fall time
tONDLY
On-time propagation
delay
tOFFDLY
Off-time propagation
delay
CL=1000pF Vcc=15V
35
ns
VCC
ICC
Power supply voltage
4.5
15
22
V
Power supply current
VIN = 3.5V
VIN = 0V
VIN = + VCC, (4.5V≤ VCC ≤ 18V)
1
0
3
10
10
mA
µA
µA
Notes:
1. Operating the device beyond the parameters listed as “Absolute Maximum Ratings” may cause permanent
damage to the device. Exposure to absolute maximum rated conditions for extended periods may affect device
reliability.
2. The device is not intended to be operated outside of the Operating Ratings.
3. Electrical Characteristics provided are associated with the stated Test Conditions.
4. Typical values are presented in order to communicate how the device is expected to perform, but not necessarily
to highlight any specific performance limits within which the device is guaranteed to function.
* The following notes are meant to define the conditions for the θJ-A, θJ-C and θJ-S values:
1) The θJ-A (typ) is defined as junction to ambient. The θJ-A of the standard single die 8-Lead PDIP and 8-Lead SOIC are dominated
by the resistance of the package, and the IXD_5XX are typical. The values for these packages are natural convection values with
vertical boards and the values would be lower with forced convection. For the 6-Lead DFN package, the θJ-A value supposes the DFN
package is soldered on a PCB. The θJ-A (typ) is 200 °C/W with no special provisions on the PCB, but because the center pad
provides a low thermal resistance to the die, it is easy to reduce the θJ-A by adding connected copper pads or traces on the PCB.
These can reduce the θJ-A (typ) to 125 °C/W easily, and potentially even lower. The θJ-A for DFN on PCB without heatsink or thermal
management will vary significantly with size, construction, layout, materials, etc. This typical range tells the user what they are likely
to get if no thermal management is done.
2) θJ-C (max) is defined as juction to case, where case is the large pad on the back of the DFN package. The θJ-C values are generally
not published for the PDIP and SOIC packages. The θJ-C for the DFN packages are important to show the low thermal resistance from
junction to the die attach pad on the back of the DFN, -- and a guardband has been added to be safe.
3) The θJ-S (typ) is defined as junction to heatsink, where the DFN package is soldered to a thermal substrate that is mounted on a
heatsink. The value must be typical because there are a variety of thermal substrates. This value was calculated based on easily
available IMS in the U.S. or Europe, and not a premium Japanese IMS. A 4 mil dialectric with a thermal conductivity of 2.2W/mC was
assumed. The result was given as typical, and indicates what a user would expect on a typical IMS substrate, and shows the potential
low thermal resistance for the DFN package.
4
Copyright © 2007 IXYS CORPORATION All rights reserved
IXDR502 / IXDS502
Pin Description
PIN NUMBER
SYMBOL
FUNCTION
DESCRIPTION
Input signal-TTL or CMOS compatible.
IN
Signal Input
1
2
Positive power supply voltage input. This pin provides power to the
entire chip. The range for this voltage is from 4.5V to 25V.
Driver output. For application purposes, this pin is connected via a
resistor to the gate of a MOSFET or IGBT.
The drivers ground pins. Internally connected to all circuitry, these
pins provide ground reference for the entire device. These pins
should be connected to a low noise analog ground plane for
optimum performance.
Vcc
Supply Voltage
Drive Output
OUT
GND
3
Ground
4,5,6
CAUTION: Follow proper ESD procedures when handling and assembling this component.
Pin Configuration
IXDR 6 Lead DFN (D1B)
(Bottom View)
IXDS 6 Lead DFN (D1B)
(Bottom View)
6
5
4
GND
GND
GND
1
2
3
IN
6
GND
GND
GND
1
2
3
IN
Vcc
5
4
Vcc
OUT
OUT
NOTE: Solder tabs on bottoms of DFN packages are grounded
Figure 3 - Characteristics Test Diagram
Vcc
1
2
3
6
5
4
IN
GND
GND
GND
Vcc
OUT
10uF
0.01uF
Agilent 1147A
Current Probe
1000 pF
IXYS reserves the right to change limits, test conditions, and dimensions.
5
IXDR502 / IXDS502
Typical Performance Characteristics
Fig. 4
Fig. 5
Fall Time vs. Supply Voltage
Rise Time vs. Supply Voltage
80
70
60
50
40
30
20
10
0
70
60
50
40
30
20
10
0
10000pF
5400pF
10000pF
5400pF
1000pF
560pF
1000pF
560pF
0
5
10
15
20
25
30
35
40
0
5
10
15
20
25
30
35
40
Supply Voltage (V)
Supply Voltage (V)
Rise / Fall Time vs. Temperature
Fig. 6
Fig. 7
V
SUPPLY = 15V CLOAD = 1000pF
Rise Time vs. Capacitive Load
90
80
70
60
50
40
30
20
10
12
10
8
5V
Rise time
Fall time
10V
15V
20V
6
4
2
0
0
-50
0
50
100
150
100
1000
10000
Load Capacitance (pF)
Temperature (C)
Fig. 9
Fig. 8
Fall Time vs. Capacitive Load
Input Threshold Levels vs. Supply Voltage
70
60
50
40
30
20
10
0
2.5
5
2
1.5
1
10V
Positive going input
15V
20V
Negative going input
0.5
0
0
5
10
15
20
25
30
35
40
100
1000
10000
Supply Voltage (V)
Load Capacitance (pF)
6
Copyright © 2007 IXYS CORPORATION All rights reserved
IXDR502 / IXDS502
Propagation Delay vs. Supply Voltage
Rising Input, CLOAD = 1000pF
Fig. 10
Fig. 11
Input Threshold Levels vs. Temperature
3
2.5
2
40
35
30
25
20
15
10
5
Non-Inverting
Positive going input
Negative going input
1.5
1
Inverting
0.5
0
0
0
5
10
15
20
25
30
35
40
-50
0
50
100
150
Temperature (C)
Supply Voltage (V)
Propagation Delay vs. Temperature
VSUPPLY = 15V CLOAD = 1000pF
Propagation Delay vs. Supply Voltage
Falling Input, CLOAD = 1000pF
Fig. 13
Fig. 12
40
45
40
35
30
25
20
15
10
5
35
30
25
20
15
10
5
Negative going input
Positve going input
Inverting
Non-Inverting
0
0
-50
0
50
100
150
0
5
10
15
20
25
30
35
40
Temeprature (C)
Supply Voltage (V)
Quiescent Current vs. Temperature
VSUPPLY = 15V
Fig. 15
Fig. 14
Quiescent Current vs. Supply Voltage
10000
1000
100
10
1000000
100000
10000
1000
100
Non-inverting, Input= "1"
Inverting, Input= "0"
Inverting/Non-inverting
Input = "1"
Inverting, Input= "1"
Inverting
Input = "0"
10
Non-inverting
Input = "0"
1
Non-inverting, Input= "0"
1
0.1
0.1
0
5
10
15
20
25
30
35
40
-50
0
50
100
150
Supply Voltage (V)
Temperature (C)
7
IXDR502 / IXDS502
Supply Current vs. Frequency
Supply Current vs. Capacitive Load
Fig. 16
Fig. 17
V
SUPPLY = 5V
VSUPPLY = 5V
100
100
90
80
70
60
50
40
30
20
10
0
10000pF
2MHz
90
80
70
60
50
40
30
20
10
0
5400pF
1MHz
1000pF
560pF
100kHz
100
1000
10000
100
1000
10000
Load Capacitance (pF)
Frequency (kHz)
Supply Current vs. Capacitive Load
Supply Current vs. Frequency
Fig. 19
Fig. 18
V
SUPPLY = 10V
VSUPPLY = 10V
200
180
160
140
120
100
80
200
10000pF
5400pF
2MHz
180
160
140
120
100
80
1MHz
60
60
40
40
1000pF
560pF
20
20
100kHz
0
0
100
1000
10000
100
1000
10000
Load Capacitance (pF)
Frequency (kHz)
Supply Current vs. Capacitive Load
VSUPPLY = 15V
Supply Current vs. Frequency
VSUPPLY = 15V
Fig. 20
Fig. 21
300
250
200
150
100
50
300
250
200
150
100
50
2MHz
10000pF
5400pF
1MHz
1000pF
560pF
100kHz
0
0
100
1000
10000
100
1000
10000
Load Capacitance (pF)
Frequency (kHz)
8
Copyright © 2007 IXYS CORPORATION All rights reserved
IXDR502 / IXDS502
Supply Current vs. Frequency
Supply Current vs. Capacitive Load
Fig. 23
Fig. 22
V
SUPPLY = 20V
VSUPPLY = 20V
400
400
350
300
250
200
150
100
50
10000pF
2MHz
1MHz
350
300
250
200
150
100
50
5400pF
1000pF
560pF
100kHz
0
0
100
1000
10000
100
1000
10000
Frequency (kHz)
Output Sink Current vs. Supply Voltage
Load Capacitance (pF)
Output Source Current vs. Supply Voltage
Fig. 25
Fig. 24
7
0
-1
-2
-3
-4
-5
-6
-7
6
5
4
3
2
1
0
0
5
10
15
20
25
30
35
40
0
5
10
15
20
25
30
35
40
Supply Voltage (V)
Supply Voltage (V)
Output Sink Current vs. Temperature
VSUPPLY = 15V
Output Source Current vs. Temperature
SUPPLY = 15V
Fig. 27
Fig. 26
V
0
-0.5
-1
3.5
3
2.5
2
-1.5
-2
1.5
1
-2.5
-3
0.5
0
-3.5
-50
0
50
100
150
-50
0
50
100
150
Temperature (C)
Temperature (C)
9
IXDR502 / IXDS502
Fig. 29
Fig. 28
Low State Output Resistance vs. Supply Voltage
High State Output Resistance vs. Supply Voltage
4.5
6
5
4
3
2
1
0
4
3.5
3
2.5
2
1.5
1
0.5
0
0
5
10
15
20
25
30
35
40
0
5
10
15
20
25
30
35
40
Supply Voltage (V)
Supply Voltage (V)
Supply Bypassing, Grounding Practices And Output Lead Inductance
GROUNDING
When designing a circuit to drive a high speed MOSFET
utilizing the IXD_502, it is very important to observe certain
design criteria in order to optimize performance of the driver.
Particular attention needs to be paid to Supply Bypassing,
Grounding, and minimizing the Output Lead Inductance.
In order for the design to turn the load off properly, the IXD_502
must be able to drain this 1.5A of current into an adequate
grounding system. There are three paths for returning current
that need to be considered: Path #1 is between the IXD_502
and its load. Path #2 is between the IXD_502 and its power
supply. Path #3 is between the IXD_502 and whatever logic is
driving it. All three of these paths should be as low in resistance
and inductance as possible, and thus as short as practical. In
addition, every effort should be made to keep these three
groundpathsdistinctlyseparate.Otherwise,thereturningground
current from the load may develop a voltage that would have a
detrimental effect on the logic line driving the IXD_502.
Say, forexample, weareusingtheIXD_502tochargea1500pF
capacitive load from 0 to 25 volts in 25ns.
Using the formula: I= ∆V C / ∆t, where ∆V=25V C=1500pF &
∆t=25ns, we can determine that to charge 1500pF to 25 volts in
25nswilltakeaconstantcurrentof1.5A. (Inreality, thecharging
current won’t be constant, and will peak somewhere around
2A).
OUTPUT LEAD INDUCTANCE
SUPPLY BYPASSING
Of equal importance to Supply Bypassing and Grounding are
issues related to the Output Lead Inductance. Every effort
should be made to keep the leads between the driver and its
load as short and wide as possible. If the driver must be placed
fartherthan2”(5mm)fromtheload, thentheoutputleadsshould
be treated as transmission lines. In this case, a twisted-pair
should be considered, and the return line of each twisted pair
should be placed as close as possible to the ground pin of the
driver, and connected directly to the ground terminal of the load.
In order for our design to turn the load on properly, the IXD_502
must be able to draw this 1.5A of current from the power supply
in the 25ns. This means that there must be very low impedance
between the driver and the power supply. The most common
method of achieving this low impedance is to bypass the power
supply at the driver with a capacitance value that is an order of
magnitudelargerthantheloadcapacitance. Usually, thiswould
be achieved by placing two different types of bypassing
capacitors, with complementary impedance curves, very close
tothedriveritself.(Thesecapacitorsshouldbecarefullyselected
and should have low inductance, low resistance and high-pulse
current-service ratings). Lead lengths may radiate at high
frequency due to inductance, so care should be taken to keep
the lengths of the leads between these bypass capacitors and
the IXD_502 to an absolute minimum.
10
Copyright © 2007 IXYS CORPORATION All rights reserved
IXDR502 / IXDS502
0.013 [0.32]
0.044 [1.12]
0.079±0.004 [2.00±0.10]
0.035±0.004 [0.90±0.10]
0.010 [0.26]
0.012 [0.30]
0.008 [0.20]
S0.002^0.000; o
[
S0.05^0.00;o
]
IXYS Corporation
IXYS Semiconductor GmbH
3540 Bassett St; Santa Clara, CA 95054
Tel: 408-982-0700; Fax: 408-496-0670
e-mail: sales@ixys.net
Edisonstrasse15 ; D-68623; Lampertheim
Tel: +49-6206-503-0; Fax: +49-6206-503627
e-mail: marcom@ixys.de
www.ixys.com
11
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