IXDI509 [IXYS]
9 Ampere Low-Side Ultrafast MOSFET Drivers;
| 型号： | IXDI509 |
| 厂家： | 
IXYS CORPORATION |
| 描述： | 9 Ampere Low-Side Ultrafast MOSFET Drivers |
| 文件： | 总12页 (文件大小：354K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IXDI509 / IXDN509
9 Ampere Low-Side Ultrafast MOSFET Drivers
Features
General Description
• Built using the advantages and compatibility
of CMOS and IXYS HDMOSTM processes
• Latch-Up protected up to 9 Amps
• High 9A peak output current
• Wide operating range: 4.5V to 30V
• -55°Cto+125°Cextendedoperating
temperature
TheIXDI509andIXDN509arehighspeedhighcurrentgate
drivers specifically designed to drive the largest IXYS
MOSFETs & IGBTs to their minimum switching time and
maximumpracticalfrequencylimits. TheIXDI509and
IXDN509 can source and sink 9 Amps of peak current while
producing voltage rise and fall times of less than 30ns. The
inputs of the drivers are compatible with TTL or CMOS and
are virtually immune to latch up over the entire operating
range. Patented*designinnovationseliminatecross
conductionandcurrent"shoot-through".Improvedspeed
and drive capabilities are further enhanced by matched rise
and fall times.
• High capacitive load drive
capability: 1800pF in <15ns
• Matched rise and fall times
• Low propagation delay time
• Lowoutputimpedance
• Low supply current
TheIXDI509isconfiguredasaInvertingGateDriver,andthe
IXDN509isconfiguredasaNon-InvertingGateDriver.
Applications
• DrivingMOSFETsandIGBTs
• Motorcontrols
• Linedrivers
TheIXDI509andIXDN509areeachavailableinthe8-PinP-
DIP (PI) package, the 8-Pin SOIC (SIA) package, and the
6-Lead DFN (D1) package, (which occupies less than 65%
of the board area of the 8-Pin SOIC).
• Pulsegenerators
• Local power ON/OFF switch
• Switch Mode Power Supplies (SMPS)
• DCtoDCconverters
• Pulsetransformerdriver
• Class D switching amplifiers
• Powerchargepumps
*United States Patent 6,917,227
OrderingInformation
Package
Type
Pack
Qty
50
94
2500
56
2500
50
94
2500
56
2500
Part Number
Description
Packing Style
Tube
Configuration
IXDI509PI
9A Low Side Gate Driver I.C.
9A Low Side Gate Driver I.C.
9A Low Side Gate Driver I.C.
9A Low Side Gate Driver I.C.
9A Low Side Gate Driver I.C.
9A Low Side Gate Driver I.C.
9A Low Side Gate Driver I.C.
8-Pin PDIP
8-Pin SOIC
8-Pin SOIC
6-Lead DFN
6-Lead DFN
8-Pin PDIP
8-Pin SOIC
8-Pin SOIC
6-Lead DFN
6-Lead DFN
IXDI509SIA
IXDI509SIAT/R
IXDI509D1
IXDI509D1T/R
IXDN509PI
IXDN509SIA
IXDN509SIAT/R 9A Low Side Gate Driver I.C.
IXDN509D1
IXDN509D1T/R
Tube
Inverting
13” Tape and Reel
2” x 2” Waffle Pack
13” Tape and Reel
Tube
Tube
Non-Inverting
13” Tape and Reel
2” x 2” Waffle Pack
13” Tape and Reel
9A Low Side Gate Driver I.C.
9A Low Side Gate Driver I.C.
NOTE: All parts are lead-free and RoHS Compliant
Copyright © 2007 IXYS CORPORATION All rights reserved
DS99670A(10/07)
First Release
IXDI509 / IXDN509
Figure 1 - IXDI509 Inverting 9A Gate Driver Functional Block Diagram
Vcc
Vcc
P
N
ANTI-CROSS
CONDUCTION
CIRCUIT *
OUT
GND
IN
GND
Figure 2 - IXDN509 Non-Inverting 9A Gate Driver Functional Block Diagram
Vcc
Vcc
P
ANTI-CROSS
CONDUCTION
CIRCUIT *
OUT
GND
IN
N
GND
* United States Patent 6,917,227
2
Copyright © 2007 IXYS CORPORATION All rights reserved
IXDI509 / IXDN509
Operating Ratings (2)
Absolute Maximum Ratings (1)
Parameter
Value
Parameter
Value
Supply Voltage
AllOtherPins
JunctionTemperature
StorageTemperature
LeadTemperature(10Sec)
35 V
Operating Supply Voltage
OperatingTemperatureRange
PackageThermalResistance*
4.5V to 30V
-55 °C to 125°C
-0.3 V to VCC + 0.3V
150 °C
-65 °C to 150 °C
300°C
8-PinPDIP
(PI)
θ
(typ) 125°C/W
8-PinSOIC
6-LeadDFN
6-LeadDFN
6-LeadDFN
(SIA)
(D1)
(D1)
(D1)
θJJ--AA(typ) 200°C/W
θ
(typ) 125-200°C/W
θJ-A(max) 2.0°C/W
θJJ--CS(typ) 6.3°C/W
Electrical Characteristics @ TA = 25 oC (3)
Unless otherwise noted, 4.5V ≤ VCC ≤ 30V .
All voltage measurements with respect to GND. IXD_509 configured as described in Test Conditions. (4)
Symbol Parameter
Test Conditions
Min
Typ
Max
Units
V
2.4
4.5V ≤ VCC ≤ 18V
4.5V ≤ VCC ≤ 18V
VIH
VIL
High input voltage
0.8
VCC + 0.3
10
V
Low input voltage
-5
-10
V
VIN
Input voltage range
Input current
0V ≤ VIN ≤ VCC
µA
V
IIN
VCC - 0.025
VOH
VOL
ROH
ROL
IPEAK
High output voltage
Low output voltage
High state output resistance
Low state output resistance
Peak output current
0.025
1
V
VCC = 18V
VCC = 18V
VCC = 15V
0.6
0.4
Ω
Ω
0.8
9
A
Limited by package power
dissipation
IDC
Continuous output current
2
A
CLOAD =10,000pF VCC=18V
45
40
35
30
30
ns
ns
ns
ns
V
tR
tF
Rise time
25
23
CLOAD =10,000pF VCC=18V
CLOAD =10,000pF VCC=18V
CLOAD =10,000pF VCC=18V
Fall time
18
19
18
tONDLY
On-time propagation delay
tOFFDLY Off-time propagation delay
4.5
VCC
ICC
Power supply voltage
Power supply current
VCC = 18V, VIN =0V
VIN = 3.5V
75
3
75
µA
mA
mA
1
VIN = VCC
IXYS reserves the right to change limits, test conditions, and dimensions.
3
IXDI509 / IXDN509
Electrical Characteristics @ temperatures over -55 oC to 125 oC (3)
Unless otherwise noted, 4.5V ≤ VCC ≤ 30V , Tj < 150oC
All voltage measurements with respect to GND. IXD_502 configured as described in Test Conditions. All specifications are for one channel.
(4)
Symbol Parameter
Test Conditions
Min
Typ
Max
Units
V
VIH
High input voltage
2.4
4.5V ≤ VCC ≤ 18V
4.5V ≤ VCC ≤ 18V
VIL
Low input voltage
Input voltage range
Input current
0.8
VCC + 0.3
10
V
VIN
-5
-10
V
IIN
0V ≤ VIN ≤ VCC
µA
V
VOH
VOL
ROH
ROL
IDC
High output voltage
Low output voltage
VCC – 0.025
0.025
2
V
High state output resistance VCC = 18V
Low state output resistance VCC = 18V
Continuous output current
Ω
Ω
1.5
1
A
tR
Rise time
CLOAD =10,000pF VCC =18V
60
60
55
40
30
ns
ns
ns
ns
V
tF
Fall time
CLOAD =10,000pF VCC =18V
CLOAD =10,000pF VCC =18V
CLOAD =10,000pF VCC =18V
tONDLY
tOFFDLY
VCC
ICC
On-time propagation delay
Off-time propagation delay
Power supply voltage
Power supply current
4.5
18
VCC =18V, VIN = 0V
0.13
3
0.13
µA
mA
mA
VIN = 3.5V
VIN = VCC
Notes:
1. Operating the device beyond the parameters listed as “Absolute Maximum Ratings” may cause permanent damage
to the device. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
2. The device is not intended to be operated outside of the Operating Ratings.
3. Electrical Characteristics provided are associated with the stated Test Conditions.
4. Typical values are presented in order to communicate how the device is expected to perform, but not necessarily to
highlight any specific performance limits within which the device is guaranteed to function.
* The following notes are meant to define the conditions for the θJ-A, θJ-C and θJ-S values:
1) TheθJ-A (typ)isdefinedasjunctiontoambient. TheθJ-A ofthestandardsingledie8-LeadPDIPand8-LeadSOICaredominatedbythe
resistanceofthepackage,andtheIXD_5XXaretypical. Thevaluesforthesepackagesarenaturalconvectionvalueswithverticalboards
and the values would be lower with forced convection. For the 6-Lead DFN package, the θJ-A value supposes the DFN package is
soldered on a PCB. The θJ-A (typ) is 200 °C/W with no special provisions on the PCB, but because the center pad provides a low
thermal resistance to the die, it is easy to reduce the θJ-A by adding connected copper pads or traces on the PCB. These can reduce
the θJ-A (typ) to 125 °C/W easily, and potentially even lower. The θJ-A for DFN on PCB without heatsink or thermal management will
vary significantly with size, construction, layout, materials, etc. This typical range tells the user what he is likely to get if he does no
thermalmanagement.
2) θJ-C (max) is defined as juction to case, where case is the large pad on the back of the DFN package. The θJ-C values are generally not
publishedforthePDIPandSOICpackages. TheθJ-CfortheDFNpackagesareimportanttoshowthelowthermalresistancefromjunctionto
thedieattachpadonthebackoftheDFN, --andaguardbandhasbeenaddedtobesafe.
3) TheθJ-S (typ)isdefinedasjunctiontoheatsink,wheretheDFNpackageissolderedtoathermalsubstratethatismountedonaheatsink.
Thevaluemustbetypicalbecausethereareavarietyofthermalsubstrates. ThisvaluewascalculatedbasedoneasilyavailableIMSinthe
U.S.orEurope,andnotapremiumJapaneseIMS. A4mildialectricwithathermalconductivityof2.2W/mCwasassumed. Theresultwas
given as typical, and indicates what a user would expect on a typical IMS substrate, and shows the potential low thermal resistance for the
DFNpackage.
4
Copyright © 2007 IXYS CORPORATION All rights reserved
IXDI509 / IXDN509
Pin Description
PIN
1, 8
2
SYMBOL
FUNCTION
Supply Voltage
Input
DESCRIPTION
Power supply input voltage. These pins provide power to the
entire device. The range for this voltage is 4.5V to 30V.
Input drive signal, TTL or CMOS compatible.
V
CC
IN
Driver output. For application purposes, these pins are
connected, through a resistor, to the gate of a MOSFET/IGBT.
The device ground pins. Internally connected to all circuitry,
these pins provide ground reference for the entire chip and
should be connected to a low noise analog ground plane for
optimum performance.
6, 7
OUT
GND
Output
4, 6
Ground
CAUTION: Follow proper ESD procedures when handling and assembling this component.
PinConfigurations
8 PIN DIP (PI)
8 PIN DIP (PI)
8 PIN SOIC (SIA)
8 PIN SOIC (SIA)
1
2
8
7
6
5
1
2
8
7
6
5
VCC
OUT
OUT
GND
VCC
OUT
OUT
GND
I
I
VCC
IN
VCC
IN
X
D
I
5
0
9
X
D
N
5
0
9
3
3
N/C
N/C
4
4
GND
GND
6LEADDFN(D1)
(Bottom View)
6LEADDFN(D1)
(Bottom View)
I
I
6
5
4
IN
6
5
4
IN
VCC
1
2
3
VCC
1
2
3
X
D
I
5
0
9
X
D
N
5
0
9
OUT
GND
N/C
GND
OUT
GND
N/C
GND
NOTE: Solder tabs on bottom of DFN packages are grounded
Figure 3 - Characteristics Test Diagram
5.0V
Vcc
10uF
0V
IXDI414
0V
IXDI509
Vcc
0V
IXDN509
C
LOAD
Agilent 1147A
Current Probe
5
IXDI509 / IXDN509
Figure 4 - Timing Diagrams
Inverting (IXDI509) Timing Diagram
5V
90%
2.5V
INPUT
10%
0V
PWMIN
tONDLY
tOFFDLY
tF
tR
VCC
90%
OUTPUT
10%
0V
Non-Inverting (IXDN509) Timing Diagram
5V
90%
INPUT
2.5V
10%
0V
PWMIN
tOFFDLY
tONDLY
tR
t
F
Vcc
90%
OUTPUT
10%
0V
IXYS reserves the right to change limits, test conditions, and dimensions.
6
Copyright © 2007 IXYS CORPORATION All rights reserved
IXDI509 / IXDN509
Typical Performance Characteristics
Fig. 5
Fig. 6
Rise Time vs. Supply Voltage
Fall Time vs. Supply Voltage
35
35
30
25
20
15
10
5
30
25
20
15
10
5
10000pF
5400pF
10000pF
5400pF
1000pF
100pF
1000pF
100pF
0
0
0
0
5
10
15
20
25
30
35
5
10
15
20
25
30
35
Supply Voltage (V)
Supply Voltage (V)
Fig. 7
Fig. 8
Rise / Fall Time vs. Temperature
VSUPPLY = 15V CLOAD = 1000pF
Rise Time vs. Capacitive Load
8
7
6
5
4
3
2
1
35
5V
30
25
20
15
10
5
15V
30V
0
0
-50
0
50
100
150
100
1000
10000
Load Capacitance (pF)
Temperature (C)
Fig. 10
Fig. 9
Fall Time vs. Capacitive Load
Input Threshold Levels vs. Supply Voltage
2.5
2
35
30
25
20
15
10
5
5V
Positive going input
15V
30V
1.5
1
Negative going input
0.5
0
0
100
1000
10000
0
5
10
15
20
25
30
35
Load Capacitance (pF)
Supply Voltage (V)
7
IXDI509 / IXDN509
Fig. 12
Fig. 11
Propagation Delay vs. Supply Voltage
Rising Input, CLOAD = 1000pF
Input Threshold Levels vs. Temperature
VSUPPLY = 15V
3
40
35
30
25
20
15
10
5
2.5
2
1.5
1
Positive going input
Negative going input
0.5
0
0
0
5
10
15
20
25
30
35
-50
0
50
100
150
Temperature (C)
Supply Voltage (V)
Fig. 14
Fig. 13
Propagation Delay vs. Temperature
VSUPPLY = 15V CLOAD = 1000pF
Propagation Delay vs. Supply Voltage
Falling Input, CLOAD = 1000pF
35
30
25
20
15
10
5
50
45
40
35
30
25
20
15
10
5
Negative going input
Positve going input
0
0
-50
0
50
100
150
0
5
10
15
20
25
30
35
Temeprature (C)
Supply Voltage (V)
Fig. 16
Quiescent Current vs. Temperature
VSUPPLY = 15V
Fig. 15
Quiescent Current vs. Supply Voltage
10000
1000
100
10
1000
Inverting / Non-inverting, Input= "1"
100
10
Inverting / Non-Inverting
Input = "1"
Inverting, Input= "0"
Inverting
Input = "0"
1
Non-inverting, Input= "0"
1
Non-inverting
Input = "0"
0.1
0.01
0.1
0.01
-50
0
50
100
150
0
5
10
15
20
25
30
35
Temperature (C)
Supply Voltage (V)
8
Copyright © 2007 IXYS CORPORATION All rights reserved
IXDI509 / IXDN509
Fig. 18
Fig. 17
Supply Current vs. Frequency
VSUPPLY = 5V
Supply Current vs. Capacitive Load
VSUPPLY = 5V
2MHz
1MHz
100
100
10000pF
5400pF
1000pF
100pF
10
1
10
1
100kHz
10kHz
0.1
0.1
0.01
0.01
10
100
1000
10000
100
1000
10000
Frequency (kHz)
Load Capacitance (pF)
Fig. 19
Fig. 20
Supply Current vs. Frequency
SUPPLY = 15V
Supply Current vs. Capacitive Load
V
VSUPPLY = 15V
1000
100
10
1000
10000pF
5400pF
2MHz
1MHz
100
10
1
1000pF
100pF
100kHz
10kHz
1
0.1
0.1
100
1000
10000
10
100
1000
10000
Load Capacitance (pF)
Frequency (kHz)
Fig. 21
Fig. 22
Supply Current vs. Capacitive Load
VSUPPLY = 30V
Supply Current vs. Frequency
VSUPPLY = 30V
1000
1000
2MHz
1MHz
10000pF
5400pF
1000pF
100pF
100
10
1
100
10
1
100kHz
10kHz
0.1
0.1
100
1000
10000
10
100
1000
10000
Load Capacitance (pF)
Frequency (kHz)
9
IXDI509 / IXDN509
Fig. 24
Fig. 23
Output Sink Current vs. Supply Voltage
Output Source Current vs. Supply Voltage
0
25
-5
-10
-15
-20
-25
20
15
10
5
0
0
5
10
15
20
25
30
35
0
5
10
15
20
25
30
35
Supply Voltage (V)
Supply Voltage (V)
Fig. 25
Fig. 26
Output Source Current vs. Temperature
VSUPPLY = 15V
Output Sink Current vs. Temperature
VSUPPLY = 15V
12
10
8
0
-2
-4
-6
6
-8
4
-10
-12
-14
2
0
-50
0
50
100
150
-50
0
50
100
150
Temperature (C)
Temperature (C)
Fig. 28
Fig. 27
Low State Output Resistance vs. Supply Voltage
High State Output Resistance vs. Supply Voltage
1.4
1.2
1
1.2
1
0.8
0.6
0.4
0.2
0
0.8
0.6
0.4
0.2
0
0
5
10
15
20
25
30
35
0
5
10
15
20
25
30
35
Supply Voltage (V)
Supply Voltage (V)
10
Copyright © 2007 IXYS CORPORATION All rights reserved
IXDI509 / IXDN509
Supply Bypassing, Grounding Practices And Output Lead inductance
When designing a circuit to drive a high speed MOSFET
utilizing the IXD_509, it is very important to observe certain
design criteria in order to optimize performance of the driver.
Particular attention needs to be paid to Supply Bypassing,
Grounding, and minimizing the Output Lead Inductance.
Say, forexample, weareusingtheIXD_509tochargea5000pF
capacitive load from 0 to 25 volts in 25ns.
Using the formula: IC=C(∆V/∆t), where ∆V=25V C=5000pF &
∆t=25ns, we can determine that to charge 5000pF to 25 volts
in25ns willtakeaconstantcurrentof5A. (Inreality,thecharging
current won’t be constant, and will peak somewhere around
8A).
SUPPLYBYPASSING
In order for our design to turn the load on properly, the IXD_509
must be able to draw this 5A of current from the power supply
in the 25ns. This means that there must be very low impedance
between the driver and the power supply. The most common
method of achieving this low impedance is to bypass the power
supply at the driver with a capacitance value that is an order of
magnitude larger than the load capacitance. Usually, this
would be achieved by placing two different types of bypassing
capacitors, with complementary impedance curves, very close
to the driver itself. (These capacitors should be carefully
selected and should have low inductance, low resistance and
high-pulse current-service ratings). Lead lengths may radiate
at high frequency due to inductance, so care should be taken
to keep the lengths of the leads between these bypass
capacitors and the IXD_509 to an absolute minimum.
GROUNDING
In order for the design to turn the load off properly, the IXD_509
must be able to drain this 5A of current into an adequate
grounding system. There are three paths for returning current
that need to be considered: Path #1 is between the IXD_509
and its load. Path #2 is between the IXD_509 and its power
supply. Path #3 is between the IXD_509 and whatever logic is
driving it. All three of these paths should be as low in resistance
and inductance as possible, and thus as short as practical. In
addition, every effort should be made to keep these three
ground paths distinctly separate. Otherwise, the returning
ground current from the load may develop a voltage that would
have a detrimental effect on the logic line driving the IXD_509.
OUTPUTLEADINDUCTANCE
Of equal importance to Supply Bypassing and Grounding are
issues related to the Output Lead Inductance. Every effort
should be made to keep the leads between the driver and its
load as short and wide as possible. If the driver must be placed
farther than 0.2” (5mm) from the load, then the output leads
should be treated as transmission lines. In this case, a twisted-
pair should be considered, and the return line of each twisted
pair should be placed as close as possible to the ground pin
of the driver, and connected directly to the ground terminal of the
load.
11
IXDI509 / IXDN509
A2
b
b2
b3
c
D
D1
E
E1
e
eA
eB
L
E
H
B
C
D
E
e
H
h
L
M
N
D
A
A1
e
B
h X 45
N
L
C
M
0.035 [0.90]
0.137 [3.48]
0.197±0.005 [5.00±0.13]
IXYS Corporation
3540 Bassett St; Santa Clara, CA 95054
Tel: 408-982-0700; Fax: 408-496-0670
e-mail: sales@ixys.net
www.ixys.com
S0.002^0.000;
o
[S0.05^0.00;o
]
0.018 [0.47]
0.100 [2.54]
IXYS Semiconductor GmbH
Edisonstrasse15 ; D-68623; Lampertheim
Tel: +49-6206-503-0; Fax: +49-6206-503627
e-mail: marcom@ixys.de
12
Copyright © 2007 IXYS CORPORATION All rights reserved
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