IXDD509D1TR [IXYS]
9 Ampere Low-Side Ultrafast MOSFET Drivers with Enable for fast, controlled shutdown;
| 型号： | IXDD509D1TR |
| 厂家： | 
IXYS CORPORATION |
| 描述： | 9 Ampere Low-Side Ultrafast MOSFET Drivers with Enable for fast, controlled shutdown |
| 文件： | 总14页 (文件大小：407K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IXDD509 / IXDE509
9 Ampere Low-Side Ultrafast MOSFET Drivers
with Enable for fast, controlled shutdown
Features
General Description
• Built using the advantages and compatibility
of CMOS and IXYS HDMOSTM processes
• Latch-Up Protected up to 9 Amps
• High 9A peak output current
• Wide operating range: 4.5V to 30V
• -55°Cto+125°CExtendedoperating
temperature
• Ability to disable output under faults
• High capacitive load drive capability:
1800pF in <15ns
TheIXDD509andIXDE509arehighspeedhighcurrentgate
drivers specifically designed to drive the largest IXYS
MOSFETs & IGBTs to their minimum switching time and
maximumparcticalfrequencylimits. TheIXDD509and
IXDE509 can source and sink 9 Amps of Peak Current
while producing voltage rise and fall times of less than
30ns. The inputs of the Drivers are compatible with TTL or
CMOS and are virtually immune to latch up over the entire
operatingrange.Patented*designinnovationseliminate
crossconductionandcurrent"shoot-through".Improved
speedanddrivecapabilitiesarefurtherenhancedby
matched rise and fall times.
• Matched rise and fall times
• Low propagation delay time
• Lowoutputimpedance
TheIXDD509andIXDE509incorporateauniqueabilityto
disable the output under fault conditions. When a logical
low is forced into the Enable input, both final output stage
MOSFETs, (NMOS and PMOS) are turned off. As a result,
the output of the IXDD509 or IXDE509 enters a tristate high
impedance mode and with additional circuitry, achieves a
Soft Turn-Off of the MOSFET/IGBT when a short circuit is
detected. This helps prevent damage that could occur to
the MOSFET/IGBT if it were to be switched off abruptly due
toadv/dtover-voltagetransient.
• Low supply current
Applications
• DrivingMOSFETsandIGBTs
• Limiting di/dt under short circuit
• Motorcontrols
• Linedrivers
• Pulsegenerators
• Local power ON/OFF switch
• Switch mode power supplies (SMPS)
• DCtoDCconverters
• Pulsetransformerdriver
• Class D switching amplifiers
• Powerchargepumps
TheIXDD509andIXDE509areavailableinthe8-PinP-DIP
(PI) package, the 8-Pin SOIC (SIA) package, and the 6-
Lead DFN (D1) package, (which occupies less than 65% of
the board area of the 8-Pin SOIC).
*United States Patent 6,917,227
OrderingInformation
Package
Type
Pack
Qty
50
94
2500
56
2500
50
94
2500
56
2500
Part Number
Description
Packing Style
Tube
Configuration
IXDD509PI
IXDD509SIA
IXDD509SIAT/R 9A Low Side Gate Driver I.C.
IXDD509D1
IXDD509D1T/R
IXDE509PI
IXDE509SIA
IXDE509SIAT/R 9A Low Side Gate Driver I.C.
9A Low Side Gate Driver I.C.
9A Low Side Gate Driver I.C.
8-Pin PDIP
8-Pin SOIC
8-Pin SOIC
6-Lead DFN
6-Lead DFN
8-Pin PDIP
8-Pin SOIC
8-Pin SOIC
6-Lead DFN
6-Lead DFN
Tube
Non-Inverting
with Enable
13” Tape and Reel
2” x 2” Waffle Pack
13” Tape and Reel
Tube
9A Low Side Gate Driver I.C.
9A Low Side Gate Driver I.C.
9A Low Side Gate Driver I.C.
9A Low Side Gate Driver I.C.
Tube
Inverting
with Enable
13” Tape and Reel
2” x 2” Waffle Pack
13” Tape and Reel
IXDE509D1
IXDE509D1T/R
9A Low Side Gate Driver I.C.
9A Low Side Gate Driver I.C.
NOTE: All parts are lead-free and RoHS Compliant
Copyright © 2007 IXYS CORPORATION All rights reserved
DS99679A(10/07)
First Release
IXDD509 / IXDE509
Figure 1 - IXDD509 9A Non-Inverting Gate Driver Functional Block Diagram
Vcc
Vcc
200K
P
N
ANTI-CROSS
CONDUCTION
OUT
GND
IN
CIRCUIT
*
EN
GND
Figure 2 - IXDE509 Inverting 9A Gate Driver Functional Block Diagram
Vcc
Vcc
200K
P
N
ANTI-CROSS
CONDUCTION
OUT
GND
IN
CIRCUIT *
*
EN
GND
* United States Patent 6,917,227
2
Copyright © 2007 IXYS CORPORATION All rights reserved
IXDD509 / IXDE509
Operating Ratings (2)
Absolute Maximum Ratings (1)
Parameter
Value
Parameter
Value
Supply Voltage
All Other Pins (unless specified
otherwise)
JunctionTemperature
StorageTemperature
LeadTemperature(10Sec)
35 V
Operating Supply Voltage
OperatingTemperatureRange
PackageThermalResistance*
4.5V to 30V
-55 °C to 125°C
-0.3 V to VCC + 0.3V
150 °C
-65 °C to 150 °C
300°C
8-PinPDIP
(PI)
θ
(typ) 125°C/W
8-PinSOIC
6-LeadDFN
6-LeadDFN
6-LeadDFN
(SIA)
(D1)
(D1)
(D1)
θJJ--AA(typ) 200°C/W
θ
(typ) 125-200°C/W
θJ-A(max) 2.0°C/W
θJJ--CS(typ) 6.3°C/W
Electrical Characteristics @ TA = 25o C (3)
Unless otherwise noted, 4.5V ≤ VCC ≤ 30V .
All voltage measurements with respect to GND. IXD_509 configured as described in Test Conditions.
(4)
Symbol
VIH, VENH
VIL, VENL
VIN
Parameter
Test Conditions
Min
Typ
Max
Units
V
High input & EN voltage
Low input & EN voltage
Input voltage range
Enable voltage range
Input current
2.4
4.5V ≤ VCC ≤ 18V
4.5V ≤ VCC ≤ 18V
0.8
VCC + 0.3
VCC + 0.3
10
V
-5
-.3
V
VEN
V
IIN
-10
0V ≤ VIN ≤ VCC
µA
V
VOH
High output voltage
Low output voltage
VCC - 0.025
VOL
0.025
1
V
ROH
High state output
resistance
Ω
VCC = 18V
0.6
ROL
Low state output
resistance
Peak output current
Ω
A
A
VCC = 18V
VCC = 15V
0.4
9
0.8
IPEAK
IDC
Limited by package power
dissipation
Continuous output current
2
tR
Rise time
Fall time
CLOAD =10,000pF VCC =18V
ns
ns
25
23
45
40
tF
CLOAD =10,000pF VCC =18V
tONDLY
On-time propagation
delay
Off-time propagation
delay
Enable to output high
delay time
Disable to output high
impedance delay time
Power supply voltage
C
LOAD =10,000pF VCC =18V
LOAD =10,000pF VCC =18V
18
35
ns
tOFFDLY
tENOH
tDOLD
C
19
25
30
50
ns
ns
VCC =18V
VCC =18V
60
18
80
30
ns
V
VCC
ICC
4.5
Power supply current
VCC = 18V, VIN = 0V
75
3
75
µA
mA
mA
VIN = 3.5V
VIN = VCC
1
IXYS reserves the right to change limits, test conditions, and dimensions.
3
IXDD509 / IXDE509
Electrical Characteristics @ temperatures over -55 oC to 125 oC (3)
Unless otherwise noted, 4.5V ≤ VCC ≤ 30V , Tj < 150oC
All voltage measurements with respect to GND. IXD_502 configured as described in Test Conditions. All specifications are for one channel.
(4)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
VIH
VIL
High input voltage
Low input voltage
Input voltage range
Input current
2.4
V
V
4.5V ≤ VCC ≤ 18V
4.5V ≤ VCC ≤ 18V
0.8
CC + 0.3
10
-5
V
V
µA
V
VIN
IIN
-10
0V ≤ VIN ≤ VCC
V
CC - 0.025
VOH
VOL
High output voltage
Low output voltage
0.025
2
V
High state output
resistance
Low state output
resistance
Continuous output
current
VCC = 18V
VCC = 18V
Ω
ROH
ROL
IDC
Ω
1.5
1
A
60
60
ns
ns
ns
tR
tF
Rise time
Fall time
CLOAD =10,000pF VCC =18V
CLOAD =10,000pF VCC =18V
On-time propagation
delay
Off-time propagation
delay
Enable to output high
delay time
Disable to output high
impedance delay time
tONDLY
tOFFDLY
tENOH
CLOAD =10,000pF VCC =18V
55
ns
ns
ns
V
CLOAD =10,000pF VCC =18V
40
60
V
CC = 18V
CC = 18V
100
tDOLD
V
4.5
18
30
VCC
ICC
Power supply voltage
Power supply current
VCC = 18V, VIN = 0V
0.13
3
0.13
µA
mA
mA
VIN = 3.5V
VIN = VCC
Notes:
1. Operating the device beyond the parameters listed as “Absolute Maximum Ratings” may cause permanent
damage to the device. Exposure to absolute maximum rated conditions for extended periods may affect device
reliability.
2. The device is not intended to be operated outside of the Operating Ratings.
3. Electrical Characteristics provided are associated with the stated Test Conditions.
4. Typical values are presented in order to communicate how the device is expected to perform, but not necessarily
to highlight any specific performance limits within which the device is guaranteed to function.
* The following notes are meant to define the conditions for the θJ-A, θJ-C and θJ-S values:
1) TheθJ-A (typ)isdefinedasjunctiontoambient. TheθJ-A ofthestandardsingledie8-LeadPDIPand8-LeadSOICaredominatedbythe
resistanceofthepackage,andtheIXD_5XXaretypical. Thevaluesforthesepackagesarenaturalconvectionvalueswithverticalboards
and the values would be lower with forced convection. For the 6-Lead DFN package, the θJ-A value supposes the DFN package is
soldered on a PCB. The θJ-A (typ) is 200 °C/W with no special provisions on the PCB, but because the center pad provides a low
thermal resistance to the die, it is easy to reduce the θJ-A by adding connected copper pads or traces on the PCB. These can reduce
the θJ-A (typ) to 125 °C/W easily, and potentially even lower. The θJ-A for DFN on PCB without heatsink or thermal management will
vary significantly with size, construction, layout, materials, etc. This typical range tells the user what he is likely to get if he does no
thermalmanagement.
2) θJ-C (max) is defined as juction to case, where case is the large pad on the back of the DFN package. The θJ-C values are generally not
publishedforthePDIPandSOICpackages. TheθJ-CfortheDFNpackagesareimportanttoshowthelowthermalresistancefromjunctionto
thedieattachpadonthebackoftheDFN, --andaguardbandhasbeenaddedtobesafe.
3) TheθJ-S (typ)isdefinedasjunctiontoheatsink,wheretheDFNpackageissolderedtoathermalsubstratethatismountedonaheatsink.
Thevaluemustbetypicalbecausethereareavarietyofthermalsubstrates. ThisvaluewascalculatedbasedoneasilyavailableIMSinthe
U.S.orEurope,andnotapremiumJapaneseIMS. A4mildialectricwithathermalconductivityof2.2W/mCwasassumed. Theresultwas
given as typical, and indicates what a user would expect on a typical IMS substrate, and shows the potential low thermal resistance for the
DFNpackage.
4
Copyright © 2007 IXYS CORPORATION All rights reserved
IXDD509 / IXDE509
PinDescription
PIN
1,8
2
SYMBOL
FUNCTION
Supply Voltage
Input
DESCRIPTION
Power supply input voltage. These pins provide power to
the entire device. The range for this voltage is from 4.5V to
30V.
V
CC
IN
Input signal-TTL or CMOS compatible.
The device ENABLE pin. This pin, when driven low,
disables the chip, forcing a high impedance state at the
output. EN can be pulled high by a resistor.
3
EN
Enable
Driver Output. For application purposes, these pins are
connected, through a resistor, to Gate of a MOSFET/IGBT.
The device ground pins. Internally connected to all circuitry,
these pins provide ground reference for the entire chip and
should be connected to a low noise analog ground plane for
optimum performance.
6,7
4,8
OUT
Output
GND
Ground
CAUTION: Follow proper ESD procedures when handling and assembling this component.
PINCONFIGURATIONS
8 PIN DIP (PI)
8 PIN DIP (PI)
8 PIN SOIC (SIA)
8 PIN SOIC (SIA)
1
2
8
7
6
5
1
2
8
7
6
VCC
OUT
OUT
GND
VCC
OUT
OUT
GND
I
I
VCC
IN
VCC
IN
X
D
E
5
0
9
X
D
D
5
0
9
3
3
EN
EN
4
4
GND
GND
5
6LEADDFN(D1)
(Bottom View)
6LEADDFN(D1)
(Bottom View)
I
I
6
5
4
IN
6
5
4
IN
VCC
1
2
3
VCC
1
2
3
X
D
E
5
0
9
X
D
D
5
0
9
OUT
GND
EN
OUT
GND
EN
GND
GND
NOTE: Solder tabs on bottoms of DFN packages are grounded
Figure 3 - Characteristics Test Diagram
IN
V
OUT
Vcc
V
5V
0V
IXDD
0V
Vcc
8
7
6
5
1
2
3
4
0V
Vcc
0.01uf
IXDE
10uf
Agilent 1147A
Current Probe
VIN
CLOAD
IXYS reserves the right to change limits, test conditions, and dimensions.
5
IXDD509 / IXDE509
Figure 4 - Timing Diagrams
Non-Inverting (IXDD509) Timing Diagram
5V
90%
INPUT
2.5V
10%
0V
PWMIN
tOFFDLY
tONDLY
tR
t
F
Vcc
90%
OUTPUT
10%
0V
Inverting (IXDE509) Timing Diagram
5V
90%
2.5V
INPUT
10%
0V
PWMIN
tONDLY
tOFFDLY
tF
tR
VCC
90%
OUTPUT
10%
0V
6
Copyright © 2007 IXYS CORPORATION All rights reserved
IXDD509 / IXDE509
Typical Performance Characteristics
Fig. 6
Fig. 5
Rise Time vs. Supply Voltage
Fall Time vs. Supply Voltage
35
35
30
25
20
15
10
5
30
25
20
15
10
5
10000pF
5400pF
10000
5400p
1000
100
1000pF
100pF
0
0
0
0
5
10
15
20
25
30
35
5
10
15
20
25
30
35
Supply Voltage (V)
SupplyVoltage(V)
Fig. 7
Rise / Fall Time vs. Temperature
SUPPLY = 15V CLOAD = 1000pF
Fig. 8
V
Rise Time vs. Capacitive Load
35
30
25
20
15
10
5
8
7
6
5
4
3
2
1
0
5V
15V
30V
0
-50
0
50
100
150
100
1000
10000
Load Capacitance (pF)
Temperature (C)
Fig. 9
Fig. 10
Fall Time vs. Capacitive Load
Input Threshold Levels vs. Supply Voltage
2.5
35
30
25
20
15
10
5
2
1.5
1
Positive going input
Negative going input
15V
30
0.5
0
0
0
100
1000
10000
5
10
15
20
25
30
35
Load Capacitance (pF)
Supply Voltage (V)
IXYS reserves the right to change limits, test conditions, and dimensions.
7
IXDD509 / IXDE509
Fig. 12
Fig. 11
Propagation Delay vs. Supply Voltage
Rising Input, CLOAD = 1000pF
Input Threshold Levels vs. Temperature
VSUPPLY = 15V
3
2.5
2
40
35
30
25
20
15
10
5
Positive going input
Negative going input
1.5
1
0.5
0
0
0
5
10
15
20
25
30
35
-50
0
50
100
150
Temperature (C)
Supply Voltage (V)
Propagation Delay vs. Temperature
Fig. 14
Fig. 13
Propagation Delay vs. Supply Voltage
Falling Input, CLOAD = 1000pF
VSUPPLY = 15V CLOAD = 1000pF
50
45
40
35
30
25
20
15
10
5
35
30
25
20
15
10
5
Negative going input
Positve going input
0
0
0
5
10
15
20
25
30
35
-50
0
50
100
150
Supply Voltage (V)
Temeprature (C)
Fig. 16
Fig. 15
Quiescent Current vs. Temperature
VSUPPLY = 15V
Quiescent Current vs. Supply Voltage
10000
1000
100
10
Inverting / Non-inverting, Input= "1"
1000
100
10
Inverting / Non-Inverting
Input = "1"
Inverting, Input= "0"
Inverting
Input = "0"
1
Non-inverting, Input= "0"
1
Non-inverting
Input = "0"
0.1
0.01
0.1
0.01
-50
0
50
100
150
0
5
10
15
20
25
30
35
Supply Voltage (V)
Temperature (C)
8
Copyright © 2007 IXYS CORPORATION All rights reserved
IXDD509 / IXDE509
Fig. 17
Fig. 18
Supply Current vs. Capacitive Load
VSUPPLY = 5V
Supply Current vs. Frequency
VSUPPLY = 5V
100
10000pF
5400pF
2MHz
1MHz
100
1000pF
100pF
10
1
10
1
100kH
10 k Hz
0.1
0.1
0.01
0.01
100
1000
10000
10
100
1000
10000
Load Capacitance (pF)
Frequency (kHz)
Fig. 19
Fig. 20
Supply Current vs. Frequency
Supply Current vs. Capacitive Load
VSUPPLY = 15V
VSUPPLY = 15V
1000
1000
10000pF
5400pF
2M Hz
1M Hz
100
10
1
100
10
1000pF
100pF
10 0 k Hz
10 k Hz
1
0.1
100
1000
10000
0.1
10
100
1000
10000
Load Capacitance (pF)
Frequency (kHz)
Supply Current vs. Frequency
SUPPLY = 30V
Fig. 22
Fig. 21
SupplyCurrent vs. CapacitiveLoad
V
VSUPPLY= 30V
1000
1000
2MHz
1MHz
10000pF
5400pF
1000pF
100pF
100
10
1
100
10
1
100kHz
10kHz
0.1
10
0.1
100
1000
10000
100
1000
10000
Frequency (kHz)
Load Capacitance (pF)
IXYS reserves the right to change limits, test conditions, and dimensions.
9
IXDD509 / IXDE509
Fig. 24
Fig. 23
Output Sink Current vs. Supply Voltage
Output Source Current vs. Supply Voltage
0
25
20
15
10
5
-5
-10
-15
-20
-25
0
0
5
10
15
20
25
30
35
0
5
10
15
20
25
30
35
Supply Voltage (V)
Supply Voltage (V)
Output Sink Current vs. Temperature
VSUPPLY = 15V
Fig. 25
Output Source Current vs. Temperature
VSUPPLY = 15V
Fig. 26
12
10
8
0
-2
-4
-6
6
-8
4
-10
-12
-14
2
0
-50
0
50
100
150
-50
0
50
100
150
Temperature (C)
Temperature (C)
Fig. 28
Fig. 27
Low State Output Resistance vs. Supply Voltage
High State Output Resistance vs. Supply Voltage
1.2
1.4
1.2
1
1
0.8
0.6
0.4
0.2
0
0.8
0.6
0.4
0.2
0
0
5
10
15
20
25
30
35
0
5
10
15
20
25
30
35
Supply Voltage (V)
Supply Voltage (V)
10
Copyright © 2007 IXYS CORPORATION All rights reserved
IXDD509 / IXDE509
Fig. 29
Fig. 30
ENABLE Threshold vs. Temperature
VSUPPLY = 15V
ENABLE Threshold vs. Supply Voltage
2.5
2
1.8
1.6
1.4
1.2
1
2
1.5
1
0.8
0.6
0.4
0.2
0
0.5
0
0
5
10
15
20
25
30
35
-50
0
50
100
150
Supply Voltage (V)
Temperature (C)
Fig. 31
Fig. 32
ENABLE Propagation vs. Temperature
VSUPPLY = 15V
ENABLE Propagation Time vs. Supply Voltage
100
90
80
70
60
50
40
30
20
10
0
160
140
120
100
80
Negative going ENABLE to high impedance state
Negative going ENABLE to high impedance state
60
40
Positive going ENABLE to output ON
Positve going ENABLE to output ON
20
0
0
5
10
15
20
25
30
35
-50
0
50
100
150
Supply Voltage (V)
Temperature (C)
Figure 33 - Typical Application Short Circuit di/dt Limit
IXYS reserves the right to change limits, test conditions, and dimensions. 11
IXDD509 / IXDE509
APPLICATIONS INFORMATION
Short Circuit di/dt Limit
by the inductance of the wire connecting the source resistor to
ground. (Those glitches might cause false triggering of the
comparator).
A short circuit in a high-power MOSFET module such as the
VM0580-02F, (580A, 200V), as shown in Figure 27, can cause
the current through the module to flow in excess of 1500A for
10µs or more prior to self-destruction due to thermal runaway.
For this reason, some protection circuitry is needed to turn off
the MOSFET module. However, if the module is switched off
too fast, there is a danger of voltage transients occuring on the
drain due to Ldi/dt, (where L represents total inductance in
series with drain). If these voltage transients exceed the
MOSFET's voltage rating, this can cause an avalanche break-
down.
The comparator's output should be connected to a SRFF(Set
Reset Flip Flop). The flip-flop controls both the Enable signal,
andthelowpowerMOSFETgate. PleasenotethatCMOS4000-
series devices operate with a VCC range from 3 to 15 VDC, (with
18 VDC being the maximum allowable limit).
A low power MOSFET, such as the 2N7000, in series with a
resistor, will enable the VMO580-02F gate voltage to drop
gradually. The resistor should be chosen so that the RC time
constant will be 100us, where "C" is the Miller capacitance of
theVMO580-02F.
TheIXDD509andIXDE509havetheuniquecapabilitytosoftly
switch off the high-power MOSFET module, significantly
reducing these Ldi/dt transients.
For resuming normal operation, a Reset signal is needed at
the SRFF's input to enable the IXDD509/IXDE509 again. This
Reset can be generated by connecting a One Shot circuit
between the IXDD509/IXDE509 Input signal and the SRFF
restart input. The One Shot will create a pulse on the rise of the
IXDD509/IXDE509 input, and this pulse will reset the SRFF
outputs to normal operation.
Thus, the IXDD509/IXDE509 help to prevent device destruction
from both dangers; over-current, and avalanche breakdown
due to di/dt induced over-voltage transients.
The IXDD509/IXDE509 are designed to not only provide ±9A
under normal conditions, but also to allow their outputs to go
intoahighimpedancestate.ThispermitstheIXDD509/IXDE509
output to control a separate weak pull-down circuit during
detected overcurrent shutdown conditions to limit and sepa-
rately control dVGS/dt gate turnoff. This circuit is shown in Figure
34.
When a short circuit occurs, the voltage drop across the low-
value, current-sensing resistor, (Rs=0.005 Ohm), connected
between the MOSFET Source and ground, increases. This
triggers the comparator at a preset level. The SRFF drives a low
input into the Enable pin disabling the IXDD509/IXDE509
output. The SRFF also turns on the low power MOSFET,
(2N7000).
Referring to Figure 34, the protection circuitry should include
a comparator, whose positive input is connected to the source
of the VM0580-02. A low pass filter should be added to the input
of the comparator to eliminate any glitches in voltage caused
In this way, the high-power MOSFET module is softly turned off
by the IXDD509/IXDE509, preventing its destruction.
Figure 34 - Application Test Diagram
+
VB
Ld
10uH
-
IXDD509/IXDE509
IXDD409
Rd
0.1ohm
VCC
VCCA
Rg
High_Power
VMO580-02F
OUT
IN
EN
1ohm
Rsh
1600ohm
+
-
+
-
VCC
VIN
GND
GND
Rs
Low_Power
2N7002/PLP
Ls
R+
10kohm
20nH
One ShotCircuit
0
Rcomp
5kohm
Comp
LM339
+
V+
NAND
CD4011A
NOT2
CD4049A
C+
100pF
NOT1
CD4049A
V-
-
Ccomp
1pF
Ros
+
-
R
1Mohm
REF
Cos
1pF
Q
NOT3
CD4049A
NOR1
CD4001A
S
EN
NOR2
CD4001A
SR Flip-Flop
12
Copyright © 2007 IXYS CORPORATION All rights reserved
IXDD509 / IXDE509
Supply Bypassing and Grounding Practices, Output Lead inductance
OUTPUTLEADINDUCTANCE
When designing a circuit to drive a high speed MOSFET
utilizing the IXDD509/IXDE509, it is very important to keep
certain design criteria in mind, in order to optimize
performance of the driver. Particular attention needs to be
paidtoSupplyBypassing,Grounding,andminimizingthe
Output Lead Inductance.
Of equal importance to Supply Bypassing and Grounding
are issues related to the Output Lead Inductance. Every
effort should be made to keep the leads between the
driver and it’s load as short and wide as possible. If the
driver must be placed farther than 0.2” from the load, then
the output leads should be treated as transmission
lines. In this case, a twisted-pair should be considered,
and the return line of each twisted pair should be placed
as close as possible to the ground pin of the driver, and
connect directly to the ground terminal of the load.
Say, for example, we are using the IXDD509 to charge a
5000pF capacitive load from 0 to 25 volts in 25ns…
Using the formula: I= C(∆V / ∆t), where ∆V=25V C=5000pF
& ∆t=25ns we can determine that to charge 5000pF to 25
volts in 25ns will take a constant current of 5A. (In reality,
the charging current won’t be constant, and will peak
somewhere around 9A).
SUPPLYBYPASSING
In order for our design to turn the load on properly, the
IXDD509 must be able to draw this 5A of current from the
power supply in the 25ns. This means that there must be
very low impedance between the driver and the power
supply. The most common method of achieving this low
impedance is to bypass the power supply at the driver with
a capacitance value that is a magnitude larger than the
load capacitance. Usually, this would be achieved by
placing two different types of bypassing capacitors, with
complementary impedance curves, very close to the driver
itself. (These capacitors should be carefully selected, low
inductance, low resistance, high-pulse current-service
capacitors). Lead lengths may radiate at high frequency
due to inductance, so care should be taken to keep the
lengths of the leads between these bypass capacitors and
the IXDD509 to an absolute minimum.
GROUNDING
In order for the design to turn the load off properly, the
IXDD509 must be able to drain this 5A of current into an
adequate grounding system. There are three paths for
returning current that need to be considered: Path #1 is
between the IXDD509 and it’s load. Path #2 is between the
IXDD509 and it’s power supply. Path #3 is between the
IXDD509 and whatever logic is driving it. All three of these
paths should be as low in resistance and inductance as
possible, and thus as short as practical. In addition, every
effort should be made to keep these three ground paths
distinctly separate. Otherwise, for instance, the returning
ground current from the load may develop a voltage that
would have a detrimental effect on the logic line driving the
IXDD509.
IXYS reserves the right to change limits, test conditions, and dimensions. 13
IXDD509 / IXDE509
A2
b
b2
b3
c
D
D1
E
E1
e
eA
eB
L
E
H
B
C
D
E
e
H
h
L
M
N
D
A
A1
e
B
h X 45
N
L
C
M
0.035 [0.90]
0.137 [3.48]
0.197±0.005 [5.00±0.13]
IXYS Corporation
3540 Bassett St; Santa Clara, CA 95054
Tel: 408-982-0700; Fax: 408-496-0670
e-mail: sales@ixys.net
www.ixys.com
S0.002^0.000; o
[S0.05^0.00;o
]
0.018 [0.47]
0.100 [2.54]
IXYS Semiconductor GmbH
Edisonstrasse15 ; D-68623; Lampertheim
Tel: +49-6206-503-0; Fax: +49-6206-503627
e-mail: marcom@ixys.de
14
Copyright © 2007 IXYS CORPORATION All rights reserved
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