IS61C25616AL-10TLI [ISSI]
256K x 16 HIGH-SPEED CMOS STATIC RAM; 256K ×16高速CMOS静态RAM
| 型号： | IS61C25616AL-10TLI |
| 厂家： | 
INTEGRATED SILICON SOLUTION, INC |
| 描述： | 256K x 16 HIGH-SPEED CMOS STATIC RAM |
| 文件： | 总17页 (文件大小：208K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS
256K x 16 HIGH-SPEED CMOS STATIC RAM
MARCH2008
FEATURES
DESCRIPTION
The ISSI IS61C25616AL/AS and IS64C25616AL/AS are
high-speed,4,194,304-bitstaticRAMsorganizedas262,144
words by 16 bits. They are fabricated using ISSI's high-
performanceCMOStechnology.Thishighlyreliableprocess
coupled with innovative circuit design techniques, yields
access times as fast as 12 ns with low power consumption.
HIGH SPEED: (IS61/64C25616AL)
• High-speed access time: 10ns, 12 ns
• Low Active Power: 150 mW (typical)
• Low Standby Power: 10 mW (typical)
CMOS standby
LOW POWER: (IS61/64C25616AS)
• High-speed access time: 25 ns
• Low Active Power: 75 mW (typical)
When CE is HIGH (deselected), the device assumes a
standbymodeatwhichthepowerdissipationcanbereduced
down with CMOS input levels.
• Low Standby Power: 1 mW (typical)
CMOS standby
Easy memory expansion is provided by using Chip Enable
andOutputEnableinputs,CEandOE.TheactiveLOWWrite
Enable(WE)controlsbothwritingandreadingofthememory.
A data byte allows Upper Byte (UB) and Lower Byte (LB)
access.
• TTL compatible interface levels
• Single 5V 10ꢀ power supply
• Fully static operation: no clock or refresh
required
The IS61C25616AL/AS and IS64C25616AL/AS are pack-
agedintheJEDECstandard44-pin400-milSOJand44-pin
TSOP (Type II).
• Available in 44-pin SOJ package and
44-pin TSOP (Type II)
• Commercial, Industrial and Automotive tempera-
ture ranges available
• Lead-free available
FUNCTIONAL BLOCK DIAGRAM
256K x 16
MEMORY ARRAY
A0-A17
DECODER
VDD
GND
I/O0-I/O7
Lower Byte
I/O
DATA
COLUMN I/O
CIRCUIT
I/O8-I/O15
Upper Byte
CE
OE
WE
CONTROL
CIRCUIT
UB
LB
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arisingoutoftheapplicationoruseofanyinformation, productsorservicesdescribedherein. Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonany
publishedinformationandbeforeplacingordersforproducts.
Integrated Silicon Solution, Inc. — www.issi.com
1
Rev. C
03/21/2008
IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS
PIN CONFIGURATIONS
44-Pin SOJ
44-Pin TSOP (Type II)
A15
A14
A13
A12
A11
CE
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A0
A15
A14
A13
A12
A11
CE
I/O0
I/O1
I/O2
I/O3
VDD
GND
I/O4
I/O5
I/O6
I/O7
WE
1
2
3
4
5
6
7
8
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A0
A1
A2
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
VDD
I/O11
I/O10
I/O9
I/O8
NC
2
A1
3
A2
4
OE
5
UB
6
LB
I/O0
I/O1
I/O2
I/O3
VDD
GND
I/O4
I/O5
I/O6
I/O7
WE
7
I/O15
I/O14
I/O13
I/O12
GND
VDD
I/O11
I/O10
I/O9
I/O8
NC
8
9
9
10
11
12
13
14
15
16
17
18
19
20
21
22
10
11
12
13
14
15
16
17
18
19
20
21
22
A10
A9
A8
A7
A16
A3
A4
A5
A6
A10
A9
A3
A4
A8
A5
A7
A6
A17
A16
A17
PIN DESCRIPTIONS
A0-A17
I/O0-I/O15
CE
Address Inputs
LB
Lower-byteControl(I/O0-I/O7)
Upper-byteControl(I/O8-I/O15)
NoConnection
DataInputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
UB
NC
OE
VDD
GND
Power
WE
Ground
2
Integrated Silicon Solution, Inc. — www.issi.com
Rev. C
03/21/2008
IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS
TRUTH TABLE
I/O PIN
Mode
WE
CE
OE
LB
UB
I/O0-I/O7
I/O8-I/O15
VDD Current
Not Selected
OutputDisabled
X
H
X
H
L
L
X
H
X
X
X
H
X
X
H
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
ISB1, ISB2
ICC1,ICC2
Read
Write
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
X
X
X
L
H
L
L
H
L
H
L
L
H
L
L
DOUT
High-Z
DOUT
High-Z
DOUT
DOUT
ICC1,ICC2
ICC1,ICC2
DIN
High-Z
DIN
High-Z
DIN
DIN
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameter
Value
–0.5 to +7.0
–65 to +150
1.5
Unit
V
°C
VTERM
TSTG
PT
Terminal Voltage with Respect to GND
StorageTemperature
PowerDissipation
W
IOUT
DCOutputCurrent(LOW)
20
mA
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
CAPACITANCE(1,2)
Symbol
Parameter
Conditions
VIN = 0V
Max.
Unit
pF
CIN
InputCapacitance
OutputCapacitance
5
7
COUT
VOUT = 0V
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: TA = 25°C, f = 1 MHz, VDD = 5.0V.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter
TestConditions
Min.
2.4
Max.
—
Unit
V
VOH
VOL
VIH
VIL
ILI
OutputHIGHVoltage
VDD = Min., IOH = –4.0 mA
VDD = Min., IOL = 8.0 mA
OutputLOWVoltage
Input HIGH Voltage
Input LOW Voltage(1)
InputLeakage
—
0.4
V
2.2
VDD + 0.5
0.8
V
–0.3
V
GND ≤ VIN ≤ VDD
Com.
Ind.
Auto.
–1
–2
–5
1
2
5
µA
ILO
OutputLeakage
GND ≤ VOUT ≤ VDD
OutputsDisabled
Com.
Ind.
Auto.
–1
–2
–5
1
2
5
µA
Note: 1. VIL = –3.0V for pulse width less than 10 ns.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
3
Rev. C
03/21/2008
IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS
OPERATING RANGE: HIGH SPEED OPTION (IS61/64C25616AL)
Range
AmbientTemperature
VDD
Speed(ns)
Commercial
0°C to +70°C
5V 10ꢀ
10
Industrial
-40°Cto+85°C
-40°Cto+125°C
5V 10ꢀ
5V 10ꢀ
10
12
Automotive
OPERATING RANGE: LOW POWER OPTION (IS61/64C25616AS)
Range
AmbientTemperature
VDD
Speed(ns)
Commercial 0°C to +70°C
5V 10ꢀ
25
Industrial
-40°Cto+85°C
-40°Cto+125°C
5V 10ꢀ
5V 10ꢀ
25
25
Automotive
4
Integrated Silicon Solution, Inc. — www.issi.com
Rev. C
03/21/2008
IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS
HIGH SPEED OPTION (IS61/64C25616AL)
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
-10 ns
-12 ns
Symbol Parameter
Test Conditions
Min.
Max.
Min. Max.
Unit
ICC1
VDD Operating
Supply Current
VDD = VDD MAX., CE = VIL
IOUT = 0 mA, f = 0
Com.
Ind.
Auto.
—
—
—
45
50
55
—
—
—
45
50
55
mA
ICC2
VDD Dynamic Operating
Supply Current
VDD = VDD MAX., CE = VIL
IOUT = 0 mA, f = fMAX
Com.
Ind.
—
—
—
50
55
70
—
—
—
45
50
60
mA
mA
mA
Auto.
typ.(2)
30
25
ISB1
ISB2
TTL Standby Current
(TTL Inputs)
VDD = VDD MAX.,
VIN = VIH or VIL
CE ≥ VIH, f = 0
Com.
Ind.
Auto.
—
—
—
15
20
30
—
—
—
15
20
30
CMOS Standby
Current (CMOS Inputs)
VDD = VDD MAX.,
Com.
Ind.
—
—
—
8
12
20
—
—
—
8
12
20
CE
VIN ≥ VDD – 0.2V, or
VIN 0.2V, f = 0
≤
VDD – 0.2V,
Auto.
≤
typ.(2)
2
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
2. Typical values are measured at VDD = 5V, TA = 25oC and not 100ꢀ tested.
LOW POWER OPTION (IS61/64C25616AS)
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
-25 ns
Symbol Parameter
TestConditions
CE=VIL
DD =Max.,
IOUT=0mA,f=0
DD =Max.,CE=VIL
OUT =0mA, f=fMAX
IN =VIH orVIL
Min. Max.
Unit
ICC
Averageoperating
Current
,
Com.
Ind.
Auto.
—
—
—
10
15
20
mA
V
I
CC
1
VDD DynamicOperating
V
I
V
Com.
Ind.
—
—
—
25
30
40
mA
SupplyCurrent
Auto.
typ.(2)
15
I
SB
1
TTLStandbyCurrent
(TTLInputs)
V
DD =Max.,
Com.
Ind.
Auto.
—
—
—
1
1.5
2
mA
mA
V
f=0
IN =VIH orVIL,CE≥VIH
,
ISB
2
CMOSStandby
Current(CMOSInputs)
VDD =Max.,
Com.
Ind.
—
—
—
0.8
0.9
2
CE≥ VDD –0.2V,
V
IN ≥VDD –0.2V,
Auto.
orVIN ≤VSS +0.2V, f=0
typ.(2)
0.2
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
2. Typical values are measured at VDD = 5V, TA = 25oC and not 100ꢀ tested.
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5
Rev. C
03/21/2008
IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-10
Min. Max.
-12
Min.
-25
Min. Max.
Symbol
tRC
Parameter
Max.
—
12
—
12
6
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read Cycle Time
10
—
3
—
10
—
10
5
12
—
3
25
—
3
—
25
—
25
15
8
tAA
Address Access Time
Output Hold Time
tOHA
tACE
CE Access Time
—
—
0
—
—
0
—
—
0
tDOE
OE Access Time
(2)
tHZOE
OE to High-Z Output
OE to Low-Z Output
CE to High-Z Output
CE to Low-Z Output
LB, UB Access Time
LB, UB to High-Z Output
LB, UB to Low-Z Output
5
6
(2)
tLZOE
0
—
5
0
—
6
2
—
8
(2)
tHZCE
0
0
0
(2)
tLZCE
2
—
5
2
—
6
2
—
25
8
tBA
—
0
—
0
—
0
tHZB
tLZB
5
6
0
—
0
—
0
—
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0
to 3.0V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100ꢀ tested.
3. Not 100ꢀ tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Unit
0V to 3.0V
3 ns
Input and Output Timing
andReferenceLevel
1.5V
OutputLoad
See Figures 1 and 2
AC TEST LOADS
480 Ω
480 Ω
5V
5V
OUTPUT
OUTPUT
255 Ω
255 Ω
30 pF
Including
jig and
5 pF
Including
jig and
scope
scope
Figure 1
Figure 2
6
Integrated Silicon Solution, Inc. — www.issi.com
Rev. C
03/21/2008
IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS
AC WAVEFORMS
READ CYCLE NO. 1(1,2) (Address Controlled) (CE = OE = VIL, UB or LB = VIL)
tRC
ADDRESS
tAA
tOHA
tOHA
DATA VALID
DOUT
PREVIOUS DATA VALID
READ1.eps
READ CYCLE NO. 2(1,3)
t
RC
ADDRESS
OE
t
AA
t
OHA
t
HZOE
t
DOE
t
t
LZOE
ACE
CE
t
HZCE
t
LZCE
LB, UB
t
BA
t
HZB
t
LZB
HIGH-Z
D
OUT
DATA VALID
UB_CEDR2.eps
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE, UB, or LB = VIL.
3. Address is valid prior to or coincident with CE LOW transition.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
7
Rev. C
03/21/2008
IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS
WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range)
-10
Min.
-12
Min.
-25
Min. Max.
Symbol Parameter
Max.
—
Max.
—
Unit
ns
tWC
tSCE
tAW
Write Cycle Time
10
7
12
9
25
18
18
—
—
—
CE to Write End
—
—
ns
Address Setup Time
to Write End
7
—
9
—
ns
tHA
Address Hold from Write End
Address Setup Time
0
0
—
—
—
—
—
—
—
6
0
0
—
—
—
—
—
—
—
6
0
0
—
—
—
—
—
—
—
15
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
tSA
tPWB
tPWE1
tPWE2
tSD
LB, UB Valid to End of Write
WE Pulse Width (OE =High)
WE Pulse Width (OE=Low)
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
7
9
18
15
17
15
0
7
9
7
9
6
6
tHD
0
0
(2)
tHZWE
—
3
—
3
—
5
(2)
tLZWE
—
—
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100ꢀ tested.
3. The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All signals must be in valid states to
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the write.
8
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Rev. C
03/21/2008
IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS
AC WAVEFORMS
WRITE CYCLE NO. 1 (WE Controlled)(1,2)
t
WC
VALID ADDRESS
SCE
ADDRESS
t
SA
t
t
HA
CE
t
AW
t
tPPWWEE21
WE
t
PBW
UB, LB
t
HZWE
t
LZWE
HIGH-Z
DATA UNDEFINED
D
OUT
t
SD
t
HD
DATAIN VALID
DIN
UB_CEWR1.eps
Notes:
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs and at least
one of the LB and UB inputs being in the LOW state.
2. WRITE = (CE) [ (LB) = (UB) ] (WE).
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9
Rev. C
03/21/2008
IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS
WRITE CYCLE NO. 2(OE is HIGH During Write Cycle) (1,2)
t
WC
ADDRESS
VALID ADDRESS
t
HA
OE
LOW
CE
t
AW
t
PWE1
WE
t
SA
t
PBW
UB, LB
t
HZWE
t
LZWE
HIGH-Z
DATA UNDEFINED
D
OUT
t
SD
t
HD
DATAIN VALID
DIN
UB_CEWR2.eps
WRITE CYCLE NO. 3(OE is LOW During Write Cycle) (1)
t
WC
ADDRESS
VALID ADDRESS
t
HA
LOW
LOW
OE
CE
t
t
AW
t
PWE2
WE
t
SA
t
PBW
UB, LB
HZWE
t
LZWE
HIGH-Z
DATA UNDEFINED
D
OUT
t
SD
t
HD
DATAIN VALID
DIN
UB_CEWR3.eps
Notes:
1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write,
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
2. I/O will assume the High-Z state if OE
≥ VIH.
10
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Rev. C
03/21/2008
IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS
WRITE CYCLE NO. 4(UB/LB Back to Back Write)
tWC
tWC
ADDRESS 1
ADDRESS 2
ADDRESS
OE
CE
tSA
LOW
tHA
tSA
tHA
WE
UB, LB
DOUT
tPBW
tPBW
WORD 2
WORD 1
tHZWE
DATA UNDEFINED
tLZWE
HIGH-Z
tHD
tHD
tSD
tSD
DATAIN
VALID
DATAIN
VALID
DIN
UB_CEWR4.eps
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11
Rev. C
03/21/2008
IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS
DATA RETENTION SWITCHING CHARACTERISTICS (HIGH SPEED) (IS61/64C25616AL)
Symbol Parameter
DD forDataRetention
TestCondition
Min.
Max. Unit
VDR
V
SeeDataRetentionWaveform
2.9
5.5
V
IDR
DataRetentionCurrent
V
DD =2.9V,CE≥VDD –0.2V
Com.
Ind.
—
—
8
10
mA
VIN ≥ VDD – 0.2V, or VIN
≤
VSS + 0.2V
Auto.
—
15
typ.(1)
1
t
SDR
DataRetentionSetupTime
RecoveryTime
SeeDataRetentionWaveform
SeeDataRetentionWaveform
0
—
—
ns
ns
tRDR
t
RC
Note:
1.TypicalValuesaremeasuredatVDD =5V,T
A
=25oCandnot100ꢀtested.
DATA RETENTION WAVEFORM (CE Controlled)
t
Data Retention Mode
t
RDR
SDR
VDD
4.5V
V
DR
CE ≥ VDD - 0.2V
CE
GND
12
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Rev. C
03/21/2008
IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS
DATA RETENTION SWITCHING CHARACTERISTICS (LOW POWER) (IS61/64C25616AS)
Symbol Parameter
DD forDataRetention
TestCondition
Min.
Max. Unit
VDR
V
SeeDataRetentionWaveform
2.9
5.5
V
IDR
DataRetentionCurrent
V
DD =2.9V,CE≥VDD –0.2V
Com.
Ind.
—
—
0.8
0.9
mA
VIN ≥ VDD – 0.2V, or VIN
≤ VSS + 0.2V
Auto.
—
2
typ.(1)
0.2
t
SDR
DataRetentionSetupTime
RecoveryTime
SeeDataRetentionWaveform
SeeDataRetentionWaveform
0
—
—
ns
ns
tRDR
t
RC
Note:
1.TypicalValuesaremeasuredatVDD =5V,T
A
=25oCandnot100ꢀtested.
DATA RETENTION WAVEFORM (CE Controlled)
t
Data Retention Mode
t
RDR
SDR
VDD
4.5V
V
DR
CE ≥ VDD - 0.2V
CE
GND
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13
Rev. C
03/21/2008
IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS
HIGH SPEED
ORDERING INFORMATION: IS61/64C25616AL
Commercial Range: 0°C to +70°C
Speed(ns)
Order Part No.
Package
10
IS61C25616AL-10TL
44-pinTSOP-II,Lead-free
Industrial Range: –40°C to +85°C
Speed(ns)
Order Part No.
Package
10
IS61C25616AL-10KI
IS61C25616AL-10KLI
IS61C25616AL-10TI
IS61C25616AL-10TLI
400-mil Plastic SOJ
400-mil Plastic SOJ, Lead-free
44-pinTSOP-II
44-pinTSOP-II,Lead-free
Automotive Range: –40°C to +125°C
Speed(ns)
Order Part No.
Package
12
IS64C25616AL-12KA3
IS64C25616AL-12TA3
IS64C25616AL-12CTLA3
400-mil Plastic SOJ
44-pinTSOP-II
44-pinTSOP-II,Lead-free,
CopperLeadframe
LOW POWER
ORDERING INFORMATION: IS61C25616AS
Industrial Range: –40°C to +85°C
Speed(ns)
Order Part No.
Package
25
IS61C25616AS-25KI
IS61C25616AS-25KLI
IS61C25616AS-25TI
IS61C25616AS-25TLI
400-mil Plastic SOJ
400-mil Plastic SOJ, Lead-free
44-pinTSOP-II
44-pinTSOP-II,Lead-free
Automotive Range: –40°C to +125°C
Speed(ns)
Order Part No.
Package
25
IS64C25616AS-25TLA3
44-pinTSOP-II,Lead-free
14
Integrated Silicon Solution, Inc. — www.issi.com
Rev. C
03/21/2008
PACKAGING INFORMATION
400-mil Plastic SOJ
Package Code: K
Notes:
1. Controlling dimension:
millimeters.
N
N/2+1
2. BSC = Basic lead spacing
between centers.
3. Dimensions D and E1 do not
include mold flash protrusions
and should be measured from
the bottom of the package.
4. Reference document: JEDEC
MS-027.
E1
E
1
N/2
SEATING PLANE
D
A
b
C
A2
e
B
A1
E2
Millimeters
Inches
Min Max
Millimeters
Inches
Min Max
Millimeters
Inches
Symbol Min
Max
Min
Max
Min
Max
Min
Max
No. Leads (N)
28
32
36
A
A1
A2
B
b
C
D
E
E1
E2
e
3.25 3.75
0.128 0.148
3.25
0.64
2.08
0.38
0.66
0.18
20.82 21.08
11.05 11.30
10.03 10.29
9.40 BSC
3.75
—
—
0.51
0.81
0.33
0.128 0.148
3.25 3.75
0.128 0.148
0.64
2.08
—
—
0.025
0.082
—
—
0.025
0.082
—
—
0.64
2.08
—
—
0.025
0.082
—
—
0.38 0.51
0.66 0.81
0.18 0.33
18.29 18.54
11.05 11.30
10.03 10.29
9.40 BSC
0.015 0.020
0.026 0.032
0.007 0.013
0.720 0.730
0.435 0.445
0.395 0.405
0.370 BSC
0.015 0.020
0.026 0.032
0.007 0.013
0.820 0.830
0.435 0.445
0.395 0.405
0.370 BSC
0.38 0.51
0.66 0.81
0.18 0.33
23.37 23.62
11.05 11.30
10.03 10.29
9.40 BSC
0.015 0.020
0.026 0.032
0.007 0.013
0.920 0.930
0.435 0.445
0.395 0.405
0.370 BSC
1.27 BSC
0.050 BSC
1.27 BSC
0.050 BSC
1.27 BSC
0.050 BSC
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
10/29/03
PACKAGING INFORMATION
Millimeters
Symbol Min Max
No. Leads (N)
Inches
Min Max
Millimeters
Inches
Min Max
Millimeters
Min Max
Inches
Min Max
Min
Max
40
42
44
A
A1
A2
B
b
C
D
E
E1
E2
e
3.25 3.75
0.128 0.148
3.25
0.64
2.08
0.38
0.66
0.18
27.18 27.43
11.05 11.30
10.03 10.29
9.40 BSC
3.75
—
—
0.51
0.81
0.33
0.128 0.148
3.25 3.75
0.128 0.148
0.64
2.08
—
—
0.025
0.082
—
—
0.025
0.082
—
—
0.64
2.08
—
—
0.025
0.082
—
—
0.38 0.51
0.66 0.81
0.18 0.33
25.91 26.16
11.05 11.30
10.03 10.29
9.40 BSC
0.015 0.020
0.026 0.032
0.007 0.013
1.020 1.030
0.435 0.445
0.395 0.405
0.370 BSC
0.015 0.020
0.026 0.032
0.007 0.013
1.070 1.080
0.435 0.445
0.395 0.405
0.370 BSC
0.38 0.51
0.66 0.81
0.18 0.33
28.45 28.70
11.05 11.30
10.03 10.29
9.40 BSC
0.015 0.020
0.026 0.032
0.007 0.013
1.120 1.130
0.435 0.445
0.395 0.405
0.370 BSC
1.27 BSC
0.050 BSC
1.27 BSC
0.050 BSC
1.27 BSC
0.050 BSC
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
2
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
10/29/03
PACKAGING INFORMATION
PlasticTSOP
Package Code: T (Type II)
N
N/2+1
Notes:
1. Controlling dimension: millimieters,
unless otherwise specified.
2. BSC = Basic lead spacing
between centers.
3. Dimensions D and E1 do not
include mold flash protrusions and
should be measured from the
bottom of the package.
E
E1
4. Formed leads shall be planar with
respect to one another within
0.004 inches at the seating plane.
1
N/2
D
SEATING PLANE
A
ZD
.
L
α
e
b
C
A1
Plastic TSOP (T - Type II)
Millimeters Inches
Millimeters
Inches
Millimeters
Inches
Symbol Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Ref. Std.
No. Leads (N)
32
44
50
A
A1
b
C
D
E1
E
e
—
1.20
—
0.047
—
1.20
0.15
0.45
0.21
—
0.047
—
1.20
—
0.047
0.05 0.15
0.30 0.52
0.12 0.21
20.82 21.08
10.03 10.29
11.56 11.96
1.27 BSC
0.002 0.006
0.012 0.020
0.005 0.008
0.820 0.830
0.391 0.400
0.451 0.466
0.050 BSC
0.05
0.30
0.12
18.31 18.52
10.03 10.29
11.56 11.96
0.80 BSC
0.002 0.006
0.012 0.018
0.005 0.008
0.721 0.729
0.395 0.405
0.455 0.471
0.032 BSC
0.05 0.15
0.30 0.45
0.12 0.21
20.82 21.08
10.03 10.29
11.56 11.96
0.80 BSC
0.002 0.006
0.012 0.018
0.005 0.008
0.820 0.830
0.395 0.405
0.455 0.471
0.031 BSC
L
ZD
α
0.40 0.60
0.95 REF
0.016 0.024
0.037 REF
0.41
0.81 REF
0°
0.60
0.016 0.024
0.032 REF
0.40 0.60
0.88 REF
0.016 0.024
0.035 REF
0°
5°
0°
5°
5°
0°
5°
0°
5°
0°
5°
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
06/18/03
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