IS61C1024AL-12TI-TR [ISSI]

Standard SRAM, 128KX8, 12ns, CMOS, PDSO32;
IS61C1024AL-12TI-TR
型号: IS61C1024AL-12TI-TR
厂家: INTEGRATED SILICON SOLUTION, INC    INTEGRATED SILICON SOLUTION, INC
描述:

Standard SRAM, 128KX8, 12ns, CMOS, PDSO32

静态存储器 光电二极管
文件: 总15页 (文件大小:839K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Enableinputs,CE1andCE2.  
                                                                           
TheactiveLOWWriteEnableꢀ  
                                                                                      
IS61C1024AL  
IS64C1024AL  
128K x 8 HIGH-SPEED CMOS STATIC RAM  
NOVEMBER 2011  
DESCRIPTION  
FEATURES  
Theꢀ ISSIꢀ IS61C1024AL/IS64C1024ALꢀ isꢀ aꢀ veryꢀ high-  
speed,ꢀ lowꢀ power,ꢀ 131,072-wordꢀ byꢀ 8-bitꢀ CMOSꢀ staticꢀ  
RAMs.TheyꢀareꢀfabricatedꢀusingꢀISSI'sꢀhigh-performanceꢀ  
CMOStechnology.Thisꢀhighlyꢀreliableꢀprocessꢀcoupledꢀ  
withꢀ innovativeꢀ circuitꢀ designꢀ techniques,ꢀ yieldsꢀ higherꢀ  
performanceꢀandꢀlowꢀpowerꢀconsumptionꢀdevices.  
•ꢀ High-speedꢀaccessꢀtime:ꢀ12,ꢀ15ꢀnsꢀ  
Lowꢀactiveꢀpower:ꢀ160ꢀmWꢀ(typical)  
Lowꢀstandbyꢀpower:ꢀ1000ꢀµWꢀ(typical)ꢀCMOSꢀ  
standby  
•ꢀ OutputꢀEnableꢀ(OE)ꢀandꢀtwoꢀChipꢀEnableꢀ  
(CE1ꢀandꢀCE2)ꢀinputsꢀforꢀeaseꢀinꢀapplications  
WhenCE1isHIGHorCE2isLOW(deselected),thedeviceꢀ  
assumesꢀaꢀstandbyꢀmodeꢀatꢀwhichꢀtheꢀpowerꢀdissipationꢀ  
canꢀbeꢀreducedꢀbyꢀusingꢀCMOSꢀinputꢀlevels.  
•ꢀ Fullyꢀstaticꢀoperation:ꢀnoꢀclockꢀorꢀrefreshꢀꢀ  
required  
EasyꢀmemoryꢀexpansionꢀisꢀprovidedꢀbyꢀusingꢀtwoꢀChipꢀ  
•ꢀ TTLꢀcompatibleꢀinputsꢀandꢀoutputs  
•ꢀ Singleꢀ5Vꢀ( 10ꢁ)ꢀpowerꢀsupply  
(WE)ꢀcontrolsꢀbothꢀwritingꢀandꢀreadingꢀofꢀtheꢀmemory.  
•ꢀ Commercial,ꢀindustrial,ꢀandꢀautomotiveꢀtempera-  
tureꢀrangesꢀavailable  
Theꢀ IS61C1024AL/IS64C1024ALꢀ isꢀ availableꢀ inꢀ 32-pinꢀ  
300-milꢀSOJ,ꢀ32-pinꢀ400-milꢀSOJ,ꢀ32-pinꢀTSOPꢀ(TypeꢀI,ꢀ  
8x20),ꢀandꢀ32-pinꢀsTSOPꢀ(TypeꢀI,ꢀ8ꢀxꢀ13.4)ꢀpackages.  
•ꢀ Leadꢀfreeꢀavailable  
FUNCTIONAL BLOCK DIAGRAM  
128K x 8  
MEMORY ARRAY  
A0-A16  
DECODER  
VDD  
GND  
I/O  
DATA  
COLUMN I/O  
I/O0-I/O7  
CIRCUIT  
CE1  
CONTROL  
CIRCUIT  
CE2  
OE  
WE  
Copyrightꢀ©ꢀ2011ꢀIntegratedꢀSiliconꢀSolution,ꢀInc.ꢀAllꢀrightsꢀreserved.ꢀISSIꢀreservesꢀtheꢀrightꢀtoꢀmakeꢀchangesꢀtoꢀthisꢀspecificationꢀandꢀitsꢀproductsꢀatꢀanyꢀtimeꢀwithoutꢀ  
notice.ꢀISSIꢀassumesꢀnoꢀliabilityꢀarisingꢀoutꢀofꢀtheꢀapplicationꢀorꢀuseꢀofꢀanyꢀinformation,ꢀproductsꢀorꢀservicesꢀdescribedꢀherein.ꢀCustomersꢀareꢀadvisedꢀtoꢀobtainꢀtheꢀlatestꢀ  
versionꢀofꢀthisꢀdeviceꢀspecificationꢀbeforeꢀrelyingꢀonꢀanyꢀpublishedꢀinformationꢀandꢀbeforeꢀplacingꢀordersꢀforꢀproducts.  
IntegratedꢀSiliconꢀSolution,ꢀInc.ꢀdoesꢀnotꢀrecommendꢀtheꢀuseꢀofꢀanyꢀofꢀitsꢀproductsꢀinꢀlifeꢀsupportꢀapplicationsꢀwhereꢀtheꢀfailureꢀorꢀmalfunctionꢀofꢀtheꢀproductꢀcanꢀreason-  
ablyꢀbeꢀexpectedꢀtoꢀcauseꢀfailureꢀofꢀtheꢀlifeꢀsupportꢀsystemꢀorꢀtoꢀsignificantlyꢀaffectꢀitsꢀsafetyꢀorꢀeffectiveness.ꢀProductsꢀareꢀnotꢀauthorizedꢀforꢀuseꢀinꢀsuchꢀapplicationsꢀ  
unlessꢀIntegratedꢀSiliconꢀSolution,ꢀInc.ꢀreceivesꢀwrittenꢀassuranceꢀtoꢀitsꢀsatisfaction,ꢀthat:  
a.)ꢀtheꢀriskꢀofꢀinjuryꢀorꢀdamageꢀhasꢀbeenꢀminimized;  
b.)ꢀtheꢀuserꢀassumeꢀallꢀsuchꢀrisks;ꢀand  
c.)ꢀpotentialꢀliabilityꢀofꢀIntegratedꢀSiliconꢀSolution,ꢀIncꢀisꢀadequatelyꢀprotectedꢀunderꢀtheꢀcircumstances  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774ꢀ  
1
Rev. C  
11/22/2011  
I/O0-I/O7  
VDDꢀ  
              
IS61C1024AL, IS64C1024AL  
PIN CONFIGURATION  
32-Pin SOJ  
PIN CONFIGURATION  
32-Pin TSOP (Type 1) (T) and sTSOP (Type 1) (H)  
NC  
A16  
A14  
A12  
A7  
1
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
VDD  
A15  
CE2  
WE  
A13  
A8  
A11  
A9  
A8  
1
2
3
4
5
6
7
8
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
OE  
2
A10  
CE1  
I/O7  
I/O6  
I/O5  
I/O4  
I/O3  
GND  
I/O2  
I/O1  
I/O0  
A0  
3
4
A13  
WE  
CE2  
A15  
VDD  
NC  
A16  
A14  
A12  
A7  
5
A6  
6
A5  
7
A9  
A4  
8
A11  
OE  
A3  
9
9
A2  
10  
11  
12  
13  
14  
15  
16  
A10  
CE1  
I/O7  
I/O6  
I/O5  
I/O4  
I/O3  
10  
11  
12  
13  
14  
15  
16  
A1  
A0  
I/O0  
I/O1  
I/O2  
GND  
A6  
A5  
A4  
A1  
A2  
A3  
PIN DESCRIPTIONS  
A0-A16ꢀ AddressꢀInputs  
CE1ꢀꢀ  
CE2ꢀꢀ  
OEꢀꢀ  
ChipꢀEnableꢀ1ꢀInputꢀ  
ChipꢀEnableꢀ2ꢀInputꢀ  
OutputꢀEnableꢀInput  
WriteꢀEnableꢀInput  
Input/Output  
Power  
WEꢀꢀ  
OPERATING RANGE (IS61C1024AL)  
Range  
Commercialꢀ 0°Cꢀtoꢀ+70°Cꢀ  
Industrialꢀ -40°Cꢀtoꢀ+85°Cꢀ  
Ambient Temperature  
Vdd  
5Vꢀ ꢀ10ꢁ  
5Vꢀ ꢀ10ꢁ  
GNDꢀ  
Ground  
OPERATING RANGE (IS64C1024AL)  
Range  
Ambient Temperature  
Vdd  
Automotiveꢀ -40°Cꢀtoꢀ+125°Cꢀ  
5Vꢀ ꢀ10ꢁ  
TRUTH TABLE  
Mode  
WE  
CE1 CE2 OEꢀ  
I/O Operation  
Vdd Current  
NotꢀSelectedꢀ  
(Power-down)ꢀ  
Xꢀ  
Xꢀ  
Hꢀ  
Xꢀ  
Xꢀ  
Lꢀ  
Xꢀ  
Xꢀ  
ꢀ High-Zꢀꢀꢀ  
ꢀ High-Z  
Isb1, Isb2  
Isb1, Isb2ꢀ  
OutputꢀDisabledꢀ Hꢀ  
Lꢀ  
Lꢀ  
Lꢀ  
Hꢀ  
Hꢀ  
Hꢀ  
Hꢀ  
Lꢀ  
Xꢀ  
ꢀ High-Zꢀ  
Doutꢀ  
Icc1, Icc2ꢀ  
Icc1, Icc2ꢀ  
Icc1, Icc2ꢀ  
Readꢀ  
Writeꢀ  
Hꢀ  
Lꢀ  
DInꢀ  
2ꢀ  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. C  
11/22/2011  
IS61C1024AL, IS64C1024AL  
ABSOLUTE MAXIMUM RATINGS(1)  
Symbol Parameter  
Value  
–0.5ꢀtoꢀ+7.0ꢀ  
–65ꢀtoꢀ+150ꢀ  
1.5ꢀ  
Unit  
V
°C  
Vterm  
tstg  
Pt  
TerminalꢀVoltageꢀwithꢀRespectꢀtoꢀGNDꢀ  
StorageꢀTemperatureꢀ  
PowerꢀDissipationꢀ  
W
Ioutꢀ  
DCꢀOutputꢀCurrentꢀ(LOW)ꢀ  
20ꢀ  
mAꢀ  
Notes:  
1.ꢀꢀStressꢀgreaterꢀthanꢀthoseꢀlistedꢀunderꢀABSOLUTEꢀMAXIMUMꢀRATINGSꢀmayꢀcauseꢀ  
permanentꢀdamageꢀtoꢀtheꢀdevice.ꢀThisꢀisꢀaꢀstressꢀratingꢀonlyꢀandꢀfunctionalꢀoperationꢀ  
ofꢀtheꢀdeviceꢀatꢀtheseꢀorꢀanyꢀotherꢀconditionsꢀaboveꢀthoseꢀindicatedꢀinꢀtheꢀoperationalꢀ  
sectionsꢀofꢀthisꢀspecificationꢀisꢀnotꢀimplied.ꢀExposureꢀtoꢀabsoluteꢀmaximumꢀratingꢀcon-  
ditionsꢀforꢀextendedꢀperiodsꢀmayꢀaffectꢀreliability.ꢀ  
CAPACITANCE(1,2)  
Symbol  
Parameter  
Conditions  
VIn = 0V  
Max.  
5ꢀ  
Unit  
pF  
cIn  
InputꢀCapacitanceꢀ  
OutputꢀCapacitanceꢀ  
coutꢀ  
Notes:  
Vout = 0V  
7ꢀ  
pF  
1.ꢀꢀTestedꢀinitiallyꢀandꢀafterꢀanyꢀdesignꢀorꢀprocessꢀchangesꢀthatꢀmayꢀaffectꢀtheseꢀparameters.  
2.ꢀ Testꢀconditions:ꢀTa = 25°c, fꢀ=ꢀ1ꢀMHz,ꢀVDDꢀ=ꢀ5.0V.  
DC ELECTRICAL CHARACTERISTICS (OverꢀOperatingꢀRange)  
Symbol Parameter  
Test Conditions  
Min.  
Max.  
—ꢀ  
Unit  
V
Voh  
Vol  
VIh  
VIl  
IlI  
OutputꢀHIGHꢀVoltageꢀ  
VDD = Min.,ꢀIoh = –4.0ꢀmAꢀ  
2.4ꢀ  
—ꢀ  
OutputꢀLOWꢀVoltageꢀ  
InputꢀHIGHꢀVoltageꢀ  
InputꢀLOWꢀVoltage(1)ꢀ  
VDD = Min.,ꢀIol = 8.0ꢀmAꢀ  
0.4ꢀ  
V
2.2ꢀ  
–0.3ꢀ  
VDD + 0.5  
0.8ꢀ  
V
V
InputꢀLeakageꢀ  
GNDꢀVIn VDD  
Com.ꢀ  
Ind.ꢀ  
Auto.ꢀ  
–1ꢀ  
–2ꢀ  
–5ꢀ  
1ꢀ  
2ꢀ  
5ꢀ  
µAꢀ  
Ilo  
OutputꢀLeakageꢀ  
GNDꢀVout VDDꢀ  
OutputsꢀDisabledꢀ  
Com.ꢀ  
Ind.ꢀ  
Auto.ꢀ  
–1ꢀ  
–2ꢀ  
–5ꢀ  
1ꢀ  
2ꢀ  
5
µAꢀ  
Note:  
1.ꢀꢀVIl = –3.0Vꢀforꢀpulseꢀwidthꢀlessꢀthanꢀ10ꢀns.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 ꢀ  
3
Rev. C  
11/22/2011  
IS61C1024AL, IS64C1024AL  
IS61C1024AL/IS64C1024AL POWER SUPPLY CHARACTERISTICS(1) (OverꢀOperatingꢀRange)  
-12 ns  
Min.  
-15 ns  
Min. Max.  
Symbol Parameter  
VDDꢀOperatingꢀ  
Test Conditions  
Max.  
Unit  
Icc1  
VDD = VDD max.,ꢀCE1ꢀ=ꢀVIlꢀ  
Iout = 0 mA,ꢀfꢀ=ꢀ0ꢀ  
Com.ꢀ ꢀ ꢀ  
Ind.ꢀ ꢀ ꢀ  
Auto.ꢀ ꢀ ꢀ  
—ꢀ  
—ꢀ  
35ꢀ  
—ꢀ  
45ꢀ  
mA  
ꢀ ꢀ  
ꢀ ꢀ  
SupplyꢀCurrentꢀ  
40  
ꢀ ꢀ  
Icc2  
ꢀ ꢀ  
ꢀ ꢀ  
VDDꢀDynamicꢀOperatingꢀ  
SupplyꢀCurrentꢀ  
VDD = VDD max.,ꢀCE1ꢀ=ꢀVIl  
Iout = 0 mA,ꢀfꢀ=ꢀfmax  
Com.ꢀ ꢀ ꢀ  
Ind.ꢀ ꢀ ꢀ  
—ꢀ  
—ꢀ  
45ꢀ  
—ꢀ  
55ꢀ  
mA  
ꢀ ꢀ  
50  
Auto.ꢀ ꢀ ꢀ  
ꢀ ꢀ  
typ.(2)ꢀ ꢀ ꢀ  
—ꢀ  
32ꢀ  
Isb1  
ꢀ ꢀ  
TTLꢀStandbyꢀCurrentꢀ  
(TTLꢀInputs)ꢀ  
VDD = VDD max.,ꢀ  
VIn = VIh orꢀVIl  
Com.  
Ind.  
1
1.5  
mA  
CE1VIh,ꢀfꢀ=ꢀ0ꢀorꢀ  
CE2ꢀꢀVIl,ꢀfꢀ=ꢀ0ꢀ  
Auto.  
2
ꢀ ꢀ  
Isb2ꢀ  
ꢀ ꢀ  
CMOSꢀStandbyꢀ  
Currentꢀ(CMOSꢀInputs)ꢀ  
VDD = VDD max.,ꢀ  
Com.  
Ind.  
400  
450  
µA  
CE1VDD – 0.2V,  
ce2  
0.2V  
Auto.  
500  
VIn VDD – 0.2V, orꢀ  
VIn 0.2V, ꢀfꢀ=ꢀ0  
typ.(2)ꢀ ꢀ ꢀ  
—ꢀ  
200  
ꢀ ꢀ  
Note:  
1.ꢀꢀAtꢀfꢀ=ꢀfmax,ꢀaddressꢀandꢀdataꢀinputsꢀareꢀcyclingꢀatꢀtheꢀmaximumꢀfrequency,ꢀfꢀ=ꢀ0ꢀmeansꢀnoꢀinputꢀlinesꢀchange.  
ꢀ ꢀ 2.ꢀꢀTypicalꢀValuesꢀareꢀmeasuredꢀatꢀVDDꢀ=ꢀ5V,Ta =ꢀ25oCꢀandꢀnotꢀ100ꢁꢀtested.  
4ꢀ  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. C  
11/22/2011  
IS61C1024AL, IS64C1024AL  
READ CYCLE SWITCHING CHARACTERISTICS(1) (OverꢀOperatingꢀRange)  
-12  
-15  
Symbol  
ꢀ ꢀ trcꢀ  
ꢀ ꢀ taaꢀ  
Parameter  
Min. Max.  
Min. Max.  
Unit  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ReadꢀCycleꢀTimeꢀ  
AddressꢀAccessꢀTimeꢀ  
OutputꢀHoldꢀTimeꢀ  
CE1ꢀAccessꢀTimeꢀ  
CE2ꢀAccessꢀTimeꢀ  
OEꢀAccessꢀTimeꢀ  
OEꢀtoꢀLow-ZꢀOutputꢀ  
OEꢀtoꢀHigh-ZꢀOutputꢀ  
CE1ꢀtoꢀLow-ZꢀOutputꢀ  
CE2ꢀtoꢀLow-ZꢀOutputꢀ  
12ꢀ  
—ꢀ  
3ꢀ  
—ꢀ  
12ꢀ  
—ꢀ  
12ꢀ  
12ꢀ  
6ꢀ  
15ꢀ  
—ꢀ  
3ꢀ  
—ꢀ  
15ꢀ  
—ꢀ  
15ꢀ  
15ꢀ  
7ꢀ  
ꢀ ꢀ tohaꢀ  
ꢀ ꢀ tace1ꢀ  
ꢀ ꢀ tace2ꢀ  
ꢀ ꢀ tDoeꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
0ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
0ꢀ  
(2)  
ꢀ ꢀ tlzoe ꢀ  
—ꢀ  
6ꢀ  
—ꢀ  
6ꢀ  
(2)  
ꢀ ꢀ thzoe ꢀ  
0ꢀ  
0ꢀ  
ꢀ ꢀ tlzce1(2)ꢀ  
ꢀ ꢀ tlzce2(2)ꢀ  
2ꢀ  
—ꢀ  
—ꢀ  
7ꢀ  
2ꢀ  
—ꢀ  
—ꢀ  
8ꢀ  
2ꢀ  
2ꢀ  
(2)  
ꢀ ꢀ thzce ꢀ  
CE1ꢀorꢀCE2ꢀtoꢀHigh-ZꢀOutputꢀ ꢀ  
0ꢀ  
0ꢀ  
(3)  
ꢀ ꢀ tPu ꢀ  
CE1ꢀorꢀCE2ꢀtoꢀPower-Upꢀ  
0ꢀ  
—ꢀ  
12ꢀ  
0ꢀ  
—ꢀ  
12ꢀ  
(3)  
ꢀ ꢀ tPD ꢀ  
CE1ꢀorꢀCE2ꢀtoꢀPower-Downꢀ  
—ꢀ  
—ꢀ  
Notes:ꢀ  
1.ꢀ Testꢀconditionsꢀassumeꢀsignalꢀtransitionꢀtimesꢀofꢀ3ꢀnsꢀorꢀless,ꢀtimingꢀreferenceꢀlevelsꢀofꢀ1.5V,ꢀinputꢀpulseꢀlevelsꢀ  
ofꢀ0ꢀtoꢀ3.0VꢀandꢀoutputꢀloadingꢀspecifiedꢀinꢀFigureꢀ1.  
2.ꢀ TestedꢀwithꢀtheꢀloadꢀinꢀFigureꢀ2.ꢀꢀTransitionꢀisꢀmeasuredꢀ 500ꢀmVꢀfromꢀsteady-stateꢀvoltage.ꢀNotꢀ100ꢁꢀtested.  
3.ꢀ Notꢀ100ꢁꢀtested.  
AC TEST CONDITIONS  
Parameter  
InputꢀPulseꢀLevelꢀ  
InputꢀRiseꢀandꢀFallꢀTimesꢀ  
Unit  
0Vꢀtoꢀ3.0V  
3ꢀns  
InputꢀandꢀOutputꢀTimingꢀ  
andꢀReferenceꢀLevel  
1.5Vꢀ  
OutputꢀLoadꢀ  
SeeꢀFiguresꢀ1ꢀandꢀ2  
AC TEST LOADS  
480  
480  
5V  
5V  
OUTPUT  
OUTPUT  
255 Ω  
255 Ω  
30 pF  
Including  
jig and  
5 pF  
Including  
jig and  
scope  
scope  
Figure 1  
Figure 2  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 ꢀ  
5
Rev. C  
11/22/2011  
IS61C1024AL, IS64C1024AL  
AC WAVEFORMS  
READ CYCLE NO. 1(1,2)  
t
RC  
ADDRESS  
t
AA  
t
OHA  
t
OHA  
DATA VALID  
DOUT  
PREVIOUS DATA VALID  
READ1.eps  
READ CYCLE NO. 2(1,3)  
t
RC  
ADDRESS  
OE  
t
AA  
t
OHA  
t
HZOE  
t
DOE  
LZOE  
t
CE1  
CE2  
t
tAACCEE21  
t
tHHZZCCEE21  
tLLZZCCEE21  
t
HIGH-Z  
DOUT  
DATA VALID  
CE2_RD2.eps  
Notes:ꢀ  
1.ꢀ WEꢀisꢀHIGHꢀforꢀaꢀReadꢀCycle.  
2.ꢀ Theꢀdeviceꢀisꢀcontinuouslyꢀselected.ꢀOE,ꢀCE1ꢀ=ꢀVIl,ꢀCE2ꢀ=ꢀVIh.  
3.ꢀ AddressꢀisꢀvalidꢀpriorꢀtoꢀorꢀcoincidentꢀwithꢀCE1ꢀLOWꢀandꢀCE2ꢀHIGHꢀtransitions.  
6ꢀ  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. C  
11/22/2011  
IS61C1024AL, IS64C1024AL  
WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (OverꢀOperatingꢀRange,ꢀStandardꢀandꢀLowꢀPower)  
-12 ns  
-15 ns  
Symbol  
ꢀ ꢀ twcꢀ  
ꢀ ꢀ tsce1  
ꢀ ꢀ tsce2ꢀ  
ꢀ ꢀ tawꢀ  
Parameter  
Min. Max.  
Min. Max.  
Unit  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
WriteꢀCycleꢀTimeꢀ  
CE1ꢀtoꢀWriteꢀEndꢀ  
CE2ꢀtoꢀWriteꢀEndꢀ  
12ꢀ  
10ꢀ  
10ꢀ  
10ꢀ  
0ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
7ꢀ  
15ꢀ  
12ꢀ  
12ꢀ  
12ꢀ  
0ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
7ꢀ  
AddressꢀSetupꢀTimeꢀtoꢀWriteꢀEndꢀ  
ꢀ ꢀ thaꢀ  
AddressꢀHoldꢀfromꢀWriteꢀEndꢀ  
ꢀ ꢀ tsaꢀ  
AddressꢀSetupꢀTimeꢀ  
0ꢀ  
0ꢀ  
(3)  
ꢀ ꢀ tPwe ꢀ  
WEꢀPulseꢀWidthꢀ  
10ꢀ  
7ꢀ  
12ꢀ  
10ꢀ  
0ꢀ  
ꢀ ꢀ tsDꢀ  
ꢀ ꢀ thDꢀ  
DataꢀSetupꢀtoꢀWriteꢀEndꢀ ꢀ  
DataꢀHoldꢀfromꢀWriteꢀEndꢀꢀ  
WEꢀLOWꢀtoꢀHigh-ZꢀOutputꢀ  
WEꢀHIGHꢀtoꢀLow-ZꢀOutputꢀ  
0ꢀ  
(4)  
ꢀ ꢀ thzwe ꢀ  
—ꢀ  
2ꢀ  
—ꢀ  
2ꢀ  
(4)  
ꢀ ꢀ tlzwe ꢀ  
—ꢀ  
—ꢀ  
Notes:ꢀ  
1.ꢀ Testꢀconditionsꢀassumeꢀsignalꢀtransitionꢀtimesꢀofꢀ5ꢀnsꢀorꢀless,ꢀtimingꢀreferenceꢀlevelsꢀofꢀ1.5V,ꢀinputꢀpulseꢀlevelsꢀofꢀ0ꢀtoꢀ3.0Vꢀandꢀ  
outputꢀloadingꢀspecifiedꢀinꢀFigureꢀ1.  
2.ꢀ TheꢀinternalꢀwriteꢀtimeꢀisꢀdefinedꢀbyꢀtheꢀoverlapꢀofꢀCE1ꢀLOW,ꢀCE2ꢀHIGHꢀandꢀWEꢀLOW.ꢀꢀAllꢀsignalsꢀmustꢀbeꢀinꢀvalidꢀstatesꢀtoꢀ  
initiateꢀaꢀWrite,ꢀbutꢀanyꢀoneꢀcanꢀgoꢀinactiveꢀtoꢀterminateꢀtheꢀWrite.ꢀꢀTheꢀDataꢀInputꢀSetupꢀandꢀHoldꢀtimingꢀareꢀreferencedꢀtoꢀtheꢀ  
risingꢀorꢀfallingꢀedgeꢀofꢀtheꢀsignalꢀthatꢀterminatesꢀtheꢀWrite.  
3.ꢀ TestedꢀwithꢀOEꢀHIGH.  
4.ꢀ TestedꢀwithꢀtheꢀloadꢀinꢀFigureꢀ2.ꢀꢀTransitionꢀisꢀmeasuredꢀ 500ꢀmVꢀfromꢀsteady-stateꢀvoltage.ꢀNotꢀ100ꢁꢀtested.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 ꢀ  
7
Rev. C  
11/22/2011  
IS61C1024AL, IS64C1024AL  
AC WAVEFORMS  
WRITE CYCLE NO. 1(CE1ꢀControlled,ꢀOEꢀisꢀHIGHꢀorꢀLOW)ꢀ(1)  
t
WC  
VALID ADDRESS  
ADDRESS  
CE1  
t
tSSCCEE21  
t
SA  
t
HA  
CE2  
t
AW  
t
tPPWWEE21  
WE  
t
HZWE  
t
LZWE  
HIGH-Z  
DATA UNDEFINED  
DOUT  
t
SD  
t
HD  
DATAIN VALID  
DIN  
CE2_WR1.eps  
WRITE CYCLE NO. 2(OE isꢀHIGHꢀDuringꢀWriteꢀCycle)ꢀ(1,2)  
t
WC  
ADDRESS  
VALID ADDRESS  
t
HA  
OE  
LOW  
HIGH  
CE1  
CE2  
t
AW  
t
PWE1  
WE  
t
HZWE  
t
LZWE  
t
SA  
HIGH-Z  
DATA UNDEFINED  
DOUT  
t
SD  
t
HD  
DATAIN VALID  
DIN  
CE2_WR2.eps  
Notes:ꢀ  
1.ꢀ TheꢀinternalꢀwriteꢀtimeꢀisꢀdefinedꢀbyꢀtheꢀoverlapꢀofꢀCE1ꢀLOW,ꢀCE2ꢀHIGHꢀandꢀWEꢀLOW.ꢀꢀAllꢀsignalsꢀmustꢀbeꢀinꢀvalidꢀstatesꢀtoꢀ  
initiateꢀaꢀWrite,ꢀbutꢀanyꢀoneꢀcanꢀgoꢀinactiveꢀtoꢀterminateꢀtheꢀWrite.ꢀꢀTheꢀDataꢀInputꢀSetupꢀandꢀHoldꢀtimingꢀareꢀreferencedꢀtoꢀ  
theꢀrisingꢀorꢀfallingꢀedgeꢀofꢀtheꢀsignalꢀthatꢀterminatesꢀtheꢀWrite.  
2.ꢀ I/OꢀwillꢀassumeꢀtheꢀHigh-ZꢀstateꢀifꢀOEꢀ=ꢀVIh.  
8ꢀ  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. C  
11/22/2011  
IS61C1024AL, IS64C1024AL  
WRITE CYCLE NO. 3(OE isꢀLOWꢀDuringꢀWriteꢀCycle)ꢀ(1)  
t
WC  
ADDRESS  
VALID ADDRESS  
t
HA  
LOW  
OE  
CE1  
LOW  
HIGH  
CE2  
t
t
AW  
t
PWE2  
WE  
t
SA  
HZWE  
t
LZWE  
HIGH-Z  
DATA UNDEFINED  
DOUT  
t
SD  
t
HD  
DATAIN VALID  
DIN  
CE2_WR3.eps  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 ꢀ  
9
Rev. C  
11/22/2011  
IS61C1024AL, IS64C1024AL  
DATA RETENTION SWITCHING CHARACTERISTICS  
Symbol Parameter  
ꢀ ꢀ VDr DDꢀforꢀDataꢀRetentionꢀ  
Test Condition  
Min. Typ.(1)  
Max. Unit  
V
SeeꢀDataꢀRetentionꢀWaveformꢀ  
2.0ꢀ  
5.5ꢀ  
V
ꢀ ꢀ IDr  
ꢀ ꢀ ꢀ  
DataꢀRetentionꢀCurrentꢀ  
V
DDꢀ=ꢀ2.0V,CE1ꢀVDDꢀ–ꢀ0.2Vꢀ  
Com.ꢀ  
Ind.ꢀ  
—ꢀ  
—ꢀ  
200ꢀ  
—ꢀ  
400ꢀ  
450ꢀ  
µA  
orꢀCE2ꢀ0.2V  
ꢀ ꢀ ꢀ  
VIn VDD – 0.2V,ꢀorꢀVIn  
Vss + 0.2V  
Auto.ꢀ  
—ꢀ  
0ꢀ  
—ꢀ  
500  
—ꢀ  
ꢀ ꢀ tsDr  
DataꢀRetentionꢀSetupꢀTimeꢀ SeeꢀDataꢀRetentionꢀWaveformꢀ  
RecoveryꢀTimeꢀ SeeꢀDataꢀRetentionꢀWaveformꢀ  
ns  
ns  
ꢀ ꢀ trDr  
t
rcꢀ  
—ꢀ  
Note:  
ꢀ 1.ꢀTypicalꢀValuesꢀareꢀmeasuredꢀatꢀVDDꢀ=ꢀ5V,ꢀT  
=ꢀ25oCꢀandꢀnotꢀ100ꢁꢀtested.  
a
DATA RETENTION WAVEFORM (CE1 Controlled)  
t
Data Retention Mode  
t
RDR  
SDR  
VDD  
4.5V  
2.2V  
V
DR  
CE1 VDD - 0.2V  
CE1  
GND  
DATA RETENTION WAVEFORM (CE2 Controlled)  
Data Retention Mode  
VDD  
CE2  
4.5V  
2.2V  
t
t
RDR  
SDR  
V
DR  
CE2 0.2V  
0.4V  
GND  
10ꢀ  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. C  
11/22/2011  
IS61C1024AL, IS64C1024AL  
ORDERING INFORMATION: IS61C1024AL  
Commercial Range: 0°C to +70°C  
Speed (ns)  
Order Part No.  
Package  
12ꢀ  
IS61C1024AL-12Jꢀ  
IS61C1024AL-12Tꢀ  
300-milꢀPlasticꢀSOJꢀ  
TSOPꢀ(TypeꢀI)  
ORDERING INFORMATION: IS61C1024AL  
Industrial Range: –40°C to +85°C  
Speed (ns)  
Order Part No.  
Package  
12ꢀ  
IS61C1024AL-12JIꢀ  
IS61C1024AL-12JLIꢀ  
IS61C1024AL-12KIꢀ  
IS61C1024AL-12KLIꢀ  
IS61C1024AL-12HIꢀ  
IS61C1024AL-12HLIꢀ  
IS61C1024AL-12TIꢀ  
IS61C1024AL-12TLIꢀ  
300-milꢀPlasticꢀSOJꢀ  
300-milꢀPlasticꢀSOJ,ꢀLead-freeꢀ  
400-milꢀPlasticꢀSOJꢀ  
400-milꢀPlasticꢀSOJ,ꢀLead-freeꢀ  
sTSOPꢀ(TypeꢀI)ꢀ  
sTSOPꢀ(TypeꢀI),ꢀLead-freeꢀ  
TSOPꢀ(TypeꢀI)ꢀ  
TSOPꢀ(TypeꢀI),ꢀLead-free  
ORDERING INFORMATION: IS64C1024AL  
Automotive Range: –40°C to +125°C  
Speed (ns)  
Order Part No.  
Package  
15ꢀ  
IS64C1024AL-15KA3ꢀ  
IS64C1024AL-15TA3ꢀ  
400-milꢀPlasticꢀSOJꢀ  
TSOPꢀ(TypeꢀI)  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 ꢀ  
11  
Rev. C  
11/22/2011  
IS61C1024AL, IS64C1024AL  
12ꢀ  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. C  
11/22/2011  
IS61C1024AL, IS64C1024AL  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 ꢀ  
13  
Rev. C  
11/22/2011  
IS61C1024AL, IS64C1024AL  
14ꢀ  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. C  
11/22/2011  
IS61C1024AL, IS64C1024AL  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 ꢀ  
15  
Rev. C  
11/22/2011  

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