IRFR5505 [INFINEON]
Power MOSFET(Vdss=-55V, Rds(on)=0.11ohm, Id=-18A); 功率MOSFET （ VDSS = -55V ， RDS（ON） = 0.11ohm ，ID = -18A ）
| 型号： | IRFR5505 |
| 厂家： | 
Infineon |
| 描述： | Power MOSFET(Vdss=-55V, Rds(on)=0.11ohm, Id=-18A) |
| 文件： | 总10页 (文件大小：109K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 9.1610B
IRFR/U5505
HEXFET® Power MOSFET
l Ultra Low On-Resistance
l P-Channel
l Surface Mount (IRFR5505)
l Straight Lead (IRFU5505)
l Advanced Process Technology
l Fast Switching
D
VDSS = -55V
RDS(on) = 0.11Ω
ID = -18A
G
l Fully Avalanche Rated
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
knownfor, providesthedesignerwithanextremelyefficient
and reliable device for use in a wide variety of applications.
I-Pa k
D -Pa k
T O -2 52 A A
TO -2 5 1 AA
The D-Pak is designed for surface mounting using vapor
phase, infrared, orwavesolderingtechniques. Thestraight
lead version (IRFU series) is for through-hole mounting
applications. Power dissipation levels up to 1.5 watts are
possible in typical surface mount applications.
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ -10V
Pulsed Drain Current
-18
-11
A
-64
PD @TC = 25°C
Power Dissipation
57
W
W/°C
V
Linear Derating Factor
0.45
VGS
EAS
IAR
Gate-to-Source Voltage
± 20
Single Pulse Avalanche Energy
Avalanche Current
150
mJ
A
-9.6
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
5.7
mJ
V/ns
-5.0
-55 to + 150
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
–––
–––
Max.
2.2
50
Units
RθJC
RθJA
RθJA
Junction-to-Ambient (PCB mount)**
Junction-to-Ambient
°C/W
110
8/25/97
IRFR/U5505
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
-55 ––– –––
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
VGS = 0V, ID = -250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– -0.049 ––– V/°C Reference to 25°C, ID = -1mA
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance ––– ––– 0.11
Ω
V
S
VGS = -10V, ID = -9.6A
VDS = VGS, ID = -250µA
VDS = -25V, ID = -9.6A
VDS = -55V, VGS = 0V
VDS = -44V, VGS = 0V, TJ = 150°C
VGS = 20V
Gate Threshold Voltage
-2.0 ––– -4.0
4.2 ––– –––
Forward Transconductance
––– ––– -25
––– ––– -250
––– ––– -100
––– ––– 100
––– ––– 32
––– ––– 7.1
––– ––– 15
IDSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
IGSS
VGS = -20V
Qg
ID = -9.6A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = -44V
VGS = -10V, See Fig. 6 and 13
–––
–––
–––
–––
12 –––
28 –––
20 –––
16 –––
VDD = -28V
ID = -9.6A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 2.6Ω
RD = 2.8Ω, See Fig. 10
Between lead,
6mm (0.25in.)
from package
D
4.5
7.5
LD
LS
Internal Drain Inductance
Internal Source Inductance
–––
–––
–––
–––
nH
pF
G
and center of die contactꢀ
VGS = 0V
S
Ciss
Coss
Crss
Input Capacitance
––– 650 –––
––– 270 –––
––– 120 –––
Output Capacitance
VDS = -25V
Reverse Transfer Capacitance
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
D
IS
-18
––– –––
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
––– ––– -64
––– ––– -1.6
p-n junction diode.
S
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
V
TJ = 25°C, IS = -9.6A, VGS = 0V
––– 51
77
ns
TJ = 25°C, IF = -9.6A
Qrr
ton
––– 110 160
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 3.2mH
RG = 25Ω, IAS = -9.6A. (See Figure 12)
ISD ≤ -9.6A, di/dt ≤ 290A/µs, VDD ≤ V(BR)DSS
TJ ≤ 150°C
ꢀThis is applied for I-PAK, LS of D-PAK is measured between
lead and center of die contact
,
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
IRFR/U5505
100
10
1
100
10
1
VGS
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
VGS
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
TOP
TOP
BOTTOM -4.5V
BOTTOM -4.5V
-4.5V
-4.5V
20µs PULSE WIDTH
T = 150 C
J
20µs PULSE WIDTH
°
°
T = 25 C
J
0.1
0.1
0.1
1
10
100
1
10
100
-V
DS
, Drain-to-Source Voltage (V)
-V
DS
, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
2.0
-16A
=
I
D
°
T = 25 C
J
1.5
1.0
0.5
0.0
°
T = 150 C
J
10
1
V
= -25V
DS
V
= -10V
20µs PULSE WIDTH
GS
0.1
4
5
6
7
8
9
10
-60 -40 -20
0
20 40 60 80 100 120 140 160
°
-V , Gate-to-Source Voltage (V)
GS
T , Junction Temperature ( C)
J
Fig 4. Normalized On-Resistance
Fig 3. Typical Transfer Characteristics
Vs. Temperature
IRFR/U5505
20
16
12
8
1200
I
D
= -9.6A
V
= 0V,
f = 1MHz
GS
C
= C + C
C
SHORTED
iss
gs
gd
ds
gd ,
ds
V
V
=-44V
=-28V
C
= C
= C + C
rss
DS
DS
1000
800
600
400
200
0
C
oss
gd
C
iss
C
C
oss
rss
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
1
10
10
0
10
20
30 40
-V , Drain-to-Source Voltage (V)
DS
Q , Total Gate Charge (nC)
G
Fig 5. Typical Capacitance Vs.
Fig 6. Typical Gate Charge Vs.
Drain-to-Source Voltage
Gate-to-Source Voltage
100
10
1
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
°
T = 150 C
J
100
10
1
10us
°
T = 25 C
J
100us
1ms
°
T = 25 C
C
J
°
T = 150 C
10ms
V
= 0 V
GS
1.8
Single Pulse
0.1
0.2
0.6
1.0
1.4
2.
1
10
100
-V ,Source-to-Drain Voltage (V)
SD
-V , Drain-to-Source Voltage (V)
DS
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
IRFR/U5505
RD
20
16
12
8
VDS
VGS
D.U.T.
RG
-
+
VDD
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
4
t
t
r
t
t
f
d(on)
d(off)
V
GS
10%
0
25
50
T
75
100
125
°
150
, Case Temperature ( C)
C
90%
V
DS
Fig 9. Maximum Drain Current Vs.
Fig 10b. Switching Time Waveforms
Case Temperature
10
D = 0.50
0.20
1
0.10
0.05
P
DM
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
0.1
t
1
t
2
Notes:
1. Duty factor D =
t / t
1
2
2. Peak T = P
x Z
+ T
C
J
DM
thJC
0.01
0.00001
0.0001
0.001
0.01
0.1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
IRFR/U5505
L
V
D S
350
300
250
200
150
100
50
I
D
TOP
-4.3A
-6.1A
BOTTOM -9.6A
-
+
D .U .T
AS
R
G
VDD
I
A
D R IVER
-20V
0 .0 1
Ω
t
p
15V
Fig 12a. Unclamped Inductive Test Circuit
I
AS
0
25
50
75
100
125
150
°
Starting T , Junction Temperature ( C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
t
p
V
(BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
Q
G
.2µF
12V
.3µF
-10V
-
V
+
DS
Q
Q
GD
D.U.T.
GS
V
GS
V
G
-3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
IRFR/U5505
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T*
-
+
-
-
+
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
+
-
VDD
VGS
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
V
[
=10V
] ***
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
[
DD
]
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
[
]
SD
Ripple ≤ 5%
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For P-Channel HEXFETS
IRFR/U5505
Package Outline
TO-252AA Outline
Dimensions are shown in millimeters (inches)
2.38 (.094)
2.19 (.086)
6.73 (.265)
6.35 (.250)
1.14 (.045)
0.89 (.035)
- A -
1.27 (.050)
0.88 (.035)
5.46 (.215)
5.21 (.205)
0.58 (.023)
0.46 (.018)
4
2
6.45 (.245)
5.68 (.224)
6.22 (.245)
5.97 (.235)
10.42 (.410)
9.40 (.370)
1.02 (.040)
1.64 (.025)
LEAD ASSIGNMENTS
1 - GATE
1
3
0.51 (.020)
MIN.
2 - DRAIN
- B -
3 - SOUR CE
4 - DRAIN
1.52 (.060)
1.15 (.045)
0.89 (.035)
0.64 (.025)
3X
0.58 (.023)
0.46 (.018)
1.14 (.045)
0.76 (.030)
2X
0.25 (.010)
M A M B
NOTES:
2.28 (.090)
1
2
3
4
DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
CONTROLLING DIMENSION : INCH.
4.57 (.180)
CONFORMS TO JEDEC OUTLINE TO-252AA.
DIMENSIONS SHOWN ARE BEFORE SOLD ER DIP,
SOLDER DIP MAX. +0.16 (.006).
Part Marking Information
TO-252AA (D-Pak)
EXAM PLE : THIS IS AN IRFR120
W ITH ASSEMBL Y
A
INTERNATIONAL
RECT IFIER
LOGO
LOT CODE 9U1P
FIRST PORTION
OF PART NUMBER
IRFR
12 0
9 U 1P
ASSEMBL Y
SECOND PORTION
OF PART NUM BER
L OT CODE
IRFR/U5505
Package Outline
TO-251AA Outline
Dimensions are shown in millimeters (inches)
6.73 (.265)
6.35 (.250)
2.38 (.094)
2.19 (.086)
- A -
0.58 (.023)
0.46 (.018)
1.27 (.050)
5.46 (.215)
0.88 (.035)
5.21 (.205)
LEAD ASSIGNMENTS
1 - GATE
4
2 - DRAIN
6.45 (.245)
5.68 (.224)
3 - SOURCE
4 - DRAIN
6.22 (.245)
5.97 (.235)
1.52 (.060)
1.15 (.045)
1
2
3
- B -
NOTES:
1
2
3
4
DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
CONTROLLIN G DIMENSION : INCH.
2.28 (.090)
1.91 (.075)
9.65 (.380)
8.89 (.350)
CONFORMS TO JEDEC OUTLINE TO-252AA.
DIMENSIONS SHOW N ARE BEFORE SOLDER DIP,
SOLDER DIP MAX. +0.16 (.006).
1.14 (.045)
0.76 (.030)
1.14 (.045)
0.89 (.035)
3X
0.89 (.035)
0.64 (.025)
3X
0.25 (.010)
M A M B
0.58 (.023)
0.46 (.018)
2.28 (.090)
2X
Part Marking Information
TO-251AA (I-Pak)
EXAM PLE : THIS IS AN IRF U1 20
W ITH ASSEM BLY
INTE RNATIONAL
RECTIFIER
LOGO
LOT CODE 9U1P
FIRST PORTION
OF PART NUM BER
IRFU
120
9U 1 P
SECOND PORTION
OF PART NUM BER
ASSEM BLY
LOT CODE
IRFR/U5505
Tape & Reel Information
TO-252AA
T R
T R L
T R R
16 .3 ( .64 1
15 .7 ( .61 9
)
)
1 6 .3 ( .6 4 1
1 5 .7 ( .6 1 9
)
)
1 2 .1 ( .4 76
1 1 .9 ( .4 69
)
)
8 .1 ( .3 1 8
7 .9 ( .3 1 2
)
)
F EE D D IR EC TIO N
F EE D D IR EC TIO N
N O T ES :
1 . C O N T R O LL IN G D IM EN S IO N : M IL LIM ET ER .
2 . AL L D IM E N SIO N S AR E S H O W N IN M IL L IM ET E R S ( IN C H ES ).
3 . O U T L IN E C O N FO R M S TO E IA -48 1 & E IA-5 4 1 .
1 3 IN C H
1 6 m m
N O T ES
:
1 . O U T L IN E C O N F O R M S T O EIA-4 8 1 .
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
8/97
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