ISL88013IH523Z_技术文档

ISL88011, ISL88012, ISL88013,

ISL88014, ISL88015

®

Data Sheet

February 13, 2006

FN8093.0

5-Pin Voltage Supervisors with Adjustable

Power-On Reset, Dual Voltage Monitoring

or Watchdog Timer Capability

The ISL88011 - ISL88015 family of devices offer both fixed

and/or adjustable voltage-monitoring that combine popular

functions such as Power On Reset control, Watchdog Timer,

Supply Voltage Supervision, and Manual Reset assertion in

a small 5-pin SOT23 package.

Features

• Single/Dual Voltage Monitoring Supervisors

• Fixed-Voltage Options Allow Precise Monitoring of +2.5V,

+3.0V, +3.3V, and +5.0V Power Supplies

• Dual Supervisor Has One Fixed Voltage Input and Another

That is User-Adjustable Down to 0.6V.

• Both RST and RST Outputs Available

• Adjustable POR Timeout Delay Options

Unique features on the ISL88013 and ISL88015 include a

watchdog timer with a 51sec startup timeout and a 1.6sec

normal timeout duration. On the ISL88011 and ISL88014,

users can increase the nominal 200ms Power On Reset

• Watchdog Timer With 1.6sec Normal and 51sec Startup

Timeout Durations

• Manual Reset Input on All Devices

timeout delay by adding an external capacitor to the C

POR

pin. Both fixed and adjustable voltage monitors are provided

by the ISL88012. Complementary active-low and active-high

reset outputs are available on the ISL88011, ISL88012 and

ISL88013 devices. All devices provide manual reset

capability (see Product Features Table).

• Reset Signal Valid Down to V

DD

= 1V

• Accurate ±1.5% Voltage Threshold

• Immune to Power-Supply Transients

• Ultra Low 5.5µA Supply Current

Seven preprogrammed reset threshold voltages accurate to

±1.5% over temperature are offered (see Ordering

Information). The ISL88012, ISL88014 and ISL88015 have a

user-adjustable voltage input available for custom

monitoring of any voltage down to 0.6V. All parts are

specifically designed for low power consumption and high

threshold accuracy.

• Small 5-pin SOT-23 Pb Free package

• Pb-Free Plus Anneal Available (RoHS Compliant)

Applications

• Process Control Systems

• Intelligent Instruments

• Embedded Control Systems

• Computer Systems

• Critical µP and µC Power Monitoring

• Portable/Battery-Powered Equipment

• PDA and Handheld PC Devices

Pinouts (ordering information on next page)

RST/MR

1

2

3

5

V

RST/MR

1

2

3

5

4

V

RST/MR

GND

1

2

3

5

4

V

DD

GND

ISL88012

ISL88013

ISL88011

RST

C

RST

VMON

RST

WDI

4

POR

RST/MR

GND

1

2

3

5

V

RST/MR

GND

1

5

4

V

DD

2

3

ISL88015

ISL88014

VMON

C

VMON

WDI

4

POR

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1

1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

ISL88011, ISL88012, ISL88013, ISL88014, ISL88015

Ordering Information

PART NUMBER

TEMPERATURE

PACKAGE

(Pb-free)

(Notes 1, 2)

MARKING

AGU

AGV

AGW

AGX

AGY

AGZ

AHE

AHF

AHG

AHH

AHI

V

RANGE (°C)

-40 to +85

THVDD

THVMON

ISL88011IH546Z

ISL88011IH544Z

ISL88011IH531Z

ISL88011IH529Z

ISL88011IH526Z

ISL88011IH523Z

ISL88011IH522Z

ISL88012IH546Z

ISL88012IH544Z

ISL88012IH531Z

ISL88012IH529Z

ISL88012IH526Z

ISL88012IH523Z

ISL88012IH522Z

ISL88013IH546Z

ISL88013IH544Z

ISL88013IH531Z

ISL88013IH529Z

ISL88013IH526Z

ISL88013IH523Z

ISL88013IH522Z

ISL88014IH5Z

4.64V

4.38V

3.09V

2.92V

2.63V

2.32V

2.19V

4.64V

4.38V

3.09V

2.92V

2.63V

2.32V

2.19V

4.64V

4.38V

3.09V

2.92V

2.63V

2.32V

2.19V

N/A

5 Ld SOT23

N/A

0.6V (Note 3)

N/A

AHJ

AHK

AHL

AHM

AHN

AHO

AHP

AHQ

AHR

AHS

AHT

AHU

N/A

0.6V (Note 3)

ISL88015IH5Z

N/A

NOTES:

1. Add “-TK” suffix for Tape and Reel

2. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate

termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are

MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

3. The voltage trip point can be adjusted to be greater than 0.6V using 2 external resistors. By default, the V

resistors are used.

trip point is 0.6V if no external

THVMON

FN8093.0

2

February 13, 2006

ISL88011, ISL88012, ISL88013, ISL88014, ISL88015

Functional Block Diagrams

V

DD

RST/MR

PB

RST/MR

PB

RST/MR

PB

POR

OSC

±

V

±

V

DD

THMON

VMON

RST

C

POR

OSC

WDI

WDT

V

REF

GND

ISL88011

ISL88012

ISL88013

V

DD

V

DD

R

1

RST/MR

PB

RST/MR

PB

VMON

POR

V

POR

R

2

R

2

±

V

±

V

DD

THMON

OSC

WDT

C

POR

OSC

GND

WDI

ISL88014

ISL88015

Product Features Table

FUNCTION

ISL88011

ISL88012

ISL88013

ISL88014

x

ISL88015

x

Active-Low Reset (RST)

x

Active-High Reset (RST)

Watchdog Timer (WDI)

x

Dual Voltage Supervision

x

Adjustable POR Timeout (C

Manual Reset Input (MR)

Fixed Trip Point Voltage

)

x

POR

x

Adjustable Trip Point Voltage

x

Pin Descriptions

ISL88011 ISL88012 ISL88013 ISL88014 ISL88015

NAME

FUNCTION

1

RST/MR

Combined Active-Low Reset Output and Manual

Reset Input

2

4

3

2

3

2

3

GND

VMON

RST

Ground

Adjustable Threshold Voltage Input

Active-High Reset Output

Adjustable POR Timeout Delay Input

Watchdog Timer Input

3

4

3

4

5

C

POR

WDI

4

5

4

5

V

Supply Voltage and Monitored Input

DD

FN8093.0

February 13, 2006

3

ISL88011, ISL88012, ISL88013, ISL88014, ISL88015

Absolute Maximum Ratings

Recommended Operating Conditions

Thermal Resistance (Typical, Note 4)

5 Ld SOT-23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C

Maximum Storage Temperature Range. . . . . . . . . . .-65°C to 150°C

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300°C

(SOT-23 Lead Tips Only)

Temperature under bias. . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C

Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Voltage on any pin with respect to GND . . . . . . . . . . . .-1.0V to +7V

D.C. output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA

Lead temperature (soldering, 10 seconds) . . . . . . . . . . . . . . .300°C

θ

(°C/W)

190

JA

Recommended Operating Conditions

Temperature Range (Industrial) . . . . . . . . . . . . . . . . . .-40°C to 85°C

Pull-up Resistance (R ) . . . . . . . . . . . . . . . . . . . . . 5kΩ to 100kΩ

PU

CAUTION: Absolute Maximum Ratings indicate limits beyond which permanent damage to the device and impaired reliability may occur. These are stress ratings

provided for information only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this

specification are not implied.

For guaranteed specifications and test conditions, see Electrical Specifications. The guaranteed specifications apply only for the test conditions listed. Some

performance characteristics may degrade when the device is not operated under the listed test conditions.

NOTE:

4. θ is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

JA

Electrical Specifications Over the recommended operating conditions unless otherwise specified, R = 10kΩ.

PU

SYMBOL

PARAMETER

Supply Voltage Range

TEST CONDITIONS

MIN

2.0

TYP

MAX

5.5

11.5

10

UNITS

V

DD

I

Supply Current for ISL88011,

ISL88012, ISL88013

V

= 5.0V

8

µA

DD

= 3.3V

= 2.5V

= 3.3V

7

µA

5.5

4.5

9

µA

Supply Current for ISL88014/15

Input Leakage Current (VMON)

Output Leakage Current (VMON)

8

µA

I

100

nA

LI

nA

LO

VOLTAGE THRESHOLDS

V

Fixed V

Voltage Trip Point

DD

ISL88011, 88012, 88013IH546

ISL88011, 88012, 88013IH544

ISL88011, 88012, 88013IH531

ISL88011, 88012, 88013IH529

ISL88011, 88012, 88013IH526

ISL88011, 88012, 88013IH523

ISL88011, 88012, 88013IH522

4.57

4.31

3.04

2.88

2.59

2.29

2.16

4.64

4.38

3.09

2.92

2.63

2.32

2.19

46

4.71

4.45

3.14

2.96

2.67

2.35

2.22

V

THVDD

V

HYST

Hysteresis at V

Input

V

= 4.64V

= 4.38V

= 3.09V

= 2.92V

= 2.63V

= 2.32V

= 2.19V

= 4.64V

= 4.38V

= 3.09V

= 2.92V

= 2.63V

= 2.32V

= 2.19V

mV

THVDD

DD

THVDD

44

31

29

26

23

22

V

Adj. Reset Voltage Trip Point (Note 5) V

599

597

589

597

605

603

595

603

611

609

601

609

THVMON

V

FN8093.0

February 13, 2006

4

ISL88011, ISL88012, ISL88013, ISL88014, ISL88015

Electrical Specifications Over the recommended operating conditions unless otherwise specified, R = 10kΩ. (Continued)

PU

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

V

Hysteresis Voltage (Note 5)

3

mV

THVMON

HYST

RESET

V

Reset Output Voltage Low

Reset Output Voltage High

V

≥ 3.3V, Sinking 0.5mA

< 3.3V, Sinking 0.5mA

≥ 3.3V, Sourcing 0.4mA

< 3.3V, Sourcing 0.4mA

0.05

0.40

V

OL

DD

V

-0.6

V

-0.4

V

OH

DD

-0.6

-0.4

V

t

V

to Reset Asserted Delay

TH

6

µs

ms

pF

RPD

POR

POR Timeout Delay

ISL88012, ISL88013, ISL88015

ISL88011, ISL88014 with C

140

200

250

5

260

100

= OPEN

200

POR

C

Load Capacitance on Reset Pins

LOAD

MANUAL RESET

V

MR Input Voltage

0

1

mV

µs

MR

t

MR Minimum Pulse Width

MR

WATCHDOG TIMER (Note 6)

Start t

Startup Watchdog Timeout Period

Normal Watchdog Timeout Period

WDI Minimum Pulse Width

Watchdog Input Voltage Low

Watchdog Input Voltage High

Watchdog Input Current

32

1.0

100

51

64

sec

ns

V

WDT

t

1.6

2.0

WDT

WDPS

V

0.3 x V

100

IL

DD

0.85 x V

DD

V

IH

I

nA

WDT

NOTES:

5. Applies to ISL88012, ISL88014, and ISL88015.

6. Applies to ISL88013 and ISL88015.

The device is designed with hysteresis to help prevent

chattering due to noise.

Pin Description

RST

VMON

The push-pull RST output is set to V

(HIGH) whenever 1)

DD

the device is first powered up, 2) either V

The VMON pin on the ISL88012, ISL88014 and ISL88015 is

a monitored input voltage that is user-adjustable. The

voltage at this pin is compared against an internal 600mV

or the voltage on

VMON falls below their respective minimum voltage sense

levels, 3) MR is asserted or 4) the watchdog timeout expires.

reference voltage (V

) and a reset is asserted

THVMON

RST/MR

whenever the monitored voltage falls below this trip point.

This pin functions as both a reset output and a manual reset

input. The RST output functions identically to the

WDI

The Watchdog Input takes an input from a microprocessor

and ensures that it periodically toggles the WDI pin,

otherwise the internal watchdog timer runs out and reset is

asserted. The internal Watchdog Timer is cleared whenever

the WDI input pin sees a rising or falling edge or the device

is manually reset.

complementary RST output but is an open drain output that

is pulled to GND (LOW) when reset is asserted. The MR

input is an active-low debounced input to which a user can

connect a push-button to add manual reset capability or

drive with active low signal from a controller.

V

DD

The V

C

POR

pin is the power supply terminal. It is monitored by

DD

The C

input pin lets users increase the Power On Reset

the ISL88011, ISL88012 and ISL88013. For these devices,

the voltage at this pin is compared against an internal

factory-programmed voltage trip point, V

first asserted when the device is initially powered up to

ensure that the power supply has stabilized. Thereafter,

reset is again asserted whenever V

POR

timeout delay (t

C

) by connecting a capacitor between

POR

and ground. (See Figure 3)

. A reset is

POR

THVDD

falls below V .

DD

THVDD

FN8093.0

5

February 13, 2006

ISL88011, ISL88012, ISL88013, ISL88014, ISL88015

V

THVDD

V

DD

1V

V

THVMON

VMON

MR

>t

MR

t

POR

RPD

POR

RPD

POR

RST

FIGURE 1. VOLTAGE MONITORING TIMING DIAGRAM

The ISL88012, ISL88014 and ISL88015 allow users to

customize the minimum voltage sense level on the VMON

input pin. To do this, connect an external resistor divider

network to the VMON pin in order to set the trip point to

some voltage above 600mV according to the following

equation (See Figure 2):

Principles of Operation

The ISL88011 - ISL88015 devices provide those functions

needed for critical voltage monitoring. These features

include Power On Reset control, customizable supply

voltage supervision, Watchdog Timer capability, and manual

reset assertion. By integrating all of these features into a

small 5-pin SOT23 package and using only 5.5µA of supply

current, the ISL88011 - ISL88015 devices can assist in

lowering system cost, reducing board space requirements,

and increasing the reliability of a system.

(R + R )

1

2

(EQ. 1)

--------------------------

V_INTRIP= 0.6 ×

R

2

Low Voltage Monitoring

During normal operation, these supervisors monitor both the

voltage level of V

(ISL88011,12,13) and/or VMON

DD

R

VMON

(ISL88012,14,15). The device asserts a reset if any of these

voltages falls below their respective trip points. The reset

signal effectively prevents the system from operating during

a power failure or brownout condition. This reset signal

1

ISL88012

ISL88014

ISL88015

V

IN

R

2

remains asserted until V

and the voltage on VMON

DD

exceed their voltage threshold setting for the reset time

delay period t

of 200ms (See Figure 1).

POR

FIGURE 2. USING VMON TO MONITOR V VIA RESISTORS

IN

FN8093.0

6

February 13, 2006

ISL88011, ISL88012, ISL88013, ISL88014, ISL88015

Power On Reset (POR)

Manual Reset

Applying at least 1V to the V

pin activates a POR circuit

The manual reset input (MR) allows the user to trigger a

reset by using a push-button switch. The MR input is an

active-low debounced input. By connecting a push-button

directly from MR to ground, the designer adds manual

system reset capability (see Figure 4). Reset is asserted if

the MR pin is pulled low to less than 100mV for 1µs or longer

while the push-button is closed. After MR is released, the

DD

which asserts reset (i.e. RST goes HIGH while RST goes

LOW). The reset signals remain asserted until the voltage at

V

and / or VMON rise above the minimum voltage sense

DD

level for time period t

have stabilized.

. This ensures that the voltages

POR

These reset signals provide several benefits:

reset outputs remain asserted for t

released.

(200ms) and then

POR

• It prevents the system microprocessor from starting to

operate with insufficient voltage.

V

DD

• It prevents the processor from operating prior to

stabilization of the oscillator.

R

ISL88011

ISL88012

ISL88013

ISL88014

ISL88015

pu

• It ensures that the monitored device is held out of

operation until internal registers are properly loaded.

RST/MR

• It allows time for an FPGA to download its configuration

prior to initialization of the circuit.

PB

Adjusting POR Timeout via C

POR

On the ISL88011 and ISL88014, users can adjust the Power

On Reset timeout delay (t ) up to many times the normal

POR

of 250ms. To do this, connect a capacitor between

t

FIGURE 4. CONNECTING A MANUAL RESET PUSH-BUTTON

POR

C

and ground (see Figure 3). For example, connecting a

POR

Watchdog Timer

The Watchdog Timer circuit checks microprocessor activity

by monitoring the WDI input pin. The microprocessor must

30pF capacitor to C

will increase t

from a typical

POR

250ms to about 2.5sec. NOTE: Care should be taken in PCB

layout and capacitor placement in order to reduce stray

capacitance as much as possible, which lengthens the t

periodically toggle the WDI pin within t

(1.6sec nominal),

POR

WDT

timeout period.

otherwise the reset signal is asserted (see Figure 5).

Internally, the 1.6sec timer is cleared by either a reset or by

toggling the WDI input.

Besides the 1.6sec default timeout during normal operation,

these devices also have a longer 51sec timeout for startup.

During this time, a reset cannot be asserted due to the WDI

not being toggled. The longer delay at power-on allows an

operating system to boot, an FPGA to initialize, or the

system software to initialize without the burden of dealing

with the Watchdog.

C

POR

ISL88011

ISL88014

Symbol Table

t_PORvs C_POR

WAVEFORM

INPUTS

OUTPUTS

6

5

4

3

2

1

0

Must be

steady

Will be

steady

May change

from LOW

to HIGH

Will change

from LOW

to HIGH

May change

from HIGH

to LOW

Will change

from HIGH

to LOW

Don’t Care:

Changes

Allowed

Changing:

State Not

Known

0

10

20

30

40

50

60

70

80

C_POR(pF)

N/A

Center Line

is High

Impedance

FIGURE 3. ADJUSTING t

WITH A CAPACITOR

POR

FN8093.0

February 13, 2006

7

ISL88011, ISL88012, ISL88013, ISL88014, ISL88015

V

THVDD

V

DD

1V

< t

WDT

< t

WDT

STARTt

WDT

START t

WDT

t

WDT

POR

WDI

RST

>t

WDPS

t

POR

FIGURE 5. WATCHDOG TIMING DIAGRAM

Typical Application Circuits

12V

10K

12V

12V SUPPLY

180K

44K

100K

V

RESET

DD

PGOOD @ 10.8V

RST

VMON

V

DD

0.1µF

10K

RST

10K

4.7V

V

@ 11.4V

TH

ISL88014 / ISL88015

ISL88011IH531Z

FIGURE 7. 12V SUPPLY PGOOD or PGOOD

FIGURE 6. HIGH ACCURACY 12V SUPPLY MONITOR

+5V

12V

5V

100K

PGOOD

100K

V

DD

V

100K

DD

180K

RST

V

@ 11.4V

TH

V2MON

GND

VMON

V

@ 4.4V

TH2

-5V

6.81K

10K

ISL88012IH546Z

-5V

ISL88012

PGOOD = HIGH IF -V < -4.6V AND -V + +V > 9.4 (abs)

FIGURE 9. +5V AND -5V MONITOR

FIGURE 8. MONITOR 5V AND 12V SUPPLIES

FN8093.0

8

February 13, 2006

ISL88011, ISL88012, ISL88013, ISL88014, ISL88015

Typical Application Circuits (Continued)

3.3V

100K

PGOOD

3.3V

V

@ 3.09V

THL

V

DD

RST

50K

ISL8801X-31

3.3V

100K

V

DD

V

@ 3.6V

RST

THH

VMON

10K

ISL88014 /ISL88015

VOLTAGE OUT OF RANGE = PGOOD LOW

FIGURE 10. OVER/UNDERVOLTAGE MONITOR

All of the parts have the TwinPin^TMRST/MR, which combines

the active-low reset output with a manual reset input. The

push-button can be tested by simply driving this to <100mV

above ground for at least 1µs.

Applications: Using the ISL8801XEVAL1

Platform

The ISL8801XEVAL1 board is designed to provide both

immediate functional assessment and flexibility to the user

when evaluating any of the ISL88011 - ISL88015 variants

(illustrated in Figure 11). It consists of two identical banks

which each contain the five different pinouts available in this

product family.

For the ISL88011 and ISL88014, the POR timeout delay t

POR

can be increased from the nominal 250ms by connecting a

capacitor to the C

pin. A comparison can be made

POR

between the two as the ISL88014 has a 22pF capacitor on its

pin while the ISL88011 C is left open.

C

POR

The top bank comes populated for immediate assessment of

functionality and performance. It is populated on the top row

The ISL88013 and ISL88015 have a WDI input pin, which is

connects to a microprocessor or microcontroller. This input

needs to be periodically toggled within 1sec to prevent the

supervisor from asserting reset. The WDI test point on the

ISL8801XEVAL1 board provides easy access to this input.

with the V

= 4.38V variants of the ISL88011, ISL88012

THVDD

and ISL88013. The bottom row is populated with the

ISL88014 and ISL88015, which monitor positive voltages

>0.6V on the VMON input pin.

Multiple IC configurations as shown in Figures 6 through 10

are easy to evaluate with this platform as each bank is

The bottom bank is left unpopulated to allow other part options

of the ISL88011, ISL88012 and ISL88013 to be evaluated with

a minimal number of passive components to add. The

RST/MR pull-up resistors are included as well as the

ISL88014 and ISL88015 since these ICs have no voltage

variants.

isolated from the other, thereby making V

voltages and

DD

GND references indepedent of each other.

SPECIAL CONSIDERATIONS:

Using good decoupling practices will prevent transients from

causing unwanted resets (i.e. due to switching noises and

short duration droops in the supply voltage).

During power-up, the ISL88011 - ISL88015 supervisors will

assert reset once V

reaches at least 1V. Thereafter, the

DD

ISL88011, ISL88012 and ISL88013 will release the reset once

the V supply stays above 4.38V for the nominal t

When using the C

pin, avoid stray capacitance during

POR

layout as much as possible in order to minimize its effect on

the t timing.

DD POR

period. The ISL88012, ISL88014 and ISL88015’s VMON input

pins are biased to trip at 10.7V, 1.93V and 1.2V respectively.

Note that because the ISL88012 is a dual voltage supervisor,

POR

both of the respective minimum thresholds for the V

VMON inputs must be met before reset is released.

and

DD

FN8093.0

9

February 13, 2006

ISL88011, ISL88012, ISL88013, ISL88014, ISL88015

C1, C2 = 1000nF Bias supply decoupling

ISL8801XEVAL1 BOM (Bill Of Materials)

R1, R2, R7, R8, R9, R10, R15, R20, R21, R22, = 100kΩ

C3 = DNP CPOR open on ISL88011

C5 = 22pF CPOR cap on ISL88014

U1-U3 = ISL8801XIH544 (Variant noted on bd)

U6-U8 = DNP (left open for any variant to be populated)

U4, U9 = ISL88014

RST/MR Pull-up Resistors

R11, R12 =10kΩ ISL88015 VMON divider to monitor 1.2V

R4 = 10kΩ ISL88014 VMON divider lower R to monitor 1.93V

R3 = 22kΩ ISL88014 VMON divider upper R to monitor 1.93V

R17 = 10.0kΩ ISL88012 VMON divider lower R to monitor

10.7V

U5, U10 = ISL88015

R18 = 169kΩ ISL88012 VMON divider upper R to monitor

10.7V

FIGURE 11. ISL8801XEVAL1 SCHEMATIC AND PHOTOGRAPH

FN8093.0

February 13, 2006

10

ISL88011, ISL88012, ISL88013, ISL88014, ISL88015

Packaging Information

5-Lead SOT23 Package

2

0.50

0.35

0.0197

0.0138

0.0374 [0.95] REF.

3.00

2.60

0.1181

0.1024

(s)

0.0748 [1.90] REF.

1

3.00

2.80

0.1181

0.1024

1.30

0.90

0.0512

0.0354

1.45

0.90

0.0571

0.0354

0.15

0.00

0.0059

0.0000

(s)

0.0039 [0.10]

1.75

1.50

0.0689

0.0591

LEADFRAME THICKNESS

0.20

0.09

0.0080

0.0035

0.0098 [0.25]

GAUGE PLANE

0°–10°

0.70

0.50

0.0276

0.0197

0.55

0.35

0.0217

0.0138

(5)

MAX.

DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS AND GATE BURRS SHALL NOT

EXCEED 0.127 MM PER SIDE.

1.

2.

3.

DOES NOT INCLUDE INTER-LEAD FLASH OR PROTRUSIONS.

INTER-LEAD FLASH AND PROTRUSIONS SHALL NOT

EXCEED 0.127 MM PER SIDE.

DIE IS FACING UP FOR MOLD. DIE IS FACING DOWN

FOR TRIM/FORM.

4.

5.

THIS PART IS COMPLIANT WITH EIAJ SPECIFICATION SC74A.

LEAD SPAN/STAND OFF HEIGHT/COPLANARITY ARE CONSIDERED

AS SPECIAL CHARACTERISTIC. (S)

6.

CONTROLLING DIMENSIONS IN INCHES. [mm]

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN8093.0

11

February 13, 2006


型号：	ISL88013IH523Z
厂家：	Intersil
描述：	5-Pin Voltage Supervisors with Adjustable Power-On Reset, Dual Voltage Monitoring or Watchdog Timer Capability 5引脚电压监控器与可调节的上电复位，双电压监控和看门狗定时器功能监控
文件：	总11页 (文件大小：271K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ISL88013IH523Z [INTERSIL]

相关型号：

ISL88013IH523Z-T7A

ISL88013IH523Z-TK

ISL88013IH523Z-TK

ISL88013IH526Z

ISL88013IH526Z-T7A

ISL88013IH526Z-TK

ISL88013IH526Z-TK

ISL88013IH529Z

ISL88013IH529Z-T7A

ISL88013IH529Z-TK

ISL88013IH529Z-TK

ISL88013IH531Z