ISL84714IH-T [INTERSIL]
Ultra Low ON-Resistance, Low Voltage, Single Supply, SPDT Analog Switch; 超低导通电阻，低电压，单电源， SPDT模拟开关
| 型号： | ISL84714IH-T |
| 厂家： | 
Intersil |
| 描述： | Ultra Low ON-Resistance, Low Voltage, Single Supply, SPDT Analog Switch |
| 文件： | 总10页 (文件大小：346K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL84714
®
Data Sheet
June 2004
FN6086.1
Ultra Low ON-Resistance, Low Voltage,
Single Supply, SPDT Analog Switch
Features
• Pb-free Available
The Intersil ISL84714 device is a low ON-resistance, low
voltage, bidirectional, single pole/double throw (SPDT)
analog switch designed to operate from a single +1.65V to
+3.6V supply. Targeted applications include battery powered
equipment that benefit from low on-resistance and fast
• Drop In replacement for the MAX4714
• ON resistance (R
)
ON
- V
- V
= +2.7V. . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.44Ω
= +1.8V. . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.75Ω
CC
CC
switching speeds (t
= 7.5ns, t = 2.9ns). The digital logic
ON
OFF
• R
matching between channels . . . . . . . . . . . . . . . 0.005Ω
flatness (+2.7V Supply) . . . . . . . . . . . . . . . . . . . . 0.06Ω
ON
ON
input is 1.8V CMOS compatible when using a single +3V
supply.
• R
• Single supply operation . . . . . . . . . . . . . . . . +1.65V to +3.6V
Cell phones, for example, often face ASIC functionality
limitations. The number of analog input or GPIO pins may be
limited and digital geometries are not well suited to analog
switch performance. This part may be used to “mux-in”
additional functionality while reducing ASIC design risk. The
ISL84714 is offered in the 6 lead SC70 package, alleviating
board space limitations.
• Fast switching action (+2.7V Supply)
- t
- t
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5ns
ON
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.9ns
OFF
• Guaranteed break-before-make
• ESD HBM rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >6kV
• 1.8V, CMOS logic compatible (+3V supply)
• Available in 6 lead SC70 package
The ISL84714 is a committed SPDT that consist of one
normally (NO) and one normally (NC) switch. This
configuration can also be used as a 2-to-1 multiplexer.
Applications
• Battery powered, handheld, and portable equipment
- Cellular/mobile phones
- Pagers
- Laptops, notebooks, palmtops
TABLE 1. FEATURES AT A GLANCE
ISL84714
Number of Switches
SW
1
SPDT or 2-1 MUX
0.75Ω
1.8V R
ON
• Portable Test and Measurement
• Medical Equipment
• Audio and video switching
1.8V t /t
15.6ns/4.5ns
0.38Ω
ON OFF
3V R
ON
3V t /t
7.5ns/2.9ns
6 Ld SC70
ON OFF
Package
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
ISL84714
Ordering Information
Pinout (Note 1)
ISL84714 (SC70)
PART NO.
TEMP.RANGE
PKG.
TOP VIEW
(BRAND)
(°C)
PACKAGE
DWG. #
ISL84714IH-T
(714I)
-40 to 85
-40 to 85
6 Ld SC70
P6.049
P6.049
Tape and Reel
IN
1
2
3
6
5
4
NO
V+
COM
NC
ISL84714IHZ-T
(714I)
(See Note)
6 Ld SC70
Tape and Reel
(Pb-free)
GND
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
NOTE:
1. Switches Shown for Logic “0” Input.
Truth Table
LOGIC
PIN NC
On
PIN NO
Off
0
1
Off
On
NOTE: Logic “0” ≤0.5V. Logic “1” ≥1.4V with a 3V supply.
Pin Descriptions
PIN
FUNCTION
System Power Supply Input (+1.65V to +3.6V)
Ground Connection
V+
GND
IN
Digital Control Input
COM
NO
Analog Switch Common Pin
Analog Switch Normally Open Pin
Analog Switch Normally Closed Pin
NC
2
ISL84714
Absolute Maximum Ratings
Thermal Information
Thermal Resistance (Typical, Note 3)
6 Ld SC70 Package . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Plastic Package). . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(Lead Tips Only)
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 4.8V
θ
(°C/W)
590
JA
Input Voltages
NO, NC, IN (Note 2) . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Output Voltages
COM (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Continuous Current NO, NC, or COM . . . . . . . . . . . . . . . . . ±150mA
Peak Current NO, NC, or COM
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . ±300mA
ESD Rating:
HBM >. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>6kV
MM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>300V
CDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>1000V
Operating Conditions
Temperature Range
ISL84714IH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
2. Signals on NC, NO, IN, or COM exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings.
3. θ is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
Electrical Specifications - 3V Supply
Test Conditions: V+ = +2.7V to +3.6V, GND = 0V, V
Unless Otherwise Specified
= 1.4V, V
= 0.5V (Notes 4, 6),
INH
INL
TEMP (NOTE 5)
(NOTE 5)
MAX
PARAMETER
TEST CONDITIONS
(°C)
MIN
TYP
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
Full
25
0
-
-
V+
0.6
0.7
0.03
0.04
0.1
0.12
2
V
Ω
ON Resistance, R
V+ = 2.7V, I
= 100mA, V
or V
= 1.5V
0.44
ON
COM
(See Figure 5)
NO
NC
Full
25
-
-
Ω
R
Matching Between Channels, V+ = 2.7V, I
COM
ON
= 100mA, V
= 100mA, V
or V
= 1.5V
-
0.005
Ω
ON
∆R
NO
NC
Full
25
-
-
Ω
R
Flatness, R
V+ = 2.7V, I
or V = 0.6V, 1.5V,
NC
-
0.06
Ω
ON
FLAT(ON)
COM
2.1V (Note 7)
NO
Full
25
-
-
-
-
-
-
Ω
NO or NC OFF Leakage Current,
or I
V+ = 3.3V, V
= 0.3V, 3V, V
NO
or V
NC
= 3V, 0.3V
= 0.3V, 3V,
-2
-10
-2
-20
nA
nA
nA
nA
COM
COM
I
NO(OFF)
NC(OFF)
Full
25
10
COM ON Leakage Current,
V+ = 3.3V, V
or Floating
= 0.3V, 3V, or V
NO
or V
2
NC
I
COM(ON)
DYNAMIC CHARACTERISTICS
Turn-ON Time, t
Full
20
V+ = 2.7V, V
(See Figure 1, Note 8)
or V
= 1.5V, R = 50Ω, C = 35pF
25
Full
25
-
-
7.5
-
11
13
7
ns
ns
ns
ns
ns
ON
NO
NC
L
L
Turn-OFF Time, t
V+ = 2.7V, V or V
(See Figure 1, Note 8)
= 1.5V, R = 50Ω, C = 35pF
-
2.9
-
OFF
NO
NC
L
L
Full
Full
-
9
Break-Before-Make Time Delay, t
V+ = 3.0V, V or V
(See Figure 3, Note 8)
= 1.5V, R = 50Ω, C = 35pF
1
4
-
D
NO
NC
L
L
Charge Injection, Q
OFF Isolation
V
= V+/2, R = 0Ω, C = 1.0nF (See Figure 2)
25
25
-
-
20
-
-
pC
dB
G
G
L
R
= 50Ω, C = 5pF, f = 1MHz, V
= 1V
-50
L
L
COM
RMS
(See Figure 4)
Crosstalk (Channel-to-Channel)
R
= 50Ω, C = 5pF, f = 1MHz, V
= 1V
25
-
-50
-
dB
L
L
COM
RMS
(See Figure 6)
Total Harmonic Distortion
f = 20Hz to 20kHz, V
= 2V , R = 32Ω
P-P
25
25
25
-
-
-
0.006
40
-
-
-
%
pF
pF
COM
L
NO or NC OFF Capacitance, C
f = 1MHz, V
f = 1MHz, V
or V
or V
= V
= 0V (See Figure 7)
= 0V (See Figure 7)
OFF
NO
NO
NC
NC
COM
COM
COM ON Capacitance, C
= V
100
COM(ON)
3
ISL84714
Electrical Specifications - 3V Supply
Test Conditions: V+ = +2.7V to +3.6V, GND = 0V, V
= 1.4V, V
= 0.5V (Notes 4, 6),
(NOTE 5)
INH
INL
Unless Otherwise Specified (Continued)
TEMP (NOTE 5)
PARAMETER
TEST CONDITIONS
(°C)
MIN
TYP
MAX
UNITS
POWER SUPPLY CHARACTERISTICS
Power Supply Range
Full
25
1.65
-
0.018
-
3.6
V
Positive Supply Current, I+
V+ = 3.6V, V = 0V or V+
IN
-
-
0.05
0.35
µA
µA
Full
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V
Full
Full
Full
-
-
-
-
0.5
-
V
V
INL
Input Voltage High, V
1.4
-1
INH
Input Current, I , I
INH INL
V+ = 3.6V, V = 0V or V+
IN
1
µA
NOTES:
4. V = input voltage to perform proper function.
IN
5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
6. Parts are 100% tested at +25°C. Limits across the full temperature range are guaranteed by design and correlation.
7. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range.
8. Guaranteed by design.
Electrical Specifications - 1.8V Supply
Test Conditions: V+ = +1.8V, GND = 0V, V
Unless Otherwise Specified
= 1V, V
= 0.4V (Notes 4, 6),
INL
INH
TEMP (NOTE 5)
(NOTE 5)
MAX
PARAMETER
TEST CONDITIONS
(°C)
MIN
TYP
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
Full
25
0
-
-
V+
0.9
1
V
ON Resistance, R
V+ = 1.8V, I
= 10mA, V
or V = 0.9V
NC
0.75
Ω
ON
COM
(See Figure 5)
NO
Full
25
-
-
-
-
-
-
Ω
NO or NC OFF Leakage Current,
or I
V+ = 1.8V, V
= 0.3V, 1.5V, V
NO
or V = 1.5V, 0.3V
NC
-2
-10
-2
-20
2
nA
nA
nA
nA
COM
I
NO(OFF)
NC(OFF)
Full
25
10
2
COM ON Leakage Current,
V+ = 1.8V, V
1.5V, or Floating
= 0.3V, 1.5V, or V
NO
or V
= 0.3V,
NC
COM
I
COM(ON)
DYNAMIC CHARACTERISTICS
Turn-ON Time, t
Full
20
V+ = 1.8V, V
(See Figure 1, Note 8)
or V
= 1.5V, R = 50Ω, C = 35pF
25
Full
25
-
-
15.6
19
21
9
ns
ns
ns
ns
ns
ON
NO
NC
L
L
-
4.5
-
Turn-OFF Time, t
V+ = 1.8V, V or V
(See Figure 1, Note 8)
= 1.5V, R = 50Ω, C = 35pF
-
OFF
NO
NC
L
L
Full
Full
-
11
-
Break-Before-Make Time Delay, t
Charge Injection, Q
V+ = 1.8V, V or V
(See Figure 3, Note 8)
= 1.5V, R = 50Ω, C = 35pF
2
5
D
NO
NC
L
L
V
= V+/2, R = 0Ω, C = 1.0nF (See Figure 2)
25
-
15
-
pC
G
G
L
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V
= 0V or V+
25
-
-
0.018
-
0.05
0.35
µA
µA
IN
Full
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V
Full
Full
Full
-
-
-
-
0.4
-
V
V
INL
Input Voltage High, V
1
INH
Input Current, I
, I
V
= 0V or V+
-1
1
µA
INH INL
IN
4
ISL84714
Test Circuits and Waveforms
V+
V
t < 20ns
r
INH
C
t < 20ns
f
LOGIC
INPUT
50%
V
INL
t
V
OFF
OUT
NO or NC
IN
SWITCH
INPUT
COM
SWITCH
INPUT
V
NO
0V
V
OUT
90%
90%
C
L
R
LOGIC
INPUT
L
GND
SWITCH
OUTPUT
35pF
50Ω
t
ON
Repeat test for all switches. C includes fixture and stray
L
Logic input waveform is inverted for switches that have the opposite
logic sense.
capacitance.
R
L
------------------------------
V
= V
OUT
(NO or NC)
R
+ R
L
(ON)
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
C
SWITCH
OUTPUT
V
OUT
R
G
∆V
COM
NO or NC
GND
OUT
V
OUT
V
INH
V
ON
ON
IN
G
LOGIC
INPUT
C
L
OFF
V
INL
LOGIC
INPUT
Q = ∆V
x C
L
OUT
FIGURE 2B. TEST CIRCUIT
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2. CHARGE INJECTION
V+
C
NO
V
V
V
INH
OUT
NX
COM
LOGIC
NC
INPUT
C
R
L
L
V
INL
50Ω
35pF
IN
GND
LOGIC
INPUT
90%
SWITCH
OUTPUT
V
OUT
0V
t
D
C
includes fixture and stray capacitance.
L
FIGURE 3A. MEASUREMENT POINTS
FIGURE 3. BREAK-BEFORE-MAKE TIME
FIGURE 3B. TEST CIRCUIT
5
ISL84714
Test Circuits and Waveforms (Continued)
V+
V+
C
C
R
= V /100mA
1
ON
SIGNAL
GENERATOR
NO or NC
NO or NC
V
NX
100mA
IN
V
or V
INH
0V or V+
INL
IN
V
1
COM
COM
ANALYZER
GND
GND
R
L
FIGURE 4. OFF ISOLATION TEST CIRCUIT
FIGURE 5. R
TEST CIRCUIT
ON
V+
C
V+
C
V
50Ω
NO or NC
COM
NO or NC
IN
1
SIGNAL
or V
INH
IN
INL
GENERATOR
0V or V+
IMPEDANCE
ANALYZER
NC or NO
COM
ANALYZER
GND
GND
R
L
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
Supply Sequencing And Overvoltage Protection
Detailed Description
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to GND (see
Figure 8). To prevent forward biasing these diodes, V+ must
be applied before any input signals, and the input signal
voltages must remain between V+ and GND. If these
conditions cannot be guaranteed, then one of the following
two protection methods should be employed.
The ISL84714 is a bidirectional, single pole/double throw
(SPDT) analog switch that offers precise switching capability
from a single 1.65V to 3.6V supply with low on-resistance
(0.44Ω) and high speed operation (t
= 7.5ns, t = 2.9ns).
ON
OFF
The device is especially well suited for portable battery
powered equipment due to its low operating supply voltage
(1.65V), low power consumption (1.05µW), low leakage
currents (20nA max), and the tiny SC70 packaging. The ultra
low on-resistance and Ron flatness provide very low insertion
loss and distortion to application that require signal
reproduction.
6
ISL84714
Logic inputs can easily be protected by adding a 1kΩ
resistor in series with the input (see Figure 8). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
This family of switches cannot be operated with bipolar
supplies, because the input switching point becomes
negative in this configuration.
Logic-Level Thresholds
This switch family is 1.8V CMOS compatible (0.5V and 1.4V)
over a supply range of 2V to 3.6V (see Figure 15). At 3.6V
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
the V level is about 1.1V. This is still below the 1.8V CMOS
IH
guaranteed high output minimum level of 1.4V, but noise
margin is reduced.
purpose of using a low R
switch, so two small signal
ON
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 8). These
additional diodes limit the analog signal from 1V below V+ to
1V above GND. The low leakage current performance is
unaffected by this approach, but the switch signal range is
reduced and the resistance may increase, especially at low
supply voltages.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
High-Frequency Performance
In 50Ω systems, signal response is reasonably flat even past
90MHz (see Figure 16). The frequency response is very
consistent over a wide V+ range, and for varying analog
signal levels.
OPTIONAL PROTECTION
DIODE
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. Off Isolation is
the resistance to this feedthrough, while Crosstalk indicates
the amount of feedthrough from one switch to another.
Figure 17 details the high Off Isolation and Crosstalk
rejection provided by this family. At 1MHz, Off Isolation is
about 50dB in 50Ω systems, decreasing approximately 20dB
per decade as frequency increases. Higher load
V+
OPTIONAL
PROTECTION
RESISTOR
IN
V
X
V
NO or NC
COM
GND
OPTIONAL PROTECTION
DIODE
impedances decrease Off Isolation and Crosstalk rejection
due to the voltage divider action of the switch OFF
impedance and the load impedance.
FIGURE 8. OVERVOLTAGE PROTECTION
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND. One of
these diodes conducts if any analog signal exceeds V+ or
GND.
Power-Supply Considerations
The ISL84714 construction is typical of most single supply
CMOS analog switches, in that they have two supply pins:
V+ and GND. V+ and GND drive the internal CMOS
switches and set their analog voltage limits. Unlike switches
with a 4V maximum supply voltage, the ISL84714 4.8V
maximum supply voltage provides plenty of room for the
10% tolerance of 3.6V supplies, as well as room for
overshoot and noise spikes.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the analog-
signal-path leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog signal
paths and V+ or GND.
The minimum recommended supply voltage is 1.65V but the
part will operate with a supply below 1.5V. It is important to
note that the input signal range, switching times, and on-
resistance degrade at lower supply voltages. Refer to the
electrical specification tables and Typical Performance
curves for details.
V+ and GND also power the internal logic and level shifters.
The level shifters convert the input logic levels to switched
V+ and GND signals to drive the analog switch gate
terminals.
7
ISL84714
Typical Performance Curves T = 25°C, Unless Otherwise Specified
A
0.65
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
I
= 100mA
V+ = 2.7V
= 100mA
COM
COM
I
V+ = 1.5V
0.6
0.55
0.5
85°C
25°C
0.45
0.4
V+ = 1.8V
V+ = 2.7V
1
V+ = 3.6V
-40°C
0.35
0.3
V+ = 3V
0
0.5
1
1.5
(V)
2
2.5
3
0
2
3
4
V
V
(V)
COM
COM
FIGURE 10. ON RESISTANCE vs SWITCH VOLTAGE
FIGURE 9. ON RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
60
0.8
V+ = 1.8V
= 10mA
I
COM
85°C
40
20
0.7
0.6
0.5
0.4
0.3
V+ = 3V
25°C
V+ = 1.8V
0
-40°C
-20
-40
-60
0
0.5
1
1.5
2
0
0.5
1
1.5
2
2.5
3
V
(V)
V
(V)
COM
COM
FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE
FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE
30
7
6
5
25
20
15
10
5
85°C
4
85°C
25°C
-40°C
25°C
3
-40°C
2
1
1.5
2
2.5
V+ (V)
3
3.5
4
4.5
1.5
2
2.5
V+ (V)
3
3.5
4
4.5
1
FIGURE 13. TURN - ON TIME vs SUPPLY VOLTAGE
FIGURE 14. TURN - OFF TIME vs SUPPLY VOLTAGE
8
ISL84714
Typical Performance Curves T = 25°C, Unless Otherwise Specified (Continued)
A
1.3
V+ = 1.8V to 3.6V
1.2
GAIN
0
1.1
1
-20
V
INH
0.9
0.8
0.7
0.6
0.5
0.4
0.3
PHASE
0
20
40
60
80
V
INL
R
= 50Ω
L
V
= 0.2V
to 2.8V
(V+ = 3.0V)
IN
P-P
P-P
10
FREQUENCY (MHz)
1
1.5
2
2.5
3
3.5
4
4.5
1
100
300
V+ (V)
FIGURE 16. FREQUENCY RESPONSE
FIGURE 15. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE
0
0
V+ = 1.8V to 3.6V
-10
10
20
30
40
50
60
70
80
90
-20
-30
-40
ISOLATION
-50
-60
-70
-80
CROSSTALK
-90
-100
100
1K
10K
100K
1M
10M
100M 500M
FREQUENCY (Hz)
FIGURE 17. CROSSTALK AND OFF ISOLATION
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT: 57
PROCESS:
Submicron CMOS
9
ISL84714
Small Outline Transistor Plastic Packages (SC70-6)
P6.049
VIEW C
0.20 (0.008)
C
M
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
INCHES MILLIMETERS
MIN
C
L
e
b
6
SYMBOL
MAX
0.043
0.004
0.039
0.012
0.010
0.009
0.009
0.085
0.094
0.053
MIN
0.80
0.00
0.00
0.15
0.15
0.08
0.08
1.85
1.80
1.15
MAX
1.10
0.10
1.00
0.30
0.25
0.22
0.20
2.15
2.40
1.35
NOTES
A
A1
A2
b
0.031
0.000
0.031
0.006
0.006
0.003
0.003
0.073
0.071
0.045
-
-
-
-
5
4
3
C
E1
C
L
C
E
L
1
2
b1
c
6
6
3
-
e1
c1
D
D
C
L
E
E1
e
3
-
SEATING
PLANE
0.0256 Ref
0.0512 Ref
0.010 0.018
0.65 Ref
1.30 Ref
0.26 0.46
A2
A1
A
e1
L
-
-C-
4
L1
L2
N
0.017 Ref.
0.006 BSC
6
0.420 Ref.
0.15 BSC
6
0.10 (0.004) C
5
b
WITH
PLATING
R
0.004
-
0.10
-
b1
R1
α
0.004
0.010
0.15
0.25
o
o
o
o
c
c1
0
8
0
8
-
Rev. 2 9/03
BASE METAL
R1
NOTES:
1. Dimensioning and tolerance per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC70 and JEDEC MO203AB.
4X θ1
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
R
6. These Dimensions apply to the flat section of the lead between
GAUGE PLANE
0.08mm and 0.15mm from the lead tip.
SEATING
PLANE
L
7. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only
C
α
L2
L1
4X θ1
VIEW C
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10
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