ISL83483IBZ [INTERSIL]
3.3V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers; 3.3V ，低功耗，高速或限摆率， RS - 485 / RS -422收发器
| 型号： | ISL83483IBZ |
| 厂家： | 
Intersil |
| 描述： | 3.3V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers |
| 文件： | 总17页 (文件大小：541K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL83483, ISL83485, ISL83488,
ISL83490, ISL83491
®
Data Sheet
August 2004
FN6052.3
3.3V, Low Power, High Speed or Slew Rate
Limited, RS-485/RS-422 Transceivers
Features
• Operate from a Single +3.3V Supply (10% Tolerance)
• Interoperable with 5V Logic
These Intersil RS-485/RS-422 devices are BiCMOS 3.3V
powered, single transceivers that meet both the RS-485 and
RS-422 standards for balanced communication. Unlike
competitive devices, this Intersil family is specified for 10%
tolerance supplies (3V to 3.6V).
• High Data Rates. . . . . . . . . . . . . . . . . . . . . up to 10Mbps
• Single Unit Load Allows up to 32 Devices on the Bus
• Slew Rate Limited Versions for Error Free Data
The ISL83483 and ISL83488 utilize slew rate limited drivers
which reduce EMI, and minimize reflections from improperly
terminated transmission lines, or unterminated stubs in
multidrop and multipoint applications.
Transmission (ISL83483, ISL83488) . . . . . .up to 250kbps
• Low Current Shutdown Mode (ISL83483, ISL83485,
ISL83491). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15nA
• -7V to +12V Common Mode Input Voltage Range
Data rates up to 10Mbps are achievable by using the
ISL83485, ISL83490, or ISL83491, which feature higher
slew rates.
• Three State Rx and Tx Outputs (Except ISL83488,
ISL83490)
• 10ns Propagation Delay, 1ns Skew (ISL83485, ISL83490,
ISL83491)
Logic inputs (e.g., DI and DE) accept signals in excess of
5.5V, making them compatible with 5V logic families.
• Full Duplex and Half Duplex Pinouts
Receiver (Rx) inputs feature a “fail-safe if open” design,
which ensures a logic high output if Rx inputs are floating. All
devices present a “single unit load” to the RS-485 bus, which
allows up to 32 transceivers on the network.
• Current Limiting and Thermal Shutdown for driver
Overload Protection
• Pb-free available
Driver (Tx) outputs are short circuit protected, even for
voltages exceeding the power supply voltage. Additionally,
on-chip thermal shutdown circuitry disables the Tx outputs to
prevent damage if power dissipation becomes excessive.
Applications
• Factory Automation
• Security Networks
The ISL83488, ISL83490, ISL83491 are configured for full
duplex (separate Rx input and Tx output pins) applications.
The ISL83488 and ISL83490 are offered in space saving 8
lead packages for applications not requiring Rx and Tx
output disable functions (e.g., point-to-point and RS-422).
Half duplex configurations (ISL83483, ISL83485) multiplex
the Rx inputs and Tx outputs to provide transceivers with Rx
and Tx disable functions in 8 lead packages.
• Building Environmental Control Systems
• Industrial/Process Control Networks
• Level Translators (e.g., RS-232 to RS-422)
• RS-232 “Extension Cords”
TABLE 1. SUMMARY OF FEATURES
SLEW-RATE RECEIVER/DRIVER QUIESCENT I
PART
NUMBER
HALF/FULL
DUPLEX
DATA RATE
(Mbps)
LOW POWER
SHUTDOWN?
CC
LIMITED?
ENABLE?
(mA)
0.65
0.65
0.65
0.65
0.65
PIN COUNT
ISL83483
ISL83485
ISL83488
ISL83490
ISL83491
Half
Half
Full
Full
Full
0.25
10
Yes
No
Yes
Yes
Yes
No
8
8
Yes
0.25
10
Yes
No
No
8
No
No
8
10
No
Yes
Yes
14
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003, 2004. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
ISL83483, ISL83485, ISL83488, ISL83490, ISL83491
Pinouts
ISL83483, ISL83485 (PDIP, SOIC)
ISL83488, ISL83490 (PDIP, SOIC)
ISL83491 (PDIP, SOIC)
TOP VIEW
TOP VIEW
TOP VIEW
RO
RE
DE
DI
1
2
3
4
8
7
6
5
V
CC
V
1
2
3
4
8
7
6
5
A
B
Z
NC
RO
1
2
3
4
5
6
7
14 V
13 V
CC
CC
R
R
D
B/Z
RO
DI
CC
R
D
A/Y
RE
12 A
11 B
10 Z
D
GND
GND
Y
DE
DI
GND
GND
9
8
Y
NC
Ordering Information
Truth Tables
PART NO.
(BRAND)
TEMP.
RANGE ( C)
TRANSMITTING
o
PACKAGE
PKG. DWG. #
INPUTS
OUTPUTS
ISL83483IB*
(83483IB)
-40 to 85
8 Ld SOIC
M8.15
RE
X
DE
1
DI
1
Z
0
1
Y
1
ISL83483IBZ*
(83483IB) (Note)
-40 to 85
8 Ld SOIC
(Pb-free)
M8.15
X
1
0
0
ISL83483IP
-40 to 85
-40 to 85
8 Ld PDIP
8 Ld SOIC
E8.3
0
0
X
X
High-Z
High-Z
High-Z *
ISL83485IB*
(83485IB)
M8.15
1
0
High-Z *
ISL83485IBZ*
(83485IB) (Note)
-40 to 85
8 Ld SOIC
(Pb-free)
M8.15
NOTE: *Shutdown Mode for ISL83483, ISL83485, ISL83491
ISL83485IP
-40 to 85
-40 to 85
8 Ld PDIP
8 Ld SOIC
E8.3
ISL83488IB*
(83488IB)
M8.15
RECEIVING
INPUTS
OUTPUT
ISL83488IBZ*
(83488IB) (Note)
-40 to 85
8 Ld SOIC
(Pb-free)
M8.15
RE
DE
DE
A-B
RO
Half Duplex Full Duplex
ISL83488IP
-40 to 85
-40 to 85
8 Ld PDIP
8 Ld SOIC
E8.3
0
0
0
1
1
0
0
0
0
1
X
X
X
0
≥ +0.2V
1
0
ISL83490IB*
(83490IB)
M8.15
≤ -0.2V
ISL83490IBZ*
(83490IB) (Note)
-40 to 85
8 Ld SOIC
(Pb-free)
M8.15
Inputs Open
1
X
X
High-Z *
High-Z
ISL83490IP
ISL83491IB*
-40 to 85
-40 to 85
-40 to 85
8 Ld PDIP
E8.3
1
14 Ld SOIC
M14.15
M14.15
NOTE: *Shutdown Mode for ISL83483, ISL83485, ISL83491
ISL83491IBZ*
(Note)
14 Ld SOIC
(Pb-free)
ISL83491IP
-40 to 85
14 Ld PDIP
E14.3
*Add “-T” suffix to part number for tape and reel packaging.
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
2
ISL83483, ISL83485, ISL83488, ISL83490, ISL83491
Pin Descriptions
PIN
FUNCTION
RO
RE
DE
DI
Receiver output: If A > B by at least 0.2V, RO is high; If A < B by 0.2V or more, RO is low; RO = High if A and B are unconnected (floating).
Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high.
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is low.
Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low.
GND
A/Y
B/Z
A
Ground connection.
Noninverting receiver input and noninverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1.
Inverting receiver input and inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1.
Noninverting receiver input.
Inverting receiver input.
B
Y
Noninverting driver output.
Inverting driver output.
Z
V
System power supply input (3V to 3.6V).
No Connection.
CC
NC
3
ISL83483, ISL83485, ISL83488, ISL83490, ISL83491
Typical Operating Circuits
ISL83483, ISL83485
+3.3V
+3.3V
+
+
0.1µF
0.1µF
8
8
V
V
CC
CC
RO
1
2
4
DI
R
D
RE
DE
R
T
R
T
3
2
7
6
B/Z
A/Y
DE
RE
7
6
B/Z
A/Y
3
4
DI
1
RO
R
D
GND
5
GND
5
ISL83488, ISL83490
+3.3V
+3.3V
+
+
0.1µF
0.1µF
1
1
V
V
CC
CC
R
T
A
B
8
7
Y
Z
5
6
2
3
RO
DI
3
2
DI
R
D
R
6
5
Z
Y
B
A
T
7
8
RO
R
D
GND
4
GND
4
ISL83491
+3.3V
+3.3V
+
+
0.1µF
0.1µF
13, 14
13,14
V
V
CC
CC
R
T
A
B
12
11
Y
Z
9
DI
2
5
RO
R
D
10
3
4
RE
DE
DE
RE
4
3
R
10
9
Z
Y
B
A
T
11
12
RO
5
DI
2
R
D
GND
GND
6, 7
6, 7
4
ISL83483, ISL83485, ISL83488, ISL83490, ISL83491
Absolute Maximum Ratings
Thermal Information
o
V
to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Thermal Resistance (Typical, Note 1)
θJA ( C/W)
CC
Input Voltages
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . .
8 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . .
14 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
14 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Plastic Package) . . . . . . . 150 C
Maximum Storage Temperature Range. . . . . . . . . . -65 C to 150 C
170
140
130
105
o
DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
Input/Output Voltages
A, B, Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +12.5V
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (V
Short Circuit Duration
Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
+0.5V)
CC
o
o
o
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300 C
(SOIC- Lead Tips Only)
Operating Conditions
Temperature Range
ISL834XXIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 85 C
o
o
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
o
Electrical Specifications Test Conditions: V = 3V to 3.6V; Unless Otherwise Specified. Typicals are at V
= 3.3V, T = 25 C,
CC
CC
A
Note 2
TEMP
o
PARAMETER
SYMBOL
TEST CONDITIONS
( C)
MIN
TYP
MAX UNITS
DC CHARACTERISTICS
Driver Differential V
(no load)
V
V
Full
Full
Full
Full
Full
-
2
-
V
V
V
V
V
V
V
OUT
OUT
OD1
OD2
CC
-
Driver Differential V
(with load)
R
R
R
R
= 100Ω (RS-422) (Figure 1A)
= 54Ω (RS-485) (Figure 1A)
2.7
2.3
2.6
0.01
L
L
L
L
1.5
1.5
-
CC
-
= 60Ω, -7V ≤ V
≤ 12V (Figure 1B)
CM
Change in Magnitude of Driver
Differential V for
∆V
= 54Ω or 100Ω (Figure 1A)
0.2
OD
OUT
Complementary Output States
Driver Common-Mode V
V
R
R
= 54Ω or 100Ω (Figure 1A)
= 54Ω or 100Ω (Figure 1A)
Full
Full
-
-
1.8
3
V
V
OUT
Change in Magnitude of Driver
Common-Mode V for
OC
L
∆V
0.01
0.2
OC
L
OUT
Complementary Output States
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
V
DE, DI, RE
DE, DI, RE
DE, DI
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
2
-
-
-
-
0.8
2
V
V
IH
V
IL
I
-2
-25
-
-
µA
µA
mA
mA
µA
µA
µA
µA
V
IN1
IN2
IN3
IN3
RE
-
25
1
Input Current (A, B)
I
I
I
DE = 0V, V
= 0V or 3.6V
V
V
V
V
= 12V
= -7V
= 12V
= -7V
0.6
-0.3
14
-11
0.03
-0.01
-
CC
IN
IN
IN
IN
-
-0.8
20
-
Output Leakage Current (Y, Z)
(ISL83491)
RE = 0V, DE = 0V, V
= 0V or 3.6V
-
CC
-20
-
Output Leakage Current (Y, Z)
in Shutdown Mode (ISL83491)
RE = V , DE = 0V, V
CC
= 0V or 3.6V V = 12V
IN
1
CC
V
= -7V
-1
-0.2
-
IN
Receiver Differential Threshold
Voltage
V
-7V ≤ V
≤ 12V
0.2
TH
CM
Receiver Input Hysteresis
∆V
V
= 0V
25
-
50
-
-
-
mV
V
TH
CM
Receiver Output High Voltage
V
I
= -4mA, V = 200mV
ID
Full
V
-
OH
O
CC
0.4
Receiver Output Low Voltage
V
I
= -4mA, V = 200mV
ID
Full
-
-
0.4
V
OL
O
5
ISL83483, ISL83485, ISL83488, ISL83490, ISL83491
o
Electrical Specifications Test Conditions: V = 3V to 3.6V; Unless Otherwise Specified. Typicals are at V
= 3.3V, T = 25 C,
A
CC
CC
Note 2 (Continued)
TEMP
o
PARAMETER
SYMBOL
TEST CONDITIONS
( C)
MIN
TYP
MAX UNITS
Three-State (high impedance)
Receiver Output Current
I
0.4V ≤ V ≤ 2.4V
Full
-1
-
1
µA
OZR
O
Receiver Input Resistance
R
-7V ≤ V
≤ 12V
Full
Full
12
-
19
-
kΩ
IN
CM
No-Load Supply Current (Note 3)
I
DI = 0V or V
DE = V
,
0.75
1.2
mA
CC
CC
CC
RE = 0V
or V
CC
DE = 0V,
RE = 0V
Full
Full
Full
Full
-
-
0.65
1
mA
nA
Shutdown Supply Current
I
DE = 0V, RE = V , DI = 0V or V
CC
15
-
100
250
60
SHDN
CC
(Except ISL83488 and ISL83490)
Driver Short-Circuit Current,
I
DE = V , -7V ≤ V or V ≤ 12V (Note 4)
CC
-
mA
mA
OSD1
Y
Z
V
= High or Low
O
Receiver Short-Circuit Current
I
0V ≤ V ≤ V
8
-
OSR
O
CC
DRIVER SWITCHING CHARACTERISTICS (ISL83485, ISL83490, ISL83491)
Maximum Data Rate
f
Full
Full
Full
Full
Full
Full
12
1
3
6
-
15
10
5
-
Mbps
ns
MAX
Driver Differential Output Delay
Driver Differential Rise or Fall Time
Driver Input to Output Delay
Driver Output Skew
t
R
R
R
R
R
= 60Ω, C = 15pF (Figure 2A)
35
20
35
8
DD
DIFF
L
t , t
= 60Ω, C = 15pF (Figure 2A)
ns
R
F
DIFF
L
t
, t
PLH PHL
= 27Ω, C = 15pF (Figure 2C)
10
1
ns
L
L
L
L
t
= 27Ω, C = 15pF (Figure 2C)
ns
SKEW
L
Driver Enable to Output High
(Except ISL83490)
t
t
= 110Ω, C = 50pF, SW = GND (Figure 3),
-
45
90
ns
ZH
L
(Note 5)
= 110Ω, C = 50pF, SW = V (Figure 3),
CC
Driver Enable to Output Low
(Except ISL83490)
t
R
Full
-
45
90
ns
ZL
L
L
(Note 5)
Driver Disable from Output High
(Except ISL83490)
R
R
R
= 110Ω, C = 50pF, SW = GND (Figure 3)
25
Full
25
-
-
-
-
-
65
-
80
110
80
ns
ns
ns
ns
ns
HZ
L
L
L
L
Driver Disable from Output Low
(Except ISL83490)
t
= 110Ω, C = 50pF, SW = V (Figure 3)
CC
65
-
LZ
L
Full
Full
110
150
Driver Enable from Shutdown to
Output High (Except ISL83490)
t
= 110Ω, C = 50pF, SW = GND (Figure 3),
115
ZH(SHDN)
L
(Notes 7, 8)
= 110Ω, C = 50pF, SW = V (Figure 3),
CC
Driver Enable from Shutdown to
Output Low (Except ISL83490)
t
R
Full
-
115
150
ns
ZL(SHDN)
L
L
(Notes 7, 8)
DRIVER SWITCHING CHARACTERISTICS (ISL83483, ISL83488)
Maximum Data Rate
f
Full
Full
Full
25
250
600
400
600
400
-
-
-
kbps
ns
MAX
Driver Differential Output Delay
Driver Differential Rise or Fall Time
Driver Input to Output Delay
t
R
R
R
= 60Ω, C = 15pF (Figure 2A)
930
900
930
-
1400
1200
1500
1500
-
DD
DIFF
L
t , t
= 60Ω, C = 15pF (Figure 2A)
ns
R
F
DIFF
L
t
, t
PLH PHL
= 27Ω, C = 15pF (Figure 2C)
ns
L
L
Full
Full
Full
ns
Driver Output Skew
t
R
R
= 27Ω, C = 15pF (Figure 2C)
140
385
ns
SKEW
L
L
Driver Enable to Output High
(Except ISL83488)
t
t
= 110Ω, C = 50pF, SW = GND (Figure 3),
-
800
ns
ZH
L
L
(Note 5)
= 110Ω, C = 50pF, SW = V (Figure 3),
CC
Driver Enable to Output Low
(Except ISL83488)
t
R
Full
-
55
800
ns
ZL
L
L
(Note 5)
Driver Disable from Output High
(Except ISL83488)
R
= 110Ω, C = 50pF, SW = GND (Figure 3)
25
-
-
63
-
80
ns
ns
HZ
L
L
Full
110
6
ISL83483, ISL83485, ISL83488, ISL83490, ISL83491
o
Electrical Specifications Test Conditions: V = 3V to 3.6V; Unless Otherwise Specified. Typicals are at V
= 3.3V, T = 25 C,
A
CC
CC
Note 2 (Continued)
TEMP
o
PARAMETER
SYMBOL
TEST CONDITIONS
= 110Ω, C = 50pF, SW = V (Figure 3)
( C)
MIN
TYP
70
MAX UNITS
Driver Disable from Output Low
(Except ISL83488)
t
R
25
-
-
-
80
ns
ns
ns
LZ
L
L
CC
Full
Full
-
110
Driver Enable from Shutdown to
Output High (Except ISL83488)
t
R
R
= 110Ω, C = 50pF, SW = GND (Notes 7, 8)
450
2000
ZH(SHDN)
L
L
Driver Enable from Shutdown to
Output Low (Except ISL83488)
t
= 110Ω, C = 50pF, SW = V (Figure 3),
CC
Full
-
126
2000
ns
ZL(SHDN)
L
L
(Notes 7, 8)
RECEIVER SWITCHING CHARACTERISTICS (All Versions)
Receiver Input to Output Delay
Receiver Skew | t - t
t
, t
PLH PHL
(Figure 4)
(Figure 4)
Full
25
25
-
45
2
90
10
12
50
ns
ns
ns
ns
|
t
SKD
PLH PHL
Full
Full
-
2
Receiver Enable to Output High
(Except ISL83488 and ISL83490)
t
t
R
= 1kΩ, C = 15pF, SW = GND (Figure 5),
-
11
ZH
L
L
(Note 6)
= 1kΩ, C = 15pF, SW = V (Figure 5),
CC
Receiver Enable to Output Low
(Except ISL83488 and ISL83490)
t
R
Full
Full
Full
Full
Full
-
-
11
7
50
45
ns
ns
ns
ns
ns
ZL
L
L
(Note 6)
Receiver Disable from Output High
(Except ISL83488 and ISL83490)
R
= 1kΩ, C = 15pF, SW = GND (Figure 5)
L
HZ
L
L
Receiver Disable from Output Low
(Except ISL83488 and ISL83490)
t
R
= 1kΩ, C = 15pF, SW = V (Figure 5)
CC
-
7
45
LZ
L
Time to Shutdown
(Except ISL83488 and ISL83490)
t
(Note 7)
80
-
190
240
300
600
SHDN
Receiver Enable from Shutdown to
Output High
t
R = 1kΩ, C = 15pF, SW = GND (Figure 5),
L L
(Notes 7, 9)
ZH(SHDN)
(Except ISL83488 and ISL83490)
Receiver Enable from Shutdown to
Output Low
t
R
= 1kΩ, C = 15pF, SW = V (Figure 5),
CC
Full
-
240
600
ns
ZL(SHDN)
L
L
(Notes 7, 9)
(Except ISL83488 and ISL83490)
NOTES:
2. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
3. Supply current specification is valid for loaded drivers when DE = 0V.
4. Applies to peak current. See “Typical Performance Curves” for more information.
5. When testing the ISL83483, ISL83485, ISL83491, keep RE = 0 to prevent the device from entering SHDN.
6. When testing the ISL83483, ISL83485, ISL83491, the RE signal high time must be short enough (typically <100ns) to prevent the device from
entering SHDN.
7. The ISL83483, ISL83485, ISL83491 are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 80ns, the
parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 300ns, the parts are guaranteed to have entered shutdown.
See “Low-Power Shutdown Mode” section.
8. Keep RE = VCC, and set the DE signal low time >300ns to ensure that the device enters SHDN.
9. Set the RE signal high time >300ns to ensure that the device enters SHDN.
7
ISL83483, ISL83485, ISL83488, ISL83490, ISL83491
Test Circuits and Waveforms
R /2
L
375Ω
DE
DI
DE
DI
V
V
CC
CC
Z
Y
Z
Y
V
CM
R
= 60Ω
V
V
OD
L
D
D
OD
-7V to +12V
V
R /2
L
375Ω
OC
FIGURE 1B. V
WITH COMMON MODE LOAD
FIGURE 1A. V
OD
AND V
OC
OD
FIGURE 1. DC DRIVER TEST CIRCUITS
3V
DI
1.5V
PLH
1.5V
C
= 15pF
= 15pF
L
DE
0V
3V
Z
t
t
t
DI
PHL
R
= 60Ω
DIFF
D
Y
V
OH
C
L
50%
50%
50%
OUT (Y)
SIGNAL
GENERATOR
V
OL
t
PHL
PLH
V
OH
FIGURE 2A. DIFFERENTIAL TEST CIRCUIT
OUT
OUT (Z)
50%
50%
V
OL
t
t
DD
DD
DE
3V
+V
-V
OD
90%
90%
DIFF OUT (Y - Z)
Z
50%
10%
R
= 27Ω
L
DI
10%
V
D
OM
OD
Y
t
t
R
F
C
= 15pF
L
SKEW = |t
PLH
(Y or Z) - t
(Z or Y)|
PHL
SIGNAL
GENERATOR
V
+ V
2
OH
OL
V
=
≈1.5V
OM
FIGURE 2B. MEASUREMENT POINTS
FIGURE 2C. SINGLE ENDED TEST CIRCUIT
FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
8
ISL83483, ISL83485, ISL83488, ISL83490, ISL83491
Test Circuits and Waveforms (Continued)
DE
DI
Z
Y
110Ω
3V
0V
V
CC
DE
D
1.5V
1.5V
HZ
GND
NOTE 7
SW
= 50pF
SIGNAL
GENERATOR
C
L
t
, t
ZH ZH(SHDN)
NOTE 7
t
OUTPUT HIGH
50%
V
OH
V
- 0.25V
OH
PARAMETER
OUTPUT
Y/Z
RE
X
DI
SW
GND
OUT (Y, Z)
t
1/0
0/1
1/0
0/1
1/0
0/1
0V
HZ
t
t
t
t
t
Y/Z
X
V
LZ
CC
GND
t
, t
ZL ZL(SHDN)
t
LZ
Y/Z
0 (Note 5)
0 (Note 5)
1 (Note 8)
1 (Note 8)
ZH
NOTE 7
V
CC
Y/Z
V
ZL
CC
GND
OUT (Y, Z)
50%
Y/Z
V
+ 0.25V
V
ZH(SHDN)
ZL(SHDN)
OL
OL
OUTPUT LOW
Y/Z
V
CC
FIGURE 3A. TEST CIRCUIT
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. DRIVER ENABLE AND DISABLE TIMES (EXCLUDING ISL83488, ISL83490)
RE
3V
0V
GND
15pF
A
B
A
1.5V
PLH
1.5V
PHL
+1.5V
RO
R
t
t
V
SIGNAL
GENERATOR
CC
50%
50%
RO
0V
FIGURE 4A. TEST CIRCUIT
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. RECEIVER PROPAGATION DELAY
RE
B
1kΩ
NOTE 7
V
GND
CC
RO
3V
R
A
GND
SW
RE
SIGNAL
1.5V
1.5V
HZ
GENERATOR
15pF
0V
t
, t
ZH ZH(SHDN)
NOTE 7
t
OUTPUT HIGH
1.5V
V
OH
V
- 0.25V
OH
PARAMETER
DE
A
SW
GND
RO
t
t
t
t
t
t
0
+1.5V
-1.5V
+1.5V
-1.5V
+1.5V
-1.5V
HZ
LZ
ZH
ZL
0V
0
0
0
0
0
V
CC
t
, t
ZL ZL(SHDN)
t
LZ
(Note 6)
(Note 6)
GND
NOTE 7
V
CC
V
CC
RO
1.5V
V
+ 0.25V
(Note 9)
(Note 9)
GND
OL
V
ZH(SHDN)
ZL(SHDN)
OL
OUTPUT LOW
V
CC
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5A. TEST CIRCUIT
FIGURE 5. RECEIVER ENABLE AND DISABLE TIMES (EXCLUDING ISL83488, ISL83490)
9
ISL83483, ISL83485, ISL83488, ISL83490, ISL83491
rate limited versions is a maximum of 250kbps. Outputs of
Application Information
ISL83485, ISL83490, ISL83491 drivers are not limited, so
faster output transition times allow data rates of at least
10Mbps.
RS-485 and RS-422 are differential (balanced) data
transmission standards for use in long haul or noisy
environments. RS-422 is a subset of RS-485, so RS-485
transceivers are also RS-422 compliant. RS-422 is a point-
to-multipoint (multidrop) standard, which allows only one
driver and up to 10 (assuming one unit load devices)
receivers on each bus. RS-485 is a true multipoint standard,
which allows up to 32 one unit load devices (any
combination of drivers and receivers) on each bus. To allow
for multipoint operation, the RS-485 spec requires that
drivers must handle bus contention without sustaining any
damage.
Data Rate, Cables, and Terminations
RS-485, RS-422 are intended for network lengths up to
4000’, but the maximum system data rate decreases as the
transmission length increases. Devices operating at 10Mbps
are limited to lengths of a few hundred feet, while the
250kbps versions can operate at full data rates with lengths
in excess of 1000’.
Twisted pair is the cable of choice for RS-485, RS-422
networks. Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common mode
signals, which are effectively rejected by the differential
receivers in these ICs.
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as
long as 4000’, so the wide CMR is necessary to handle
ground potential differences, as well as voltages induced in
the cable by external fields.
Proper termination is imperative, when using the 10Mbps
devices, to minimize reflections. Short networks using the
250kbps versions need not be terminated, but, terminations
are recommended unless power dissipation is an overriding
concern.
Receiver Features
These devices utilize a differential input receiver for maximum
noise immunity and common mode rejection. Input sensitivity
is ±200mV, as required by the RS422 and RS-485
specifications.
In point-to-point, or point-to-multipoint (single driver on bus)
networks, the main cable should be terminated in its
characteristic impedance (typically 120Ω) at the end farthest
from the driver. In multi-receiver applications, stubs
connecting receivers to the main cable should be kept as
short as possible. Multipoint (multi-driver) systems require
that the main cable be terminated in its characteristic
impedance at both ends. Stubs connecting a transceiver to
the main cable should be kept as short as possible.
Receiver input impedance surpasses the RS-422 spec of
4kΩ, and meets the RS-485 “Unit Load” requirement of 12kΩ
minimum.
Receiver inputs function with common mode voltages as
great as +9V/-7V outside the power supplies (i.e., +12V and
-7V), making them ideal for long networks where induced
voltages are a realistic concern.
Built-In Driver Overload Protection
As stated previously, the RS-485 spec requires that drivers
survive worst case bus contentions undamaged. The
ISL834XX devices meet this requirement via driver output
short circuit current limits, and on-chip thermal shutdown
circuitry.
All the receivers include a “fail-safe if open” function that
guarantees a high level receiver output if the receiver inputs
are unconnected (floating).
Receivers easily meet the data rates supported by the
corresponding driver.
The driver output stages incorporate short circuit current
limiting circuitry which ensures that the output current never
exceeds the RS-485 spec, even at the common mode
voltage range extremes. Additionally, these devices utilize a
foldback circuit which reduces the short circuit current, and
thus the power dissipation, whenever the contending voltage
exceeds either supply.
ISL83483, ISL83485, ISL83491 receiver outputs are tri-
statable via the active low RE input.
Driver Features
The RS-485, RS-422 driver is a differential output device that
delivers at least 1.5V across a 54Ω load (RS-485), and at
least 2V across a 100Ω load (RS-422) even with V
The drivers feature low propagation delay skew to maximize
bit width, and to minimize EMI.
= 3V.
In the event of a major short circuit condition, ISL834XX
devices also include a thermal shutdown feature that
disables the drivers whenever the die temperature becomes
excessive. This eliminates the power dissipation, allowing
the die to cool. The drivers automatically reenable after the
die temperature drops about 15 degrees. If the contention
persists, the thermal shutdown/reenable cycle repeats until
the fault is cleared. Receivers stay operational during
thermal shutdown.
CC
Drivers of the ISL83483, ISL83485, ISL83491 are tri-statable
via the active high DE input.
ISL83483/88 driver outputs are slew rate limited to minimize
EMI, and to minimize reflections in unterminated or
improperly terminated networks. Data rate on these slew
10
ISL83483, ISL83485, ISL83488, ISL83490, ISL83491
period of at least 300ns. Disabling both the driver and the
receiver for less than 80ns guarantees that shutdown is not
entered.
Low Power Shutdown Mode (ISL83483, ISL83485,
ISL83491 Only)
These CMOS transceivers all use a fraction of the power
required by their bipolar counterparts, but the ISL83483,
ISL83485, ISL83491 include a shutdown feature that
Note that receiver and driver enable times increase when
these devices enable from shutdown. Refer to Notes 5-9, at
the end of the Electrical Specification table, for more
information.
reduces the already low quiescent I
to a 15nA trickle.
CC
They enter shutdown whenever the receiver and driver are
simultaneously disabled (RE = V and DE = GND) for a
CC
o
Typical Performance Curves V = 3.3V, T = 25 C, ISL83483 thru ISL83491; Unless Otherwise Specified
CC
A
110
100
90
80
70
60
50
40
30
20
10
0
2.9
2.8
R
= 100Ω
DIFF
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2
R
= 54Ω
DIFF
-40
0
50
85
0
0.5
1
1.5
2
2.5
3
3.5
-25
25
75
o
DIFFERENTIAL OUTPUT VOLTAGE (V)
TEMPERATURE ( C)
FIGURE 6. DRIVER OUTPUT CURRENT vs DIFFERENTIAL
OUTPUT VOLTAGE
FIGURE 7. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs
TEMPERATURE
160
140
120
800
ISL83483/85, DE = V , RE = X
CC
Y OR Z = LOW
100
750
700
650
600
80
60
40
20
0
ISL83483/85, DE = RE = GND; ISL83491, DE = X, RE = GND;
ISL83488/90
-20
Y OR Z = HIGH
-40
-60
-80
-100
-120
-40
0
50
85
-25
25
75
-7 -6
-4
-2
0
2
4
6
8
10
12
o
OUTPUT VOLTAGE (V)
TEMPERATURE ( C)
FIGURE 8. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT
VOLTAGE
FIGURE 9. SUPPLY CURRENT vs TEMPERATURE
11
ISL83483, ISL83485, ISL83488, ISL83490, ISL83491
o
Typical Performance Curves V = 3.3V, T = 25 C, ISL83483 thru ISL83491; Unless Otherwise Specified (Continued)
CC
A
1200
300
R
= 54Ω
DIFF
R
= 54Ω
DIFF
FIGURE 2A
|t
- t
|
PHLY PLHZ
250
1100
t
PLHZ
|t
- t
|
t
PLHY PHLZ
PLHY
200
150
100
50
1000
900
800
700
t
PHLY
t
PHLZ
|CROSS PT. OF Y↑ & Z↓ - CROSS PT. OF Y↓ & Z↑|
0
-40
-40
0
50
85
0
50
85
-25
25
75
-25
25
75
o
o
TEMPERATURE ( C)
TEMPERATURE ( C)
FIGURE 10. DRIVER PROPAGATION DELAY vs
FIGURE 11. DRIVER SKEW vs TEMPERATURE
(ISL83483, ISL83488)
TEMPERATURE (ISL83483, ISL83488)
16
15
14
13
12
11
10
9
4
R
= 54Ω
R
= 54Ω
DIFF
DIFF
FIGURE 2A
3.5
3
|t |
- t
PHLY PLHZ
t
PLHZ
2.5
2
t
PLHY
t
PHLY
1.5
1
|CROSSING PT. OF Y↑ & Z↓ -
CROSSING PT. OF Y↓ & Z↑|
t
PHLY
-25
t
PHLZ
25
|t
- t |
PLHY PHLZ
8
0.5
-40
-40
0
50
85
75
0
50
85
-25
25
75
o
o
TEMPERATURE ( C)
TEMPERATURE ( C)
FIGURE 12. DRIVER PROPAGATION DELAY vs
TEMPERATURE (ISL83485, ISL83490, ISL83491)
FIGURE 13. DRIVER SKEW vs TEMPERATURE
(ISL83485, ISL84390, ISL83491)
R
= 54Ω, C = 15pF
L
R
= 54Ω, C = 15pF
L
DIFF
DIFF
5
0
5
0
DI
DI
5
0
5
0
RO
RO
3
3
2.5
2
2.5
2
B/Z
A/Y
1.5
1
1.5
1
A/Y
B/Z
0.5
0
0.5
0
TIME (400ns/DIV)
TIME (400ns/DIV)
FIGURE 14. DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (ISL83483, ISL83488)
FIGURE 15. DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (ISL83483, ISL83488)
12
ISL83483, ISL83485, ISL83488, ISL83490, ISL83491
o
Typical Performance Curves V = 3.3V, T = 25 C, ISL83483 thru ISL83491; Unless Otherwise Specified (Continued)
CC
A
R
= 54Ω, C = 15pF
R
= 54Ω, C = 15pF
DIFF
L
DIFF
L
5
0
5
0
DI
DI
5
0
5
0
RO
RO
3
3
2.5
2
2.5
2
A/Y
B/Z
B/Z
A/Y
1.5
1
1.5
1
0.5
0
0.5
0
TIME (10ns/DIV)
TIME (10ns/DIV)
FIGURE 16. DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (ISL83485, ISL83490, ISL83491)
FIGURE 17. DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (ISL83485, ISL83490, ISL83491)
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
528
PROCESS:
Si Gate CMOS
13
ISL83483, ISL83485, ISL83488, ISL83490, ISL83491
Dual-In-Line Plastic Packages (PDIP)
E8.3 (JEDEC MS-001-BA ISSUE D)
N
8 LEAD DUAL-IN-LINE PLASTIC PACKAGE
E1
INDEX
AREA
INCHES
MILLIMETERS
1
2
3
N/2
SYMBOL
MIN
MAX
0.210
-
MIN
-
MAX
5.33
-
NOTES
-B-
A
A1
A2
B
-
4
-A-
D
E
0.015
0.115
0.014
0.045
0.008
0.355
0.005
0.300
0.240
0.39
2.93
0.356
1.15
0.204
9.01
0.13
7.62
6.10
4
BASE
PLANE
0.195
0.022
0.070
0.014
0.400
-
4.95
0.558
1.77
0.355
10.16
-
-
A2
A
-C-
-
SEATING
PLANE
L
C
L
B1
C
8, 10
D1
B1
eA
-
A
A
1
D1
e
D
5
eC
C
B
eB
D1
E
5
0.010 (0.25) M
C
B S
0.325
0.280
8.25
7.11
6
NOTES:
E1
e
5
1. Controlling Dimensions: INCH. In case of conflict between
0.100 BSC
0.300 BSC
2.54 BSC
7.62 BSC
-
English and Metric dimensions, the inch dimensions control.
e
e
6
A
B
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
-
0.430
0.150
-
10.92
3.81
7
3. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication No. 95.
L
0.115
2.93
4
9
4. Dimensions A, A1 and L are measured with the package seated
N
8
8
in JEDEC seating plane gauge GS-3.
Rev. 0 12/93
5. D, D1, and E1 dimensions do not include mold flash or protru-
sions. Mold flash or protrusions shall not exceed 0.010 inch
(0.25mm).
e
6. E and
pendicular to datum
7. e and e are measured at the lead tips with the leads uncon-
are measured with the leads constrained to be per-
A
-C-
.
B
C
strained. e must be zero or greater.
C
8. B1 maximum dimensions do not include dambar protrusions.
Dambar protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3,
E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch
(0.76 - 1.14mm).
14
ISL83483, ISL83485, ISL83488, ISL83490, ISL83491
Dual-In-Line Plastic Packages (PDIP)
E14.3 (JEDEC MS-001-AA ISSUE D)
N
14 LEAD DUAL-IN-LINE PLASTIC PACKAGE
E1
INCHES
MILLIMETERS
INDEX
AREA
1
2
3
N/2
SYMBOL
MIN
MAX
0.210
-
MIN
-
MAX
5.33
-
NOTES
-B-
A
A1
A2
B
-
4
-A-
0.015
0.115
0.014
0.045
0.008
0.735
0.005
0.300
0.240
0.39
2.93
0.356
1.15
0.204
18.66
0.13
7.62
6.10
4
D
E
0.195
0.022
0.070
0.014
0.775
-
4.95
0.558
1.77
0.355
19.68
-
-
BASE
PLANE
A2
A
-C-
-
SEATING
PLANE
B1
C
8
L
C
L
-
D1
B1
eA
A1
A
D1
e
D
5
eC
C
B
D1
E
5
eB
0.010 (0.25) M
C
B S
0.325
0.280
8.25
7.11
6
NOTES:
E1
e
5
1. Controlling Dimensions: INCH. In case of conflict between English
and Metric dimensions, the inch dimensions control.
0.100 BSC
0.300 BSC
2.54 BSC
7.62 BSC
-
e
e
6
A
B
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
-
0.430
0.150
-
10.92
3.81
7
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
L
0.115
2.93
4
9
4. Dimensions A, A1 and L are measured with the package seated in
N
14
14
JEDEC seating plane gauge GS-3.
Rev. 0 12/93
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
e
6. E and
dicular to datum
7. e and e are measured at the lead tips with the leads uncon-
are measured with the leads constrained to be perpen-
A
-C-
.
B
C
strained. e must be zero or greater.
C
8. B1maximumdimensionsdonotincludedambarprotrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 -
1.14mm).
15
ISL83483, ISL83485, ISL83488, ISL83490, ISL83491
Small Outline Plastic Packages (SOIC)
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
N
INDEX
AREA
0.25(0.010)
M
B M
H
E
INCHES
MILLIMETERS
-B-
SYMBOL
MIN
MAX
MIN
1.35
0.10
0.33
0.19
4.80
3.80
MAX
1.75
0.25
0.51
0.25
5.00
4.00
NOTES
A
A1
B
C
D
E
e
0.0532
0.0040
0.013
0.0688
0.0098
0.020
-
1
2
3
L
-
9
SEATING PLANE
A
0.0075
0.1890
0.1497
0.0098
0.1968
0.1574
-
-A-
o
h x 45
D
3
4
-C-
α
µ
0.050 BSC
1.27 BSC
-
e
A1
H
h
0.2284
0.0099
0.016
0.2440
0.0196
0.050
5.80
0.25
0.40
6.20
0.50
1.27
-
C
B
0.10(0.004)
5
0.25(0.010) M
C A M B S
L
6
N
α
8
8
7
NOTES:
o
o
o
o
0
8
0
8
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
Rev. 0 12/93
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
16
ISL83483, ISL83485, ISL83488, ISL83490, ISL83491
Small Outline Plastic Packages (SOIC)
M14.15 (JEDEC MS-012-AB ISSUE C)
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
N
INDEX
AREA
0.25(0.010)
M
B M
H
E
INCHES
MILLIMETERS
-B-
SYMBOL
MIN
MAX
MIN
1.35
0.10
0.33
0.19
8.55
3.80
MAX
1.75
0.25
0.51
0.25
8.75
4.00
NOTES
A
A1
B
C
D
E
e
0.0532
0.0040
0.013
0.0688
0.0098
0.020
-
1
2
3
L
-
SEATING PLANE
A
9
0.0075
0.3367
0.1497
0.0098
0.3444
0.1574
-
-A-
o
h x 45
D
3
4
-C-
α
µ
0.050 BSC
1.27 BSC
-
e
A1
C
H
h
0.2284
0.0099
0.016
0.2440
0.0196
0.050
5.80
0.25
0.40
6.20
0.50
1.27
-
B
0.10(0.004)
5
0.25(0.010) M
C A M B S
L
6
N
α
14
14
7
NOTES:
o
o
o
o
0
8
0
8
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
Rev. 0 12/93
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension“E”doesnotincludeinterleadflashorprotrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
17
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ISL83483IBZ-T
3.3V, Half Duplex, 250kbps Slew Rate Limited, RS-485/RS-422 Transceiver; SOIC8; Temp Range: -40° to 85°C
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