ISL83080EIBZ [INTERSIL]
+-15kV ESD Protected, 5V, Full Fail-Safe, Fractional (1/8) Unit Load, RS-485/RS-422 Transceivers; + -15kV的ESD保护， 5V，全故障保护，分数（ 1/8 ）机组负荷， RS - 485 / RS -422收发器
| 型号： | ISL83080EIBZ |
| 厂家： | 
Intersil |
| 描述： | +-15kV ESD Protected, 5V, Full Fail-Safe, Fractional (1/8) Unit Load, RS-485/RS-422 Transceivers |
| 文件： | 总18页 (文件大小：828K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL83080E, ISL83082E, ISL83083E,
ISL83085E, ISL83086E, ISL83088E
®
Data Sheet
September 12, 2005
FN6085.6
±15kV ESD Protected, 5V, Full Fail-Safe,
Fractional (1/8) Unit Load, RS-485/RS-422
Transceivers
Features
• Pb-Free Plus Anneal Available (RoHS Compliant)
(See Ordering Info)
The ISL8308XE are BiCMOS, ESD protected, 5V powered,
single transceivers that meet both the RS-485 and RS-422
standards for balanced communication. Each driver output,
and receiver input, is protected against ±15kV ESD strikes
without latch-up, and unlike competitive products, this Intersil
family is specified for 10% tolerance supplies (4.5V to 5.5V).
• RS-485 I/O Pin ESD Protection . . . . . . . . . . ±15kV HBM
Class 3 ESD Protection (HBM) on all Pins. . . . . . . . >7kV
• Full Fail-safe (Open, Short, Terminated and Floating)
Receivers
• Hot Plug Circuitry (ISL83080E, ISL83082E, ISL83083E,
ISL83085E)
These devices have very low bus currents (+125µA/-75µA),
so they present a true “1/8 unit load” to the RS-485 bus. This
allows up to 256 transceivers on the network without violating
the RS-485 specification’s 32 unit load maximum, and without
using repeaters. For example, in a remote utility meter reading
system, individual meter readings are routed to a concentrator
via an RS-485 network, so the high allowed node count
minimizes the number of repeaters required. Data for all
meters is then read out from the concentrator via a single
access port, or a wireless link.
- Tx and Rx Outputs Remain Three-state During Power-
up/Power-down
• True 1/8 Unit Load Allows up to 256 Devices on the Bus
• Specified for Single 5V, 10% Tolerance, Supplies
• High Data Rates. . . . . . . . . . . . . . . . . . . . . up to 10Mbps
• Low Quiescent Supply Current . . . . . . . . . . . . . . . 530µA
Ultra Low Shutdown Supply Current . . . . . . . . . . . . 70nA
• -7V to +12V Common Mode Input Voltage Range
• Half and Full Duplex Pinouts
Receiver (Rx) inputs feature a “Full Fail-Safe” design, which
ensures a logic high Rx output if Rx inputs are floating,
shorted, or terminated but undriven.
• Three-State Rx and Tx Outputs
• Current Limiting and Thermal Shutdown for driver
Overload Protection
The ISL83080E, ISL83082E, ISL83083E, ISL83085E utilize
slew rate limited drivers which reduce EMI, and minimize
reflections from improperly terminated transmission lines, or
unterminated stubs in multidrop and multipoint applications.
Slew rate limited versions also include receiver input filtering to
enhance noise immunity in the presence of slow input signals.
Applications
• Automated Utility Meter Reading Systems
• High Node Count Systems
• Factory Automation
Hot Plug circuitry ensures that the Tx and Rx outputs remain
in a high impedance state until the power supply has
stabilized, and the Tx outputs are fully short circuit protected.
• Field Bus Networks
• Security Camera Networks
• Building Environmental Control Systems
• Industrial/Process Control Networks
The ISL83080E, ISL83083E, ISL83086E are configured for
full duplex (separate Rx input and Tx output pins)
applications. The half duplex versions multiplex the Rx inputs
and Tx outputs to allow transceivers with output disable
functions in 8 lead packages.
TABLE 1. SUMMARY OF FEATURES
PART
HALF/FULL DATARATE SLEW-RATE
#DEVICES
Rx/Tx
QUIESCENT LOW POWER
PIN
NUMBER
DUPLEX
(Mbps)
0.115
0.115
0.5
LIMITED?
HOT PLUG ON BUS
ENABLE?
I
(µA) SHUTDOWN? COUNT
CC
530
ISL83080E
ISL83082E
ISL83083E
ISL83085E
ISL83086E
ISL83088E
Full
Yes
Yes
Yes
Yes
Yes
No
256
256
256
256
256
256
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
14
8
Half
Yes
530
530
530
530
530
Full
Yes
14
8
Half
0.5
Yes
Full
10
No
14
8
Half
10
No
No
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004-2005. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Pinouts
ISL83082E, ISL83085E, ISL83088E
(MSOP, SOIC)
ISL83080E, ISL83083E, ISL83086E
(SOIC)
TOP VIEW
TOP VIEW
RO
RE
DE
DI
1
2
3
4
8
7
6
5
V
CC
NC
RO
1
2
3
4
5
6
7
14 V
CC
R
D
B/Z
13 NC
12 A
11 B
10 Z
R
D
A/Y
RE
GND
DE
DI
GND
GND
9
8
Y
NC
Ordering Information (Note 1) (Continued)
Ordering Information (Note 1)
TEMP.
PKG.
DWG. #
TEMP.
PKG.
DWG. #
PART NO. (BRAND) RANGE (°C)
PACKAGE
PART NO. (BRAND) RANGE (°C)
PACKAGE
ISL83088EIUZ
(3088Z, Note 2)
-40 to 85
8 Ld MSOP
(Pb-free)
M8.118
ISL83080EIB
(83080EIB)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
14 Ld SOIC
M14.15
M14.15
M8.15
NOTES:
ISL83080EIBZ
(83080EIBZ, Note 2)
14 Ld SOIC
(Pb-Free)
1. Units also available in Tape and Reel; Add “-T” to suffix.
2. Intersil Pb-free products employ special Pb-free material sets; molding
compounds/die attach materials and 100% matte tin plate termination
finish, which are RoHS compliant and compatible with both SnPb and Pb-
free soldering operations. Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
ISL83082EIB
(83082EIB)
8 Ld SOIC
ISL83082EIBZ
(83082EIBZ, Note 2)
8 Ld SOIC
(Pb-Free)
M8.15
ISL83082EIU (3082E)
-40 to 85
-40 to 85
8 Ld MSOP
M8.118
M8.118
ISL83082EIUZ
(3082Z, Note 2)
8 Ld MSOP
(Pb-free)
ISL83083EIB
(83083EIB)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
14 Ld SOIC
M14.15
M14.15
M8.15
ISL83083EIBZ
(83083EIBZ, Note 2)
14 Ld SOIC
(Pb-Free)
ISL83085EIB
(83085EIB)
8 Ld SOIC
ISL83085EIBZ
(83085EIBZ, Note 2)
8 Ld SOIC
(Pb-Free)
M8.15
ISL83085EIU (3085E)
-40 to 85
-40 to 85
8 Ld MSOP
M8.118
M8.118
ISL83085EIUZ
(3085Z, Note 2)
8 Ld MSOP
(Pb-free)
ISL83086EIB
(83086EIB)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
14 Ld SOIC
M14.15
M14.15
M8.15
ISL83086EIBZ
(83086EIBZ, Note 2)
14 Ld SOIC
(Pb-Free)
ISL83088EIB
(83088EIB)
8 Ld SOIC
ISL83088EIBZ
(83088EIBZ, Note 2)
8 Ld SOIC
(Pb-Free)
M8.15
ISL83088EIU (3088E)
8 Ld MSOP
M8.118
FN6085.6
2
September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Truth Tables
RECEIVING
INPUTS
DE
TRANSMITTING
OUTPUT
INPUTS
OUTPUTS
RE
DE
Half Duplex Full Duplex
A-B
RO
RE
X
DE
1
DI
1
Z
0
1
Y
1
0
0
0
0
0
0
X
X
X
≥ -0.05V
≤ -0.2V
1
0
1
X
1
0
0
Inputs
0
0
X
X
High-Z
High-Z
High-Z *
Open/Shorted
1
0
High-Z *
1
1
0
1
0
1
X
X
High-Z *
High-Z
NOTE: *Shutdown Mode (See Note 9).
NOTE: *Shutdown Mode (See Note 9).
Pin Descriptions
PIN
FUNCTION
RO
RE
Receiver output: If A-B ≥ -50mV, RO is high; If A-B ≤ -200mV, RO is low; RO = High if A and B are unconnected (floating) or shorted.
Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high.
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is low.
Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low.
Ground connection.
DE
DI
GND
A/Y
±15kV HBM ESD Protected RS-485/422 level, noninverting receiver input and noninverting driver output. Pin is an input if DE = 0;
pin is an output if DE = 1.
B/Z
±15kV HBM ESD Protected RS-485/422 level, Inverting receiver input and inverting driver output. Pin is an input if DE = 0; pin is an
output if DE = 1.
A
B
Y
Z
±15kV HBM ESD Protected RS-485/422 level, noninverting receiver input.
±15kV HBM ESD Protected RS-485/422 level, inverting receiver input.
±15kV HBM ESD Protected RS-485/422 level, noninverting driver output.
±15kV HBM ESD Protected RS-485/422 level, inverting driver output.
System power supply input (4.5V to 5.5V).
V
CC
NC
No Connection.
FN6085.6
3
September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Typical Operating Circuit
ISL83082E, ISL83085E, ISL83088E
+5V
+5V
+
+
0.1µF
0.1µF
8
8
V
V
CC
CC
RO
1
2
4
DI
R
D
RE
DE
R
T
R
T
3
2
B/Z
A/Y
7
6
B/Z
A/Y
DE
RE
7
6
3
4
DI
1
RO
R
D
GND
5
GND
5
ISL83080E, ISL83083E, ISL83086E
+5V
+5V
+
+
0.1µF
0.1µF
14
R
14
CC
V
V
CC
R
T
A
B
12
Y
9
DI
2
5
RO
11
Z
D
10
3
4
RE
DE
4
3
DE
RE
R
10
9
Z
Y
B
A
T
11
12
RO
5
DI
2
R
D
GND
GND
6, 7
6, 7
FN6085.6
4
September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Absolute Maximum Ratings
Thermal Information
V
to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Thermal Resistance (Typical, Note 3)
θJA (°C/W)
CC
Input Voltages
DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (V
Input/Output Voltages
A, B, Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -9V to +13V
A, B, Y, Z (Transient Pulse Through 100Ω) . . . . . . . . . . . . . ±25V
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . .
8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . .
14 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C
Maximum Storage Temperature Range. . . . . . . . . . .-65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(Lead Tips Only)
105
140
128
+ 0.3V)
CC
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (V
Short Circuit Duration
+0.3V)
CC
Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
3. θ is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V
= 5V, T = 25°C
A
CC
CC
(Note 4)
TEMP
PARAMETER
SYMBOL
TEST CONDITIONS
(°C)
MIN
TYP
MAX UNITS
DC CHARACTERISTICS
Driver Differential V
(no load)
V
V
Full
Full
Full
Full
Full
-
2
-
V
V
V
V
V
V
V
OUT
OUT
OD1
OD2
CC
-
Driver Differential V
(with load)
R
R
R
R
= 100Ω (RS-422) (Figure 1A)
= 54Ω (RS-485) (Figure 1A)
2.9
2.4
2.6
0.01
L
L
L
L
1.5
1.5
-
CC
-
= 60Ω, -7V ≤ V
≤ 12V (Figure 1B)
CM
Change in Magnitude of Driver
Differential V for
∆V
= 54Ω or 100Ω (Figure 1A)
0.2
OD
OUT
Complementary Output States
Driver Common-Mode V
V
R
R
= 54Ω or 100Ω (Figure 1A)
= 54Ω or 100Ω (Figure 1A)
Full
Full
-
-
2.85
0.01
3
V
V
OUT
Change in Magnitude of Driver
Common-Mode V for
OC
L
∆V
0.1
OC
L
OUT
Complementary Output States
Logic Input High Voltage
Logic Input Low Voltage
DI Input Hysteresis Voltage
Logic Input Current
V
DE, DI, RE
DE, DI, RE
Full
Full
25
2
-
-
-
-
0.8
-
V
IH
V
V
IL
V
-
100
-
mV
µA
µA
µA
µA
µA
µA
µA
mA
HYS
I
DE, DI, RE
DE = 0V, V
Full
Full
Full
Full
Full
Full
Full
Full
-2
-
2
IN1
IN2
Input Current (A, B)
I
I
I
= 0V or 5.5V
V
V
V
V
V
V
= 12V
= -7V
= 12V
= -7V
= 12V
= -7V
70
55
7
125
-
CC
IN
IN
IN
IN
IN
IN
-75
-
Output Leakage Current (Y, Z)
(Full Duplex Versions Only)
RE = 0V, DE = 0V, V
or 5.5V
= 0V
CC
125
-
IN3
IN3
-75
-
11
0
Output Leakage Current (Y, Z)
in Shutdown Mode (Full Duplex)
RE = V , DE = 0V, V
CC
or 5.5V
= 0V
20
-
CC
-20
-
9
Driver Short-Circuit Current,
I
DE = V , -7V ≤ V or V ≤ 12V (Note 6)
CC
-
±250
OSD1
Y
Z
V
= High or Low
O
Receiver Differential Threshold
Voltage
V
-7V ≤ V
≤ 12V
Full
25
-200
-
-90
20
-50
-
mV
mV
TH
CM
Receiver Input Hysteresis
∆V
TH
V
= 0V
CM
FN6085.6
5
September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V
= 5V, T = 25°C
A
CC
CC
(Note 4) (Continued)
TEMP
PARAMETER
SYMBOL
TEST CONDITIONS
(°C)
Full
Full
Full
MIN
TYP
MAX UNITS
Receiver Output High Voltage
Receiver Output Low Voltage
V
I
I
= -4mA, V = -50mV
V
- 1
4.6
0.2
-
0.4
1
V
V
OH
O
O
ID
CC
-
V
= -4mA, V = -200mV
OL
ID
Three-State (high impedance)
Receiver Output Current
I
0.4V ≤ V ≤ 2.4V
-1
0.03
µA
OZR
O
Receiver Input Resistance
Receiver Short-Circuit Current
SUPPLY CURRENT
R
-7V ≤ V
≤ 12V
Full
Full
96
160
-
-
kΩ
IN
CM
0V ≤ V ≤ V
CC
I
±7
±85
mA
OSR
O
No-Load Supply Current (Note 5)
I
Half Duplex Versions, DE = V , RE = X,
CC
Full
Full
Full
-
-
-
560
530
0.07
700
650
2
µA
µA
µA
CC
DI = 0V or V
CC
All Versions, DE = 0V, RE = 0V, or Full Duplex
Versions, DE = V , RE = X. DI = 0V or V
CC
DE = 0V, RE = V , DI = 0V or V
CC
CC
Shutdown Supply Current
ESD PERFORMANCE
RS-485 Pins (A, Y, B, Z)
All Other Pins
I
SHDN
CC
Human Body Model (HBM), Pin to GND
HBM, per MIL-STD-883 Method 3015
25
25
-
-
±15
±7
-
-
kV
kV
DRIVER SWITCHING CHARACTERISTICS (115kbps Versions; ISL83080E, ISL83082E)
Driver Differential Output Delay
Driver Differential Output Skew
Driver Differential Rise or Fall Time
Maximum Data Rate
t
t
R
R
R
C
R
= 54Ω, C = 100pF (Figure 2)
Full
Full
Full
Full
Full
500
-
780
40
1300
100
1500
-
ns
ns
PLH, PHL
DIFF
DIFF
DIFF
L
t
= 54Ω, C = 100pF (Figure 2)
SKEW
L
t , t
= 54Ω, C = 100pF (Figure 2)
667
115
-
1000
666
278
ns
R
F
L
f
= 820pF (Figure 4, Note 12)
kbps
ns
MAX
D
L
Driver Enable to Output High
t
= 500Ω, C = 100pF, SW = GND (Figure 3),
1500
ZH
L
(Note 7)
= 500Ω, C = 100pF, SW = V (Figure 3),
CC
Driver Enable to Output Low
t
R
Full
-
35
1500
ns
ZL
L
L
(Note 7)
Driver Disable from Output Low
Driver Disable from Output High
Time to Shutdown
t
R
R
= 500Ω, C = 15pF, SW = V
(Figure 3)
Full
Full
Full
Full
-
-
67
38
100
100
ns
ns
ns
ns
LZ
L
L
CC
t
= 500Ω, C = 15pF, SW = GND (Figure 3)
HZ
L
L
t
(Notes 9, 12)
60
-
160
400
600
SHDN
Driver Enable from Shutdown to
Output High
t
R
= 500Ω, C = 100pF, SW = GND (Figure 3),
2000
ZH(SHDN)
L
L
(Notes 9, 10)
= 500Ω, C = 100pF, SW = V (Figure 3),
CC
Driver Enable from Shutdown to
Output Low
t
R
Full
-
155
2000
ns
ZL(SHDN)
L
L
(Notes 9, 10)
DRIVER SWITCHING CHARACTERISTICS (500kbps Versions; ISL83083E, ISL83085E)
Driver Differential Output Delay
Driver Differential Output Skew
Driver Differential Rise or Fall Time
Maximum Data Rate
t
t
R
R
R
C
R
= 54Ω, C = 100pF (Figure 2)
Full
Full
Full
Full
Full
250
-
360
20
1000
100
750
-
ns
ns
PLH, PHL
DIFF
DIFF
DIFF
L
t
= 54Ω, C = 100pF (Figure 2)
L
SKEW
t , t
= 54Ω, C = 100pF (Figure 2)
200
500
-
475
1000
137
ns
R
F
L
f
= 820pF (Figure 4, Note 12)
kbps
ns
MAX
D
L
Driver Enable to Output High
t
= 500Ω, C = 100pF, SW = GND (Figure 3),
1000
ZH
L
(Note 7)
= 500Ω, C = 100pF, SW = V (Figure 3),
CC
Driver Enable to Output Low
t
R
Full
Full
-
-
35
65
1000
100
ns
ns
ZL
LZ
L
L
(Note 7)
Driver Disable from Output Low
t
R
= 500Ω, C = 15pF, SW = V
(Figure 3)
CC
L
L
FN6085.6
6
September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V
= 5V, T = 25°C
A
CC
CC
(Note 4) (Continued)
TEMP
PARAMETER
Driver Disable from Output High
Time to Shutdown
SYMBOL
TEST CONDITIONS
= 500Ω, C = 15pF, SW = GND (Figure 3)
(°C)
Full
Full
Full
MIN
TYP
MAX UNITS
t
R
-
60
-
38
100
600
ns
ns
ns
HZ
L
L
t
(Notes 9, 12)
160
260
SHDN
Driver Enable from Shutdown to
Output High
t
R
= 500Ω, C = 100pF, SW = GND (Figure 3),
1500
ZH(SHDN)
L
L
(Notes 9, 10)
= 500Ω, C = 100pF, SW = V (Figure 3),
CC
Driver Enable from Shutdown to
Output Low
t
R
Full
-
155
1500
ns
ZL(SHDN)
L
L
(Notes 9, 10)
DRIVER SWITCHING CHARACTERISTICS (10Mbps Versions; ISL83086E, ISL83088E)
Driver Differential Output Delay
Driver Differential Output Skew
Driver Differential Rise or Fall Time
Maximum Data Rate
t
t
R
R
R
C
R
= 54Ω, C = 100pF (Figure 2)
Full
Full
Full
Full
Full
-
-
20
1
60
10
25
-
ns
ns
PLH, PHL
DIFF
DIFF
DIFF
L
t
= 54Ω, C = 100pF (Figure 2)
SKEW
L
t , t
= 54Ω, C = 100pF (Figure 2)
-
13
15
35
ns
R
F
L
f
= 470pF (Figure 4, Note 12)
10
-
Mbps
ns
MAX
D
L
Driver Enable to Output High
t
= 500Ω, C = 100pF, SW = GND (Figure 3),
150
ZH
L
(Note 7)
= 500Ω, C = 100pF, SW = V (Figure 3),
CC
Driver Enable to Output Low
t
R
Full
-
30
150
ns
ZL
L
L
(Note 7)
Driver Disable from Output Low
Driver Disable from Output High
Time to Shutdown
t
R
R
= 500Ω, C = 15pF, SW = V
(Figure 3)
Full
Full
Full
Full
-
-
66
38
100
100
600
250
ns
ns
ns
ns
LZ
L
L
CC
t
= 500Ω, C = 15pF, SW = GND (Figure 3)
HZ
L
L
t
(Notes 9, 12)
R = 500Ω, C = 100pF, SW = GND (Figure 3),
L
60
-
160
115
SHDN
Driver Enable from Shutdown to
Output High
t
ZH(SHDN)
L
(Notes 9, 10)
= 500Ω, C = 100pF, SW = V (Figure 3),
CC
Driver Enable from Shutdown to
Output Low
t
R
Full
-
84
250
ns
ZL(SHDN)
L
L
(Notes 9, 10)
RECEIVER SWITCHING CHARACTERISTICS (115kbps and 500kbps Versions; ISL83080E-ISL83085E)
Maximum Data Rate
f
(Figure 5, Note 12)
(Figure 5)
Full
Full
Full
Full
0.5
10
100
7
-
Mbps
ns
MAX
Receiver Input to Output Delay
t
, t
-
-
-
150
10
PLH PHL
Receiver Skew | t
- t
PLH PHL
|
t
(Figure 5)
ns
SKD
Receiver Enable to Output Low
t
R
= 1kΩ, C = 15pF, SW = V (Figure 6),
CC
10
50
ns
ZL
L
L
(Note 8)
Receiver Enable to Output High
t
t
R
= 1kΩ, C = 15pF, SW = GND (Figure 6),
Full
-
10
50
ns
ZH
L
L
(Note 8)
Receiver Disable from Output Low
Receiver Disable from Output High
Time to Shutdown
t
R
R
= 1kΩ, C = 15pF, SW = V
(Figure 6)
Full
Full
Full
Full
-
-
10
10
50
50
ns
ns
ns
ns
LZ
L
L
CC
= 1kΩ, C = 15pF, SW = GND (Figure 6)
HZ
L
L
t
(Notes 9, 12)
R = 1kΩ, C = 15pF, SW = GND (Figure 6),
L
60
-
160
150
600
2000
SHDN
Receiver Enable from Shutdown to
Output High
t
ZH(SHDN)
L
(Notes 9, 11)
= 1kΩ, C = 15pF, SW = V (Figure 6),
CC
Receiver Enable from Shutdown to
Output Low
t
R
Full
-
150
2000
ns
ZL(SHDN)
L
L
(Notes 9, 11)
RECEIVER SWITCHING CHARACTERISTICS (10Mbps Versions; ISL83086E, ISL83088E)
Maximum Data Rate
f
(Figure 5, Note 12)
(Figure 5)
Full
Full
Full
Full
10
-
15
70
0
-
Mbps
ns
MAX
Receiver Input to Output Delay
t
, t
125
10
PLH PHL
Receiver Skew | t
- t
PLH PHL
|
t
(Figure 5)
-
ns
SKD
Receiver Enable to Output Low
t
R
= 1kΩ, C = 15pF, SW = V (Figure 6),
CC
-
10
30
ns
ZL
L
L
(Note 8)
FN6085.6
7
September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V
= 5V, T = 25°C
A
CC
CC
(Note 4) (Continued)
TEMP
PARAMETER
SYMBOL
TEST CONDITIONS
= 1kΩ, C = 15pF, SW = GND (Figure 6),
(°C)
MIN
TYP
MAX UNITS
Receiver Enable to Output High
t
R
Full
-
10
30
ns
ZH
L
L
(Note 8)
Receiver Disable from Output Low
Receiver Disable from Output High
Time to Shutdown
t
R
= 1kΩ, C = 15pF, SW = V
(Figure 6)
Full
Full
Full
Full
-
-
10
10
30
30
ns
ns
ns
ns
LZ
L
L
L
CC
t
R
= 1kΩ, C = 15pF, SW = GND (Figure 6)
HZ
L
t
(Notes 9, 12)
R = 1kΩ, C = 15pF, SW = GND (Figure 6),
L
60
-
160
150
600
2000
SHDN
Receiver Enable from Shutdown to
Output High
t
ZH(SHDN)
L
(Notes 9, 11)
= 1kΩ, C = 15pF, SW = V (Figure 6),
CC
Receiver Enable from Shutdown to
Output Low
t
R
Full
-
150
2000
ns
ZL(SHDN)
L
L
(Notes 9, 11)
NOTES:
4. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
5. Supply current specification is valid for loaded drivers when DE = 0V.
6. Applies to peak current. See “Typical Performance Curves” for more information.
7. Keep RE = 0 to prevent the device from entering SHDN.
8. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
9. Transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed
not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See “Low-Power
Shutdown Mode” section.
10. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
11. Set the RE signal high time >600ns to ensure that the device enters SHDN.
12. Guaranteed by characterization but not tested.
Test Circuits and Waveforms
R /2
L
375Ω
DE
DI
DE
DI
V
V
CC
CC
Z
Y
Z
Y
V
CM
R
= 60Ω
V
V
OD
L
D
D
OD
-7V to +12V
V
R /2
L
375Ω
OC
FIGURE 1A. V
OD
AND V
OC
FIGURE 1B. V WITH COMMON MODE LOAD
OD
FIGURE 1. DC DRIVER TEST CIRCUITS
FN6085.6
September 12, 2005
8
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Test Circuits and Waveforms (Continued)
3V
0V
DI
1.5V
PLH
1.5V
C
= 100pF
= 100pF
L
DE
DI
t
t
PHL
V
CC
V
OH
OUT (Z)
OUT (Y)
Z
Y
R
DIFF
D
V
OL
C
L
SIGNAL
GENERATOR
+V
OD
90%
10%
90%
10%
DIFF OUT (Y - Z)
-V
OD
t
t
R
F
SKEW = |t
- t |
PLH PHL
FIGURE 2A. TEST CIRCUIT
FIGURE 2B. MEASUREMENT POINTS
FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DE
DI
Z
Y
500Ω
V
CC
D
GND
SW
SIGNAL
GENERATOR
3V
C
DE
L
1.5V
1.5V
HZ
NOTE 9
0V
t
, t
ZH ZH(SHDN)
NOTE 9
t
OUTPUT HIGH
2.3V
PARAMETER OUTPUT
RE
X
DI
SW
GND
C
L
(pF)
V
OH
V
- 0.5V
OH
t
Y/Z
Y/Z
Y/Z
Y/Z
Y/Z
Y/Z
1/0
0/1
1/0
0/1
1/0
0/1
15
15
OUT (Y, Z)
HZ
0V
t
X
V
LZ
CC
t
, t
t
0 (Note 7)
0 (Note 7)
1 (Note 10)
1 (Note 10)
GND
100
100
100
100
ZL ZL(SHDN)
t
LZ
ZH
NOTE 9
V
CC
t
V
ZL
ZH(SHDN)
CC
OUT (Y, Z)
2.3V
t
GND
V
+ 0.5V
V
OL
OL
OUTPUT LOW
t
V
CC
ZL(SHDN)
FIGURE 3A. TEST CIRCUIT
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. DRIVER ENABLE AND DISABLE TIMES
3V
0V
DE
DI
V
DI
CC
+
Z
Y
V
60Ω
OD
C
D
D
-
+V
OD
SIGNAL
GENERATOR
DIFF OUT (Y - Z)
0V
-V
OD
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4A. TEST CIRCUIT
FIGURE 4. DRIVER DATA RATE
FN6085.6
September 12, 2005
9
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Test Circuits and Waveforms (Continued)
+1.5V
-1.5V
RE
15pF
A
0V
0V
B
0V
RO
R
A
t
t
PHL
PLH
V
CC
SIGNAL
GENERATOR
1.5V
1.5V
RO
0V
FIGURE 5A. TEST CIRCUIT
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. RECEIVER PROPAGATION DELAY AND DATA RATE
RE
NOTE 9
B
A
3V
0V
1kΩ
V
GND
CC
RO
RE
R
1.5V
1.5V
HZ
GND
SW
SIGNAL
15pF
GENERATOR
t
, t
ZH ZH(SHDN)
t
NOTE 9
OUTPUT HIGH
1.5V
V
OH
V
- 0.5V
OH
PARAMETER
DE
0
A
SW
RO
0V
t
+1.5V
-1.5V
+1.5V
-1.5V
+1.5V
-1.5V
GND
HZ
t
, t
t
0
V
ZL ZL(SHDN)
t
LZ
LZ
CC
NOTE 9
V
CC
t
(Note 8)
(Note 8)
0
GND
ZH
RO
1.5V
t
0
V
ZL
CC
V
+ 0.5V
OL
V
OL
OUTPUT LOW
t
(Note 11)
(Note 11)
0
GND
ZH(SHDN)
t
0
V
CC
ZL(SHDN)
FIGURE 6A. TEST CIRCUIT
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. RECEIVER ENABLE AND DISABLE TIMES
Receiver Features
Application Information
These devices utilize a differential input receiver for maximum
noise immunity and common mode rejection. Input sensitivity
is ±200mV, as required by the RS-422 and RS-485
specifications.
RS-485 and RS-422 are differential (balanced) data
transmission standards for use in long haul or noisy
environments. RS-422 is a subset of RS-485, so RS-485
transceivers are also RS-422 compliant. RS-422 is a point-
to-multipoint (multidrop) standard, which allows only one
driver and up to 10 (assuming one unit load devices)
receivers on each bus. RS-485 is a true multipoint standard,
which allows up to 32 one unit load devices (any
combination of drivers and receivers) on each bus. To allow
for multipoint operation, the RS-485 spec requires that
drivers must handle bus contention without sustaining any
damage.
Receiver input resistance of 96kΩ surpasses the RS-422
spec of 4kΩ, and is eight times the RS-485 “Unit Load (UL)”
requirement of 12kΩ minimum. Thus, these products are
known as “one-eighth UL” transceivers, and there can be up
to 256 of these devices on a network while still complying
with the RS-485 loading spec.
Receiver inputs function with common mode voltages as
great as ±7V outside the power supplies (i.e., +12V and
-7V), making them ideal for long networks where induced
voltages are a realistic concern.
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as
long as 4000’, so the wide CMR is necessary to handle
ground potential differences, as well as voltages induced in
the cable by external fields.
All the receivers include a “full fail-safe” function that
guarantees a high level receiver output if the receiver inputs
are unconnected (floating) or shorted.
FN6085.6
10
September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Receivers easily meet the data rates supported by the
corresponding driver, and all receiver outputs are three-
statable via the active low RE input.
to an exposed port on the exterior of the finished product.
Simply touching the port pins, or connecting a cable, can
cause an ESD event that might destroy unprotected ICs.
These new ESD structures protect the device whether or
not it is powered up, protect without allowing any latchup
mechanism to activate, and without degrading the RS-485
common mode range of -7V to +12V. This built-in ESD
protection eliminates the need for board level protection
structures (e.g., transient suppression diodes), and the
associated, undesirable capacitive load they present.
Driver Features
The RS-485/422 driver is a differential output device that
delivers at least 1.5V across a 54Ω load (RS-485), and at
least 2V across a 100Ω load (RS-422). The drivers feature
low propagation delay skew to maximize bit width, and to
minimize EMI.
All drivers are three-statable via the active high DE input.
Data Rate, Cables, and Terminations
The 115kbps and 500kbps driver outputs are slew rate
limited to minimize EMI, and to minimize reflections in
unterminated or improperly terminated networks. Outputs of
the ISL83086E, ISL83088E drivers are not limited, so faster
output transition times allow data rates of at least 10Mbps.
RS-485/422 are intended for network lengths up to 4000’,
but the maximum system data rate decreases as the
transmission length increases. Devices operating at 10Mbps
are limited to lengths less than 100’, while the 115kbps
versions can operate at full data rates with lengths of several
thousand feet.
Hot Plug Function
When a piece of equipment powers up, there is a period of
time where the processor or ASIC driving the RS-485 control
lines (DE, RE) is unable to ensure that the RS-485 Tx and
Rx outputs are kept disabled. If the equipment is connected
to the bus, a driver activating prematurely during power up
may crash the bus. To avoid this scenario, the ISL83080,
ISL83082, ISL83083, ISL83085 versions incorporate a “Hot
Twisted pair is the cable of choice for RS-485/422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common mode
signals, which are effectively rejected by the differential
receivers in these ICs.
Proper termination is imperative, when using the 10Mbps
devices, to minimize reflections. Short networks using the
115kbps versions need not be terminated, but, terminations
are recommended unless power dissipation is an overriding
concern.
Plug” function. Circuitry monitoring V ensures that, during
CC
power up and power down, the Tx and Rx outputs remain
disabled, regardless of the state of DE and RE, if V
is less
CC
than ~3.4V. This gives the processor/ASIC a chance to stabilize
and drive the RS-485 control lines to the proper states.
In point-to-point, or point-to-multipoint (single driver on bus)
networks, the main cable should be terminated in its
characteristic impedance (typically 120Ω) at the end farthest
from the driver. In multi-receiver applications, stubs
connecting receivers to the main cable should be kept as
short as possible. Multipoint (multi-driver) systems require
that the main cable be terminated in its characteristic
impedance at both ends. Stubs connecting a transceiver to
the main cable should be kept as short as possible.
DI = V
CC
5
V
3.4V
CC
3.2V
2.5
0
5
2.5
0
R
R
= 1kΩ
= 1kΩ
A/Y
RO
L
L
Built-In Driver Overload Protection
ISL83080E
As stated previously, the RS-485 spec requires that drivers
survive worst case bus contentions undamaged. These
devices meet this requirement via driver output short circuit
current limits, and on-chip thermal shutdown circuitry.
5
2.5
ISL83080E
The driver output stages incorporate short circuit current
limiting circuitry which ensures that the output current never
exceeds the RS-485 spec, even at the common mode
voltage range extremes. Additionally, these devices utilize a
foldback circuit which reduces the short circuit current, and
thus the power dissipation, whenever the contending voltage
exceeds either supply.
0
TIME (40µs/DIV)
FIGURE 7. HOT PLUG PERFORMANCE (ISL83080E) vs
DEVICE WITHOUT HOT PLUG CIRCUITRY
(ISL83086E)
ESD Protection
In the event of a major short circuit condition, devices also
include a thermal shutdown feature that disables the drivers
whenever the die temperature becomes excessive. This
eliminates the power dissipation, allowing the die to cool. The
drivers automatically re-enable after the die temperature
drops about 15 degrees. If the contention persists, the thermal
shutdown/re-enable cycle repeats until the fault is cleared.
Receivers stay operational during thermal shutdown.
All pins on these devices include class 3 Human Body
Model (HBM) ESD protection structures, but the RS-485
pins (driver outputs and receiver inputs) incorporate
advanced structures allowing them to survive ESD events
in excess of ±15kV HBM. The RS-485 pins are particularly
vulnerable to ESD damage because they typically connect
FN6085.6
11
September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Disabling both the driver and the receiver for less than 60ns
guarantees that the transceiver will not enter shutdown.
Low Power Shutdown Mode
These CMOS transceivers all use a fraction of the power
required by their bipolar counterparts, but they also include a
shutdown feature that reduces the already low quiescent I
to a 70nA trickle. These devices enter shutdown whenever
Note that receiver and driver enable times increase when the
transceiver enables from shutdown. Refer to Notes 7-11, at
the end of the Electrical Specification table, for more
information.
CC
the receiver and driver are simultaneously disabled
(RE = V
and DE = GND) for a period of at least 600ns.
CC
Typical Performance Curves V = 5V, T = 25°C; Unless Otherwise Specified
CC
A
90
80
70
60
50
40
30
3.4
3.2
3
R
= 100Ω
DIFF
2.8
2.6
2.4
2.2
2
R
= 54Ω
DIFF
20
10
0
0
1
2
3
4
5
-40
0
50
85
-25
25
75
DIFFERENTIAL OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
FIGURE 8. DRIVER OUTPUT CURRENT vs DIFFERENTIAL
OUTPUT VOLTAGE
FIGURE 9. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs
TEMPERATURE
560
550
200
150
ISL83086E/88E
Y OR Z = LOW
HALF DUPLEX, DE = V , RE = X
CC
100
540
530
520
510
500
ISL83080E thru ISL83085E
50
0
HALF DUPLEX, DE = GND, RE = GND
FULL DUPLEX, DE = X, RE = GND
-50
Y OR Z = HIGH
-100
-150
ISL8308XE
-2
-40
0
50
85
-25
25
75
-7 -6
-4
0
2
4
6
8
10
12
OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
FIGURE 10. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT
VOLTAGE
FIGURE 11. SUPPLY CURRENT vs TEMPERATURE
FN6085.6
12
September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Typical Performance Curves V = 5V, T = 25°C; Unless Otherwise Specified (Continued)
CC
A
880
860
840
820
800
780
760
740
60
55
50
45
40
35
30
t
PHL
t
PLH
|CROSS PT. OF Y↑ & Z↓ - CROSS PT. OF Y↓ & Z↑|
-40
0
50
85
-25
25
75
-40
0
50
85
-25
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 12. DRIVER DIFFERENTIAL PROPAGATION DELAY
vs TEMPERATURE (ISL83080E, ISL83082E)
FIGURE 13. DRIVER DIFFERENTIAL SKEW vs
TEMPERATURE (ISL83080E, ISL83082E)
400
390
380
27
26
25
24
23
22
21
20
19
t
PHL
370
360
350
340
t
PLH
18
|CROSS PT. OF Y↑ & Z↓ - CROSS PT. OF Y↓ & Z↑|
17
-40
-40
0
50
85
-25
25
75
0
50
85
-25
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 14. DRIVER DIFFERENTIAL PROPAGATION DELAY
vs TEMPERATURE (ISL83083E, ISL83085E)
FIGURE 15. DRIVER DIFFERENTIAL SKEW vs
TEMPERATURE (ISL83083E, ISL83085E)
20
0.7
0.65
0.6
19
t
PHL
18
17
16
15
t
PLH
0.55
|CROSS PT. OF Y↑ & Z↓ - CROSS PT. OF Y↓ & Z↑|
0.5
-40
0
50
85
-25
25
75
-40
0
50
85
-25
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 16. DRIVER DIFFERENTIAL PROPAGATION DELAY
vs TEMPERATURE (ISL83086E, ISL83088E)
FIGURE 17. DRIVER DIFFERENTIAL SKEW vs
TEMPERATURE (ISL83086E, ISL83088E)
FN6085.6
September 12, 2005
13
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Typical Performance Curves V = 5V, T = 25°C; Unless Otherwise Specified (Continued)
CC
A
R
= 54Ω, C = 100pF
L
R
= 54Ω, C = 100pF
L
DIFF
DIFF
5
0
5
0
DI
DI
5
0
5
0
RO
RO
4
3
4
A/Y
B/Z
3
2
B/Z
A/Y
2
1
0
1
0
TIME (400ns/DIV)
TIME (400ns/DIV)
FIGURE 18. DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (ISL83080E, ISL83082E)
FIGURE 19. DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (ISL83080E, ISL83082E)
R
= 54Ω, C = 100pF
L
R
= 54Ω, C = 100pF
L
DIFF
DIFF
5
0
5
0
DI
DI
5
0
5
0
RO
RO
4
4
3
2
A/Y
B/Z
3
2
B/Z
A/Y
1
0
1
0
TIME (200ns/DIV)
TIME (200ns/DIV)
FIGURE 20. DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (ISL83083E, ISL83085E)
FIGURE 21. DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (ISL83083E, ISL83085E)
R
= 54Ω, C = 100pF
L
R
= 54Ω, C = 100pF
L
DIFF
DIFF
5
0
5
0
DI
DI
5
0
5
0
RO
RO
4
4
3
B/Z
A/Y
A/Y
B/Z
3
2
1
0
2
1
0
TIME (20ns/DIV)
TIME (20ns/DIV)
FIGURE 22. DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (ISL83086E, ISL83088E)
FIGURE 23. DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (ISL83086E, ISL83088E)
FN6085.6
14
September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Typical Performance Curves V = 5V, T = 25°C; Unless Otherwise Specified (Continued)
CC
A
40
35
30
25
V
, 25°C
OL
Die Characteristics
V
, 85°C
OL
SUBSTRATE POTENTIAL (POWERED UP):
GND
V
, 25°C
OH
20
15
10
TRANSISTOR COUNT:
V
, 85°C
525
OH
PROCESS:
Si Gate BiCMOS
5
0
0
1
2
3
4
5
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 24. RECEIVER OUTPUT CURRENT vs RECEIVER
OUTPUT VOLTAGE
FN6085.6
15
September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Mini Small Outline Plastic Packages (MSOP)
N
M8.118 (JEDEC MO-187AA)
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
INCHES
MILLIMETERS
E1
E
SYMBOL
MIN
MAX
MIN
0.94
0.05
0.75
0.25
0.09
2.95
2.95
MAX
1.10
0.15
0.95
0.36
0.20
3.05
3.05
NOTES
A
A1
A2
b
0.037
0.002
0.030
0.010
0.004
0.116
0.116
0.043
0.006
0.037
0.014
0.008
0.120
0.120
-
-B-
0.20 (0.008)
INDEX
AREA
1 2
A
B
C
-
-
TOP VIEW
4X θ
9
0.25
(0.010)
R1
c
-
R
GAUGE
PLANE
D
3
E1
e
4
SEATING
PLANE
L
0.026 BSC
0.65 BSC
-
-C-
4X θ
L1
A
A2
E
0.187
0.016
0.199
0.028
4.75
0.40
5.05
0.70
-
L
6
SEATING
PLANE
L1
N
0.037 REF
0.95 REF
-
0.10 (0.004)
-A-
C
C
b
8
8
7
-H-
A1
e
R
0.003
0.003
-
-
0.07
0.07
-
-
-
D
0.20 (0.008)
C
R1
0
-
o
o
o
o
5
15
5
15
-
a
SIDE VIEW
C
L
o
o
o
o
0
6
0
6
-
α
E
1
-B-
Rev. 2 01/03
0.20 (0.008)
C
D
END VIEW
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-187BA.
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs and are measured at Datum Plane. Mold flash, protrusion
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions
- H -
and are measured at Datum Plane.
Interlead flash and
protrusions shall not exceed 0.15mm (0.006 inch) per side.
5. Formed leads shall be planar with respect to one another within
0.10mm (0.004) at seating Plane.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
- B -
to be determined at Datum plane
-A -
10. Datums
and
.
- H -
11. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only.
FN6085.6
16
September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Small Outline Plastic Packages (SOIC)
M14.15 (JEDEC MS-012-AB ISSUE C)
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
N
INDEX
AREA
0.25(0.010)
M
B M
H
E
INCHES
MILLIMETERS
-B-
SYMBOL
MIN
MAX
MIN
1.35
0.10
0.33
0.19
8.55
3.80
MAX
1.75
0.25
0.51
0.25
8.75
4.00
NOTES
A
A1
B
C
D
E
e
0.0532
0.0040
0.013
0.0688
0.0098
0.020
-
1
2
3
L
-
SEATING PLANE
A
9
0.0075
0.3367
0.1497
0.0098
0.3444
0.1574
-
-A-
o
h x 45
D
3
4
-C-
α
µ
0.050 BSC
1.27 BSC
-
e
A1
C
H
h
0.2284
0.0099
0.016
0.2440
0.0196
0.050
5.80
0.25
0.40
6.20
0.50
1.27
-
B
0.10(0.004)
5
0.25(0.010) M
C A M B S
L
6
N
α
14
14
7
NOTES:
o
o
o
o
0
8
0
8
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
Rev. 0 12/93
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension“E”doesnotincludeinterleadflashorprotrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
FN6085.6
17
September 12, 2005
ISL83080E, ISL83082E, ISL83083E, ISL83085E, ISL83086E, ISL83088E
Small Outline Plastic Packages (SOIC)
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
N
INDEX
AREA
0.25(0.010)
M
B M
H
E
INCHES
MILLIMETERS
-B-
SYMBOL
MIN
MAX
MIN
1.35
0.10
0.33
0.19
4.80
3.80
MAX
1.75
0.25
0.51
0.25
5.00
4.00
NOTES
A
A1
B
C
D
E
e
0.0532
0.0040
0.013
0.0688
0.0098
0.020
-
1
2
3
L
-
9
SEATING PLANE
A
0.0075
0.1890
0.1497
0.0098
0.1968
0.1574
-
-A-
o
h x 45
D
3
4
-C-
α
µ
0.050 BSC
1.27 BSC
-
e
A1
H
h
0.2284
0.0099
0.016
0.2440
0.0196
0.050
5.80
0.25
0.40
6.20
0.50
1.27
-
C
B
0.10(0.004)
5
0.25(0.010) M
C A M B S
L
6
N
α
8
8
7
NOTES:
o
o
o
o
0
8
0
8
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
Rev. 0 12/93
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6085.6
18
September 12, 2005
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