ISL28256FAZ-T7 [INTERSIL]
39uA Micropower Single and Dual Precision Rail-to-Rail Input-Output (RRIO) Low Input Bias Current Op Amps; 39uA微单和双精密轨到轨输入输出( RRIO ),低输入偏置电流运算放大器型号: | ISL28256FAZ-T7 |
厂家: | Intersil |
描述: | 39uA Micropower Single and Dual Precision Rail-to-Rail Input-Output (RRIO) Low Input Bias Current Op Amps |
文件: | 总14页 (文件大小:823K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ISL28156, ISL28256
®
Data Sheet
February 27, 2007
FN6154.2
39µA Micropower Single and Dual
Precision Rail-to-Rail Input-Output (RRIO)
Low Input Bias Current Op Amps
Features
• 39µA typical supply current
• 5nA max input bias current
The ISL28156 and ISL28256 are micropower precision
operational amplifiers optimized for single supply operation
at 5V and can operated down to 2.4V.
• 250kHz gain bandwidth product (A = 1)
V
• 2.4V to 5.5V single supply voltage range
• Rail-to-rail input and output
These devices feature an Input Range Enhancement Circuit
(IREC) which enables them to maintain CMRR performance
for input voltages greater than the positive supply. The input
signal is capable of swinging 0.5V above a 5.0V supply (0.25
for a 2.5V supply) and to within 10mV from ground. The
output operation is rail-to-rail.
• Enable pin (ISL28156 only)
• Pb-free plus anneal available (RoHS compliant)
Applications
• Battery- or solar-powered systems
• 4mA to 20mA current loops
• Handheld consumer products
• Medical devices
The 1/f corner of the voltage noise spectrum is at 1kHz. This
results in low frequency noise performance which can only
be found on devices with an order of magnitude higher
supply current.
ISL28156 and ISL28256 can be operated from one lithium
cell or two Ni-Cd batteries. The input range includes both
positive and negative rail. The output swings to both rails.
• Sensor amplifiers
• ADC buffers
• DAC output amplifiers
Ordering Information
TAPE
PART NUMBER
(Note)
PART
MARKING
AND
REEL
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL28156FHZ-T7 GABV
ISL28156FBZ 28156FBZ
ISL28156FBZ-T7 28156FBZ 7” (1k pcs) 8 Ld SOIC
7” (3k pcs) 6 Ld SOT-23 MDP0038
97/Tube 8 Ld SOIC
MDP0027
MDP0027
MDP0027
Coming Soon
7” (1k pcs) 8 Ld SOIC
ISL28256FAZ-T7
Coming Soon
7”
8 Ld MSOP MDP0043
ISL28256FAZ-T7
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2006, 2007. All Rights Reserved.
1
All other trademarks mentioned are the property of their respective owners.
ISL28156, ISL28256
Pinouts
ISL28156
(6 LD SOT-23)
TOP VIEW
ISL28156
(8 LD SOIC)
TOP VIEW
NC
IN-
IN+
V-
1
2
3
4
8
7
6
5
ENABLE
V+
OUT
V-
1
2
3
6
5
4
V+
ENABLE
IN-
-
+
+
-
OUT
NC
IN+
ISL28256
(8 LD SOIC)
TOP VIEW
ISL28256
(8 LD MSOP) Coming Soon
TOP VIEW
OUT_A
IN-_A
IN+_A
V-
1
2
3
4
8
7
6
5
V+
OUT_A
IN-_A
IN+_A
V-
1
2
3
4
8
7
6
5
V+
OUT_B
IN-_B
IN+_B
OUT_B
IN-_B
IN+_B
-
+
- +
+
-
+ -
FN6154.2
February 27, 2007
2
ISL28156, ISL28256
Absolute Maximum Ratings (T = +25°C)
Thermal Information
A
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/μs
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V
ESD tolerance, Human Body Model . . . . . . . . . . . . . . . . . . . . . .3kV
ESD tolerance, Machine Model . . . . . . . . . . . . . . . . . . . . . . . . .300V
Thermal Resistance
θ
(°C/W)
JA
6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . .
6 Ld SO Package . . . . . . . . . . . . . . . . . . . . . . . . . .
8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . .
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite
Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C
230
110
115
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications
V
= 5V, V = 0V,V
= 2.5V, T = +25°C unless otherwise specified.
CM A
+
-
Boldface limits apply over the operating temperature range, -40°C to +125°C, temperature data guaranteed by
characterization
PARAMETER
DESCRIPTION
Input Offset Voltage
CONDITIONS
MIN
TYP
MAX
UNIT
V
8 Ld SO
-120
-7
120
µV
OS
-200
250
6 Ld SOT-23
-400
-450
-7
400
450
µV
µV/°C
nA
ΔV
Input Offset Drive vs Temperature
Input Offset Current
1.5
OS
------------------
ΔTime
I
-1.5
-5
0.34
1.14
1.2
2.5
OS
I
Input Bias Current
-2
5
nA
B
-3.5
5
E
Input Noise Voltage Density
F
F
= 1kHz
= 1kHz
46
nV/√Hz
pA/√Hz
V
N
O
O
I
Input Noise Current Density
0.14
N
CMIR
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
0
5
CMRR
V
V
V
V
= 0V to 5V
80
75
110
104
412
70
dB
CM
PSRR
Power Supply Rejection Ratio
Large Signal Voltage Gain
= 2.4V to 5V
90
75
dB
V/mV
V/mV
mV
mV
V
S
A
= 0.5V to 4.5V, R = 100kΩ
200
175
VOL
O
O
L
= 0.5V to 4.5V, R = 1kΩ
35
30
L
V
Maximum Output Voltage Swing
Output low, R = 100kΩ
3
6
8
OUT
L
Output low, R = 1kΩ
130
4.985
4.88
150
200
L
Output high, R = 100kΩ
4.992
4.99
L
Output high, R = 1kΩ
4.85
V
L
4.8
SR
Slew Rate
0.05
250
39
V/µs
kHz
µA
GBW
Gain Bandwidth Product
Supply Current, Enabled
A = 1
V
I
29
47
S,ON
18
56
I
Supply Current, Disabled
10
14
µA
S,OFF
16
FN6154.2
February 27, 2007
3
ISL28156, ISL28256
Electrical Specifications
V
= 5V, V = 0V,V = 2.5V, T = +25°C unless otherwise specified.
CM A
+
-
Boldface limits apply over the operating temperature range, -40°C to +125°C, temperature data guaranteed by
characterization (Continued)
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
I +
Short-Circuit Output Current
R
R
= 10Ω
= 10Ω
28
23
31
mA
O
L
L
I -
Short-Circuit Output Current
24
26
mA
O
18
V
V
V
Supply Operating Range
Enable Pin High Level
Enable Pin Low Level
Enable Pin Input Current
Guaranteed by PSRR test
2.4
5
V
V
SUPPLY
ENH
2
0.8
V
ENL
I
I
t
t
V
V
= 5V
= 0V
0.7
10
1
1.2
1.2
µA
ENH
EN
EN
Enable Pin Input Current
16
25
30
nA
µs
µs
ENL
EN
Enable to output on-state delay time
(ISL28156)
Vout = 1V (enable state); V
Low
= High to
10.8
0.1
EN
Enable to output off-state delay time
(ISL28156)
Vout = OV (disabled state) V
High
= Low to
EN
EN
Typical Performance Curves
8
7
3
2
R
= 1k
C
= 63.3pF
L
6
L
L
1
0
5
C
= 55.3pF
= 49.3pF
= 43.3pF
= 38.3pF
4
C
L
3
-1
-2
-3
-4
-5
-6
-7
-8
R
L
= 10k
= 100k
2
C
L
1
C
L
R
0
L
-1
-2
-3
-4
C
= 34.3pF
L
A
= 1
A
= 1
V
V
-5
-6
-7
-8
C
V
= 16.3pF
= 10mV
R
V
= 10k
L
L
= 10mV
OUT
PP
OUT
PP
10k
FREQUENCY (Hz)
1k
100k
1M
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 2. GAIN vs FREQUENCY vs C
L
FIGURE 1. GAIN vs FREQUENCY vs RL
1
0
70
V
= 2.4V
S
Rf = 1M, Rg = 1k, R = 10k
R
C
= 10k
L
L
60
50
40
30
20
10
0
= 16.3pF
L
-1
-2
-3
-4
-5
-6
-7
-8
-9
V
= 5V
S
V
= 10mV
PP
OUT
Rf = 100k, Rg = 1k, R = 10k
L
Rf = 9.09, Rg = 1k, R = INF
A
= 1
L
V
R
= 10k
L
V
= 10mV
PP
OUT
Rf = 0, Rg = INF, R = 10k
L
-10
100
1k
10k
100k
1M
1k
10k
FREQUENCY (Hz)
100k
1M
FREQUENCY (Hz)
FIGURE 4. GAIN vs FREQUENCY vs V
FIGURE 3. CLOSED LOOP GAIN vs FREQUENCY
S
FN6154.2
February 27, 2007
4
ISL28156, ISL28256
Typical Performance Curves (Continued)
3
2
1
0
V
= 10mV
OUT
V
= 50mV
OUT
1
-1
-2
-3
-4
-5
-6
-7
-8
-9
V
= 1V
OUT
0
V
= 10mV
OUT
-1
-2
-3
-4
-5
-6
-7
-8
V
= 100mV
OUT
V
= 1V
OUT
V
= 50mV
OUT
A
= 1
A = 1
V
V
R
C
= 1k
R
C
= 10k
L
L
L
L
V
= 100mV
= 16.3pF
= 16.3pF
OUT
1k
10k
100k
1M
1k
10k
FREQUENCY (Hz)
100k
1M
FREQUENCY (Hz)
FIGURE 6. GAIN vs FREQUENCY vs V
OUT
FIGURE 5. GAIN vs FREQUENCY vs V
OUT
1
0
10
0
V
= 10mV
OUT
A
= 1
V
R
C
= 10k
= 16.3pF
L
-1
-2
-3
-4
-5
-6
-7
-8
-9
V
= 1V
OUT
V
= 2.4V
L
S
-10
-20
-30
-40
-50
-60
-70
V
= 1V
PP
CM
V
= 50mV
OUT
V
= 5V
S
V
= 100mV
OUT
A
= 1
V
R
C
= 100k
L
L
= 16.3pF
1k
10k
100k
1M
100
1k
10k
FREQUENCY (Hz)
100k
1M
FREQUENCY (Hz)
FIGURE 7. GAIN vs FREQUENCY vs V
FIGURE 8. CMRR vs FREQUENCY
OUT
10
0
10
A
= 1
A
= 1
V
V
0
-10
-20
-30
-40
-50
-60
-70
-80
R
= 1k
R
= 1k
L
L
L
L
-10
-20
-30
-40
-50
-60
-70
-80
-90
C
V
= 16.3pF
= 1V
PSRR-
C
= 16.3pF
= 1V
PSRR-
V
V
OUT
PP
OUT
PP
V
=5V
= 2.4V
S
S
PSRR+
PSRR+
100k
100
1k
10k
FREQUENCY (Hz)
FIGURE 10. PSRR vs FREQUENCY; VS = 5V
100k
1M
100
1k
10k
FREQUENCY (Hz)
1M
FIGURE 9. PSRR vs FREQUENCY; VS = 2.4V
FN6154.2
February 27, 2007
5
ISL28156, ISL28256
Typical Performance Curves (Continued)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
160
140
120
100
80
60
40
20
0
1
10
100
1k
10k
1
10
100
1k
10k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 11. INPUT VOLTAGE NOISE vs FREQUENCY
FIGURE 12. INPUT CURRENT NOISE vs FREQUENCY
24
0
RF = R =R = 10k
A
= 1000
i
L
V
AV = 2
CL = 16.3pF
VOUT = 10mV
R = 100k
22
20
18
16
14
12
10
-0.2
-0.4
-0.6
-0.8
-1
F
R = 100
i
R
= 10k
PP
L
-1.2
-1.4
0
50
100
150
200
250
300
350
400
0
1
2
3
4
5
6
7
8
9
10
TIME (µs)
TIME (s)
FIGURE 14. SMALL SIGNAL STEP RESPONSE
FIGURE 13. 1 TO 10Hz INPUT NOISE
0.6
0.4
0.2
0
6
5
1.2
1.0
0.8
0.6
0.4
0.2
0
V-ENABLE
4
3
R
= R =R = 10k
i L
= 2
F
A
V
2
C
= 16.3pF
= 10mV
L
-0.2
-0.4
-0.6
R
= R =R = 10k
i L
= 2
F
V
1
OUT
PP
A
V
C
= 16.3pF
L
0
V
= 1V
PP
OUT
V
OUT
10
-1
-0.2
90 100
0
100
200
TIME (µs)
300
400
0
20
30
40
50
60
70
80
TIME (µs)
FIGURE 15. LARGE SIGNAL STEP RESPONSE
FIGURE 16. ENABLE TO OUTPUT DELAY
FN6154.2
February 27, 2007
6
ISL28156, ISL28256
Typical Performance Curves (Continued)
14.5
13.5
12.5
11.5
10.5
9.5
58
53
48
43
38
33
28
23
n = 1000
n = 1000
MAX
MAX
MEDIAN
MEDIAN
8.5
MIN
7.5
MIN
6.5
-40
-40
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 17. SUPPLY CURRENT ENABLED vs TEMPERATURE
= ±2.5V
FIGURE 18. SUPPLY CURRENT DISABLED vs
V
TEMPERATURE V = ±2.5V
S
S
380
280
180
80
400
n = 1000
n = 1000
MAX
MAX
300
200
100
0
MEDIAN
MEDIAN
-20
-120
-220
-320
-420
-100
-200
-300
-400
MIN
80
MIN
-40
-20
0
20
40
60
80
C)
100
120
-40
-20
0
20
40
60
100
120
TEMPERATURE (
°
TEMPERATURE (°C)
FIGURE 19. VIO SO8 PACKAGE vs TEMPERATURE V = ±2.5V
S
FIGURE 20. VIO SO8 PACKAGE vs TEMPERATURE V = ±1.2V
S
380
400
n = 1000
280
180
80
MAX
300
MAX
n = 1000
MEDIAN
200
100
MEDIAN
-20
0
-100
-200
-120
-220
-320
-420
MIN
80
MIN
-300
-400
-40
-20
0
20
40
60
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 21. VIO SOT-23 PACKAGE vs TEMPERATURE
= ±2.5V
FIGURE 22. VIO SOT-23 PACKAGE vs TEMPERATURE
= ±1.2V
V
V
S
S
FN6154.2
February 27, 2007
7
ISL28156, ISL28256
Typical Performance Curves (Continued)
5
4
5
4
n = 1000
n = 1000
MAX
3
MAX
3
2
1
2
MEDIAN
MEDIAN
0
1
-1
-2
-3
MIN
MIN
0
-1
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 23. I
vs TEMPERATURE V = ±2.5V
S
FIGURE 24. I
vs TEMPERATURE V = ±2.5V
S
BIAS+
BIAS-
10
2
n = 1000
8
6
n = 1000
1
MAX
MAX
0
-1
-2
-3
-4
MEDIAN
4
MEDIAN
2
0
-2
MIN
MIN
-4
-40
-40
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 26. I
vs TEMPERATURE V = ±1.2V
S
FIGURE 25. I
vs TEMPERATURE V = ±1.5V
S
BIAS-
BIAS+
4
4
2
0
n = 1000
n = 1000
3
2
MAX
MAX
1
0
-2
-1
-2
-3
-4
-5
-6
MEDIAN
MEDIAN
-4
-6
MIN
MIN
-8
-10
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 27. IOS vs TEMPERATURE V = ±2.5V
S
FIGURE 28. IOS vs TEMPERATURE V = ±1.5V
S
FN6154.2
February 27, 2007
8
ISL28156, ISL28256
Typical Performance Curves (Continued)
135
130
125
120
115
110
105
100
95
130
125
120
115
110
105
100
95
n = 1000
MAX
n = 1000
MAX
MEDIAN
MEDIAN
MIN
90
MIN
90
85
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 29. CMRR vs TEMPERATURE V+ = ±2.5V, ±1.5V
FIGURE 30. PSRR vs TEMPERATURE ±1.2V to ±2.5V
4.900
4.9984
n = 1000
n = 1000
4.895
MAX
4.9982
4.9980
4.9978
4.9976
4.9974
4.9972
4.9970
4.9968
4.890
4.885
4.880
4.875
4.870
4.865
4.860
4.855
4.850
MAX
MEDIAN
MEDIAN
MIN
MIN
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 31. V
HIGH vs TEMPERATURE V = ±2.5V, R = 1k
FIGURE 32. V
HIGH V = ±2.5V, R = 100k
OUT S L
OUT
S
L
4.9984
4.9982
4.9980
4.9978
4.9976
4.9974
4.9972
4.9970
4.9968
5
4.5
4
n = 1000
n = 1000
MAX
MAX
MEDIAN
MEDIAN
3.5
3
MIN
MIN
2.5
-40
-40
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 33. V
LOW V = ±2.5V, R = 1k
FIGURE 34. V
LOW V = ±2.5V, R = 100k
OUT S L
OUT
S
L
FN6154.2
February 27, 2007
9
ISL28156, ISL28256
Pin Descriptions
ISL28156
ISL28156
ISL28256
(6 Ld SOT-23)
(8 Ld SO)
(8 Ld MSOP)
PIN NAME
NC
FUNCTION
EQUIVALENT CIRCUIT
1, 5
2
Not connected
Inverting input
4
2 (A)
6 (B)
IN-
V+
IN-
IN+
V-
Circuit 1
3
3
3 (A)
5 (B)
IN+
Non-inverting
input
(See circuit 1)
2
1
4
6
4
V-
Negative supply
Output
V+
1 (A)
7 (B)
OUT
OUT
V-
Circuit 2
6
5
7
8
8
V+
Positive supply
Chip enable
V+
ENABLE
CE
V-
Circuit 3
within one diode beyond the supply rails. They also contain
back-to-back diodes across the input terminals. For
Applications Information
applications where the input differential voltage is expected to
exceed 0.5V, external series resistors must be used to ensure
the input currents never exceed 5mA (Figure 35).
Introduction
The ISL28156 is a single BiMOS rail-to-rail input, output
(RRIO) operational amplifier with an enable feature. The
ISL28256 is a dual version without the enable feature. Both
devices are designed to operate from single supply (2.4V to
5.0V) or dual supplies (±1.2V to ±2.5V) while drawing only
39μA of supply current per amplifier. This combination of low
power and precision performance makes this device suitable
for a variety of low power applications including battery
powered systems.
-
V
R
OUT
IN
V
R
IN
+
L
FIGURE 35. INPUT CURRENT LIMITING
Rail-to-Rail Input/Output
Enable/Disable Feature
The ISL28156 offers an EN pin that disables the device
when pulled up to at least 2.0V. In the disabled state (output
in a high impedance state), the part consumes typically
10µA. By disabling the part, multiple ISL28156 parts can be
connected together as a MUX. In this configuration, the
outputs are tied together in parallel and a channel can be
selected by the EN pin. The EN pin also has an internal pull
down. If left open, the EN pin will pull to the negative rail and
the device will be enabled by default.
These devices feature bipolar inputs which have an input
common mode range that extends up to 0.5V beyond the v+
rail, and to within 10mV of the V- rail. The CMOS outputs
typically swing to within about 4mV of the supply rails with a
100kΩ load. The NMOS sinks current to swing the output in
the negative direction. The PMOS sources current to swing the
output in the positive direction.
Input Protection
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
FN6154.2
February 27, 2007
10
ISL28156, ISL28256
The loading effects of the feedback resistors of the disabled
amplifier must be considered when multiple amplifier outputs
are connected together.
where:
• T
= Maximum ambient temperature
MAX
• θ = Thermal resistance of the package
JA
Using Only One Channel
• PD
= Maximum power dissipation of 1 amplifier
MAX
The ISL28256 is a dual op amp. If the application only
requires one channel, the user must configure the unused
channel to prevent it from oscillating. The unused channel
will oscillate if the input and output pins are floating. This will
result in higher than expected supply currents and possible
noise injection into the channel being used. The proper way
to prevent this oscillation is to short the output to the
negative input and ground the positive input (as shown in
Figure 36).
• V = Supply voltage
S
• I
= Maximum supply current of 1 amplifier
= Maximum output voltage swing of the
MAX
• V
OUTMAX
application
• R = Load resistance
L
-
+
FIGURE 36. PREVENTING OSCILLATIONS IN UNUSED
CHANNELS
Current Limiting
These devices have no internal current-limiting circuitry. If
the output is shorted, it is possible to exceed the Absolute
Maximum Rating for output current or power dissipation,
potentially resulting in the destruction of the device.
Power Dissipation
It is possible to exceed the +125°C maximum junction
temperatures under certain load and power-supply
conditions. It is therefore important to calculate the
maximum junction temperature (T
) for all applications
JMAX
to determine if power supply voltages, load conditions, or
package type need to be modified to remain in the safe
operating area. These parameters are related as follows:
(EQ. 1)
T
= T
+ (θ xPD
)
MAXTOTAL
JMAX
MAX
JA
where:
• P
is the sum of the maximum power
MAX
DMAXTOTAL
dissipation of each amplifier in the package (PD
)
• PD
for each amplifier can be calculated as follows:
MAX
V
OUTMAX
R
L
----------------------------
PD
= 2*V × I
+ (V - V
) ×
MAX
S
SMAX
S
OUTMAX
(EQ. 2)
FN6154.2
February 27, 2007
11
ISL28156, ISL28256
SOT-23 Package Family
MDP0038
e1
D
SOT-23 PACKAGE FAMILY
A
MILLIMETERS
SOT23-5
6
4
N
SYMBOL
SOT23-6
1.45
0.10
1.14
0.40
0.14
2.90
2.80
1.60
0.95
1.90
0.45
0.60
6
TOLERANCE
MAX
A
A1
A2
b
1.45
0.10
1.14
0.40
0.14
2.90
2.80
1.60
0.95
1.90
0.45
0.60
5
±0.05
E1
E
±0.15
2
3
±0.05
0.15
2X
C
D
c
±0.06
1
2
3
0.20
2X
C
D
Basic
5
e
E
Basic
E1
e
Basic
0.20
C
A-B
D
M
B
b
NX
Basic
e1
L
Basic
±0.10
L1
N
Reference
Reference
Rev. F 2/07
0.15
2X
C
A-B
1
3
D
NOTES:
C
1. Plastic or metal protrusions of 0.25mm maximum per side are not
included.
A2
SEATING
PLANE
2. Plastic interlead protrusions of 0.25mm maximum per side are not
included.
A1
0.10
NX
C
3. This dimension is measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Index area - Pin #1 I.D. will be located within the indicated zone
(SOT23-6 only).
6. SOT23-5 version has no center lead (shown as a dashed line).
(L1)
H
A
GAUGE
PLANE
0.25
c
+3°
-0°
L
0°
FN6154.2
February 27, 2007
12
ISL28156, ISL28256
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M
C A B
e
H
C
A2
A1
GAUGE
PLANE
SEATING
PLANE
0.010
L
4° ±4°
0.004 C
b
0.010 M
C
A
B
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SO16
(0.150”)
SO16 (0.300”)
(SOL-16)
SO20
SO24
(SOL-24)
SO28
(SOL-28)
SYMBOL
SO-8
0.068
0.006
0.057
0.017
0.009
0.193
0.236
0.154
0.050
0.025
0.041
0.013
8
SO-14
0.068
0.006
0.057
0.017
0.009
0.341
0.236
0.154
0.050
0.025
0.041
0.013
14
(SOL-20)
0.104
0.007
0.092
0.017
0.011
0.504
0.406
0.295
0.050
0.030
0.056
0.020
20
TOLERANCE
MAX
NOTES
A
A1
A2
b
0.068
0.006
0.057
0.017
0.009
0.390
0.236
0.154
0.050
0.025
0.041
0.013
16
0.104
0.007
0.092
0.017
0.011
0.406
0.406
0.295
0.050
0.030
0.056
0.020
16
0.104
0.007
0.092
0.017
0.011
0.606
0.406
0.295
0.050
0.030
0.056
0.020
24
0.104
0.007
0.092
0.017
0.011
0.704
0.406
0.295
0.050
0.030
0.056
0.020
28
-
±0.003
±0.002
±0.003
±0.001
±0.004
±0.008
±0.004
Basic
-
-
-
c
-
D
1, 3
E
-
E1
e
2, 3
-
L
±0.009
Basic
-
L1
h
-
Reference
Reference
-
N
-
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
FN6154.2
February 27, 2007
13
ISL28156, ISL28256
Mini SO Package Family (MSOP)
MDP0043
0.25 M C A B
A
MINI SO PACKAGE FAMILY
D
(N/2)+1
MILLIMETERS
N
SYMBOL
MSOP8
1.10
0.10
0.86
0.33
0.18
3.00
4.90
3.00
0.65
0.55
0.95
8
MSOP10
1.10
0.10
0.86
0.23
0.18
3.00
4.90
3.00
0.50
0.55
0.95
10
TOLERANCE
Max.
NOTES
A
A1
A2
b
-
±0.05
-
E
E1
PIN #1
I.D.
±0.09
-
+0.07/-0.08
±0.05
-
c
-
D
±0.10
1, 3
1
B
(N/2)
E
±0.15
-
E1
e
±0.10
2, 3
Basic
-
e
H
C
L
±0.15
-
SEATING
PLANE
L1
N
Basic
-
Reference
-
M
C A B
b
0.08
0.10 C
Rev. D 2/07
N LEADS
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
L1
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
A
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
c
SEE DETAIL "X"
A2
GAUGE
PLANE
0.25
L
DETAIL X
A1
3° ±3°
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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FN6154.2
February 27, 2007
14
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