ISL28138 [INTERSIL]
4.5MHz, Single and Dual Precision Rail-to-Rail Input-Output (RRIO) Op Amps with Very Low Input Bias Current; 4.5MHz ，单和双精密轨到轨输入输出（ RRIO ）运算放大器具有极低的输入偏置电流
| 型号： | ISL28138 |
| 厂家： | 
Intersil |
| 描述： | 4.5MHz, Single and Dual Precision Rail-to-Rail Input-Output (RRIO) Op Amps with Very Low Input Bias Current |
| 文件： | 总16页 (文件大小：861K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL28138, ISL28238
®
Data Sheet
February 19, 2008
FN6336.2
4.5MHz, Single and Dual Precision
Rail-to-Rail Input-Output (RRIO) Op Amps
with Very Low Input Bias Current
Features
• 4.5MHz gain bandwidth product
• 900µA supply current (per amplifier)
• 300µV maximum offset voltage
• 1pA typical input bias current
• Down to 2.4V single supply voltage range
• Rail-to-rail input and output
The ISL28138 and ISL28238 are 4.5MHz low-power single
and dual operational amplifiers. The parts are optimized for
single supply operation from 2.4V to 5.5V, allowing operation
from one lithium cell or two Ni-Cd batteries.
The parts feature an Input Range Enhancement Circuit
(IREC) which enables them to maintain CMRR performance
for input voltages greater than the positive supply. The input
signal is capable of swinging 0.25V above the positive
supply and to 100mV below the negative supply with only a
slight degradation of the CMRR performance. The output
operation is rail-to-rail.
• Output sources and sinks 60mA load current
• Enable pin (ISL28138)
• -40°C to +125°C operation
• Pb-free (RoHS compliant)
The parts draw minimal supply current (900µA per amplifier)
while meeting excellent DC accuracy, AC performance,
noise and output drive specifications. The ISL28138 features
an enable pin that can be used to turn the device off and
reduce the supply current to less than 20µA. Operation is
guaranteed over -40°C to +125°C temperature range.
Applications
• Low-end audio
• 4mA to 20mA current loops
• Medical devices
• Sensor amplifiers
• ADC buffers
Ordering Information
PART NUMBER
(Note)
PART
MARKING
PACKAGE
(Pb-free)
• DAC output amplifiers
PKG. DWG. #
MDP0038
MDP0038
MDP0027
MDP0027
MDP0027
ISL28138FHZ-T7* GABR
ISL28138FHZ-T7A* GABR
6 Ld SOT-23
6 Ld SOT-23
Pinouts
ISL28138
(6 LD SOT-23)
TOP VIEW
ISL28138
(8 LD SO)
TOP VIEW
ISL28138FBZ
28138 FBZ 8 Ld SOIC
28138 FBZ 8 Ld SOIC
28238 FBZ 8 Ld SOIC
ISL28138FBZ-T7*
Coming Soon
NC
IN-
IN+
V-
1
2
3
4
8
7
6
5
EN
OUT 1
V- 2
6
5
4
V+
EN
IN-
ISL28238FBZ
V+
-
+
Coming Soon
28238 FBZ 8 Ld SOIC
MDP0027
MDP0043
MDP0043
+ -
ISL28238FBZ-T7*
OUT
NC
IN+ 3
Coming Soon
ISL28238FUZ
8238Z
8238Z
8 Ld MSOP
8 Ld MSOP
Coming Soon
ISL28238FUZ-T7*
ISL28238
(8 LD SO)
TOP VIEW
ISL28238
(8 LD MSOP)
TOP VIEW
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and 100% matte tin plate PLUS ANNEAL - e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
OUT_A
1
2
3
4
8
7
6
5
V+
OUT_A
IN-_A
IN+_A
V-
1
2
3
4
8
7
6
5
V+
IN-_A
IN+_A
V-
OUT_B
IN-_B
IN+_B
OUT_B
IN-_B
IN+_B
-
+
-
+
+
-
+
-
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2007, 2008. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL28138, ISL28238
Absolute Maximum Ratings (T = +25°C)
Thermal Information
A
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75V
Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/µs
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V
ESD Tolerance
Thermal Resistance
θ
(°C/W)
JA
6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . .
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . .
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite
Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
230
110
115
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV
Machine Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications V+ = 5V, V- = 0V,V
= 2.5V, R = Open, T = +25°C unless otherwise specified.
L A
Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data
CM
established by characterization.
MIN
MAX
PARAMETER
DESCRIPTION
Input Offset Voltage
CONDITIONS
(Note 1) TYP (Note 1) UNIT
V
8 Ld SOIC
6 Ld SOT-23
8 Ld SOIC
-300
-650
±6
±6
300
650
µV
µV
OS
-550
550
-750
750
Input Offset Voltage vs Temperature
0.6
µV/°C
ΔV
OS
---------------
ΔT
I
Input Offset Current
Input Bias Current
-35
-80
±5
±1
35
80
pA
pA
OS
T
= -40°C to +85°C
A
I
-30
30
B
T
= -40°C to +85°C
-80
80
A
CMIR
Common-Mode Voltage Range
Common-Mode Rejection Ratio
Guaranteed by CMRR
0
5
V
CMRR
V
V
V
V
= 0V to 5V
75
70
98
98
dB
CM
PSRR
Power Supply Rejection Ratio
Large Signal Voltage Gain
= 2.4V to 5.5V
80
75
dB
+
A
= 0.5V to 4.5V, R = 100kΩ to V
CM
200
150
580
V/mV
VOL
O
O
L
= 0.5V to 4.5V, R = 1kΩ to V
50
3
V/mV
mV
L
CM
V
Maximum Output Voltage Swing
Output low, R = 100kΩ to V
CM
6
OUT
L
8
Output low, R = 1kΩ to V
50
4.998
4.95
0.9
70
110
mV
V
L
CM
Output high, R = 100kΩ to V
4.994
4.99
L
CM
Output high, R = 1kΩ to V
4.93
4.89
V
L
CM
I
I
Supply Current, Enabled
0.7
0.4
1.1
1.4
mA
µA
S,ON
Supply Current, Disabled (ISL28138)
10
14
S,OFF
16
FN6336.2
February 19, 2008
2
ISL28138, ISL28238
Electrical Specifications V+ = 5V, V- = 0V,V
= 2.5V, R = Open, T = +25°C unless otherwise specified.
Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data
CM
L
A
established by characterization. (Continued)
MIN
MAX
PARAMETER
I +
DESCRIPTION
CONDITIONS
(Note 1) TYP (Note 1) UNIT
Short-Circuit Output Source Current
R
R
= 10Ω
= 10Ω
48
75
68
mA
mA
O
L
L
45
I -
Short-Circuit Output Sink Current
50
O
45
V
V
V
Supply Operating Range
V+ to V-, Guararteed by PSRR
2.4
2
5.5
0.8
V
V
SUPPLY
ENH
EN Pin High Level (ISL28138)
EN Pin Low Level(ISL28138)
EN Pin Input High Curren (ISL28138)
V
ENL
I
V
V
= V+
= V-
1
1.5
1.6
µA
ENH
EN
EN
I
EN Pin Input Low Current (ISL28138)
12
25
nA
ENL
30
AC SPECIFICATONS
GBW
Gain Bandwidth Product
A
R
= 100, R = 100kΩ, R = 1kΩ,
4.5
13
MHz
MHz
V
F
G
= 10kΩ to V
L
CM
Unity Gain
Bandwidth
-3dB Bandwidth
A
=1, R = 0Ω, V
= 10mV
,
P-P
V
F
OUT
= 10kΩ to V
CM
R
L
e
Input Noise Voltage Peak-to-Peak
Input Noise Voltage Density
Input Noise Current Density
f = 0.1Hz to 10Hz
2
26
µV
P-P
N
f
f
= 1kHz
= 1kHz
nV/√Hz
O
i
0.12
85
pA/√Hz
dB
N
O
CMRR @ 60Hz Input Common Mode Rejection Ratio
V
= 1V , R = 10kΩ to V
P-P CM
CM
L
PSRR- @
120Hz
Power Supply Rejection Ratio (V-)
V , V = ±1.2V and ±2.5V,
-82
dB
+
-
V
= 1V , R = 10kΩ to V
P-P
SOURCE
L
CM
CM
PSRR+ @
120Hz
Power Supply Rejection Ratio (V+)
V , V = ±1.2V and ±2.5V
-100
dB
+
-
V
= 1V , R = 10kΩ to V
P-P
SOURCE
L
TRANSIENT RESPONSE
SR
t , t , Large
Slew Rate
±4.8
530
V/µs
ns
Rise Time, 10% to 90%, V
A
= +2
,
V
= 3V , R = R
P-P
=
=
10k
10k
Ω
Ω
r
f
OUT
V
OUT
R = 10kΩ to V
L
G
F
F
Signal
CM
Fall Time, 90% to 10%, V
A
= +2
,
V
= 3V , R = R
530
50
50
5
ns
ns
ns
µs
µs
OUT
V
OUT
= 10kΩ to V
P-P
G
R
L
CM
t , t , Small
Rise Time, 10% to 90%, V
A
= +2
,
V
= 10mV
=
,
r
f
OUT
V
OUT
P-P
10kΩ to V
Signal
R
= R = R
G
F
L
CM
Fall Time, 90% to 10%, V
A
= +2
,
V
= 10mV
,
OUT
V
OUT
P-P
= R = R = 10kΩ to V
F L
R
G
CM
t
Enable to Output Turn-on Delay Time, 10%
EN to 10% V , (ISL28138)
V
R
= 5V to 0V, A = +2,
V
EN
EN
= R = R = 1k to V
OUT
Enable to Output Turn-off Delay Time, 10%
EN to 10% V , (ISL28138)
G
F
L
CM
V
R
= 0V to 5V, A = +2,
V
0.2
EN
= R = R = 1k to V
OUT
G
F
L
CM
NOTE:
1. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested.
FN6336.2
February 19, 2008
3
ISL28138, ISL28238
Typical Performance Curves V+ = 5V, V- = 0V,V = 2.5V, R = Open, unless otherwise specified.
CM
L
1
0
15
10
5
V
= 100mV
= 50mV
= 10mV
OUT
-1
-2
-3
-4
-5
-6
-7
-8
-9
R = R = 100k
V
f
g
OUT
OUT
R = R = 10k
f
g
V
V
= 1V
OUT
0
V
= 5V
= 1k
+
L
L
-5
R
C
A
V
= 5V
= 1k
+
L
L
R = R = 1k
f
g
= 16.3pF
= +2
R
C
A
-10
= 16.3pF
= +1
V
V
= 10mV
OUT
P-P
V
-15
1k
10k
100k
1M
10M
100M
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 1. GAIN vs FREQUENCY vs FEEDBACK RESISTOR
FIGURE 2. GAIN vs FREQUENCY vs V
R = 1k
L
OUT,
VALUES R /R
f
g
1
0
1
0
V
= 100mV
OUT
-1
-2
-3
-4
-5
-6
-7
-8
-9
-1
-2
-3
-4
-5
-6
-7
-8
-9
V
= 100mV
= 50mV
= 10mV
OUT
V
= 50mV
= 10mV
OUT
OUT
V
OUT
OUT
V
V
V
= 1V
OUT
V
= 1V
OUT
V
R
= 5V
= 100k
+
L
L
V
R
= 5V
= 10k
+
L
L
C
= 16.3pF
= +1
C
= 16.3pF
= +1
A
V
A
V
1k
10k
100k
1M
10M
100M
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 4. GAIN vs FREQUENCY vs V
, R = 100k
OUT
FIGURE 3. GAIN vs FREQUENCY vs V
, R = 10k
OUT
L
L
1
70
R
= 1k
A
= 1, R = INF, R = 0
g f
g f
= 101, R = 1k, R = 100k
g f
L
V
A
= 1001
= 101
V
0
-1
-2
-3
-4
-5
-6
-7
-8
-9
A
= 10, R = 1k, R = 9.09k
60
50
40
30
20
10
0
V
A
V
R
= 10k
L
A = 1001, R = 1k, R = 1M
V g f
A
V
R
= 100k
L
V
= 5V
+
L
L
C
= 16.3pF
= 10k
A
= 10
V
R
V
= 10mV
OUT
P-P
V
V
= 5V
+
= 10mV
= 16.3pF
= +1
OUT
P-P
A
= 1
V
C
L
A
V
-10
100
1k
10k
100k
1M
10M
100M
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 5. GAIN vs FREQUENCY vs R
FIGURE 6. FREQUENCY RESPONSE vs CLOSED LOOP GAIN
L
FN6336.2
February 19, 2008
4
ISL28138, ISL28238
Typical Performance Curves V+ = 5V, V- = 0V,V = 2.5V, R = Open, unless otherwise specified. (Continued)
CM
L
1
0
8
7
6
5
4
3
2
1
0
-1
-2
-3
-4
-5
-6
-7
-8
C
C
= 51.7pF
= 43.7pF
= 37.7pF
L
L
L
V
= 5V
+
-1
-2
-3
-4
-5
-6
-7
-8
-9
C
V
= 2.4V
+
C
= 26.7pF
= 16.7pF
= 4.7pF
L
R
C
A
= 10k
L
L
V
R
= 5V
= 1k
= +1
+
L
C
L
= 16.3pF
= +1
C
L
A
V
V
V
= 10mV
P-P
V
= 10mV
OUT
OUT P-P
10k
100k
1M
FREQUENCY (Hz)
10M
100M
10k
100k
1M
FREQUENCY (Hz)
10M
100M
FIGURE 8. GAIN vs FREQUENCY vs C
FIGURE 7. GAIN vs FREQUENCY vs SUPPLY VOLTAGE
L
20
0
10
0
-10
-20
-30
-40
-50
PSRR-
PSRR+
-20
-40
-60
-80
-100
-120
V
= 2.4V, 5V
= 1k
V , V = ±1.2V
+
L
L
+
-
R
C
A
R
= 1k
-60
-70
-80
-90
L
L
= 16.3pF
= +1
C
A
= 16.3pF
= +1
V
V
V
= 1V
V
= 1V
CM
P-P
CM
P-P
100
1k
10k
100k
1M
10M
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 9. CMRR vs FREQUENCY; V = 2.4V AND 5V
+
FIGURE 10. PSRR vs FREQUENCY, V , V = ±1.2V
+
-
1k
100
10
20
0
V
R
= 5V
= 1k
+
L
L
C
= 16.3pF
= +1
PSRR-
PSRR+
-20
-40
A
V
-60
V , V = ±2.5V
+
-
R
= 1k
-80
L
L
C
A
= 16.3pF
= +1
-100
-120
V
V
= 1V
P-P
CM
1
10
100
1k
10k
100k
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 12. INPUT VOLTAGE NOISE DENSITY vs FREQUENCY
FIGURE 11. PSRR vs FREQUENCYV, V , V = ±2.5V
+
-
FN6336.2
February 19, 2008
5
ISL28138, ISL28238
Typical Performance Curves V+ = 5V, V- = 0V,V = 2.5V, R = Open, unless otherwise specified. (Continued)
CM
L
0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
10
V
R
= 5V
= 1k
+
L
L
C
= 16.3pF
= +1
A
V
1
R
= 10k
A = 10k
V
V
C
= 5V
= 16.3pF
= 10
L
+
L
R
R = 100k
f
g
0.1
1
10
100
1k
10k
100k
0
1
2
3
4
5
6
7
8
9
10
FREQUENCY (Hz)
TIME (s)
FIGURE 14. INPUT VOLTAGE NOISE 0.1Hz to 10Hz
FIGURE 13. INPUT CURRENT NOISE DENSITY vs FREQUENCY
2.0
1.5
1.0
0.5
0.025
0.020
0.015
0.010
0
V , V = ±2.5V
V , V = ±2.5V
+
-
+
-
-0.5
-1.0
-1.5
-2.0
R
= 1k
R
= 1k
L
L
L
L
g
C
= 16.3pF
C
R
A
= 16.3pF
R = R = 10k
= R =10k
g
f
f
A
OUT
= 2
= 2
V
V
OUT
V
= 10mV
V
= 3V
P-P
6
P-P
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
7
8
9
10
TIME (µs)
TIME (µs)
FIGURE 15. LARGE SIGNAL STEP RESPONSE
FIGURE 16. SMALL SIGNAL STEP RESPONSE
1.2
1.0
0.8
0.6
0.4
0.2
0
3.5
V
OUT
V
EN
3.0
2.5
2.0
1.5
1.0
0.5
0
V
R
= 5V
= R = 10k
+
g
L
f
C
= 16.3pF
= +2
A
V
V
= 1V
P-P
OUT
R
= 10k
L
-0.2
90 100
-0.5
0
10
20
30
40
50
60
70
80
TIME (µs)
FIGURE 17. ISL28138 ENABLE TO OUTPUT RESPONSE
FN6336.2
February 19, 2008
6
ISL28138, ISL28238
Typical Performance Curves V+ = 5V, V- = 0V,V = 2.5V, R = Open, unless otherwise specified. (Continued)
CM
L
800
600
400
200
0
100
80
V
R
= 5V
= OPEN
V
= 5V
= OPEN
+
L
+
R
R
A
L
f
60
R = 100k, R = 100
= 100k, R = 100
g
= +1k
f
g
A
= +1k
40
V
V
20
0
-20
-40
-60
-80
-100
-200
-400
-600
-800
-1
0
1
2
3
4
5
6
-1
0
1
2
3
4
5
6
V
(V)
V
(V)
CM
CM
FIGURE 18. INPUT OFFSET VOLTAGE vs COMMON MODE
INPUT VOLTAGE
FIGURE 19. INPUT BIAS CURRENT vs COMMON MODE
INPUT VOLTAGE
10.5
1.2
MAX
9.5
1.1
MAX
8.5
1.0
MEDIAN
7.5
MEDIAN
0.9
6.5
MIN
0.8
MIN
5.5
0.7
0.6
4.5
3.5
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 20. SUPPLY CURRENT ENABLED vs
TEMPERATURE V , V = ±2.5V
FIGURE 21. SUPPLY CURRENT DISABLED vs
TEMPERATURE V , V = ±2.5V
+
-
+
-
800
600
400
200
0
600
400
200
0
MAX
MAX
MEDIAN
MEDIAN
-200
-400
-600
-800
MIN
-200
-400
-600
-800
MIN
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 22. V
V
(SOIC PKG) vs TEMPERATURE
FIGURE 23. V
V
(SOT PKG) vs TEMPERATURE
OS
= 0V, V , V = ±2.75V
OS
= 0V, V , V = ±2.75V
IN
+
-
IN
+
-
FN6336.2
February 19, 2008
7
ISL28138, ISL28238
Typical Performance Curves V+ = 5V, V- = 0V,V = 2.5V, R = Open, unless otherwise specified. (Continued)
CM
L
800
600
400
200
0
600
400
200
0
MAX
MAX
MEDIAN
MEDIAN
-200
-400
-600
-800
-200
-400
-600
-800
MIN
MIN
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 25. V
V
(SOT PKG) vs TEMPERATURE
FIGURE 24. V
V
(SOIC PKG) vs TEMPERATURE
OS
= 0V, V , V = ±2.5V
OS
= 0V, V , V = ±2.5V
IN
+
-
IN
+
-
800
600
400
200
0
1000
800
600
400
200
0
MAX
MAX
MEDIAN
MIN
MEDIAN
MIN
-200
-400
-600
-800
-200
-400
-600
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 26. V
(SOIC PKG) vs TEMPERATURE
OS
= 0V, V , V = ±1.2V
FIGURE 27. V
V
(SOT PKG) vs TEMPERATURE
OS
= 0V, V , V = ±1.2V
V
IN
+
-
IN
+
-
250
200
150
100
50
300
250
200
150
100
50
MAX
MAX
MEDIAN
MEDIAN
MIN
MIN
0
0
-50
-50
-40
-40
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 29. I
- vs TEMPERATURE V , V = ±1.2V
+ -
FIGURE 28.
I
- vs TEMPERATURE V , V = ±2.5V
BIAS + -
BIAS
FN6336.2
February 19, 2008
8
ISL28138, ISL28238
Typical Performance Curves V+ = 5V, V- = 0V,V = 2.5V, R = Open, unless otherwise specified. (Continued)
CM
L
10
20
0
10
MAX
-10
-20
-30
-40
-50
-60
-70
0
MAX
-10
-20
-30
-40
-50
-60
MEDIAN
MEDIAN
MIN
MIN
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 30. I
vs TEMPERATURE V , V = ±2.5V
+ -
FIGURE 31. I
vs TEMPERATURE V , V = ±1.2V
OS
OS
+
-
80
70
60
50
40
30
20
1750
1550
1350
1150
950
MAX
MEDIAN
MAX
MEDIAN
MIN
750
550
MIN
350
150
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 33. A
VOL
vs TEMPERATURE, R = 1k
L
FIGURE 32. A
VOL
vs TEMPERATURE, R = 100k,
L
V , V = ±2.5V, V = -2V TO +2V
V , V = ±2.5V, V = -2V TO +2V
+
-
O
+
-
O
140
130
120
110
100
90
140
130
120
110
100
90
MAX
MAX
MEDIAN
MIN
MEDIAN
MIN
80
80
70
-40
70
-40
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 34. CMRR vs TEMPERATURE, V
V , V = ±2.5V
= +2.5V TO -2.5V,
FIGURE 35. PSRR vs TEMPERATURE, V , V = ±1.2V TO
CM
+
-
±2.75V
+
-
FN6336.2
February 19, 2008
9
ISL28138, ISL28238
Typical Performance Curves V+ = 5V, V- = 0V,V = 2.5V, R = Open, unless otherwise specified. (Continued)
CM
L
4.9994
4.9992
4.9990
4.9988
4.9986
4.9984
4.9982
4.970
4.965
4.960
4.955
4.950
4.945
4.940
MAX
MAX
MEDIAN
MEDIAN
MIN
MIN
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 36. V
HIGH vs TEMPERATURE R = 1k,
FIGURE 37. V
HIGH vs TEMPERATURE R = 100k,
OUT L
OUT
L
V , V = ±2.5V
V , V = ±2.5V
+
-
+
-
75
70
65
60
55
50
45
40
3.3
3.1
2.9
2.7
2.5
2.3
2.1
1.9
1.7
1.5
MAX
MAX
MEDIAN
MEDIAN
MIN
MIN
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 38. V
LOW vs TEMPERATURE R = 1k,
FIGURE 39. V
LOW vs TEMPERATURE R =100k,
OUT L
OUT
L
V , V = ±2.5V
V , V = ±2.5V
+
-
+
-
-50
-55
-60
-65
-70
-75
-80
-85
95
90
85
80
75
70
65
60
MAX
MIN
MAX
MEDIAN
MEDIAN
MIN
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 40. + OUTPUT SHORT CIRCUIT CURRENT vs
TEMPERATURE V = -2.55V, R = 10,
FIGURE 41. - OUTPUT SHORT CIRCUIT CURRENT vs
TEMPERATURE V = -2.55V, R = 10,
IN
L
IN
L
V , V = ±2.5V
V , V = ±2.5V
+
-
+
-
FN6336.2
February 19, 2008
10
ISL28138, ISL28238
Pin Descriptions
ISL28238
(8 Ld SOIC)
(8 Ld MSOP)
ISL28138
(6 Ld SOT-23)
ISL28138
(8 Ld SOIC)
PIN NAME
FUNCTION
EQUIVALENT CIRCUIT
1, 5
2
NC
Not connected
inverting input
4
IN-
2 (A)
6 (B)
IN-_A
IN-_B
V+
IN-
IN+
V-
Circuit 1
3
2
3
4
IN+
IN+_A
IN+_B
Non-inverting
input
(See circuit 1)
3 (A)
5 (B)
4
V-
Negative supply
V+
V-
CAPACITIVELY
COUPLED
ESD CLAMP
Circuit 2
V+
1
6
OUT
Output
1 (A)
7 (B)
OUT_A
OUT_B
OUT
V-
Circuit 3
6
5
7
8
8
V+
EN
Positive supply
Chip enable
(See circuit 2)
V+
EN
V-
Circuit 4
input signal moves from one supply rail to another, the
operational amplifier switches from one input pair to the
other causing drastic changes in input offset voltage and an
undesired change in magnitude and polarity of input offset
current.
Applications Information
Introduction
The ISL28138 and ISL28238 are single and dual channel
CMOS rail-to-rail input, output (RRIO) micropower precision
operational amplifiers. The parts are designed to operate
from single supply (2.4V to 5.5V) or dual supply (±1.2V to
±2.75V). The parts have an input common mode range that
extends 0.25V above the positive rail and 100mV below the
the negative supply rail. The output operation can swing
within about 3mV of the supply rails with a 100kΩ load.
The ISL28138 and ISL28238 achieve input rail-to-rail
operation without sacrificing important precision
specifications and degrading distortion performance. The
devices’ input offset voltage exhibits a smooth behavior
throughout the entire common-mode input range. The input
bias current versus the common-mode voltage range gives
us an undistorted behavior from typically 100mV below the
negative rail and 0.25V higher than the V+ rail.
Rail-to-Rail Input
Many rail-to-rail input stages use two differential input pairs,
a long-tail PNP (or PFET) and an NPN (or NFET). Severe
penalties have to be paid for this circuit topology. As the
FN6336.2
February 19, 2008
11
ISL28138, ISL28238
will be enabled by default. When not used, the EN pin should
Rail-to-Rail Output
either be left floating or connected directly to the V- pin.
A pair of complementary MOS devices are used to achieve
the rail-to-rail output swing. The NMOS sinks current to
swing the output in the negative direction. The PMOS
sources current to swing the output in the positive direction.
The ISL28138 and ISL28238 with a 100kΩ load will swing to
within 3mV of the positive supply rail and within 3mV of the
negative supply rail.
Limitations of the Differential Input Protection
If the input differential voltage is expected to exceed 0.5V, an
external current limiting resistor must be used to ensure the
input current never exceeds 5mA. For non-inverting unity gain
applications the current limiting can be via a series IN+ resistor,
or via a feedback resistor of appropriate value. For other gain
configurations, the series IN+ resistor is the best choice, unless
Results of Over-Driving the Output
the feedback (R ) and gain setting (R ) resistors are both
sufficiently large to limit the input current to 5mA.
F
G
Caution should be used when over-driving the output for long
periods of time. Over-driving the output can occur in two ways.
1) The input voltage times the gain of the amplifier exceeds the
supply voltage by a large value or, 2) the output current
required is higher than the output stage can deliver. These
Large differential input voltages can arise from several
sources:
1) During open loop (comparator) operation. Used this way,
the IN+ and IN- voltages don’t track, so differentials arise.
conditions can result in a shift in the Input Offset Voltage (V
as much as 1µV/hr. of exposure under these conditions.
)
OS
2) When the amplifier is disabled but an input signal is still
IN+ and IN- Input Protection
present. An R or R to GND keeps the IN- at GND, while
L
G
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. They also contain
back-to-back diodes across the input terminals (see “Pin
Descriptions” on page 11 - Circuit 1). For applications where
the input differential voltage is expected to exceed 0.5V, an
external series resistor must be used to ensure the input
currents never exceed 5mA (Figure 42).
the varying IN+ signal creates a differential voltage. Mux
Amp applications are similar, except that the active channel
V
determines the voltage on the IN- terminal.
OUT
3) When the slew rate of the input pulse is considerably
faster than the op amp’s slew rate. If the V can’t keep up
OUT
with the IN+ signal, a differential voltage results, and visible
distortion occurs on the input and output signals. To avoid
this issue, keep the input slew rate below 4.8V/µs, or use
appropriate current limiting resistors.
-
V
R
OUT
IN
Large (>2V) differential input voltages can also cause an
V
R
IN
+
L
increase in disabled I
CC
.
Using Only One Channel
FIGURE 42. INPUT CURRENT LIMITING
If the application only requires one channel of the ISL28238,
the user must configure the unused channel to prevent it
from oscillating. The unused channel will oscillate if the input
and output pins are floating. This will result in higher than
expected supply currents and possible noise injection into
the channel being used. The proper way to prevent this
oscillation is to short the output to the negative input and
ground the positive input (as shown in Figure 43).
Enable/Disable Feature
The ISL28138 offers an EN pin that disables the device
when pulled up to at least 2.0V. In the disabled state (output
in a high impedance state), the part consumes typically 10µA
at room temperature. By disabling the part, multiple
ISL28138 parts can be connected together as a MUX. In this
configuration, the outputs are tied together in parallel and a
channel can be selected by the EN pin. The loading effects
of the feedback resistors of the disabled amplifier must be
considered when multiple amplifier outputs are connected
together. Note that feed through from the IN+ to IN- pins
occurs on any Mux Amp disabled channel where the input
differential voltage exceeds 0.5V (e.g., active channel
-
+
FIGURE 43. PREVENTING OSCILLATIONS IN UNUSED
CHANNELS
V
= 1V, while disabled channel V = GND), so the mux
OUT
IN
implementation is best suited for small signal applications. If
large signals are required, use series IN+ resistors, or large
value R , to keep the feed through current low enough to
F
minimize the impact on the active channel. See “Limitations
of the Differential Input Protection” on page 12 for more
details.The EN pin also has an internal pull-down. If left
open, the EN pin will pull to the negative rail and the device
FN6336.2
February 19, 2008
12
ISL28138, ISL28238
Proper Layout Maximizes Performance
Power Dissipation
To achieve the maximum performance of the high input
impedance and low offset voltage, care should be taken in
the circuit board layout. The PC board surface must remain
clean and free of moisture to avoid leakage currents
between adjacent traces. Surface coating of the circuit board
will reduce surface moisture and provide a humidity barrier,
reducing parasitic resistance on the board. When input
leakage current is a concern, the use of guard rings around
the amplifier inputs will further reduce leakage currents.
Figure 44 shows a guard ring example for a unity gain
amplifier that uses the low impedance amplifier output at the
same voltage as the high impedance input to eliminate
surface leakage. The guard ring does not need to be a
specific width, but it should form a continuous loop around
both inputs. For further reduction of leakage currents,
components can be mounted to the PC board using Teflon
standoff insulators.
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power-supply
conditions. It is therefore important to calculate the
maximum junction temperature (T
) for all applications
JMAX
to determine if power supply voltages, load conditions, or
package type need to be modified to remain in the safe
operating area. These parameters are related in Equation 1:
T
= T
+ (θ xPD
)
MAXTOTAL
(EQ. 1)
JMAX
MAX
JA
where:
• P
is the sum of the maximum power
DMAXTOTAL
dissipation of each amplifier in the package (PD
)
MAX
• PD
MAX
for each amplifier can be calculated as shown in
Equation 2:
V
OUTMAX
R
L
----------------------------
PD
= 2*V × I
+ (V - V ) ×
OUTMAX
MAX
S
SMAX
S
(EQ. 2)
V+
HIGH IMPEDANCE INPUT
where:
IN
• T
= Maximum ambient temperature
MAX
• θ = Thermal resistance of the package
JA
• PD
= Maximum power dissipation of 1 amplifier
MAX
FIGURE 44. GUARD RING EXAMPLE FOR UNITY GAIN
AMPLIFIER
• V = Supply voltage (Magnitude of V and V )
S
+
-
• I
= Maximum supply current of 1 amplifier
MAX
Current Limiting
• V
OUTMAX
= Maximum output voltage swing of the
The ISL28138 and ISL28238 have no internal current
limiting circuitry. If the output is shorted, it is possible to
exceed the Absolute Maximum Rating for output current or
power dissipation, potentially resulting in the destruction of
the device.
application
• R = Load resistance
L
FN6336.2
February 19, 2008
13
ISL28138, ISL28238
SOT-23 Package Family
MDP0038
e1
D
SOT-23 PACKAGE FAMILY
A
MILLIMETERS
SOT23-5
6
4
N
SYMBOL
SOT23-6
1.45
0.10
1.14
0.40
0.14
2.90
2.80
1.60
0.95
1.90
0.45
0.60
6
TOLERANCE
MAX
A
A1
A2
b
1.45
0.10
1.14
0.40
0.14
2.90
2.80
1.60
0.95
1.90
0.45
0.60
5
±0.05
E1
E
±0.15
2
3
±0.05
0.15
2X
C
D
c
±0.06
1
2
3
0.20
2X
C
D
Basic
5
e
E
Basic
E1
e
Basic
0.20
C
A-B
D
M
B
b
NX
Basic
e1
L
Basic
±0.10
L1
N
Reference
Reference
Rev. F 2/07
0.15
2X
C
A-B
1
3
D
NOTES:
C
1. Plastic or metal protrusions of 0.25mm maximum per side are not
included.
A2
SEATING
PLANE
2. Plastic interlead protrusions of 0.25mm maximum per side are not
included.
A1
0.10
NX
C
3. This dimension is measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Index area - Pin #1 I.D. will be located within the indicated zone
(SOT23-6 only).
6. SOT23-5 version has no center lead (shown as a dashed line).
(L1)
H
A
GAUGE
PLANE
0.25
c
+3°
-0°
L
0°
FN6336.2
February 19, 2008
14
ISL28138, ISL28238
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M
C A B
e
H
C
A2
A1
GAUGE
PLANE
SEATING
PLANE
0.010
L
4° ±4°
0.004 C
b
0.010 M
C
A
B
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SO16
(0.150”)
SO16 (0.300”)
(SOL-16)
SO20
SO24
(SOL-24)
SO28
(SOL-28)
SYMBOL
SO-8
0.068
0.006
0.057
0.017
0.009
0.193
0.236
0.154
0.050
0.025
0.041
0.013
8
SO-14
0.068
0.006
0.057
0.017
0.009
0.341
0.236
0.154
0.050
0.025
0.041
0.013
14
(SOL-20)
0.104
0.007
0.092
0.017
0.011
0.504
0.406
0.295
0.050
0.030
0.056
0.020
20
TOLERANCE
MAX
NOTES
A
A1
A2
b
0.068
0.006
0.057
0.017
0.009
0.390
0.236
0.154
0.050
0.025
0.041
0.013
16
0.104
0.007
0.092
0.017
0.011
0.406
0.406
0.295
0.050
0.030
0.056
0.020
16
0.104
0.007
0.092
0.017
0.011
0.606
0.406
0.295
0.050
0.030
0.056
0.020
24
0.104
0.007
0.092
0.017
0.011
0.704
0.406
0.295
0.050
0.030
0.056
0.020
28
-
±0.003
±0.002
±0.003
±0.001
±0.004
±0.008
±0.004
Basic
-
-
-
c
-
D
1, 3
E
-
E1
e
2, 3
-
L
±0.009
Basic
-
L1
h
-
Reference
Reference
-
N
-
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
FN6336.2
February 19, 2008
15
ISL28138, ISL28238
Mini SO Package Family (MSOP)
MDP0043
0.25 M C A B
A
MINI SO PACKAGE FAMILY
D
(N/2)+1
MILLIMETERS
N
SYMBOL
MSOP8
1.10
0.10
0.86
0.33
0.18
3.00
4.90
3.00
0.65
0.55
0.95
8
MSOP10
1.10
0.10
0.86
0.23
0.18
3.00
4.90
3.00
0.50
0.55
0.95
10
TOLERANCE
Max.
NOTES
A
A1
A2
b
-
±0.05
-
E
E1
PIN #1
I.D.
±0.09
-
+0.07/-0.08
±0.05
-
c
-
D
±0.10
1, 3
1
B
(N/2)
E
±0.15
-
E1
e
±0.10
2, 3
Basic
-
e
H
C
L
±0.15
-
SEATING
PLANE
L1
N
Basic
-
Reference
-
M
C A B
b
0.08
0.10 C
Rev. D 2/07
N LEADS
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
L1
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
A
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
c
SEE DETAIL "X"
A2
GAUGE
PLANE
0.25
L
DETAIL X
A1
3° ±3°
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FN6336.2
February 19, 2008
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