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ISL28005FH-20EVAL1Z [INTERSIL]

Micropower, Rail-to-Rail Input Current Sense Amplifier with Voltage Output; 微功耗，轨到轨输入电流检测放大器，带有电压输出
ISL28005FH-20EVAL1Z
型号： ISL28005FH-20EVAL1Z
厂家： Intersil    Intersil
描述：

Micropower, Rail-to-Rail Input Current Sense Amplifier with Voltage Output
微功耗，轨到轨输入电流检测放大器，带有电压输出

放大器
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Micropower, Rail-to-Rail Input Current Sense  
Amplifier with Voltage Output  
ISL28005  
Features  
• Low Power Consumption . . . . . . . . . . . 50µA,Typ  
• Supply Range. . . . . . . . . . . . . . . . . . 2.7V to 28V  
• Wide Common Mode Input . . . . . . . . . 0V to 28V  
• Fixed Gain Versions  
- ISL28005-100. . . . . . . . . . . . . . . . . . . 100V/V  
- ISL28005-50. . . . . . . . . . . . . . . . . . . . . 50V/V  
- ISL28005-20. . . . . . . . . . . . . . . . . . . . . 20V/V  
The ISL28005 is a micropower, uni-directional  
high-side and low-side current sense amplifier  
featuring a proprietary rail-to-rail input current sensing  
amplifier. The ISL28005 is ideal for high-side current  
sense applications where the sense voltage is usually  
much higher than the amplifier supply voltage. The  
device can be used to sense voltages as high as 28V  
when operating from a supply voltage as low as 2.7V.  
The micropower ISL28005 consumes only 50µA of supply  
current when operating from a 2.7V to 28V supply.  
• Operating Temperature Range . . -40°C to +125°C  
• Package . . . . . . . . . . . . . . . . . . . . .5 Ld SOT-23  
The ISL28005 features a common-mode input voltage  
range from 0V to 28V. The proprietary architecture  
extends the input voltage sensing range down to 0V,  
making it an excellent choice for low-side ground sensing  
applications. The benefit of this architecture is that a high  
degree of total output accuracy is maintained over the  
entire 0V to 28V common mode input voltage range.  
Applications*(see page 13)  
• Power Management/Monitors  
• Power Distribution and Safety  
• DC/DC, AC/DC Converters  
• Battery Management /Charging  
• Automotive Power Distribution  
The ISL28005 is available in fixed (100V/V, 50V/V and  
20V/V) gains in the space saving 5 Ld SOT-23 package.  
The parts operate over the extended temperature range  
from -40°C to +125°C.  
Related Literature*(see page 13)  
• See AN1531 for “ISL28005 Evaluation Board User’s  
Guide”  
Typical Application  
High-Side And Low-Side  
Threshold Voltage  
SENSE  
+12VDC  
OUTPUT  
+12VDC  
1.8  
R
V
SENSE  
RS+  
+5VDC  
-
1.6  
1.4  
I
SENSE  
ISL28005  
+12VDC  
+
V
V
= 1.52V  
TH(L-H)  
SENSE  
+5VDC  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
+5VDC  
OUTPUT  
V
= 1.23V  
TH(H-L)  
R
SENSE  
SENSE  
-
+5VDC  
I
(G=100)  
SENSE  
ISL28005  
OUT  
+5VDC  
+
SENSE  
G100, V  
= 1V  
OUT  
+1.0VDC  
OUTPUT  
+1.0VDC  
G50, V  
G20, V  
= 500mV  
= 200mV  
OUT  
OUT  
R
+5VDC  
-
MULTIPLE  
I
SENSE  
+1.0VDC  
ISL28005  
OUTPUT  
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0  
TIME (ms)  
POWER SUPPLY  
+
GND  
May 27, 2010  
FN6973.2  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2009, 2010. All Rights Reserved  
1
All other trademarks mentioned are the property of their respective owners.  
ISL28005  
Block Diagram  
V
CC  
I = 2.86µA  
V
SENSE  
R
R
HIGH-SIDE  
S+  
S-  
AND  
LOW-SIDE  
SENSING  
R
1
2
gm  
HI  
R
+
-
OUT  
1.35V  
R
f
R
3
R
gm  
g
LO  
R
5
V
SENSE  
I
MIRROR  
R
4
GND  
Pin Configuration  
Pin Descriptions  
ISL28005  
(5 LD SOT-23)  
TOP VIEW  
ISL28005  
(5 LD SOT-23) NAME  
PIN  
DESCRIPTION  
GND Power Ground  
OUT Amplifier Output  
Positive Power Supply  
1
2
3
4
5
GND 1  
FIXED  
5
4
RS-  
V
CC  
OUT  
2
GAIN  
RS+ Sense Voltage Non-inverting Input  
RS- Sense Voltage Inverting Input  
V
3
RS+  
CC  
V
CC  
RS-  
CAPACITIVELY  
COUPLED  
OUT  
GND  
ESD CLAMP  
RS+  
FN6973.2  
May 27, 2010  
2
ISL28005  
Ordering Information  
PACKAGE  
Tape & Reel  
(Pb-Free)  
PART NUMBER  
(Notes 1, 2, 3)  
PART MARKING  
(Note 4)  
PKG.  
DWG. #  
GAIN  
100V/V  
50V/V  
20V/V  
ISL28005FH100Z-T7  
ISL28005FH50Z-T7  
ISL28005FH20Z-T7  
BDEA  
BDDA  
BDCA  
5 Ld SOT-23  
P5.064A  
5 Ld SOT-23  
5 Ld SOT-23  
P5.064A  
P5.064A  
ISL28005FH-100EVAL1Z  
ISL28005FH-50EVAL1Z  
ISL28005FH-20EVAL1Z  
NOTES:  
100V/V Evaluation Board  
50V/V Evaluation Board  
20V/V Evaluation Board  
1. Please refer to TB347 for details on reel specifications.  
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach  
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both  
SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that  
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.  
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL28005. For more information on MSL please  
see techbrief TB363.  
4. The part marking is located on the bottom of the part.  
FN6973.2  
May 27, 2010  
3
ISL28005  
Absolute Maximum Ratings  
Thermal Information  
Max Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . ..28V  
Max Differential Input Current . . . . . . . . . . . . . . . . .20mA  
Max Differential Input Voltage . . . . . . . . . . . . . . . . . .±0.5V  
Max Input Voltage (RS+, RS-) . . . . . . . . . GND-0.5V to 30V  
Max Input Current for Input Voltage <GND -0.5V . . .±20mA  
Output Short-Circuit Duration . . . . . . . . . . . . . . . Indefinite  
ESD Rating  
Thermal Resistance (Typical)  
θ
JA (°C/W) θJC (°C/W)  
190 90  
5 Ld SOT-23 (Notes 5, 6) . . . . . . .  
Maximum Storage Temperature Range . . . -65°C to +150°C  
Maximum Junction Temperature (T ) . . . . . . . . . +150°C  
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below  
http://www.intersil.com/pbfree/Pb-FreeReflow.asp  
JMAX  
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . 4kV  
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . ..200V  
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . 1.5kV  
Recommended Operating Conditions  
Ambient Temperature Range (T ) . . . . . . . -40°C to +125°C  
A
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact  
product reliability and result in failures not covered by warranty.  
NOTES:  
5. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief  
TB379 for details.  
6. For θ , the “case temp” location is taken at the package top center.  
JC  
Electrical Specifications V = 12V, V  
= 0V to 28V, VSENSE = 0V, R = 1MΩ, T = +25°C unless otherwise specified.  
LOAD A  
Boldface limits apply over the operating temperature range, -40°C to +125°C.  
CC  
RS+  
Temperature data established by characterization.  
MIN  
MAX  
PARAMETER  
DESCRIPTION  
Input Offset Voltage  
CONDITIONS  
(Note 7)  
TYP  
(Note 7) UNIT  
V
V
= V + = 12V,  
CC RS  
-500  
60  
500  
µV  
mV  
µA  
µA  
nA  
µA  
nA  
nA  
nA  
OS  
(Notes 8, 9)  
V
= 20mV to = 100mV  
-500  
500  
S
V
V
= 12V, V + = 0.2V, V = 20mV,  
-3  
-3.3  
-1.2  
0.041  
4.7  
3
3.3  
CC  
RS  
S
= 100mV  
S
I
I
+, I  
RS  
-
Leakage Current  
V
V
V
V
V
V
V
= 0V, V  
= 28V  
1.2  
1.5  
RS  
CC  
RS+  
+
RS  
Gain = 100 + Input Bias Current  
+ = 2V, V  
+ = 0V, V  
= 5mV  
SENSE  
6
7
RS  
RS  
RS  
RS  
RS  
RS  
E = 5mV  
SENS  
-500  
-600  
-425  
4.7  
-432  
5
Gain = 50, Gain = 20 +Input Bias  
Current  
+ = 2V, V  
+ = 0V, V  
= 5mV  
6
8
SENSE  
SENSE  
= 5mV  
-700  
-840  
I
-
Input Bias Current  
+ = 2V, V  
+ = 0V, V  
= 5mV  
50  
75  
RS  
SENSE  
SENSE  
= 5mV  
-125  
-45  
-130  
CMRR  
PSRR  
Common Mode Rejection Ratio  
Power Supply Rejection Ratio  
Full-scale Sense Voltage  
V
V
V
+ = 2V to 28V  
105  
90  
115  
105  
dB  
RS  
CC  
CC  
= 2.7V to 28V, V + = 2V  
RS  
dB  
VF  
= 28V, V + = 0.2V, 12V  
RS  
200  
mV  
V/V  
V/V  
V/V  
S
G
Gain  
(Note 8)  
ISL28005-100  
ISL28005-50  
ISL28005-20  
100  
50  
20  
FN6973.2  
May 27, 2010  
4
ISL28005  
Electrical Specifications V = 12V, V  
= 0V to 28V, VSENSE = 0V, R  
Boldface limits apply over the operating temperature range, -40°C to +125°C.  
= 1MΩ, T = +25°C unless otherwise specified.  
CC  
RS+  
LOAD A  
Temperature data established by characterization. (Continued)  
MIN  
MAX  
PARAMETER  
DESCRIPTION  
CONDITIONS  
(Note 7)  
TYP  
(Note 7) UNIT  
G
Gain = 100 Gain Accuracy  
(Note 10)  
V
= V + = 12V, V  
RS SENSE  
= 20mV  
= 20mV  
-2  
-3  
2
3
%
A
CC  
to 100mV  
V
V
= 12V, V + = 0.1V,  
-0.25  
%
CC  
RS  
= 20mV to 100mV  
SENSE  
Gain = 50, Gain = 20 Gain Accuracy  
(Note 10)  
V
= V + = 12V, V  
RS  
-2  
-3  
2
3
%
CC  
SENSE  
to 100mV  
V
V
= 12V, V + = 0.1V,  
-3  
-4  
-0.31  
-1.25  
3
4
%
CC  
RS  
= 20mV to 100mV  
SENSE  
V
Gain = 100 Total Output Accuracy  
(Note 11)  
V
V
= V + = 12V,  
RS  
-2.5  
-2.7  
2.5  
2.7  
%
OA  
CC  
= 100mV  
SENSE  
V
V
= 12V, V + = 0.1V,  
RS  
%
CC  
= 100mV  
SENSE  
Gain = 50, Gain = 20 Total Output  
Accuracy (Note 11)  
V
V
= V + = 12V,  
RS  
-2.5  
-2.7  
2.5  
2.7  
%
CC  
= 100mV  
SENSE  
V
V
= 12V, V + = 0.1V,  
RS  
-6  
-7  
-1.41  
39  
6
7
%
CC  
= 100mV  
SENSE  
V
Output Voltage Swing, High  
I
= -500µA, V  
= 2.7V  
50  
mV  
OH  
OL  
O CC  
V
- V  
V
V
= 100mV  
SENSE  
+ = 2V  
CC  
OUT  
RS  
V
Output Voltage Swing, Low  
I
V
= 500µA, V  
CC  
= 2.7V  
= 0V, V + = 2V  
30  
50  
mV  
O
V
OUT  
SENSE  
RS  
R
Output Resistance  
V
V
= V + = 12V,  
RS  
6.5  
Ω
OUT  
CC  
= 100mV  
SENSE  
I
= 10µA to 1mA  
OUT  
I
I
I
Short Circuit Sourcing Current  
Short Circuit Sinking Current  
V
V
V
= V + = 5V, R = 10Ω  
RS  
4.8  
8.7  
50  
mA  
mA  
µA  
SC+  
SC-  
S
CC  
CC  
RS  
L
= V + = 5V, R = 10Ω  
RS  
L
Gain = 100  
Supply Current  
+ > 2V, V  
= 5mV  
59  
62  
SENSE  
Gain = 50, 20  
Supply Current  
V
+ > 2V, V  
= 5mV  
50  
62  
63  
µA  
RS  
SENSE  
V
Supply Voltage  
Guaranteed by PSRR  
Pulse on RS+ pin,  
2.7  
28  
V
CC  
SR  
Gain = 100 Slew Rate  
0.58  
0.76  
0.67  
0.67  
V/µs  
V
= 8V  
OUT  
P-P  
(see Figure 15)  
Gain = 50 Slew Rate  
Gain = 20 Slew Rate  
Pulse on RS+ pin,  
0.58  
0.50  
V/µs  
V/µs  
V
= 8V  
OUT  
P-P  
(see Figure 15)  
Pulse on RS+ pin,  
V
= 3.5V  
OUT  
(see Figure 15)  
P-P  
BW  
Gain = 100  
-3dB Bandwidth  
V
V
+ = 12V, 0.1V,  
110  
160  
180  
kHz  
kHz  
kHz  
-3dB  
RS  
= 100mV  
SENSE  
Gain = 50  
-3dB Bandwidth  
V
V
+ = 12V, 0.1V,  
RS  
= 100mV  
SENSE  
Gain = 20  
-3dB Bandwidth  
V
V
+ = 12V, 0.1V,  
RS  
= 100mV  
SENSE  
FN6973.2  
May 27, 2010  
5
ISL28005  
Electrical Specifications V = 12V, V  
= 0V to 28V, VSENSE = 0V, R  
Boldface limits apply over the operating temperature range, -40°C to +125°C.  
= 1MΩ, T = +25°C unless otherwise specified.  
CC  
RS+  
LOAD A  
Temperature data established by characterization. (Continued)  
MIN  
MAX  
PARAMETER  
DESCRIPTION  
CONDITIONS  
(Note 7)  
TYP  
(Note 7) UNIT  
t
Output Settling Time to 1% of Final  
Value  
V
= V + = 12V, V  
RS OUT  
= 10V  
= 10V  
15  
µs  
s
CC  
step, V  
>7mV  
SENSE  
V
= V + = 0.2V, V  
20  
µs  
CC  
step, V  
RS OUT  
>7mV  
SENSE  
Capacitive-Load Stability  
No sustained oscillations  
300  
15  
pF  
µs  
t
Power-Up Time to 1% of Final Value V  
V
= V + = 12V,  
RS  
s Power-up  
CC  
= 100mV  
SENSE  
V
V
= 12V, V + = 0.2V  
RS  
SENSE  
50  
10  
µs  
µs  
CC  
= 100mV  
Saturation Recovery Time  
V
V
= V + = 12V,  
RS  
CC  
= 100mV, overdrive  
SENSE  
NOTES:  
7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established  
by characterization and are not production tested.  
8. DEFINITION OF TERMS:  
• V  
• V  
• V  
• V  
A = V  
@100mV  
@20mV  
SENSE  
SENSE  
SENSE  
SENSE  
B = V  
A = V  
@V  
A=100mV  
OUT  
OUT  
OUT  
SENSE  
B = V  
@V  
B=20mV  
OUT  
SENSE  
V
A – V  
B
OUT  
B
SENSE  
⎛
⎞
⎟
⎠
OUT  
-------------------------------------------------------------  
• G =GAIN =  
⎜
⎝
V
A – V  
SENSE  
V
A
OUT  
G
-------------------  
A –  
SENSE  
9. V  
is extrapolated from the gain measurement.V  
= V  
OS  
OS  
G
– G  
EXPECTED  
⎛
⎜
⎝
⎞
MEASURED  
------------------------------------------------------------------------------  
10. % Gain Accuracy = G =  
× 100  
⎟
⎠
A
G
EXPECTED  
VOUT  
– VOUT  
EXPECTED  
⎛
⎞
⎟
⎠
MEASURED  
---------------------------------------------------------------------------------------------------------  
11. Output Accuracy % V  
=
× 100 where V  
OUT  
= V  
SENSE  
X GAIN and V  
SENSE  
= 100mV  
⎜
⎝
OA  
VOUT  
EXPECTED  
FN6973.2  
May 27, 2010  
6
ISL28005  
Typical Performance Curves  
V
= 12V, R = 1M, unless otherwise specified.  
L
cc  
12  
10  
8
12  
GAIN 100  
GAIN 100  
10  
8
6
4
2
0
6
4
2
0
0
10  
20  
30  
40  
50  
60  
70  
80  
90 100  
0
10  
20  
30  
40  
50  
60  
70  
80  
90 100  
TIME (µs)  
TIME (µs)  
FIGURE 1. LARGE SIGNAL TRANSIENT RESPONSE  
= 0.2V, V = 100mV  
FIGURE 2. LARGE SIGNAL TRANSIENT RESPONSE  
V
V
=12V, V  
= 100mV  
RS+  
SENSE  
RS+  
SENSE  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
12  
10  
8
2.4  
2.0  
1.6  
1.2  
0.8  
V
RS+  
V
RS+  
(G = 100)  
V
OUT  
V
V
= 1.52V  
TH(L-H)  
V
= 1.23V  
R = 1M  
L
VCC = 12V  
TH(H-L)  
6
(G = 100)  
OUT  
4
G100, V  
= 2V  
OUT  
G100, V  
G50, V  
= 1V  
OUT  
G50, V  
G20, V  
= 1V  
= 400mV  
OUT  
OUT  
= 500mV  
= 200mV  
2
0
0.4  
0
OUT  
G20, V  
OUT  
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0  
TIME (ms)  
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0  
TIME (ms)  
FIGURE 4. V  
vs V  
RS+  
, V  
= 20mV  
SENSE  
FIGURE 3. HIGH-SIDE and LOW-SIDE THRESHOLD  
VOLTAGE V and V  
OUT  
TRANSIENT RESPONSE  
,
RS+(H-L)  
RS+(L-H)  
= 10mV  
V
SENSE  
0.2  
0.0  
45  
35  
25  
15  
5
GAIN 100  
GAIN 100  
-0.2  
-0.4  
-0.6  
-0.8  
-1.0  
+25°C  
V
= 100mV  
= 12V  
RS+  
-5  
-40°C  
V
V
= 12V  
V
CC  
RS+  
-15  
-25  
-35  
= 100mV  
SENSE  
A
= 100  
= 1M  
V
+125°C  
R
L
10  
100  
1k  
10k  
100k  
1M  
1µ  
10µ  
100µ  
(A)  
1m  
10m  
I
FREQUENCY (Hz)  
OUT  
FIGURE 5. NORMALIZED V  
vs I  
FIGURE 6. GAIN vs FREQUENCY V  
= 100mV/12V,  
= 250mV  
OA  
OUT  
RS+  
V
= 100mV, V  
OUT  
SENSE  
P-P  
FN6973.2  
May 27, 2010  
7
ISL28005  
Typical Performance Curves  
V
= 12V, R = 1M, unless otherwise specified. (Continued)  
cc  
L
45  
0.2  
GAIN 50  
GAIN 50  
35  
25  
15  
5
0.0  
-0.2  
V
= 100mV  
RS+  
+25°C  
-0.4  
-5  
-0.6  
-0.8  
-1.0  
-40°C  
V
V
= 12V  
CC  
V
= 12V  
RS+  
-15  
-25  
-35  
= 100mV  
SENSE  
A
= 100  
= 1M  
V
+125°C  
R
L
10  
100  
1k  
10k  
100k  
1M  
1µ  
10µ  
100µ  
(A)  
1m  
10m  
FREQUENCY (Hz)  
I
OUT  
FIGURE 8. GAIN vs FREQUENCY V  
=100mV/12V,  
FIGURE 7. NORMALIZED V  
vs I  
RS+  
= 250mV  
OA  
OUT  
V
= 100mV, V  
SENSE  
OUT  
P-P  
0.2  
0.0  
45  
35  
25  
15  
5
GAIN 20  
GAIN 20  
-0.2  
-0.4  
-0.6  
-0.8  
-1.0  
-40°C  
V
= 100mV  
RS+  
+25°C  
-5  
V = 12V  
RS+  
V
V
= 12V  
CC  
-15  
-25  
-35  
= 100mV  
SENSE  
A
= 100  
= 1M  
V
R
L
+125°C  
1µ  
10µ  
100µ  
(A)  
1m  
10m  
10  
100  
1k  
10k  
100k  
1M  
FREQUENCY (Hz)  
I
OUT  
FIGURE 10. GAIN vs FREQUENCY V  
=100mV/12V,  
FIGURE 9. NORMALIZED V  
vs I  
RS+  
= 250mV  
OA  
OUT  
V
= 100mV, V  
SENSE  
OUT  
P-P  
Test Circuits and Waveforms  
V
V
CC  
R1  
V
CC  
R1  
RS+  
RS-  
+
-
RS+  
OUT  
+
OUT  
+
-
V
SENSE  
+
V
SENSE  
-
RS-  
R2  
V
RS+  
V
RS+  
GND  
V
OUT  
R
1MΩ  
GND  
-
V
L
OUT  
R
1MΩ  
L
V
R2  
FIGURE 12. INPUT BIAS CURRENT, LEAKAGE  
CURRENT  
FIGURE 11. I  
V
, V , CMRR, PSRR, GAIN  
S, OS OA  
ACCURACY  
FN6973.2  
May 27, 2010  
8
ISL28005  
Test Circuits and Waveforms(Continued)  
SIGNAL  
GENERATOR  
V
CC  
V
CC  
RS+  
RS-  
OUT  
RS+  
RS-  
OUT  
V
V
RS+  
SENSE  
GND  
1MΩ  
V
RS+  
V
GND  
1MΩ  
OUT  
R
L
V
RS-  
V
OUT  
R
L
PULSE  
GENERATOR  
FIGURE 13. SLEW RATE, t , SATURATION RECOVERY  
s
FIGURE 14. GAIN vs FREQUENCY  
TIME  
V
CC  
RS+  
RS-  
OUT  
V
RS+  
GND  
1MΩ  
V
OUT  
R
L
PULSE  
GENERATOR  
FIGURE 15. SLEW RATE  
The second stage is responsible for the overall gain and  
frequency response performance of the device. The fixed  
Applications Information  
gains (20, 50, 100) are set with internal resistors R and  
R . The only external component needed is a current  
g
sense resistor (typically 0.001Ω to 0.01Ω, 1W to 2W).  
Functional Description  
f
The ISL28005-20, ISL28005-50 and ISL28005-100 are  
single supply, uni-directional current sense amplifiers  
with fixed gains of 20V/V, 50V/V and 100V/V  
respectively.  
The transfer function is given in Equation 1.  
V
= GAIN × (I R + V  
)
(EQ. 1)  
OUT  
S
S
OS  
The ISL28005 is a 2-stage amplifier. Figure 16 shows the  
active circuitry for high-side current sense applications  
where the sense voltage is between 1.35V to 28V.  
Figure 17 shows the active circuitry for ground sense  
applications where the sense voltage is between 0V to  
1.35V.  
The input gm stage derives its ~2.86µA supply current  
from the input source through the RS+ terminal as long  
as the sensed voltage at the RS+ pin is >1.35V and the  
gm amplifier is selected. When the sense voltage at  
HI  
R + drops below the 1.35V threshold, the gm  
S
LO  
amplifier kicks in and the gm output current reverses,  
LO  
The first stage is a bi-level trans-conductance amp and  
level translator. The gm stage converts the low voltage  
flowing out of the RS- pin.  
drop (V  
) sensed across an external milli-ohm  
SENSE  
sense resistor, to a current (@ gm = 21.3µA/V). The  
trans-conductance amplifier forces a current through R  
1
resulting to a voltage drop across R that is equal to the  
1
sense voltage (V  
). The current through R is  
SENSE  
5
1
mirrored across R creating a ground-referenced voltage  
at the input of the second amplifier equal to V  
.
SENSE  
FN6973.2  
May 27, 2010  
9
ISL28005  
V
CC  
OPTIONAL  
FILTER  
I = 2.86µA  
CAPACITOR  
V
SENSE  
R
R
S+  
S-  
HIGH-SIDE  
SENSING  
I
S
R
+
-
1
2
gm  
V
R
V
= 2V TO 28V  
HI  
SENSE  
S
RS+  
V
= 2V TO 28V  
CC  
R
+
-
OUT  
OPTIONAL  
TRANSIENT  
PROTECTION  
1.35V  
R
R
f
R
3
g
‘V  
gm  
SENSE  
LO  
R
5
I
MIRROR  
LOAD  
R
4
GND  
FIGURE 16. HIGH-SIDE CURRENT DETECTION  
V
CC  
OPTIONAL  
FILTER  
I = 2.86µA  
CAPACITOR  
V
SENSE  
R
R
S+  
S-  
LOW-SIDE  
SENSING  
I
S
R
+
-
1
2
V
gm  
R
SENSE  
V
= 0V TO 2V  
HI  
S
RS+  
V
= 2V TO 28V  
CC  
R
+
-
OUT  
OPTIONAL  
TRANSIENT  
PROTECTION  
1.35V  
R
f
V
CC  
R
3
R
g
gm  
LO  
R
5
‘V  
SENSE  
I
MIRROR  
LOAD  
R
4
GND  
FIGURE 17. LOW-SIDE CURRENT DETECTION  
FN6973.2  
May 27, 2010  
10  
ISL28005  
flowing through the input while adding only an additional  
Hysteretic Comparator  
13µV (worse case over-temperature) of V . Refer to the  
OS  
The input trans-conductance amps are under control of a  
hysteretic comparator operating from the incoming  
source voltage on the RS+ pin (see Figure 18). The  
comparator monitors the voltage on RS+ and switches  
the sense amplifier from the low-side gm amp to the  
high-side gm amplifier whenever the input voltage at  
following formula:  
((R x I  
) = (100Ω x 130nA) = 13µV)  
P
RS-  
Switching applications can generate voltage spikes that  
can overdrive the amplifier input and drive the output of  
the amplifier into the rails, resulting in a long overload  
R + increases above the 1.35V threshold. Conversely, a  
S
recovery time. Capacitors C and C filter the common  
M
D
decreasing voltage on the RS+ pin, causes the hysteric  
comparator to switch from the high-side gm amp to the  
low-side gm amp as the voltage decreases below 1.35V.  
It is that low-side sense gm amplifier that gives the  
ISL28005 the proprietary ability to sense current all the  
mode and differential voltage spikes.  
Error Sources  
There are 3 dominant error sources: gain error, input  
offset voltage error and Kelvin voltage error (see  
Figure 19). The gain error is dominated by the internal  
resistance matching tolerances. The remaining errors  
appear as sense voltage errors at the input to the  
way to 0V. Negative voltages on the R + or R - are  
beyond the sensing voltage range of this amplifier.  
S
S
0.5  
0.4  
0.3  
0.2  
0.1  
0
amplifier. They are V  
of the amplifier and Kelvin  
OS  
voltage errors. If the transient protection resistor is  
added, an additional V error can result from the IxR  
OS  
voltage due to input bias current. The limiting resistor  
should only be added to the R - input, due to the  
S
-0.1  
-0.2  
-0.3  
-0.4  
-0.5  
high-side gm amplifier (gm ) sinking several micro  
HI  
amps of current through the RS+ pin.  
Layout Guidelines  
Kelvin Connected Sense Resistor  
0
0.2  
0.4  
0.6  
0.8  
1.0  
(V)  
1.2  
1.4  
1.6  
1.8  
2.0  
V
RS+  
The source of Kelvin voltage errors is illustrated in  
Figure 19. The resistance of 1/2 oz. copper is ~1mΩ per  
square with a TC of ~3900ppm/°C (0.39%/°C). When  
you compare this unwanted parasitic resistance with the  
total of 1mΩ to 10mΩ resistance of the sense resistor, it  
is easy to see why the sense connection must be chosen  
very carefully. For example, consider a maximum current  
of 20A through a 0.005Ω sense resistor, generating a  
FIGURE 18. GAIN ACCURACY vs V  
= 0V TO 2V  
RS+  
Typical Application Circuit  
Figure 20 shows the basic application circuit and optional  
protection components for switched-load applications.  
For applications where the load and the power source is  
permanently connected, only an external sense resistor  
is needed. For applications where fast transients are  
caused by hot plugging the source or load, external  
protection components may be needed. The external  
V
= 0.1 and a full scale output voltage of 10V  
SENSE  
(G = 100). Two side contacts of only 0.25 square per  
contact puts the V input about 0.5 x 1mΩ away  
SENSE  
current limiting resistor (R ) in Figure 20 may be  
P
from the resistor end capacitor. If only 10A the 20A total  
current flows through the kelvin path to the resistor, you  
get an error voltage of 10mV (10A x 0.5sq x 0.001Ω/sq.  
= 10mV) added to the 100mV sense voltage for a sense  
voltage error of 10% (0.110V - 0.1)/0.1V)x 100.  
required to limit the peak current through the internal  
ESD diodes to < 20mA. This condition can occur in  
applications that experience high levels of in-rush current  
causing high peak voltages that can damage the internal  
ESD diodes. An R resistor value of 100Ω will provide  
P
protection for a 2V transient with the maximum of 20mA  
CURRENTSENSERESISTOR  
1mΩ TO 10mΩ  
1mΩ/SQ  
1/2 Oz COPPER TRACE  
NON-UNIFORM  
CURRENTFLOW  
CURRENT OUT  
CURRENT IN  
PC BOARD  
KELVINV CONTACTS  
S
FIGURE 19. PC BOARD CURRENT SENSE KELVIN CONNECTION  
FN6973.2  
May 27, 2010  
11  
ISL28005  
2.7VDC  
TO  
28VDC  
V
CC  
I = 2.86µA  
R
R
S+  
(
1mΩ  
C
D
gm  
TO  
R
HI  
S
0.1Ω)  
S-  
C
M
+
-
R
P
OUT  
1.35V  
+
-
0.1VDC  
TO  
28VDC  
gm  
LO  
LOAD  
GND  
FIGURE 20. TYPICAL APPLICATION CIRCUIT  
where:  
• P  
Overall Accuracy (V  
%)  
OA  
V
is defined as the total output accuracy  
is the sum of the maximum power  
OA  
DMAXTOTAL  
Referred-to-Output (RTO). The output accuracy contains  
all offset and gain errors, at a single output voltage.  
Equation 2 is used to calculate the % total output  
accuracy.  
dissipation of each amplifier in the package (PD  
)
MAX  
• PD  
for each amplifier can be calculated using  
MAX  
Equation 5:  
V
V
actual – V  
expected  
OUTMAX  
R
L
⎛
⎜
⎝
⎞
⎟
⎠
OUT  
OUT  
----------------------------  
PD  
= V × I  
+ (V - V ) ×  
OUTMAX  
------------------------------------------------------------------------------------  
V
= 100 ×  
MAX  
S
qMAX  
S
(EQ. 5)  
OA  
(EQ. 2)  
V
expected  
OUT  
where  
where:  
V
Actual = V  
x GAIN  
OUT  
SENSE  
• T  
MAX  
= Maximum ambient temperature  
Example: Gain = 100, For 100mV V  
input we  
SENSE  
• θ = Thermal resistance of the package  
JA  
measure 10.1V. The overall accuracy (V ) is 1% as  
OA  
• PD  
• V  
= Maximum power dissipation of 1 amplifier  
MAX  
shown in Equation 3.  
10.1 – 10  
⎛
⎞
= Total supply voltage  
-----------------------  
V
= 100 ×  
= 1percent  
CC  
(EQ. 3)  
OA  
⎝
⎠
10  
• I  
qMAX  
= Maximum quiescent supply current of 1  
amplifier  
Power Dissipation  
It is possible to exceed the +150°C maximum junction  
temperatures under certain load and power supply  
conditions. It is therefore important to calculate the  
• V  
application  
= Maximum output voltage swing of the  
OUTMAX  
R = Load resistance  
L
maximum junction temperature (T  
) for all  
JMAX  
applications to determine if power supply voltages, load  
conditions, or package type need to be modified to  
remain in the safe operating area. These parameters are  
related using Equation 4:  
(EQ. 4)  
T
= T  
+ θ xPD  
MAX JA MAXTOTAL  
JMAX  
FN6973.2  
May 27, 2010  
12  
ISL28005  
Revision History  
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to  
web to make sure you have the latest Rev.  
DATE  
REVISION  
CHANGE  
5/12/10  
FN6973.2  
Added Note 4 to Part Marking Column in “Ordering Information” on page 3.  
Corrected hyperlinks in Notes 1 and 3 in “Ordering Information” on page 3.  
Corrected ISL28005 hyperlink in “Products” on page 13.  
4/12/10  
4/7/10  
Added Eval boards to ordering info.  
Added “Related Literature*(see page 13)” on page 1  
Updated Package Drawing Number in the “Ordering Information” on page 3 from MDP0038 to  
P50.64A.  
Revised package outline drawing from MDP0038 to P5.064A on page 14. MDP0038 package  
contained 2 packages for both the 5 and 6 Ld SOT-23. MDP0038 was obsoleted and the  
packages were separated and made into 2 separate package outline drawings; P5.064A and  
P6.064A. Changes to the 5 Ld SOT-23 were to move dimensions from table onto drawing, add  
land pattern and add JEDEC reference number.  
2/3/10  
FN6973.1  
-Page1:  
Edited last sentence of paragraph 2.  
Moved order of GAIN listings from 20, 50, 100 to 100, 50, 20 in the 3rd paragraph.  
Under Features ....removed "Low Input Offset Voltage 250µV,max"  
Under Features .... moved order of parts listing from 20, 50, 100 (from top to bottom) to 100,  
50, 20.  
-Page 3:  
Removed coming soon on ISL28005FH50Z and ISL28005FH20Z and changes the order or  
listing them to 100, 50, 20.  
-Page 5:  
VOA test. Under conditions column ...deleted “20mV to”. It now reads ... Vsense = 100mV  
SR test. Under conditions column ..deleted what was there. It now reads ... Pulse on RS+pin,  
See Figure 15  
-Page 6:  
ts test. Removed Gain = 100 and Gain = 100V/V in both description and conditions columns  
respectively.  
-Page 9  
Added Figure 15 and adjusted figure numbers to account for the added figure.  
12/14/09  
FN6973.0  
Initial Release  
Products  
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The  
Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones,  
handheld products, and notebooks. Intersil's product families address power management and analog signal  
processing functions. Go to www.intersil.com/products for a complete list of Intersil product families.  
*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device  
information page on intersil.com: ISL28005  
To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff  
FITs are available from our website at http://rel.intersil.com/reports/search.php  
For additional products, see www.intersil.com/product_tree  
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted  
in the quality certifications found at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications  
at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by  
Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any  
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any  
patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN6973.2  
May 27, 2010  
13  
ISL28005  
Package Outline Drawing  
P5.064A  
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE  
Rev 0, 2/10  
1.90  
0-3°  
0.08-0.20  
D
A
5
4
PIN 1  
INDEX AREA  
2.80  
3
1.60  
5
3
0.15 C D  
2x  
(0.60)  
2
0.20 C  
2x  
0.95  
SEE DETAIL X  
END VIEW  
B
0.40 ±0.05  
3
0.20 M C A-B D  
TOP VIEW  
10° TYP  
(2 PLCS)  
H
5
0.15 C A-B  
2x  
2.90  
1.45 MAX  
C
1.14 ±0.15  
GAUGE  
PLANE  
(0.25)  
SEATING PLANE  
0.10  
C
0.45±0.1  
4
SIDE VIEW  
0.05-0.15  
(0.60)  
DETAIL "X"  
(1.20)  
NOTES:  
1. Dimensions are in millimeters.  
Dimensions in ( ) for Reference Only.  
(2.40)  
2. Dimensioning and tolerancing conform to ASME Y14.5M-1994.  
3. Dimension is exclusive of mold flash, protrusions or gate burrs.  
4. Foot length is measured at reference to guage plane.  
This dimension is measured at Datum “H”.  
Package conforms to JEDEC MO-178AA.  
5.  
6.  
(0.95)  
(1.90)  
TYPICAL RECOMMENDED LAND PATTERN  
FN6973.2  
May 27, 2010  
14  

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