ISL15110 [INTERSIL]
PLC MIMO Line Driver; MIMO PLC线路驱动器
| 型号： | ISL15110 |
| 厂家： | 
Intersil |
| 描述： | PLC MIMO Line Driver |
| 文件： | 总2页 (文件大小：141K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PLC MIMO Line Driver
ISL15110
Features
The ISL15110 is a dual port differential line driver developed for
Power Line Communication (PLC) Multi Input Multi Output
(MIMO) applications. MIMO PLC requires transmission on one or
two pairs of Phase, Neutral, and Ground wires. The device is
designed to drive heavy line loads, while maintaining a high level
of linearity required in OFDM PLC modem links. With 15.5dBm of
total MIMO transmit signal power (12.5dBm per each pair) into a
50Ω line load, the drivers deliver -50dB average MTPR distortion
across the output spectrum.
• Dual differential drivers
• 50MHz broadband PLC G.hn
• Enable/disable control pins for TDM operation
• -50dBc average MTPR distortion
• Single supply +12V nominal operation
• Enhanced surge current handling capability
• Thermally enhanced 20 Ld QFN package
• Enable port control voltage <0.7V
• Disable port control voltage >1.7V
Each of the two differential drivers has a control pin used to
enable/disable its differential output. These controls allow for
independent TDM operation of the two differential drivers, as
required in ITU-T MIMO G.hn and related standard based PLC
applications. In disable mode, the line driver output maintains a
high impedance characteristic to not affect TDM receive signal
integrity.
Applications
• Home networking over power lines
• ITU-T G.hn (G.9963) MIMO PLC
The ISL15110 includes an external IBIAS pin for quiescent
current flexibility. Grounding the pin in single supply designs
gives the nominal currents in the “Electrical Specifications” table
on page 6, while inserting a resistor from pin to ground can be
used to scale down the quiescent current for both ports.
The ISL15110 is available in the thermally-enhanced 20 Ld QFN
and is specified for operation over the full -40°C to +85°C
temperature range.
-35
-40
-45
-50
+VS GND
OUTC
FBC
OUTB
FBB
-
-
+
-
+
-
+
+
FBA
OUTA
ENAB
FBD
11PT RUNNING AVERAGE
-55
OUTD
ENCD
R
R
R
R
+VS
-60
-65
6.2kΩ
6.2kΩ
6.2kΩ
6.2kΩ
0
10M
20M
30M
40M
50M
IBIAS
INB INA
INC IND
FREQUENCY (Hz)
FIGURE 2. SISO 15.5dBm, 2MHz TO 50MHz MTPR TEST
FIGURE 1. BLOCK DIAGRAM
January 31, 2013
FN8282.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas LLC 2013. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1
ISL15110
Typical Application Circuit
+12V
4.7µF
+VS
0.1µF
INA
+
100nF
3.9
OUTA
500
¼ ISL15110
6.2k
-
ZLINE 100
1:1.7
7.8VP-P
200
FBA
60.4
FBB
21.2VP-P
MAXIMUM
0.44VP-P
+Vs/2
500
0.4dB
INSERTION
LOSS
-
¼ ISL15110
6.2k
OUTB
3.9
100nF
+
INB
P
LINE = 15.5dBm [SISO]
CF = 5.62VP-P/VRMS
RL(DIFF) = 29.5Ω at
Transformer inputs
ENAB
IBIAS
FIGURE 3. TYPICAL APPLICATION CIRCUIT (1 of 2 PORTS)
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8282.0
January 31, 2013
2
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