ICL3244IA [INTERSIL]
1 Microamp, +3V to +5.5V, 250kbps, RS-232 Transceivers with Enhanced Automatic Powerdown; 1微安， + 3V至+ 5.5V ， 250kbps的， RS - 232收发器，具有增强的自动关闭电源
| 型号： | ICL3244IA |
| 厂家： | 
Intersil |
| 描述： | 1 Microamp, +3V to +5.5V, 250kbps, RS-232 Transceivers with Enhanced Automatic Powerdown |
| 文件： | 总20页 (文件大小：484K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICL3224, ICL3226, ICL3238, ICL3244
®
Data Sheet
November 2002
FN4876.6
1 Microamp, +3V to +5.5V, 250kbps,
RS-232 Transceivers with Enhanced
Automatic Powerdown
Features
• ±15kV ESD Protected (Human Body Model)
• Manual and Enhanced Automatic Powerdown Features
The Intersil ICL32XX devices are 3.0V to 5.5V powered
RS-232 transmitters/receivers which meet ElA/TIA-232 and
• Drop in Replacements for MAX3224, MAX3226,
MAX3238, MAX3244
V.28/V.24 specifications, even at V
= 3.0V. Targeted
CC
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
• Latch-Up Free
applications are PDAs, Palmtops, and notebook and laptop
computers where the low operational, and even lower
standby, power consumption is critical. Efficient on-chip
charge pumps, coupled with manual and enhanced
automatic powerdown functions, reduce the standby supply
current to a 1µA trickle. Small footprint packaging, and the
use of small, low value capacitors ensure board space
savings as well. Data rates greater than 250kbps are
guaranteed at worst case load conditions. This family is fully
compatible with 3.3V only systems, mixed 3.3V and 5.0V
systems, and 5.0V only systems.
• RS-232 Compatible with V
CC
= 2.7V
• On-Chip Voltage Converters Require Only Four External
0.1µF Capacitors
• Flow-Through Pinout (ICL3238)
• Guaranteed Mouse Driveability (ICL3244)
• “Ready to Transmit” Indicator Output (ICL3224/26)
• Receiver Hysteresis For Improved Noise Immunity
• Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps
• Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/µs
• Wide Power Supply Range . . . . . . . Single +3V to +5.5V
• Low Supply Current in Powerdown State. . . . . . . . . . .1µA
The ICL3244 is a 3 driver, 5 receiver device that provides a
complete serial port suitable for laptop or notebook
computers. The ICL3244/38 also include a noninverting
always-active receiver for RING INDICATOR monitoring.
These devices feature an enhanced automatic
powerdown function which powers down the on-chip power-
supply and driver circuits. This occurs when all receiver and
transmitter inputs detect no signal transitions for a period of
30sec. These devices power back up, automatically,
whenever they sense a transition on any transmitter or
receiver input.
Applications
• Any System Requiring RS-232 Communication Ports
- Battery Powered, Hand-Held, and Portable Equipment
- Laptop Computers, Notebooks, Palmtops
- Modems, Printers and other Peripherals
- Digital Cameras
Table 1 summarizes the features of the devices represented
by this data sheet, while Application Note AN9863
summarizes the features of each device comprising the
ICL32XX 3V family.
- Cellular/Mobile Phones
- Data Cradles
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• AN9863, “3V to +5.5V, 250k-1Mbps, RS-232
Transmitters/Receivers”
TABLE 1. SUMMARY OF FEATURES
DATA
NO. OF
MONITOR Rx.
MANUAL
POWER-
DOWN?
ENHANCED
AUTOMATIC
POWERDOWN
PART
NO. OF NO.OF
RATE
Rx. ENABLE
FUNCTION?
READY
OUTPUT?
NUMBER
Tx.
Rx.
(R
)
(kbps)
OUTB
ICL3224
ICL3226
ICL3238
ICL3244
2
2
0
250
NO
NO
NO
NO
YES
YES
NO
YES
YES
YES
YES
YES
YES
YES
YES
1
1
0
1
1
250
5
3
250
3
5
250
NO
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
ICL3224, ICL3226, ICL3238, ICL3244
Ordering Information (Continued)
Ordering Information
(NOTE 1)
PART NO.
TEMP.
(NOTE 1)
PART NO.
TEMP.
RANGE ( C)
o
o
RANGE ( C)
-40 to 85
0 to 70
PACKAGE
28 Ld SSOP
28 Ld SOIC
PKG. NO.
M28.209
M28.3
PACKAGE
20 Ld SSOP
20 Ld SSOP
20 Ld PDIP
PKG. NO.
M20.209
M20.209
E20.3
ICL3244IA
ICL3224CA
ICL3224IA
ICL3224CP
ICL3226CA
ICL3226IA
ICL3238CA
ICL3238IA
ICL3244CA
0 to 70
ICL3244CB
ICL3244IB
ICL3244CV
ICL3244IV
NOTE:
-40 to 85
0 to 70
-40 to 85
0 to 70
28 Ld SOIC
M28.3
28 Ld TSSOP
28 Ld TSSOP
M28.173
M28.173
0 to 70
16 Ld SSOP
16 Ld SSOP
28 Ld SSOP
28 Ld SSOP
28 Ld SSOP
M16.209
M16.209
M28.209
M28.209
M28.209
-40 to 85
-40 to 85
0 to 70
1. Most surface mount devices are available on tape and reel; add
“-T” to suffix.
-40 to 85
0 to 70
Pinouts
ICL3224 (PDIP, SSOP)
ICL3226 (SSOP)
TOP VIEW
TOP VIEW
READY
1
2
20 FORCEOFF
19 V
READY
C1+
V+
1
2
3
4
5
6
7
8
16 FORCEOFF
C1+
V+
CC
15 V
CC
3
18 GND
17 T1
14 GND
C1-
C2+
C2-
V-
4
OUT
13 T1
OUT
C1-
5
16 R1
IN
C2+
C2-
12 FORCEON
6
15 R1
OUT
11 T1
IN
7
14 FORCEON
V-
10 INVALID
T2
8
13 T1
OUT
IN
IN
R1
IN
9 R1
OUT
R2
IN
9
12
T2
10
11 INVALID
R2
OUT
ICL3238 (SSOP)
ICL3244 (SOIC, SSOP, TSSOP)
TOP VIEW
TOP VIEW
C2+
1
2
28 C1+
27 V+
C2+
1
2
28 C1+
27 V+
GND
C2-
V-
C2-
V-
3
26 V
CC
3
26 V
CC
25 C1-
4
25 GND
R1
4
IN
IN
IN
IN
IN
T1
5
24 T1
23 T2
22 T3
OUT
OUT
OUT
IN
IN
IN
R2
R3
R4
R5
5
24 C1-
T2
T3
6
6
23 FORCEON
22 FORCEOFF
21 INVALID
7
7
R1
8
21 R1
IN
IN
OUT
OUT
IN
8
R2
9
20
R2
19 T4
18 R3
T1
T2
T3
9
20
R2
OUT
OUT
OUT
OUTB
OUT
OUT
OUT
OUT
OUT
10
11
12
T4
T5
10
11
12
13
14
19 R1
18 R2
17 R3
16 R4
15 R5
OUT
R3
IN
OUT
IN
17 T5
16 R1
OUT
T3
T2
T1
IN
IN
IN
FORCEON 13
FORCEOFF 14
OUTB
15 INVALID
2
ICL3224, ICL3226, ICL3238, ICL3244
Pin Descriptions
PIN
FUNCTION
V
System power supply input (3.0V to 5.5V).
CC
V+
V-
Internally generated positive transmitter supply (+5.5V).
Internally generated negative transmitter supply (-5.5V).
Ground connection.
GND
C1+
C1-
C2+
C2-
External capacitor (voltage doubler) is connected to this lead.
External capacitor (voltage doubler) is connected to this lead.
External capacitor (voltage inverter) is connected to this lead.
External capacitor (voltage inverter) is connected to this lead.
TTL/CMOS compatible transmitter Inputs.
T
IN
T
RS-232 level (nominally ±5.5V) transmitter outputs.
RS-232 compatible receiver inputs.
OUT
R
IN
R
TTL/CMOS level receiver outputs.
OUT
R
TTL/CMOS level, noninverting, always enabled receiver outputs.
Active low output that indicates if no valid RS-232 levels are present on any receiver input.
Active high output that indicates when the ICL32XX is ready to transmit (i.e., V- ≤ -4V)
OUTB
INVALID
READY
FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (see Table 2).
FORCEON Active high input to override automatic powerdown circuitry thereby keeping transmitters active. (FORCEOFF must be high).
Typical Operating Circuits
ICL3224
ICL3226
15
+3.3V
+3.3V
+
+
0.1µF
0.1µF
19
2
+
4
C
0.1µF
2
+
4
C1+
V
3
1
CC
C
0.1µF
C
0.1µF
3
C1+
V
1
3
C
3
+
CC
V+
V-
+
V+
V-
0.1µF
C1-
C1-
5
C
0.1µF
2
5
C2+
C
0.1µF
2
+
C2+
7
+
6
C
4
0.1µF
6
7
C
4
C2-
C2-
0.1µF
+
+
T
T
1
2
T
1
13
17
8
11
IN
13
T1
IN
T1
OUT
T1
T1
OUT
TTL/CMOS
LOGIC
LEVELS
RS-232
12
9
8
LEVELS
T2
R1
T2
OUT
IN
R1
OUT
R1
IN
5kΩ
TTL/CMOS
LOGIC
LEVELS
RS-232
LEVELS
R
1
15
16
1
R1
OUT
IN
IN
5kΩ
5kΩ
R
READY
1
16
10
V
CC
FORCEOFF
INVALID
10
9
R2
12
TO POWER
CONTROL
LOGIC
OUT
R2
R
FORCEON
2
GND
1
20
11
14
READY
V
FORCEOFF
INVALID
CC
14
TO POWER
CONTROL
LOGIC
FORCEON
GND
18
3
ICL3224, ICL3226, ICL3238, ICL3244
Typical Operating Circuits (Continued)
ICL3238
ICL3244
C
(OPTIONAL
3
+3.3V
CONNECTION, NOTE 2)
+
0.1µF
+3.3V
26
+
0.1µF
28
26
27
3
C
0.1µF
1
C1+
V
CC
C
0.1µF
3
+
+
+
V+
V-
28
27
24
1
C
1
C1+
V
CC
C
3
0.1µF
C1-
+
+
+
V+
V-
0.1µF
25
1
C
2
0.1µF
C2+
C1-
NOTE 3
C
4
0.1µF
C
2
2
NOTE 3
C2+
C2-
4
5
0.1µF
C
+
4
3
C2-
0.1µF
T
T
T
1
2
3
14
9
+
T
T
1
2
24
T1
IN
T1
10
OUT
T1
T1
OUT
IN
13
RS-232
LEVELS
23
6
T2
T3
T2
11
IN
OUT
T2
T3
T4
T5
T2
12
IN
OUT
OUT
OUT
OUT
T
T
3
3
22
7
T3
IN
20
OUT
RS-232
LEVELS
T3
IN
19
IN
17
10
T4
12
R2
OUTB
19
4
5
T
4
R1
OUT
R1
IN
IN
R
1
2
5kΩ
5kΩ
5kΩ
TTL/CMOS
LOGIC
LEVELS
T5
IN
16
TTL/CMOS
LOGIC
LEVELS
18
R2
OUT
R2
R1
OUTB
R
21
8
R1
17
OUT
16
OUT
6
7
R1
OUT
RS-232
LEVELS
IN
IN
R
1
2
3
5kΩ
5kΩ
5kΩ
R3
R4
R3
R4
IN
IN
R
R
3
4
20
9
RS-232
LEVELS
R2
OUT
R2
R
5kΩ
5kΩ
18
11
15
8
R3
OUT
R3
IN
R5
OUT
23
R5
IN
R
R
5
FORCEON
13
FORCEON
22
21
V
CC
FORCEOFF
GND
25
14
15
V
CC
FORCEOFF
TO POWER
CONTROL LOGIC
INVALID
TO POWER
CONTROL
LOGIC
GND
INVALID
2
NOTES:
2. THE NEGATIVE TERMINAL OF C CAN BE CONNECTED TO EITHER
3
V
OR GND.
CC
3. FOR V
= 3.15V (3.3V -5%), USE C - C = 0.1µF OR GREATER. FOR
= 3.0V (3.3V -10%), USE C - C = 0.22µF.
CC
1
4
4
V
CC
1
4
ICL3224, ICL3226, ICL3238, ICL3244
Absolute Maximum Ratings
Thermal Information
o
V
to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
Thermal Resistance (Typical, Note 4)
θ
( C/W)
CC
JA
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
20 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . .
28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
20 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
28 Ld SSOP and TSSOP Packages . . . . . . . . . . . .
Moisture Sensitivity (see Technical Brief TB363)
All Packages Not Listed Below . . . . . . . . . . . . . . . . . . . . . Level 1
16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 2
Maximum Junction Temperature (Plastic Package) . . . . . . . 150 C
80
75
140
125
100
T
, FORCEOFF, FORCEON . . . . . . . . . . . . . . . . . . -0.3V to 6V
IN
R
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
IN
Output Voltages
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
T
OUT
o
R
, INVALID, READY . . . . . . . . . . . . . . . . -0.3V to V
+0.3V
OUT
Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
CC
o
o
Maximum Storage Temperature Range . . . . . . . . . -65 C to 150 C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300 C
(SOIC, SSOP, TSSOP - Lead Tips Only)
o
T
OUT
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Operating Conditions
Temperature Range
ICL32XXC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 C to 70 C
ICL32XXI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 85 C
o
o
o
o
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
4. θ is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
Electrical Specifications Test Conditions: V = 3V to 5.5V, C - C = 0.1µF (ICL3238: C - C = 0.22µF @ V
= 3V); Unless
CC
1
4
1
4
CC
o
Otherwise Specified. Typicals are at T = 25 C
A
TEMP
o
PARAMETER
TEST CONDITIONS
( C)
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
Supply Current, Automatic
Powerdown
All R Open, FORCEON = GND, FORCEOFF = V
IN
25
-
1.0
10
µA
CC
Supply Current, Powerdown
FORCEOFF = GND
25
25
25
-
-
-
1.0
0.3
0.3
10
1.0
1.0
µA
mA
mA
Supply Current,
Automatic Powerdown Disabled
All Outputs Unloaded, FORCEON ICL3244, V
= FORCEOFF = V
CC
= 3V
CC
All Others, V
= 3.15V
CC
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold Low
Input Logic Threshold High
T
, FORCEON, FORCEOFF
Full
Full
Full
25
-
-
0.8
-
V
V
IN
IN
T
, FORCEON, FORCEOFF
V
V
= 3.3V
2.0
-
-
CC
CC
= 5.0V
2.4
-
V
Transmitter Input Hysteresis
Input Leakage Current
Output Leakage Current
Output Voltage Low
-
-
-
-
0.5
±0.01
±0.05
-
-
V
T
, FORCEON, FORCEOFF
Full
Full
Full
Full
±1.0
±10
0.4
µA
µA
V
IN
FORCEOFF = GND
I
= 1.6mA
= -1.0mA
OUT
OUT
Output Voltage High
RECEIVER INPUTS
Input Voltage Range
Input Threshold Low
I
V
-0.6 V
-0.1
-
V
CC
CC
Full
25
25
25
25
25
25
-25
0.6
0.8
-
-
25
-
V
V
V
V
V
V
= 3.3V
= 5.0V
= 3.3V
= 5.0V
1.2
1.5
1.5
1.8
0.5
5
CC
CC
CC
CC
-
V
Input Threshold High
2.4
2.4
-
V
-
V
Input Hysteresis
-
V
Input Resistance
3
7
kΩ
TRANSMITTER OUTPUTS
Output Voltage Swing
All Transmitter Outputs Loaded with 3kΩ to Ground
Full
±5.0
±5.4
-
V
5
ICL3224, ICL3226, ICL3238, ICL3244
Electrical Specifications Test Conditions: V = 3V to 5.5V, C - C = 0.1µF (ICL3238: C - C = 0.22µF @ V
= 3V); Unless
CC
1
4
1
4
CC
o
Otherwise Specified. Typicals are at T = 25 C (Continued)
A
TEMP
o
PARAMETER
Output Resistance
TEST CONDITIONS
( C)
MIN
TYP
10M
±35
-
MAX
-
UNITS
Ω
V
V
= V+ = V- = 0V, Transmitter Output = ±2V
Full
Full
Full
300
CC
Output Short-Circuit Current
Output Leakage Current
-
-
±60
±25
mA
µA
= ±12V, V
CC
= 0V or 3V to 5.5V,
OUT
Automatic Powerdown or FORCEOFF = GND
MOUSE DRIVEABILITY (ICL3244 Only)
Transmitter Output Voltage
(See Figure 11)
T1 = T2 = GND, T3 = V , T3
Loaded with 3kΩ to
Full
±5
-
-
V
IN
IN
IN
CC
OUT
GND, T1
and T2
Loaded with 2.5mA Each
OUT
OUT
ENHANCED AUTOMATIC POWERDOWN (FORCEON = GND, FORCEOFF = V
)
CC
Receiver Input Thresholds to
INVALID High
See Figure 6
Full
Full
Full
Full
-2.7
-0.3
-
-
-
-
-
2.7
0.3
0.4
-
V
V
V
V
Receiver Input Thresholds to
INVALID Low
See Figure 6
INVALID, READY Output Voltage
Low
I
I
= 1.6mA
= -1.0mA
OUT
INVALID, READY Output Voltage
High
V
-0.6
OUT
CC
Receiver Positive or Negative
Threshold to INVALID High Delay
ICL3238
25
25
-
-
0.1
1
-
-
µs
µs
All Others
(t
)
INVH
ICL3238
Receiver Positive or Negative
Threshold to INVALID Low Delay
25
25
-
-
50
30
-
-
µs
µs
All Others
(t
)
INVL
Receiver or Transmitter Edge to
Transmitters Enabled Delay (t
ICL3238, Note 5
All Others, Note 5
Note 5
25
25
-
-
25
100
30
-
-
µs
µs
)
WU
Receiver or Transmitter Edge to
Transmitters Disabled Delay
Full
15
60
sec
(t
)
AUTOPWDN
TIMING CHARACTERISTICS
Maximum Data Rate
R
= 3kΩ, C = 1000pF, One Transmitter Switching
Full
25
25
25
25
25
25
25
25
250
500
0.15
0.15
200
200
100
50
-
-
kbps
µs
L
L
Receiver Propagation Delay
Receiver Input to Receiver
Output, C = 150pF
t
t
-
-
PHL
PLH
L
-
µs
Receiver Output Enable Time
Receiver Output Disable Time
Transmitter Skew
Normal Operation (ICL3238/44 Only)
Normal Operation (ICL3238/44 Only)
-
-
ns
-
-
ns
t - t
PHL PLH
-
-
ns
Receiver Skew
t - t
PHL PLH
-
-
ns
Transition Region Slew Rate
V
= 3.3V,
C = 150pF to 1000pF
6
4
-
30
30
V/µs
V/µs
CC
L
R
= 3kΩ to 7kΩ,
L
C = 150pF to 2500pF
8
L
Measured From 3V to -3V or -3V
to 3V
ESD PERFORMANCE
RS-232 Pins (T
, R
OUT IN
)
Human Body Model
25
25
25
25
-
-
-
-
±15
±8
-
-
-
-
kV
kV
kV
kV
IEC1000-4-2 Contact Discharge
IEC1000-4-2 Air Gap Discharge
Human Body Model
±10
±2.5
All Other Pins
NOTE:
5. An “edge” is defined as a transition through the transmitter or receiver input thresholds.
6
ICL3224, ICL3226, ICL3238, ICL3244
The ICL3238 and ICL3244 inverting receivers disable during
Detailed Description
forced (manual) powerdown, but not during automatic
powerdown (see Table 2). Conversely, the monitor receiver
remains active even during manual powerdown making it
extremely useful for Ring Indicator monitoring. Standard
receivers driving powered down peripherals must be
disabled to prevent current flow through the peripheral’s
protection diodes (see Figures 2 and 3). This renders them
useless for wake up functions, but the corresponding
monitor receiver can be dedicated to this task as shown in
Figure 3.
These ICL32XX interface ICs operate from a single +3V to
+5.5V supply, guarantee a 250kbps minimum data rate,
require only four small external 0.1µF capacitors, feature low
power consumption, and meet all ElA RS-232C and V.28
specifications. The circuit is divided into three sections: The
charge pump, the transmitters, and the receivers.
Charge-Pump
Intersil’s new ICL32XX family utilizes regulated on-chip dual
charge pumps as voltage doublers, and voltage inverters to
generate ±5.5V transmitter supplies from a V
supply as
CC
V
CC
low as 3.0V. This allows these devices to maintain RS-232
compliant output levels over the ±10% tolerance range of
3.3V powered systems. The efficient on-chip power supplies
require only four small, external 0.1µF capacitors for the
R
R
XIN
XOUT
GND ≤ V
≤ V
-25V ≤ V
≤ +25V
5kΩ
ROUT
CC
RIN
GND
FIGURE 1. INVERTING RECEIVER CONNECTIONS
voltage doubler and inverter functions at V
= 3.3V. See
CC
the “Capacitor Selection” section, and Table 3 for capacitor
recommendations for other operating conditions. The charge
pumps operate discontinuously (i.e., they turn off as soon as
the V+ and V- supplies are pumped up to the nominal
values), resulting in significant power savings.
V
CC
V
CC
CURRENT
FLOW
V
CC
Transmitters
V
= V
CC
OUT
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip ±5.5V supplies,
these transmitters deliver true RS-232 levels over a wide
range of single supply system voltages.
Rx
POWERED
DOWN
UART
Tx
OLD
RS-232 CHIP
SHDN = GND
GND
Transmitter outputs disable and assume a high impedance
state when the device enters the powerdown mode (see
Table 2). These outputs may be driven to ±12V when
disabled.
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN
PERIPHERAL
All devices guarantee a 250kbps data rate for full load
V
CC
conditions (3kΩ and 1000pF), V
≥ 3.0V, with one
CC
transmitter operating at full speed. Under more typical
conditions of V ≥ 3.3V, R = 3kΩ, and C = 250pF, one
TRANSITION
DETECTOR
CC
L
L
transmitter easily operates at 1Mbps.
TO
WAKE-UP
LOGIC
ICL3238/44
Transmitter inputs float if left unconnected, and may cause
increases. Connect unused inputs to GND for the best
I
CC
V
CC
performance.
R2
OUTB
Receivers
R
T
X
V
= HI-Z
OUT
All the ICL32XX devices contain standard inverting
receivers, but only the ICL3238 and ICL3244 receivers can
tristate, via the FORCEOFF control line. Additionally, the
ICL3238 and ICL3244 include a noninverting (monitor)
R2
OUT
POWERED
DOWN
UART
R2
IN
T1
IN
X
T1
OUT
receiver (denoted by the R
label) that is always active,
OUTB
FORCEOFF = GND
regardless of the state of any control lines. Both receiver
types convert RS-232 signals to CMOS output levels and
accept inputs up to ±25V while presenting the required 3kΩ
to 7kΩ input impedance (see Figure 1) even if the power is
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
Powerdown Functionality
off (V
= 0V). The receivers’ Schmitt trigger input stage
CC
This 3V family of RS-232 interface devices requires a
nominal supply current of 0.3mA during normal operation
uses hysteresis to increase noise immunity and decrease
errors due to slow input signal transitions.
7
ICL3224, ICL3226, ICL3238, ICL3244
TABLE 2. POWERDOWN LOGIC TRUTH TABLE
RS-232
LEVEL
RCVR OR
XMTR
PRESENT
EDGE
(NOTE 6)
AT
WITHIN 30 FORCEOFF FORCEON TRANSMITTER RECEIVER
R
RECEIVER INVALID
OUTB
SEC?
INPUT
INPUT
OUTPUTS
OUTPUTS OUTPUTS
INPUT?
OUTPUT
MODE OF OPERATION
ICL3224, ICL3226
NO
NO
YES
YES
NO
NO
X
H
H
H
H
H
H
L
H
H
L
Active
Active
Active
Active
High-Z
High-Z
High-Z
High-Z
Active
Active
Active
Active
Active
Active
Active
Active
N.A.
N.A.
N.A.
N.A.
N.A.
N.A.
N.A.
N.A.
NO
YES
NO
L
H
L
Normal Operation (Enhanced
Auto Powerdown Disabled)
Normal Operation (Enhanced
Auto Powerdown Enabled)
L
YES
NO
H
L
L
Powerdown Due to Enhanced
Auto Powerdown Logic
L
YES
NO
H
L
X
X
Manual Powerdown
X
L
YES
H
ICL322X - INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN)
X
X
NOTE 7
NOTE 7
NOTE 7
NOTE 7
Active
Active
Active
N.A.
N.A.
YES
NO
H
L
Normal Operation
High-Z
Forced Auto Powerdown
ICL3238, ICL3244
NO
NO
YES
YES
NO
NO
X
H
H
H
H
H
H
L
H
H
L
Active
Active
Active
Active
High-Z
High-Z
High-Z
High-Z
Active
Active
Active
Active
Active
Active
High-Z
High-Z
Active
Active
Active
Active
Active
Active
Active
Active
NO
YES
NO
L
H
L
Normal Operation (Enhanced
Auto Powerdown Disabled)
Normal Operation (Enhanced
Auto Powerdown Enabled)
L
YES
NO
H
L
L
Powerdown Due to Enhanced
Auto Powerdown Logic
L
YES
NO
H
L
X
X
Manual Powerdown
X
L
YES
H
ICL3238, ICL3244 - INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN)
X
X
NOTE 7
NOTE 7
NOTE 7
NOTE 7
Active
Active
Active
Active
YES
NO
H
L
Normal Operation
High-Z
High-Z
Forced Auto Powerdown
NOTES:
6. Applies only to the ICL3238 and ICL3244.
7. Input is connected to INVALID Output.
(not in powerdown mode). This is considerably less than the
5mA to 11mA current required of 5V RS-232 devices. The
already low current requirement drops significantly when the
device enters powerdown mode. In powerdown, supply
current drops to 1µA, because the on-chip charge pump
active and powerdown modes, under logic or software
control, only the FORCEOFF input need be driven. The
FORCEON state isn’t critical, as FORCEOFF dominates
over FORCEON. Nevertheless, if strictly manual control over
powerdown is desired, the user must strap FORCEON high
to disable the enhanced automatic powerdown circuitry.
ICL3238 and ICL3244 inverting (standard) receiver outputs
also disable when the device is in powerdown, thereby
eliminating the possible current path through a shutdown
peripheral’s input protection diode (see Figures 2 and 3).
turns off (V+ collapses to V , V- collapses to GND), and
CC
the transmitter outputs tristate. Inverting receiver outputs
may or may not disable in powerdown; refer to Table 2 for
details. This micro-power mode makes these devices ideal
for battery powered and portable applications.
Connecting FORCEOFF and FORCEON together disables
the enhanced automatic powerdown feature, enabling them
to function as a manual SHUTDOWN input (see Figure 4).
Software Controlled (Manual) Powerdown
These devices allow the user to force the IC into the low
power, standby state, and utilize a two pin approach where
the FORCEON and FORCEOFF inputs determine the IC’s
mode. For always enabled operation, FORCEON and
FORCEOFF are both strapped high. To switch between
With any of the above control schemes, the time required to
exit powerdown, and resume transmission is only 100µs.
8
ICL3224, ICL3226, ICL3238, ICL3244
uses this indicator to power down the interface block.
FORCEOFF
FORCEON
Reconnecting the cable restores valid levels at the receiver
inputs, INVALID switches high, and the power management
logic wakes up the interface block. INVALID can also be used
to indicate the DTR or RING INDICATOR signal, as long as
the other receiver inputs are floating, or driven to GND (as in
the case of a powered down driver).
PWR
MGT
LOGIC
INVALID
ICL32XX
VALID RS-232 LEVEL - INVALID = 1
2.7V
I/O
UART
INDETERMINATE
CPU
0.3V
INVALID LEVEL - INVALID = 0
-0.3V
INDETERMINATE
FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
-2.7V
VALID RS-232 LEVEL - INVALID = 1
When using both manual and enhanced automatic powerdown
(FORCEON = 0), the ICL32XX won’t power up from manual
powerdown until both FORCEOFF and FORCEON are driven
high, or until a transition occurs on a receiver or transmitter
input. Figure 5 illustrates a circuit for ensuring that the ICL32XX
powers up as soon as FORCEOFF switches high. The rising
edge of the Master Powerdown signal forces the device to
power up, and the ICL32XX returns to enhanced automatic
powerdown mode an RC time constant after this rising edge.
The time constant isn’t critical, because the ICL32XX remains
powered up for 30 seconds after the FORCEON falling edge,
even if there are no signal transitions. This gives slow-to-wake
systems (e.g., a mouse) plenty of time to start transmitting, and
as long as it starts transmitting within 30 seconds both systems
remain enabled.
FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER LEVELS
Enhanced Automatic Powerdown
Even greater power savings is available by using these
devices which feature an enhanced automatic powerdown
function. When the enhanced powerdown logic determines
that no transitions have occurred on any of the transmitter
nor receiver inputs for 30 seconds, the charge pump and
transmitters powerdown, thereby reducing supply current to
1µA. The ICL32XX automatically powers back up whenever
it detects a transition on one of these inputs. This automatic
powerdown feature provides additional system power
savings without changes to the existing operating system.
Enhanced automatic powerdown operates when the
FORCEON input is low, and the FORCEOFF input is high.
Tying FORCEON high disables automatic powerdown, but
manual powerdown is always available via the overriding
FORCEOFF input. Table 2 summarizes the enhanced
automatic powerdown functionality.
MASTER POWERDOWN LINE
POWER
MANAGEMENT
0.1µF
UNIT
1MΩ
FORCEOFF
FORCEON
FORCEOFF
ICL32XX
EDGE
T_IN
DETECT
FIGURE 5. CIRCUIT TO ENSURE IMMEDIATE POWER UP
WHEN EXITING FORCED POWERDOWN
S
30sec
AUTOSHDN
TIMER
INVALID Output
The INVALID output always indicates (see Table 2) whether
or not 30µs have elapsed with invalid RS-232 signals (see
Figures 6 and 8) persisting on all of the receiver inputs, giving
the user an easy way to determine when the interface block
should power down. Invalid receiver levels occur whenever
the driving peripheral’s outputs are shut off (powered down) or
when the RS-232 interface cable is disconnected. In the case
of a disconnected interface cable where all the receiver inputs
are floating (but pulled to GND by the internal receiver pull
down resistors), the INVALID logic detects the invalid levels
and drives the output low. The power management logic then
R
EDGE
DETECT
R_IN
FORCEON
FIGURE 7. ENHANCED AUTOMATIC POWERDOWN LOGIC
Figure 7 illustrates the enhanced powerdown control logic.
Note that once the ICL32XX enters powerdown (manually or
automatically), the 30 second timer remains timed out (set),
keeping the ICL32XX powered down until FORCEON
9
ICL3224, ICL3226, ICL3238, ICL3244
transitions high, or until a transition occurs on a receiver or
transmitter input.
The INVALID output signal switches low to indicate that
invalid levels have persisted on all of the receiver inputs for
more than 30µs (see Figure 8), but this has no direct effect
on the state of the ICL32XX (see the next sections for
methods of utilizing INVALID to power down the device).
INVALID switches high 1µs after detecting a valid RS-232
level on a receiver input. INVALID operates in all modes
(forced or automatic powerdown, or forced on), so it is also
useful for systems employing manual powerdown circuitry.
ICL32XX
I/O
UART
CPU
The time to recover from automatic powerdown mode is
typically 100µs.
Emulating Standard Automatic Powerdown
FIGURE 9. CONNECTIONS FOR AUTOMATIC POWERDOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
If enhanced automatic powerdown isn’t desired, the user can
implement the standard automatic powerdown feature
(mimics the function on the ICL3221/23/43) by connecting
the INVALID output to the FORCEON and FORCEOFF
inputs, as shown in Figure 9. After 30µs of invalid receiver
levels, INVALID switches low and drives the ICL32XX into a
forced powerdown condition. INVALID switches high as
soon as a receiver input senses a valid RS-232 level, forcing
the ICL32XX to power on. See the “INVALID DRIVING
FORCEON AND FORCEOFF” section of Table 2 for an
operational summary. This operational mode is perfect for
handheld devices that communicate with another computer
via a detachable cable. Detaching the cable allows the
internal receiver pull-down resistors to pull the inputs to GND
(an invalid RS-232 level), causing the 30µs timer to time-out
and drive the IC into powerdown. Reconnecting the cable
restores valid levels, causing the IC to power back up.
Hybrid Automatic Powerdown Options
For devices which communicate only through a detachable
cable, connecting INVALID to FORCEOFF (with FORCEON
= 0) may be a desirable configuration. While the cable is
attached INVALID and FORCEOFF remain high, so the
enhanced automatic powerdown logic powers down the RS-
232 device whenever there is 30 seconds of inactivity on the
receiver and transmitter inputs. Detaching the cable allows
the receiver inputs to drop to an invalid level (GND), so
INVALID switches low and forces the RS-232 device to
power down. The ICL32XX remains powered down until the
cable is reconnected (INVALID = FORCEOFF = 1) and a
transition occurs on a receiver or transmitter input (see
Figure 7). For immediate power up when the cable is
RECEIVER
INPUTS
INVALID
REGION
}
TRANSMITTER
INPUTS
TRANSMITTER
OUTPUTS
t
INVH
INVALID
OUTPUT
t
INVL
t
AUTOPWDN
t
WU
t
WU
t
AUTOPWDN
READY
OUTPUT
V+
V
CC
0
V-
FIGURE 8. ENHANCED AUTOMATIC POWERDOWN, INVALID AND READY TIMING DIAGRAMS
10
ICL3224, ICL3226, ICL3238, ICL3244
reattached, connect FORCEON to FORCEOFF through a
network similar to that shown in Figure 5.
ICL32XX transmitter outputs meet RS-562 levels (±3.7V), at
the full data rate, with V as low as 2.7V. RS-562 levels
CC
typically ensure interoperability with RS-232 devices.
Ready Output (ICL3224 and ICL3226 only)
The Ready output indicates that the ICL322X is ready to
transmit. Ready switches low whenever the device enters
powerdown, and switches back high during power-up when
V- reaches -4V or lower.
Mouse Driveability
The ICL3244 is specifically designed to power a serial
mouse while operating from low voltage supplies. Figure 11
shows the transmitter output voltages under increasing load
current. The on-chip switching regulator ensures the
transmitters will supply at least ±5V during worst case
conditions (15mA for paralleled V+ transmitters, 7.3mA for
single V- transmitter).
Capacitor Selection
The charge pumps require 0.1µF capacitors for 3.3V
operation. For other supply voltages refer to Table 3 for
capacitor values. Do not use values smaller than those listed
in Table 3. Increasing the capacitor values (by a factor of 2)
reduces ripple on the transmitter outputs and slightly
5V/DIV
FORCEOFF
reduces power consumption. C , C , and C can be
2
3
4
T1
increased without increasing C ’s value, however, do not
1
increase C without also increasing C , C , and C to
1
2
3
4
maintain the proper ratios (C to the other capacitors).
1
V
= +3.3V
CC
C1 - C4 = 0.1µF
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
2V/DIV
T2
5V/DIV
READY
TIME (20µs/DIV.)
TABLE 3. REQUIRED CAPACITOR VALUES (Note 8)
V
(V)
C (µF)
C , C , C (µF)
2 3 4
CC
1
FIGURE 10. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
3.0 to 3.6 (3.3V ±10%)
3.15 to 3.6 (3.3V ±5%)
4.5 to 5.5
0.1 (0.22)
(0.1)
0.1 (0.22)
(0.1)
6
5
0.047
0.33
3.0 to 5.5
0.1 (0.22)
0.47 (1.0)
V
+
OUT
4
3
NOTE:
V
= 3.0V
CC
8. Parenthesized values apply only to the ICL3238
2
1
T1
0
Power Supply Decoupling
V
+
OUT
-1
-2
-3
-4
-5
-6
In most circumstances a 0.1µF bypass capacitor is
adequate. In applications that are particularly sensitive to
T2
T3
ICL3244
power supply noise, decouple V
to ground with a
CC
V
V
-
CC
1
OUT
V
-
OUT
8
capacitor of the same value as the charge-pump capacitor C .
Connect the bypass capacitor as close as possible to the IC.
1
0
2
3
4
5
6
7
9
10
Transmitter Outputs when Exiting
Powerdown
LOAD CURRENT PER TRANSMITTER (mA)
FIGURE 11. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CURRENT (PER TRANSMITTER, i.e., DOUBLE
CURRENT AXIS FOR TOTAL V CURRENT)
Figure 10 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3kΩ in parallel with 2500pF. Note
that the transmitters enable only when the magnitude of the
supplies exceed approximately 3V.
OUT+
High Data Rates
The ICL32XX maintain the RS-232 ±5V minimum transmitter
output voltages even at high data rates. Figure 12 details a
transmitter loopback test circuit, and Figure 13 illustrates the
loopback test result at 120kbps. For this test, all transmitters
were simultaneously driving RS-232 loads in parallel with
1000pF, at 120kbps. Figure 14 shows the loopback results
Operation Down to 2.7V
11
ICL3224, ICL3226, ICL3238, ICL3244
for a single transmitter driving 1000pF and an RS-232 load
at 250kbps. The static transmitters were also loaded with an
RS-232 receiver.
5V/DIV.
T1
IN
V
CC
+
0.1µF
V
T1
CC
OUT
OUT
V+
V-
+
C1+
+
C
1
2
C
3
4
C1-
C2+
C2-
ICL32XX
+
C
+
C
R1
V
= +3.3V
CC
C1 - C4 = 0.1µF
T
T
IN
OUT
2µs/DIV.
FIGURE 14. LOOPBACK TEST AT 250kbps
1000pF
R
IN
R
OUT
FORCEON
FORCEOFF
5K
V
CC
Interconnection with 3V and 5V Logic
The ICL32XX directly interface with 5V CMOS and TTL logic
families. Nevertheless, with the ICL32XX at 3.3V, and the
logic supply at 5V, AC, HC, and CD4000 outputs can drive
ICL32XX inputs, but ICL32XX outputs do not reach the
FIGURE 12. TRANSMITTER LOOPBACK TEST CIRCUIT
5V/DIV.
minimum V for these logic families. See Table 4 for more
IH
information.
T1
IN
TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
V
T1
CC
OUT
OUT
SYSTEM
SUPPLY
POWER-SUPPLY VOLTAGE
VOLTAGE (V)
(V)
3.3
5
COMPATIBILITY
3.3
5
Compatible with all CMOS families.
R1
V
= +3.3V
CC
C1 - C4 = 0.1µF
Compatible with all TTL and
CMOS logic families.
5µs/DIV.
5
3.3
Compatible with ACT and HCT
CMOS, and with TTL. ICL32XX
outputs are incompatible with AC,
HC, and CD4000 CMOS inputs.
FIGURE 13. LOOPBACK TEST AT 120kbps
12
ICL3224, ICL3226, ICL3238, ICL3244
o
Typical Performance Curves V = 3.3V, T = 25 C
CC
A
6
6
V
+
OUT
V
+
OUT
4
2
4
2
ICL3224, ICL3226, ICL3244
ICL3238
1 TRANSMITTER AT 250kbps
OTHER TRANSMITTERS AT 30kbps
1 TRANSMITTER AT 250kbps
OTHER TRANSMITTERS AT 30kbps
0
0
-2
-2
-4
-4
-6
V
-
V
-
OUT
OUT
-6
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
FIGURE 15. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
FIGURE 16. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
25
40
ICL3224
35
250kbps
20
-SLEW
30
25
120kbps
15
20
+SLEW
15
10
20kbps
10
5
5
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
FIGURE 17. SLEW RATE vs LOAD CAPACITANCE
FIGURE 18. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
35
55
ICL3226
ICL3238
50
30
25
20
250kbps
45
250kbps
40
120kbps
15
10
120kbps
35
30
20kbps
4000
5
0
25
20
20kbps
4000
0
1000
2000
3000
5000
5000
2000
3000
0
1000
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
FIGURE 19. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 20. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
13
ICL3224, ICL3226, ICL3238, ICL3244
o
Typical Performance Curves V = 3.3V, T = 25 C (Continued)
CC
A
3.5
45
40
35
30
NO LOAD
ALL OUTPUTS STATIC
ICL3244
3.0
2.5
2.0
1.5
1.0
0.5
0
250kbps
120kbps
25
20
20kbps
4000
15
10
5000
1000
2000
3000
0
2.5
3.0
3.5
4.0
SUPPLY VOLTAGE (V)
FIGURE 22. SUPPLY CURRENT vs SUPPLY VOLTAGE
4.5
5.0
5.5
6.0
LOAD CAPACITANCE (pF)
FIGURE 21. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
ICL3224: 937
ICL3226: 825
ICL3238: 1235
ICL3244: 1109
PROCESS:
Si Gate CMOS
14
ICL3224, ICL3226, ICL3238, ICL3244
Dual-In-Line Plastic Packages (PDIP)
E20.3 (JEDEC MS-001-AD ISSUE D)
N
20 LEAD DUAL-IN-LINE PLASTIC PACKAGE
E1
INDEX
AREA
INCHES
MILLIMETERS
1 2
3
N/2
SYMBOL
MIN
MAX
0.210
-
MIN
-
MAX
5.33
-
NOTES
-B-
A
A1
A2
B
-
4
-A-
0.015
0.115
0.014
0.045
0.008
0.980
0.005
0.300
0.240
0.39
2.93
0.356
1.55
0.204
24.89
0.13
7.62
6.10
4
D
E
BASE
PLANE
0.195
0.022
0.070
0.014
1.060
-
4.95
0.558
1.77
0.355
26.9
-
-
A2
A
-C-
-
SEATING
PLANE
L
C
L
B1
C
8
D1
B1
-
eA
A1
A
D1
e
D
5
eC
B S
C
B
eB
D1
E
5
0.010 (0.25) M
C
0.325
0.280
8.25
7.11
6
E1
e
5
NOTES:
0.100 BSC
0.300 BSC
2.54 BSC
7.62 BSC
-
1. Controlling Dimensions: INCH. In case of conflict between English
and Metric dimensions, the inch dimensions control.
e
e
6
A
B
-
0.430
0.150
-
10.92
3.81
7
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
L
0.115
2.93
4
9
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication No. 95.
N
20
20
4. Dimensions A, A1 and L are measured with the package seated in
Rev. 0 12/93
JEDEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
e
6. E and
dicular to datum
7. e and e are measured at the lead tips with the leads uncon-
are measured with the leads constrained to be perpen-
A
-C-
.
B
C
strained. e must be zero or greater.
C
8. B1 maximum dimensions do not include dambar protrusions. Dam-
bar protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
15
ICL3224, ICL3226, ICL3238, ICL3244
Small Outline Plastic Packages (SSOP)
M16.209 (JEDEC MO-150-AC ISSUE B)
N
16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
GAUGE
PLANE
SYMBOL
MIN
MAX
0.078
-
MIN
-
MAX
2.00
-
NOTES
-B-
A
A1
A2
B
-
-
-
0.002
0.065
0.009
0.004
0.233
0.197
0.05
1.65
0.22
0.09
5.90
5.00
1
2
3
0.072
0.014
0.009
0.255
0.220
1.85
0.38
0.25
6.50
5.60
-
L
0.25
0.010
SEATING PLANE
A
9
-
-A-
C
D
E
D
3
4
-
-C-
α
µ
e
0.026 BSC
0.65 BSC
A2
e
A1
C
H
L
0.292
0.022
0.322
0.037
7.40
0.55
8.20
0.95
-
B
0.10(0.004)
6
7
-
0.25(0.010) M
C A M B S
N
α
16
16
o
0
o
8
o
0
o
8
NOTES:
Rev. 2 3/95
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimen-
sion at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
16
ICL3224, ICL3226, ICL3238, ICL3244
Shrink Small Outline Plastic Packages (SSOP)
M20.209 (JEDEC MO-150-AE ISSUE B)
N
20 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
GAUGE
PLANE
SYMBOL
MIN
MAX
0.078
-
MIN
-
MAX
2.00
-
NOTES
-B-
A
A1
A2
B
-
-
0.002
0.065
0.009
0.004
0.272
0.197
0.05
1.65
0.22
0.09
6.90
5.00
-
1
2
3
0.072
0.014
0.009
0.295
0.220
1.85
0.38
0.25
7.50
5.60
-
L
0.25
0.010
SEATING PLANE
A
9
-A-
C
D
E
-
D
3
-C-
4
α
µ
e
0.026 BSC
0.65 BSC
-
A2
e
A1
C
H
L
0.292
0.022
0.322
0.037
7.40
0.55
8.20
0.95
-
B
0.10(0.004)
6
0.25(0.010) M
C A M B S
N
α
20
20
7
o
0
o
8
o
0
o
8
-
NOTES:
Rev. 2 4/95
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.20mm (0.0078 inch)
per side.
5. The chamfer on the body is optional. If it is not present, a visual in-
dex feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dam-
bar protrusion shall be 0.13mm (0.005 inch) total in excess of “B”
dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
17
ICL3224, ICL3226, ICL3238, ICL3244
Thin Shrink Small Outline Plastic Packages (TSSOP)
M28.173
N
28 LEAD THIN SHRINK SMALL OUTLINE PLASTIC
PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
E
E1
-B-
INCHES
MIN
MILLIMETERS
GAUGE
PLANE
SYMBOL
MAX
0.047
0.006
0.051
0.0118
0.0079
0.386
0.177
MIN
-
MAX
1.20
0.15
1.05
0.30
0.20
9.80
4.50
NOTES
A
A1
A2
b
-
-
1
2
3
0.002
0.031
0.0075
0.0035
0.378
0.169
0.05
0.80
0.19
0.09
9.60
4.30
-
L
-
0.25
0.010
0.05(0.002) SEATING PLANE
9
-A-
A
D
c
-
D
3
-C-
E1
e
4
α
A2
e
A1
0.026 BSC
0.65 BSC
-
c
b
0.10(0.004)
E
0.246
0.256
6.25
0.45
6.50
0.75
-
0.10(0.004) M
C A M B S
L
0.0177
0.0295
6
N
28
28
7
o
0
o
8
o
0
o
8
NOTES:
-
α
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AE, Issue E.
Rev. 0 6/98
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.15mm (0.006 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimen-
sion at maximum material condition. Minimum space between protru-
sion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact. (Angles in degrees)
18
ICL3224, ICL3226, ICL3238, ICL3244
Small Outline Exposed Pad Plastic Packages (EPSOIC)
M28.3B
N
28 LEAD WIDE BODY SMALL OUTLINE EXPOSED PAD
PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
E
INCHES
-B-
SYMBOL
MIN
NOMINAL
MAX
0.099
0.005
0.019
0.0125
0.711
0.299
NOTES
A
A1
B
C
D
E
e
0.091
0.001
0.014
0.0091
0.701
0.292
-
-
1
2
3
-
-
TOP VIEW
-
9
L
-
-
-
3
SEATING PLANE
A
-
4
-A-
D
o
h x 45
0.050 BSC
-
H
h
0.400
0.010
0.024
-
-
0.410
0.016
0.040
-
-C-
α
5
e
B
A1
L
-
6
C
0.10(0.004)
N
28
7
0.25(0.010) M
SIDE VIEW
C
A M B S
0°
5°
8°
-
α
P
0.180
0.156
0.214
0.190
0.218
0.194
11
11
P1
Rev. 0 5/02
1
2
3
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
P1
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
N
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
P
BOTTOM VIEW
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: INCH.
11. Dimensions “P” and “P1” are thermal and/or electrical
enhanced variations. Values shown are maximum size of
exposed pad within lead count body size.
19
ICL3224, ICL3226, ICL3238, ICL3244
Shrink Small Outline Plastic Packages (SSOP)
M28.209 (JEDEC MO-150-AH ISSUE B)
N
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
GAUGE
PLANE
SYMBOL
MIN
MAX
0.078
-
MIN
-
MAX
2.00
-
NOTES
-B-
A
A1
A2
B
-
-
0.002
0.065
0.009
0.004
0.390
0.197
0.05
1.65
0.22
0.09
9.90
5.00
-
1
2
3
0.072
0.014
0.009
0.413
0.220
1.85
0.38
0.25
10.50
5.60
-
L
0.25
0.010
SEATING PLANE
A
9
-A-
C
D
E
-
D
3
-C-
4
α
µ
e
0.026 BSC
0.65 BSC
-
A2
e
A1
C
H
L
0.292
0.022
0.322
0.037
7.40
0.55
8.20
0.95
-
B
0.10(0.004)
6
0.25(0.010) M
C A M B S
N
α
28
28
7
o
0
o
8
o
0
o
8
NOTES:
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
Rev. 1 3/95
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.20mm (0.0078 inch)
per side.
5. The chamfer on the body is optional. If it is not present, a visual in-
dex feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess of
“B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
20
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