HS9-302RH-T [INTERSIL]

Radiation Hardened CMOS Dual DPST Analog Switch; 抗辐射CMOS双双刀单掷模拟开关
HS9-302RH-T
型号: HS9-302RH-T
厂家: Intersil    Intersil
描述:

Radiation Hardened CMOS Dual DPST Analog Switch
抗辐射CMOS双双刀单掷模拟开关

开关
文件: 总2页 (文件大小:30K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
HS-302RH-T  
Data Sheet  
July 1999  
File Number 4603.1  
Radiation Hardened  
Features  
CMOS Dual DPST Analog Switch  
• QML Class T, Per MIL-PRF-38535  
Intersil’s Satellite Applications FlowTM (SAF) devices are fully  
tested and guaranteed to 100kRAD Total Dose. These QML  
Class T devices are processed to a standard flow intended  
to meet the cost and shorter lead-time needs of large  
volume satellite manufacturers, while maintaining a high  
level of reliability.  
• Radiation Performance  
5
- Gamma Dose (γ) 1 x 10 RAD(Si)  
• No Latch-Up, Dielectrically Isolated Device Islands  
• Pin for Pin Compatible with Intersil HI-302 Series Analog  
Switches  
• Analog Signal Range 15V  
The HS-302RH-T analog switch is a monolithic device  
fabricated using Radiation Hardened CMOS technology and  
the Intersil dielectric isolation process for latch-up free  
operation. Improved total dose hardness is obtained by  
layout (thin oxide tabs extending to a channel stop) and  
processing (hardened gate oxide). These switches offer low-  
resistance switching performance for analog voltages up to  
the supply rails. “ON” resistance is low and stays reasonably  
constant over the full range of operating voltage and current.  
“ON” resistance also stays reasonably constant when  
exposed to radiation, being typically 30pre-rad and 35Ω  
post 100kRAD(Si). This device provide break-before-make  
switching.  
• Low Leakage . . . . . . . . . . . . . . . . 100nA (Max, Post Rad)  
• Low R  
ON  
. . . . . . . . . . . . . . . . . . . . . 60(Max, Post Rad)  
• Low Operating Power . . . . . . . . . . 100µA (Max, Post Rad)  
Pinouts  
HS1-302RH-T (SBDIP), CDIP2-T14  
TOP VIEW  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
V+  
S4  
D4  
D2  
S2  
IN2  
V-  
NC  
S3  
D3  
D1  
S1  
Specifications  
IN1  
GND  
Specifications for Rad Hard QML devices are controlled by  
the Defense Supply Center in Columbus (DSCC). The SMD  
numbers listed below must be used when ordering.  
8
HS9-302RH-T (FLATPACK), CDFP3-F14  
Detailed Electrical Specifications for the HS-302RH-T  
are contained in SMD 5962-95812. A “hot-link” is provided  
from our website for downloading.  
TOP VIEW  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
V+  
S4  
D4  
D2  
S2  
IN2  
V-  
NC  
S3  
www.intersil.com/spacedefense/newsafclasst.asp  
D3  
Intersil’s Quality Management Plan (QM Plan), listing all  
Class T screening operations, is also available on our  
website.  
D1  
S1  
IN1  
GND  
www.intersil.com/spacedefense/newsafclasst.asp  
8
Ordering Information  
Functional Diagram  
TEMP.  
ORDERING  
NUMBER  
PART  
NUMBER  
RANGE  
( C)  
o
N
P
5962R9581201TCC  
5962R9581201TXC  
HS1-302RH-T  
HS9-302RH-T  
-55 to 125  
-55 to 125  
IN  
D
NOTE: Minimum order quantity for -T is 150 units through  
distribution, or 450 units direct.  
TRUTH TABLE  
LOGIC  
ALL SWITCHES  
0
1
OFF  
ON  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999  
1
Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation.  
HS-302RH-T  
Die Characteristics  
DIE DIMENSIONS:  
PASSIVATION:  
Type: Silox (S O )  
(2130µm x 1930µm x 279µm ±25.4µm)  
84 x 76 x 11mils ±1mil  
i
2
Thickness: 8kÅ ±1kÅ  
METALLIZATION:  
Type: Al  
WORST CASE CURRENT DENSITY:  
2
< 2.0e5 A/cm  
Thickness: 12.5kÅ ±2kÅ  
TRANSISTOR COUNT:  
SUBSTRATE POTENTIAL:  
76  
Unbiased (DI)  
PROCESS:  
BACKSIDE FINISH:  
Metal Gate CMOS, Dielectric Isolation  
Gold  
Metallization Mask Layout  
HS-302RH-T  
D3  
D1  
S1  
D4  
D2  
S2  
IN1  
IN2  
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.  
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-  
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com  
Sales Office Headquarters  
NORTH AMERICA  
EUROPE  
ASIA  
Intersil Corporation  
Intersil SA  
Mercure Center  
100, Rue de la Fusee  
1130 Brussels, Belgium  
TEL: (32) 2.724.2111  
FAX: (32) 2.724.22.05  
Intersil (Taiwan) Ltd.  
7F-6, No. 101 Fu Hsing North Road  
Taipei, Taiwan  
Republic of China  
TEL: (886) 2 2716 9310  
FAX: (886) 2 2715 3029  
P. O. Box 883, Mail Stop 53-204  
Melbourne, FL 32902  
TEL: (407) 724-7000  
FAX: (407) 724-7240  
2

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