HIN207EIBZ-T [INTERSIL]
±15kV, ESD-Protected, 5V Powered, RS-232 Transmitters/Receivers; Â具有±15kV的ESD保护， 5V供电， RS - 232发射器/接收器
| 型号： | HIN207EIBZ-T |
| 厂家： | 
Intersil |
| 描述： | ±15kV, ESD-Protected, 5V Powered, RS-232 Transmitters/Receivers |
| 文件： | 总22页 (文件大小：645K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HIN202E, HIN206E, HIN207E, HIN208E,
HIN211E, HIN213E, HIN232E
®
Data Sheet
November 4, 2005
FN4315.16
±15kV, ESD-Protected, +5V Powered,
RS-232 Trans mitters /Receivers
Features
• Pb-Free Plus Anneal Available (RoHS Compliant)
• High Speed ISDN Compatible . . . . . . . . . . . . . 230kbits/s
• ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000)
• Meets All RS-232E and V.28 Specifications
The HIN202E, HIN206E, HIN207E, HIN208E, HIN211E,
HIN213E, HIN232E family of RS-232 transmitters/receivers
interface circuits meet all ElA high-speed RS-232E and V.28
specifications, and are particularly suited for those
applications where ±12V is not available. A redesigned
transmitter circuit improves data rate and slew rate, which
makes this suitable for ISDN and high speed modems. The
transmitter outputs and receiver inputs are protected to
±15kV ESD (Electrostatic Discharge). They require a single
+5V power supply and feature onboard charge pump voltage
converters which generate +10V and -10V supplies from the
5V supply. The family of devices offers a wide variety of
high-speed RS-232 transmitter/receiver combinations to
accommodate various applications (see Selection Table).
• Requires Only 0.1µF or Greater External Capacitors
• Two Receivers Active in Shutdown Mode (HIN213E)
• Requires Only Single +5V Power Supply
• Onboard Voltage Doubler/Inverter
• Low Power Consumption (Typ) . . . . . . . . . . . . . . . . . 5mA
• Low Power Shutdown Function (Typ) . . . . . . . . . . . . .1µA
• Three-State TTL/CMOS Receiver Outputs
The HIN206E, HIN211E and HIN213E feature a low power
shutdown mode to conserve energy in battery powered
applications. In addition, the HIN213E provides two active
receivers in shutdown mode allowing for easy “wakeup”
capability.
• Multiple Drivers
- ±10V Output Swing for +5V Input
- 300Ω Power-Off Source Impedance
- Output Current Limiting
- TTL/CMOS Compatible
The drivers feature true TTL/CMOS input compatibility, slew
rate-limited output, and 300Ω power-off source impedance.
The receivers can handle up to ±30V input, and have a 3kΩ
to 7kΩ input impedance. The receivers also feature
hysteresis to greatly improve noise rejection.
• Multiple Receivers
- ±30V Input Voltage Range
- 3kΩ to 7kΩ Input Impedance
- 0.5V Hysteresis to Improve Noise Rejection
Applications
• Any System Requiring High-Speed RS-232
Communications Port
- Computer - Portable, Mainframe, Laptop
- Peripheral - Printers and Terminals
- Instrumentation, UPS
- Modems, ISDN Terminal Adaptors
Selection Table
NUMBER OF
0.1µF
EXTERNAL
CAPACITORS
NUMBER OF
RECEIVERS
ACTIVE IN
NUMBER OF
RS-232
DRIVERS
NUMBER OF
RS-232
RECEIVERS
LOW POWER
SHUTDOWN/TTL
THREE-STATE
PART
NUMBER
POWER SUPPLY
VOLTAGE
SHUTDOWN
HIN202E
HIN206E
HIN207E
HIN208E
HIN211E
HIN213E
HIN232E
+5V
+5V
+5V
+5V
+5V
+5V
+5V
2
4
5
4
4
4
2
2
3
3
4
5
5
2
4 Capacitors
4 Capacitors
4 Capacitors
4 Capacitors
4 Capacitors
4 Capacitors
4 Capacitors
No/No
Yes/Yes
No/No
0
0
0
0
0
2
0
No/No
Yes/Yes
Yes/Yes
No/No
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003-2005. All Rights Reserved.
1
All other trademarks mentioned are the property of their respective owners.
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Ordering Information
Ordering Information (Continued)
TEMP.
RANGE
(°C)
TEMP.
RANGE
(°C)
PART
MARKING
PKG.
DWG. #
PART
MARKING
PKG.
DWG. #
PART NO.
HIN202ECB
PACKAGE
PART NO.
PACKAGE
HIN202ECB
0 to 70 16 Ld SOIC (W) M16.3
HIN206EIAZA-T HIN206EIAZ 24 Ld SSOP Tape and
M24.209
M24.209
M24.209
M24.209
(Note)
Reel (Pb-free)
HIN202ECB-T
HIN202ECB 16 Ld SOIC (W) Tape and M16.3
Reel
HIN207ECA-T
HIN207ECA 24 Ld SSOP Tape and
Reel
HIN202ECBZ
(Note)
202ECBZ
0 to 70 16 Ld SOIC (W) M16.3
(Pb-free)
HIN207ECAZ
(Note)
HIN207ECAZ 0 to 70 24 Ld SSOP
(Pb-free)
HIN202ECBZ-T 202ECBZ
(Note)
16 Ld SOIC (W) Tape and M16.3
Reel (Pb-free)
HIN207ECAZ-T HIN207ECAZ 24 Ld SSOP Tape and
(Note)
Reel (Pb-free)
HIN202ECBN
HIN202ECBN 0 to 70 16 Ld SOIC (N) M16.15
HIN207ECB
HIN207ECB-T
HIN207ECB
0 to 70 24 Ld SOIC
M24.3
M24.3
HIN202ECBN-T HIN202ECBN 16 Ld SOIC (N) Tape and M16.15
Reel
HIN207ECB 24 Ld SOIC Tape and
Reel
HIN202ECBNZ 202ECBNZ
(Note)
0 to 70 16 Ld SOIC (N) M16.15
(Pb-free)
HIN207ECBZ
(Note)
HIN207ECBZ 0 to 70 24 Ld SOIC
M24.3
M24.3
(Pb-free)
HIN202ECBNZ-T 202ECBNZ
(Note)
16 Ld SOIC (N) Tape and M16.15
Reel (Pb-free)
HIN207ECBZ-T HIN207ECBZ 24 Ld SOIC Tape and
(Note)
Reel (Pb-free)
HIN202ECP
HIN202ECP
202ECPZ
0 to 70 16 Ld PDIP
E16.3
E16.3
HIN207EIA
HIN207EIA
-40 to 85 24 Ld SSOP
M24.209
M24.209
HIN202ECPZ
(Note)
0 to 70 16 Ld PDIP*
(Pb-free)
HIN207EIAZ
(Note)
HIN207EIAZ -40 to 85 24 Ld SSOP
(Pb-free)
HIN202EIB
HIN202EIB
HIN202EIB
-40 to 85 16 Ld SOIC (W) M16.3
HIN207EIAZ-T
(Note)
HIN207EIAZ 24 Ld SSOP Tape and
Reel (Pb-free)
M24.209
HIN202EIB-T
16 Ld SOIC (W) Tape and M16.3
Reel
HIN207EIB
HIN207EIB
HIN207EIB
-40 to 85 24 Ld SOIC
M24.3
M24.3
HIN202EIBZ
(Note)
202EIBZ
202EIBZ
-40 to 85 16 Ld SOIC (W) M16.3
(Pb-free)
HIN207EIB-T
24 Ld SOIC Tape and
Reel
HIN202EIBZ-T
(Note)
16 Ld SOIC (W) Tape and M16.3
Reel (Pb-free)
HIN207EIBZ
(Note)
HIN207EIBZ -40 to 85 24 Ld SOIC
(Pb-free)
M24.3
M24.3
HIN202EIBN
HIN202EIBN -40 to 85 16 Ld SOIC (N) M16.15
HIN207EIBZ-T
(Note)
HIN207EIBZ 24 Ld SOIC Tape and
Reel (Pb-free)
HIN202EIBN-T HIN202EIBN 16 Ld SOIC (N) Tape and M16.15
Reel
HIN208ECA
HIN208ECA
0 to 70 24 Ld SSOP
M24.209
M24.209
HIN202EIBNZ
202EIBNZ
-40 to 85 16 Ld SOIC (N) M16.15
(Pb-free)
(Note)
HIN208ECA-T
HIN208ECA 24 Ld SSOP Tape and
Reel
HIN202EIBNZ-T 202EIBNZ
(Note)
16 Ld SOIC (N) Tape and M16.15
Reel (Pb-free)
HIN208ECAZ
(Note)
HIN208ECAZ 0 to 70 24 Ld SSOP
(Pb-free)
M24.209
M24.209
M24.209
HIN206ECB
HIN206ECB
0 to 70 24 Ld SOIC
M24.3
M24.3
HIN208ECAZ-T HIN208ECAZ 24 Ld SSOP Tape and
(Note) Reel (Pb-free)
HIN206ECB-T
HIN206ECB 24 Ld SOIC Tape and
Reel
HIN208ECAZA-T HIN208ECAZ 24 Ld SSOP Tape and
(Note)
HIN206ECBZ
(Note)
HIN206ECBZ 0 to 70 24 Ld SOIC
(Pb-free)
M24.3
M24.3
Reel (Pb-free)
HIN208ECB
HIN208ECB-T
HIN208ECB
0 to 70 24 Ld SOIC
M24.3
M24.3
HIN206ECBZ-T HIN206ECBZ 24 Ld SOIC Tape and
(Note)
Reel (Pb-free)
HIN208ECB 24 Ld SOIC Tape and
Reel
HIN206EIA
HIN206EIA
-40 to 85 24 Ld SSOP
M24.209
M24.209
HIN208ECBZ
(Note)
HIN208ECBZ 0 to 70 24 Ld SOIC
(Pb-free)
M24.3
M24.3
HIN206EIAZ
(Note)
HIN206EIAZ -40 to 85 24 Ld SSOP
(Pb-free)
HIN208ECBZ-T HIN208ECBZ 24 Ld SOIC Tape and
(Note)
HIN206EIAZ-T
(Note)
HIN206EIAZ 24 Ld SSOP Tape and
Reel (Pb-free)
M24.209
M24.209
Reel (Pb-free)
HIN208EIA
HIN208EIA-T
HIN208EIA
HIN208EIA
-40 to 85 24 Ld SSOP
M24.209
M24.209
HIN206EIAZA
(Note)
HIN206EIAZ -40 to 85 24 Ld SSOP
(Pb-free)
24 Ld SSOP Tape and
Reel
FN4315.16
2
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Ordering Information (Continued)
Ordering Information (Continued)
TEMP.
RANGE
(°C)
TEMP.
RANGE
(°C)
PART
MARKING
PKG.
DWG. #
PART
MARKING
PKG.
DWG. #
PART NO.
PACKAGE
PART NO.
HIN232ECA
PACKAGE
HIN208EIAZ
(Note)
HIN208EIAZ -40 to 85 24 Ld SSOP
(Pb-free)
M24.209
HIN232ECA
0 to 70 16 Ld SSOP
M16.209
M16.209
HIN232ECA-T
HIN232ECA 16 Ld SSOP Tape and
Reel
HIN208EIAZ-T
(Note)
HIN208EIAZ 24 Ld SSOP Tape and
Reel (Pb-free)
M24.209
HIN232ECAZ-T HIN232ECAZ 16 Ld SSOP Tape and
M16.209
HIN208EIB
HIN208EIB
-40 to 85 24 Ld SOIC
M24.3
M24.3
(Note)
Reel (Pb-free)
HIN208EIBZ
(Note)
HIN208EIBZ -40 to 85 24 Ld SOIC
(Pb-free)
HIN232ECB
HIN232ECB-T
HIN232ECB
0 to 70 16 Ld SOIC (W) M16.3
HIN232ECB 16 Ld SOIC (W) Tape and M16.3
Reel
HIN211ECA
HIN211ECA
0 to 70 28 Ld SSOP
M28.209
M28.209
HIN211ECA-T
HIN211ECA 28 Ld SSOP Tape and
Reel
HIN232ECBN
HIN232ECBN 0 to 70 16 Ld SOIC (N) M16.15
HIN232ECBN-T HIN232ECBN 16 Ld SOIC (N) Tape and M16.15
Reel
HIN211ECAZ
(Note)
HIN211ECAZ 0 to 70 28 Ld SSOP
(Pb-free)
M28.209
M28.209
HIN232ECBNZ 232ECBNZ
(Note)
0 to 70 16 Ld SOIC (N) M16.15
(Pb-free)
HIN211ECAZ-T HIN211ECAZ 28 Ld SSOP Tape and
(Note)
Reel (Pb-free)
HIN232ECBNZ-T 232ECBNZ
(Note)
16 Ld SOIC (N) Tape and M16.15
Reel (Pb-free)
HIN211ECB
HIN211ECB
0 to 70 28 Ld SOIC
M28.3
M28.3
HIN211ECBZ
(Note)
HIN211ECBZ 0 to 70 28 Ld SOIC
(Pb-free)
HIN232ECBZ
(Note)
232ECBZ
0 to 70 16 Ld SOIC (W) M16.3
(Pb-free)
HIN211ECBZ-T HIN211ECBZ 28 Ld SOIC Tape and
M28.3
HIN232ECBZ-T 232ECBZ
(Note)
16 Ld SOIC (W) Tape and M16.3
Reel (Pb-free)
(Note)
Reel (Pb-free)
HIN211EIA
HIN211EIA-T
HIN211EIA
HIN211EIA
-40 to 85 28 Ld SSOP
M28.209
M28.209
HIN232ECP
HIN232ECP
0 to 70 16 Ld PDIP
E16.3
E16.3
28 Ld SSOP Tape and
Reel
HIN232ECPZ
(Note)
HIN232ECPZ 0 to 70 16 Ld PDIP*
(Pb-free)
HIN211EIAZ
(Note)
HIN211EIAZ -40 to 85 28 Ld SSOP
(Pb-free)
M28.209
M28.209
HIN232EIBN
HIN232EIBN -40 to 85 16 Ld SOIC (N) M16.15
HIN232EIBN-T HIN232EIBN 16 Ld SOIC (N) Tape and M16.15
Reel
HIN211EIAZ-T
(Note)
HIN211EIAZ 28 Ld SSOP Tape and
Reel (Pb-free)
HIN232EIBNZ
(Note)
232EIBNZ
-40 to 85 16 Ld SOIC (N) M16.15
(Pb-free)
HIN211EIB
HIN211EIB
-40 to 85 28 Ld SOIC
M28.3
M28.3
HIN211EIBZ
(Note)
HIN211EIBZ -40 to 85 28 Ld SOIC
(Pb-free)
HIN232EIBNZ-T 232EIBNZ
(Note)
16 Ld SOIC (N) Tape and M16.15
Reel (Pb-free)
HIN213ECA
HIN213ECA
0 to 70 28 Ld SSOP
M28.209
M28.209
HIN232EIV
HIN232EIV
HIN232EIV
-40 to 85 16 Ld TSSOP M16.173
HIN213ECA-T
HIN213ECA 28 Ld SSOP Tape and
Reel
HIN232EIV-T
16 Ld TSSOP Tape and M16.173
Reel
HIN213ECAZ
(Note)
HIN213ECAZ 0 to 70 28 Ld SSOP
(Pb-free)
M28.209
M28.209
HIN232EIVZ
(Note)
232EIVZ
232EIVZ
-40 to 85 16 Ld TSSOP M16.173
(Pb-free)
HIN213ECAZ-T HIN213ECAZ 28 Ld SSOP Tape and
(Note)
HIN232EIVZ-T
(Note)
16 Ld TSSOP Tape and M16.173
Reel (Pb-free)
Reel (Pb-free)
HIN213EIA
HIN213EIA-T
HIN213EIA
HIN213EIA
-40 to 85 28 Ld SSOP
M28.209
M28.209
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
28 Ld SSOP Tape and
Reel
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
HIN213EIAZ
(Note)
HIN213EIAZ -40 to 85 28 Ld SSOP
(Pb-free)
M28.209
M28.209
HIN213EIAZ-T
(Note)
HIN213EIAZ 28 Ld SSOP Tape and
Reel (Pb-free)
HIN213EIB
HIN213EIB
-40 to 85 28 Ld SOIC
M28.3
M28.3
HIN213EIBZ
(Note)
HIN213EIBZ -40 to 85 28 Ld SOIC
(Pb-free)
FN4315.16
3
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Pinouts
HIN202E (PDIP, SOIC)
HIN206E (SOIC, SSOP)
TOP VIEW
TOP VIEW
1
2
24
23
22
21
20
19
18
17
T3
T1
T2
T4
OUT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
C1+
V+
V
CC
OUT
OUT
OUT
R2
IN
GND
T1
3
R2
OUT
C1-
C2+
C2-
V-
OUT
4
R1
SD
EN
IN
R1
R1
T1
IN
5
R1
OUT
OUT
6
T2
T1
T4
T3
IN
IN
IN
IN
IN
IN
7
T2
T2
R2
OUT
8
R3
GND
OUT
R2
OUT
IN
9
16 R3
V
IN
CC
10
11
12
15
14
13
V-
C1+
V+
C2-
C2+
C1-
+5V
9
+5V
16
0.1µF
10
+
12
V
+
+
CC
C1+
11
V+
V-
0.1µF
0.1µF
+5V TO 10V
VOLTAGE DOUBLER
V
1
CC
C1-
0.1µF
C1+
+
+
13
+
14
+
+
2
+5V TO 10V
VOLTAGE INVERTER
0.1µF
0.1µF
C2+
V+
V-
3
4
+10V TO -10V
VOLTAGE INVERTER
15
2
C1-
C2-
0.1µF
C2+
+5V
+10V TO -10V
VOLTAGE INVERTER
T1
T2
6
400kΩ
5
7
T1
T1
IN
C2-
OUT
0.1µF
+5V
+5V
T1
400kΩ
6
3
1
14
T2
400kΩ
T2
IN
11
OUT
T1
T1
IN
OUT
+5V
T3
T4
400kΩ
400kΩ
18
+5V
T2
T3
T4
T3
IN
OUT
OUT
400kΩ
10
12
7
T2
R1
T2
IN
OUT
+5V
19
5
24
4
T4
IN
13
R1
IN
OUT
R1
R1
IN
OUT
5kΩ
5kΩ
R1
5kΩ
5kΩ
R1
9
8
R2
R2
IN
OUT
22
23
R2
R2
R3
IN
OUT
R2
R2
GND
17
20
16
21
15
R3
IN
OUT
EN
5kΩ
R3
SD
GND
8
FN4315.16
November 4, 2005
4
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Pinouts (Continued)
HIN207E (SOIC, SSOP)
HIN208E (SOIC, SSOP)
TOP VIEW
TOP VIEW
T2
T1
T3
1
2
24
23
22
21
20
19
18
17
16
15
14
13
OUT
OUT
OUT
T3
T1
T2
1
2
3
4
5
6
7
8
9
24 T4
OUT
OUT
OUT
OUT
R3
R3
T4
IN
23 R2
IN
R2
3
IN
OUT
R2
T5
22
21
20
19
18
17
16
OUT
R2
4
OUT
IN
R1
IN
IN
T1
IN
T4
T3
T2
5
OUT
IN
R1
T5
T4
T3
OUT
OUT
IN
R1
6
OUT
T2
IN
R1
IN
7
IN
T1
IN
IN
R4
R4
V-
GND
8
OUT
IN
R3
R3
GND
OUT
IN
V
9
CC
V
CC
C1+
V+
10
11
12
C1+ 10
V+ 11
15 V-
C2-
14 C2-
13 C2+
C1-
C2+
C1- 12
+5V
+5V
9
9
0.1µF
10
+
12
V
+
+
CC
C1+
0.1µF
10
11
V
+
+
CC
C1+
V+
V-
0.1µF
0.1µF
+5V TO 10V
VOLTAGE DOUBLER
+
11
V+
0.1µF
0.1µF
C1-
+5V TO 10V
VOLTAGE DOUBLER
12
13
+
14
C1-
C2+
13
+10V TO -10V
VOLTAGE INVERTER
15
2
C2+
+
+10V TO -10V
VOLTAGE INVERTER
15
2
V-
C2-
0.1µF
14
C2-
0.1µF
+5V
T1
T2
400kΩ
5
+5V
T1
T1
T1
IN
OUT
400kΩ
7
T1
T1
IN
OUT
+5V
+5V
+5V
400kΩ
18
19
1
+5V
T2
T2
T2
IN
OUT
400kΩ
6
3
T2
T2
IN
OUT
T3
T4
400kΩ
400kΩ
24
+5V
+5V
+5V
T3
T4
T5
T3
T4
T3
IN
OUT
OUT
400kΩ
400kΩ
400kΩ
18
19
1
T3
T4
T5
T3
IN
OUT
OUT
OUT
21
6
20
7
T4
IN
24
T4
IN
R1
R1
IN
OUT
21
5
20
4
5kΩ
R1
T5
IN
4
22
17
3
R1
R1
IN
R2
R3
R4
OUT
R2
R3
R4
IN
IN
IN
OUT
OUT
OUT
5kΩ
5kΩ
R1
5kΩ
5kΩ
5kΩ
R2
R3
22
17
23
16
23
16
R2
R2
R3
IN
OUT
R2
R3
IN
OUT
5kΩ
R4
R3
GND
GND
8
8
FN4315.16
November 4, 2005
5
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Pinouts (Continued)
HIN211E (SOIC, SSOP)
HIN213E (SOIC, SSOP)
TOP VIEW
TOP VIEW
T3
T1
T2
1
2
3
4
5
6
7
8
9
28 T4
OUT
T3
T1
T2
1
2
3
4
5
6
7
8
9
28 T4
OUT
OUT
OUT
OUT
OUT
OUT
OUT
27 R3
26 R3
27 R3
IN
IN
26 R3
OUT
OUT
25 SD
24 EN
23 R4
R2
IN
25 SD
24 EN
23 R4
R2
IN
R2
R2
OUT
OUT
T2
IN
T2
IN
IN
IN
T1
IN
22 R4
21 T4
T1
IN
22 R4
21 T4
OUT
OUT
R1
R1
OUT
IN
IN
OUT
IN
IN
R1
IN
20
T3
R1
IN
20
T3
GND 10
11
19 R5
18 R5
17 V-
GND 10
11
19 R5
18 R5
17 V-
OUT
IN
OUT
IN
V
V
CC
CC
C1+ 12
V+ 13
C1+ 12
V+ 13
16 C2-
15 C2+
16 C2-
15 C2+
C1- 14
C1- 14
NOTE: R4 and R5 active in shutdown.
+5V
11
+5V
11
0.1µF
0.1µF
12
12
+
14
V
V
CC
+
+
+
+
CC
C1+
C1+
+
13
13
V+
V-
V+
V-
0.1µF
0.1µF
0.1µF
0.1µF
+5V TO 10V
VOLTAGE DOUBLER
+5V TO 10V
VOLTAGE DOUBLER
14
C1-
C1-
15
15
+
16
C2+
C2+
+
+10V TO -10V
VOLTAGE INVERTER
+10V TO -10V
VOLTAGE INVERTER
17
2
17
2
16
C2-
C2-
0.1µF
0.1µF
+5V
+5V
T1
T1
400kΩ
400kΩ
7
7
T1
T1
T1
IN
T1
IN
OUT
OUT
+5V
+5V
+5V
T2
T3
T4
+5V
+5V
+5V
T2
T3
T4
400kΩ
400kΩ
400kΩ
400kΩ
400kΩ
400kΩ
6
3
1
6
3
1
T2
T3
T4
T2
T3
T4
T2
IN
T2
IN
OUT
OUT
20
20
T3
IN
T3
IN
OUT
OUT
OUT
OUT
21
8
28
9
21
8
28
9
T4
IN
T4
IN
R1
R1
R1
R1
OUT
IN
IN
OUT
5kΩ
5kΩ
R1
R1
5
26
22
4
5
26
22
4
R2
R3
R4
R5
R2
R3
R4
R5
R2
R3
R4
R5
R2
R3
R4
R5
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
5kΩ
5kΩ
5kΩ
5kΩ
5kΩ
5kΩ
5kΩ
5kΩ
R2
R3
R4
R2
R3
R4
27
23
27
23
19
24
18
25
19
24
18
25
IN
IN
OUT
EN
OUT
EN
R5
R5
SD
SD
GND
GND
10
10
FN4315.16
November 4, 2005
6
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Pinouts (Continued)
HIN232E (PDIP, SOIC, SSOP, TSSOP)
TOP VIEW
+5V
16
V
1
2
3
4
5
6
7
8
16
15
14
13
12
1
CC
C1+
V+
V
CC
0.1µF
C1+
+
+
+
+
2
+5V TO 10V
VOLTAGE INVERTER
0.1µF
0.1µF
GND
T1
V+
V-
3
4
C1-
C1-
C2+
C2-
V-
OUT
C2+
R1
R1
T1
IN
+10V TO -10V
VOLTAGE INVERTER
6
5
C2-
0.1µF
OUT
11
10
9
IN
IN
+5V
T1
14
400kΩ
11
T2
T2
R2
OUT
T1
T1
IN
OUT
R2
IN
OUT
+5V
T2
400kΩ
10
12
7
T2
R1
T2
IN
OUT
13
R1
IN
OUT
OUT
5kΩ
5kΩ
R1
9
8
R2
R2
IN
R2
GND
15
Pin Des criptions
PIN
FUNCTION
V
Power Supply Input 5V ±10%, (5V ±5% HIN207E).
Internally generated positive supply (+10V nominal).
Internally generated negative supply (-10V nominal).
Ground Lead. Connect to 0V.
CC
V+
V-
GND
C1+
C1-
External capacitor (+ terminal) is connected to this lead.
External capacitor (- terminal) is connected to this lead.
External capacitor (+ terminal) is connected to this lead.
External capacitor (- terminal) is connected to this lead.
C2+
C2-
T
Transmitter Inputs. These leads accept TTL/CMOS levels. An internal 400kΩ pull-up resistor to V is connected to each lead.
IN
CC
T
Transmitter Outputs. These are RS-232 levels (nominally ±10V).
OUT
R
Receiver Inputs. These inputs accept RS-232 input levels. An internal 5kΩ pull-down resistor to GND is connected to each input.
Receiver Outputs. These are TTL/CMOS levels.
IN
R
OUT
EN, EN
SD, SD
Receiver Enable Input. With EN = 5V (HIN213E EN=0V), the receiver outputs are placed in a high impedance state.
Shutdown Input. With SD = 5V (HIN213E SD = 0V), the charge pump is disabled, the receiver outputs are in a high impedance
state (except R4 and R5 of HIN213E) and the transmitters are shut off.
NC
No Connect. No connections are made to these leads.
FN4315.16
7
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Absolute Maximum Ratings
Thermal Information
V
to Ground. . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) < V
< 6V
-0.3V) < V+ < 12V
Thermal Resistance (Typical, Note 1)
θJA (°C/W)
CC
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . .(V
CC
CC
16 Ld SOIC (N) Package . . . . . . . . . . . . . . . . . . . . .
16 Ld SOIC (W) Package. . . . . . . . . . . . . . . . . . . . .
16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . .
16 Ld PDIP Package* . . . . . . . . . . . . . . . . . . . . . . .
24 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
24 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
(SOIC and SSOP - Lead Tips Only)
110
100
155
145
90
75
135
70
V- to Ground . . . . . . . . . . . . . . . . . . . . . . .-12V < V- < (GND +0.3V)
Input Voltages
T
R
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V < V < (V+ +0.3V)
IN
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30V
IN
Output Voltages
T
R
. . . . . . . . . . . . . . . . . . . .(V- -0.3V) < V
. . . . . . . . . . . . . . . . . (GND -0.3V) < V
< (V+ +0.3V)
< (V+ +0.3V)
OUT
TXOUT
RXOUT
OUT
Short Circuit Duration
100
T
R
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous
OUT
OUT
ESD Classification . . . . . . . . . . . . . . . . . . . . See Specification Table
Operating Conditions
*Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
Temperature Range
HIN2XXECX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
HIN2XXEIX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ is measured with the component mounted on an evaluation PC board in free air.
JA
Electrical Specifications Test Conditions: V = +5V ±10%, (V = +5V ±5% HIN207E); C1-C4 = 0.1µF; T = Operating Temperature
CC
CC
A
Range
PARAMETER
SUPPLY CURRENTS
Power Supply Current, I
TEST CONDITIONS
MIN
TYP
MAX
UNITS
No Load,
HIN202E
-
-
8
15
20
mA
mA
CC
T
= 25°C
A
HIN206E - HIN208E, HIN211E,
HIN213E
11
HIN232E
-
-
-
5
1
10
10
50
mA
µA
µA
Shutdown Supply Current, I (SD)
CC
T
= 25°C
HIN206E, HIN211E
HIN213E
A
15
LOGIC AND TRANSMITTER INPUTS, RECEIVER OUTPUTS
Input Logic Low, V
T
T
, EN, SD, EN, SD
-
2.0
2.4
-
-
0.8
-
V
V
lL
IN
Input Logic High, V
-
lH
IN
EN, SD, EN, SD
= 0V
-
-
V
Transmitter Input Pullup Current, I
T
15
0.1
4.6
0.5
200
0.4
-
µA
V
P
IN
TTL/CMOS Receiver Output Voltage Low, V
I
I
= 1.6mA (HIN202E, HIN232E, I
= 3.2mA)
OUT
-
OL
OUT
OUT
TTL/CMOS Receiver Output Voltage High, V
TTL/CMOS Receiver Output Leakage
RECEIVER INPUTS
= -1mA
3.5
-
V
OH
EN = V , EN = 0, 0V < R
CC OUT
< V
±10
µA
CC
RS-232 Input Voltage Range, V
-30
-
+30
7.0
-
V
kΩ
V
IN
Receiver Input Impedance, R
T
= 25°C, V = ±3V
3.0
5.0
1.2
1.5
1.7
1.5
0.5
IN
A IN
Receiver Input Low Threshold, V (H-L)
V
= 5V,
Active Mode
-
IN
CC
= 25°C
T
A
Shutdown Mode HIN213E R4 and R5
Active Mode
-
-
-
V
Receiver Input High Threshold, V (L-H)
IN
V
= 5V,
2.4
2.4
1.0
V
CC
= 25°C
T
A
Shutdown Mode HIN213E R4 and R5
-
V
Receiver Input Hysteresis, V
V
= 5V, No Hysteresis in Shutdown Mode
CC
0.2
V
HYST
FN4315.16
8
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Electrical Specifications Test Conditions: V = +5V ±10%, (V = +5V ±5% HIN207E); C1-C4 = 0.1µF; T = Operating Temperature
CC
CC
A
Range (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
TIMING CHARACTERISTICS
Output Enable Time, t
HIN206E, HIN211E, HIN213E
-
-
600
200
4.0
0.5
0.5
20
-
ns
ns
EN
Output Disable Time, t
HIN206E, HIN211E, HIN213E
HIN213E SD = 0V, R4, R5
-
DIS
Transmitter, Receiver Propagation Delay, t
-
40
10
10
45
µs
PD
HIN213E SD = V , R1 - R5
CC
-
µs
All except HIN213E
-
µs
Transition Region Slew Rate, SR
R
= 3kΩ, C = 1000pF Measured from +3V to -3V
3
V/µs
T
L
L
or -3V to +3V, 1 Transmitter Switching (Note 2)
TRANSMITTER OUTPUTS
Output Voltage Swing, T
Transmitter Outputs, 3kΩ to Ground
±5
300
-
±9
-
±10
V
Ω
OUT
Output Resistance, T
V
= V+ = V- = 0V, V
= ±2V
OUT
-
-
OUT
CC
RS-232 Output Short Circuit Current, I
ESD PERFORMANCE
RS-232 Pins
T
Shorted to GND
±10
mA
SC
OUT
Human Body Model
-
-
-
-
±15
±8
-
-
-
-
kV
kV
kV
kV
(T
, R )
OUT IN
IEC61000-4-2 Contact Discharge
IEC61000-4-2 Air Gap (Note 3)
Human Body Model
±15
±2
All Other Pins
NOTES:
2. Guaranteed by design.
3. Meets Level 4.
Tes t Circuits (HIN232E)
+4.5V TO
+5.5V INPUT
C1+
1
2
3
16
V
CC
V+
15
14
GND
-
+
0.1µF
C3
C1-
T1
OUT
V
C1+
V+
1
2
3
4
5
6
7
8
16
CC
4 C2+
5 C2-
R1 13
IN
+
0.1µF
3kΩ
GND 15
R1
12
11
10
9
C1
-
OUT
T1
C1-
C2+
C2-
V-
14
13
12
11
T1 OUTPUT
OUT
T1
IN
6 V-
T2
R1
IN
RS-232 ±30V INPUT
TTL/CMOS OUTPUT
TTL/CMOS INPUT
+
0.1µF
T2
IN
7
8
OUT
C2
-
R1
OUT
R2
-
R2
OUT
+
IN
T1
IN
0.1µF C4
T2
TTL/CMOS INPUT
T2 10
IN
OUT
3kΩ
R
= V /I T2
IN
OUT
V
OUT
R2
9
TTL/CMOS OUTPUT
R2
OUT
IN
T1
OUT
T2
OUTPUT
= ±2V
A
IN
RS-232
±30V INPUT
FIGURE 1. GENERAL TEST CIRCUIT
FIGURE 2. POWER-OFF SOURCE RESISTANCE
CONFIGURATION
FN4315.16
9
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
VOLTAGE DOUBLER
VOLTAGE INVERTER
S5
S1
S2
C2+
C1+
V+ = 2V
S6
CC
V
GND
CC
+
+
+
+
C3
C2
C4
C1
-
-
-
-
V
GND
CC
GND
V- = - (V+)
C1-
S4
S3
C2-
S7
S8
RC
OSCILLATOR
FIGURE 3. CHARGE PUMP
and (V+ -0.6V). Each transmitter input has an internal 400kΩ
pullup resistor so any unused input can be left unconnected
and its output remains in its low state. The output voltage
swing meets the RS-232C specifications of ±5V minimum
with the worst case conditions of: all transmitters driving 3kΩ
Detailed Des cription
The HIN2XXE family of high-speed RS-232
transmitters/receivers are powered by a single +5V power
supply, feature low power consumption, and meet all ElA
RS232C and V.28 specifications. The circuit is divided into
three sections: the charge pump, transmitter, and receiver.
minimum load impedance, V
= 4.5V, and maximum
CC
allowable operating temperature. The transmitters have an
internally limited output slew rate which is less than 30V/µs.
The outputs are short circuit protected and can be shorted to
ground indefinitely. The powered down output impedance is
a minimum of 300Ω with ±2V applied to the outputs and
Charge Pump
An equivalent circuit of the charge pump is illustrated in
Figure 3. The charge pump contains two sections: the
voltage doubler and the voltage inverter. Each section is
driven by a two phase, internally generated clock to
generate +10V and -10V. The nominal clock frequency is
125kHz. During phase one of the clock, capacitor C1 is
V
= 0V.
CC
Receivers
The receiver inputs accept up to ±30V while presenting the
required 3kΩ to 7kΩ input impedance even if the power is off
charged to V . During phase two, the voltage on C1 is
CC
added to V , producing a signal across C3 equal to twice
CC
(V
= 0V). The receivers have a typical input threshold of
CC
V
. During phase two, C2 is also charged to 2V , and
CC
then during phase one, it is inverted with respect to ground
CC
1.3V which is within the ±3V limits, known as the transition
region, of the RS-232 specifications. The receiver output is
to produce a signal across C4 equal to -2V . The charge
pump accepts input voltages up to 5.5V. The output
impedance of the voltage doubler section (V+) is
approximately 200Ω, and the output impedance of the
voltage inverter section (V-) is approximately 450Ω. A typical
application uses 0.1µF capacitors for C1-C4, however, the
value is not critical. Increasing the values of C1 and C2 will
lower the output impedance of the voltage doubler and
inverter, increasing the values of the reservoir capacitors, C3
and C4, lowers the ripple on the V+ and V- supplies.
CC
0V to V . The output will be low whenever the input is
CC
greater than 2.4V and high whenever the input is floating or
driven between +0.8V and -30V. The receivers feature 0.5V
hysteresis (except during shutdown) to improve noise
rejection. The receiver Enable line EN, (EN on HIN213E)
when unasserted, disables the receiver outputs, placing
them in the high impedance mode. The receiver outputs are
also placed in the high impedance state when in shutdown
mode (except HIN213E R4 and R5).
During shutdown mode (HIN206E, HIN211E and HIN213E)
V+
the charge pump is turned off, V+ is pulled down to V , V-
CC
V
CC
is pulled up to GND, and the supply current is reduced to
less than 10µA. The transmitter outputs are disabled and the
receiver outputs (except for HIN213E, R4 and R5) are
placed in the high impedance state.
400kΩ
300Ω
T
XIN
XIN
T
OUT
GND < T
< V
CC
V- < V
< V+
TOUT
V-
Trans mitters
The transmitters are TTL/CMOS compatible inverters which
translate the inputs to RS-232 outputs. The input logic
FIGURE 4. TRANSMITTER
threshold is about 26% of V , or 1.3V for V
= 5V. A logic
CC CC
1 at the input results in a voltage of between -5V and V- at
the output, and a logic 0 results in a voltage between +5V
FN4315.16
November 4, 2005
10
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Application Information
V
CC
The HIN2XXE may be used for all RS-232 data terminal and
communication links. It is particularly useful in applications
where ±12V power supplies are not available for
R
XIN
R
OUT
-30V < R
< +30V
XIN
GND < V
< V
CC
5kΩ
ROUT
GND
conventional RS-232 interface circuits. The applications
presented represent typical interface configurations.
FIGURE 5. RECEIVER
A simple duplex RS-232 port with CTS/RTS handshaking is
illustrated in Figure 7. Fixed output signals such as DTR
(data terminal ready) and DSRS (data signaling rate select)
is generated by driving them through a 5kΩ resistor
connected to V+.
T
IN
OR
In applications requiring four RS-232 inputs and outputs
(Figure 8), note that each circuit requires two charge pump
capacitors (C1 and C2) but can share common reservoir
capacitors (C3 and C4). The benefit of sharing common
reservoir capacitors is the elimination of two capacitors and
the reduction of the charge pump source impedance which
effectively increases the output swing of the transmitters.
R
IN
T
OUT
OR
V
V
OL
OL
R
OUT
t
t
PLH
PHL
t
t
PHL + PLH
2
AVERAGE PROPAGATION DELAY =
FIGURE 6. PROPAGATION DELAY DEFINITION
+5V
-
HIN213E Operation in Shutdown
+
16
CTR (20) DATA
TERMINAL READY
1
The HIN213E features two receivers, R4 and R5, which
remain active in shutdown mode. During normal operation
the receivers propagation delay is typically 0.5µs. This
propagation delay may increase slightly during shutdown.
When entering shut down mode, receivers R4 and R5 are
+
C1
0.1µF
3
4
DSRS (24) DATA
SIGNALING RATE
SELECT
-
HIN232E
6
+
-
+
C2
0.1µF
RS-232
INPUTS AND OUTPUTS
5
-
T1
T2
11
14
not valid for 80µs after SD = V . When exiting shutdown
TD
TD (2) TRANSMIT DATA
IL
mode, all receiver outputs will be invalid until the charge
pump circuitry reaches normal operating voltage. This is
typically less than 2ms when using 0.1µF capacitors.
10
12
7
RTS (4) REQUEST TO SEND
RD (3) RECEIVE DATA
INPUTS RTS
OUTPUTS
13
RD
TTL/CMOS
R2
R1
9
8
CTS
CTS (5) CLEAR TO SEND
15
SIGNAL GROUND (7)
FIGURE 7. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS
HANDSHAKING
FN4315.16
November 4, 2005
11
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
1
4
+
+
C1
0.1µF
C2
0.1µF
HIN232E
5
3
-
-
T1
T2
11
14
TD
RTS
RD
TD (2) TRANSMIT DATA
RTS (4) REQUEST TO SEND
RD (3) RECEIVE DATA
10
12
7
INPUTS
OUTPUTS
TTL/CMOS
13
R2
R1
9
8
CTS
CTS (5) CLEAR TO SEND
15
V
16
CC
6
6
2
2
C4
C3
+5V
-
-
V- V+
RS-232
INPUTS AND OUTPUTS
0.2µF
0.2µF
V
16
4
CC
HIN232E
1
+
+
C1
C2
5
0.1µF
3
0.1µF
-
-
T1
T2
11
14
DTR
DSRS
DCD
R1
DTR (20) DATA TERMINAL READY
DSRS (24) DATA SIGNALING RATE SELECT
DCD (8) DATA CARRIER DETECT
R1 (22) RING INDICATOR
10
12
7
INPUTS
OUTPUTS
TTL/CMOS
13
R2
R1
9
8
15
SIGNAL GROUND (7)
FIGURE 8. COMBINING TWO HIN232Es FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS
Typical Performance Curves
12
10
8
12
10
8
0.1µF
V+ (V
CC
= 5V)
6
6
V+ (V
= 4V)
= 5V)
CC
V- (V
= 4V)
CC
4
4
T
= 25°C
A
2
2
V- (V
CC
TRANSMITTER OUTPUTS
OPEN CIRCUIT
0
0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
0
5
10
15
|I
20
25
30
35
V
| (mA)
CC
LOAD
FIGURE 9. V- SUPPLY VOLTAGE vs V
FIGURE 10. V+, V- OUTPUT VOLTAGE vs LOAD
CC
FN4315.16
12
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Die Characteris tics
METALLIZATION:
PASSIVATION:
Type: Al
Thickness: 10kÅ ±1kÅ
Type: Nitride over Silox
Nitride Thickness: 8kÅ
Silox Thickness: 7kÅ
SUBSTRATE POTENTIAL
TRANSISTOR COUNT:
GND
185
PROCESS:
CMOS Metal Gate
Metallization Mas k Layout
HIN232E
V-
C2-
C2+
C1-
PIN 6
PIN 5
PIN 4
PIN 3
PIN 2 V+
PIN 1 C1+
T2
PIN 7
PIN 8
OUT
R2
IN
T3
PIN 9
OUT
PIN 17 V
CC
R2
PIN 10
OUT
PIN 11
T2
PIN 12
T1
PIN 13
PIN 14
R1
PIN 15
T1
OUT
PIN 16
GND
R1
IN
IN
OUT
IN
FN4315.16
13
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Dual-In-Line Plas tic Packages (PDIP)
E16.3 (JEDEC MS-001-BB ISSUE D)
N
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE
E1
INDEX
AREA
INCHES
MILLIMETERS
1 2
3
N/2
SYMBOL
MIN
MAX
0.210
-
MIN
-
MAX
5.33
-
NOTES
-B-
A
A1
A2
B
-
4
-A-
0.015
0.115
0.014
0.045
0.008
0.735
0.005
0.300
0.240
0.39
2.93
0.356
1.15
0.204
18.66
0.13
7.62
6.10
4
D
E
BASE
PLANE
0.195
0.022
0.070
0.014
0.775
-
4.95
0.558
1.77
0.355
19.68
-
-
A2
A
-C-
-
SEATING
PLANE
B1
C
8, 10
L
C
L
-
D1
B1
eA
A1
A
D1
e
D
5
eC
C
B
D1
E
5
eB
0.010 (0.25) M
C
B S
0.325
0.280
8.25
7.11
6
NOTES:
E1
e
5
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
0.100 BSC
0.300 BSC
2.54 BSC
7.62 BSC
-
e
A
6
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
e
-
0.430
0.150
-
10.92
3.81
7
B
L
0.115
2.93
4
9
4. Dimensions A, A1 and L are measured with the package seated in JE-
N
16
16
DEC seating plane gauge GS-3.
Rev. 0 12/93
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
e
6. E and
are measured with the leads constrained to be perpendic-
A
-C-
ular to datum
.
7. e and e are measured at the lead tips with the leads unconstrained.
B
C
e
must be zero or greater.
C
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
FN4315.16
14
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Small Outline Plastic Packages (SOIC)
M16.15 (JEDEC MS-012-AC ISSUE C)
N
16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
SYMBOL
MIN
MAX
0.0688
0.0098
0.020
MIN
1.35
0.10
0.33
0.19
9.80
3.80
MAX
1.75
NOTES
-B-
A
A1
B
C
D
E
e
0.0532
0.0040
0.013
-
1
2
3
0.25
-
L
0.51
9
SEATING PLANE
A
0.0075
0.3859
0.1497
0.0098
0.3937
0.1574
0.25
-
-A-
10.00
4.00
3
h x 45°
D
4
-C-
0.050 BSC
1.27 BSC
-
α
H
h
0.2284
0.0099
0.016
0.2440
0.0196
0.050
5.80
0.25
0.40
6.20
0.50
1.27
-
e
A1
C
5
B
0.10(0.004)
L
6
0.25(0.010) M
C
A M B S
N
α
16
16
7
0°
8°
0°
8°
-
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Rev. 1 6/05
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
FN4315.16
15
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Thin Shrink Small Outline Plas tic Packages (TSSOP)
M16.173
N
16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
E
INCHES
MIN
MILLIMETERS
E1
-B-
GAUGE
PLANE
SYMBOL
MAX
0.043
0.006
0.037
0.012
0.008
0.201
0.177
MIN
-
MAX
1.10
0.15
0.95
0.30
0.20
5.10
4.50
NOTES
A
A1
A2
b
-
-
0.002
0.033
0.0075
0.0035
0.193
0.169
0.05
0.85
0.19
0.09
4.90
4.30
-
1
2
3
-
L
0.25
0.010
0.05(0.002)
SEATING PLANE
A
9
-A-
c
-
D
D
3
-C-
E1
e
4
α
0.026 BSC
0.65 BSC
-
A2
e
A1
c
E
0.246
0.020
0.256
0.028
6.25
0.50
6.50
0.70
-
b
0.10(0.004)
L
6
0.10(0.004) M
C
A M B S
N
16
16
7
o
o
o
o
0
8
0
8
-
α
NOTES:
Rev. 1 2/02
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AB, Issue E.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.15mm (0.006
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact. (Angles in degrees)
FN4315.16
16
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Small Outline Plastic Packages (SSOP)
M16.209 (JEDEC MO-150-AC ISSUE B)
N
16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
GAUGE
PLANE
SYMBOL
MIN
-
MAX
0.078
-
MIN
-
MAX
2.00
-
NOTES
-B-
A
A1
A2
B
-
0.002
0.065
0.009
0.004
0.233
0.197
0.05
1.65
0.22
0.09
5.90
5.00
-
1
2
3
0.072
0.014
0.009
0.255
0.220
1.85
0.38
0.25
6.50
5.60
-
L
0.25
SEATING PLANE
A
9
0.010
A2
-A-
C
D
E
-
D
3
-C-
4
α
e
0.026 BSC
0.65 BSC
-
e
A1
C
H
L
0.292
0.022
0.322
0.037
7.40
0.55
8.20
0.95
-
B
0.10(0.004)
6
0.25(0.010) M
C
A M B S
N
α
16
16
7
0°
8°
0°
8°
-
NOTES:
Rev. 3 6/05
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimen-
sion at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
FN4315.16
17
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Small Outline Plastic Packages (SOIC)
M16.3 (JEDEC MS-013-AA ISSUE C)
N
16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
SYMBOL
MIN
MAX
MIN
2.35
0.10
0.33
0.23
10.10
7.40
MAX
2.65
NOTES
-B-
A
A1
B
C
D
E
e
0.0926
0.0040
0.013
0.1043
0.0118
0.0200
0.0125
0.4133
0.2992
-
0.30
-
1
2
3
L
0.51
9
SEATING PLANE
A
0.0091
0.3977
0.2914
0.32
-
-A-
10.50
7.60
3
h x 45°
D
4
-C-
0.050 BSC
1.27 BSC
-
α
H
h
0.394
0.010
0.016
0.419
0.029
0.050
10.00
0.25
0.40
10.65
0.75
1.27
-
e
A1
C
5
B
0.10(0.004)
L
6
0.25(0.010) M
C
A M B S
N
α
16
16
7
0°
8°
0°
8°
-
NOTES:
Rev. 1 6/05
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm (0.024
inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
FN4315.16
18
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Shrink Small Outline Plas tic Packages (SSOP)
M24.209 (JEDEC MO-150-AG ISSUE B)
N
24 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
GAUGE
PLANE
SYMBOL
MIN
MAX
MIN
-
MAX
2.00
-
NOTES
-B-
A
A1
A2
B
-
0.078
-
-
0.002
0.065
0.009
0.004
0.312
0.197
-
0.05
1.65
0.22
0.09
7.90
5.00
1
2
3
0.072
0.014
0.009
0.334
0.220
1.85
0.38
0.25
8.50
5.60
-
L
0.25
0.010
SEATING PLANE
A
9
-
-A-
C
D
E
D
3
4
-
-C-
α
µ
e
0.026 BSC
0.65 BSC
A2
e
A1
C
H
L
0.292
0.322
0.037
7.40
0.55
8.20
0.95
-
B
0.10(0.004)
0.022
6
7
-
0.25(0.010) M
C A M B S
N
α
24
24
o
o
o
o
0
8
0
8
NOTES:
Rev. 1 3/95
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.20mm
(0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimen-
sion at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
FN4315.16
19
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Small Outline Plas tic Packages (SOIC)
M24.3 (JEDEC MS-013-AD ISSUE C)
N
24 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
SYMBOL
MIN
MAX
MIN
2.35
0.10
0.33
0.23
MAX
2.65
0.30
0.51
0.32
15.60
7.60
NOTES
-B-
A
A1
B
C
D
E
e
0.0926
0.0040
0.013
0.1043
0.0118
0.020
-
-
1
2
3
L
9
SEATING PLANE
A
0.0091
0.5985
0.2914
0.0125
-
-A-
o
0.6141 15.20
3
h x 45
D
0.2992
7.40
4
-C-
0.05 BSC
1.27 BSC
-
α
µ
H
h
0.394
0.010
0.016
0.419
0.029
0.050
10.00
0.25
0.40
10.65
0.75
1.27
-
e
A1
C
5
B
0.10(0.004)
L
6
0.25(0.010) M
C A M B S
N
α
24
24
7
o
o
o
o
0
8
0
8
-
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
Rev. 0 12/93
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
FN4315.16
20
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Shrink Small Outline Plastic Packages (SSOP)
M28.209 (JEDEC MO-150-AH ISSUE B)
N
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
GAUGE
PLANE
SYMBOL
MIN
-
MAX
0.078
-
MIN
-
MAX
2.00
-
NOTES
-B-
A
A1
A2
B
-
0.002
0.065
0.009
0.004
0.390
0.197
0.05
1.65
0.22
0.09
9.90
5.00
-
1
2
3
0.072
0.014
0.009
0.413
0.220
1.85
0.38
0.25
10.50
5.60
-
L
0.25
SEATING PLANE
A
9
0.010
A2
-A-
C
D
E
-
D
3
-C-
4
α
e
0.026 BSC
0.65 BSC
-
e
A1
C
H
L
0.292
0.022
0.322
0.037
7.40
0.55
8.20
0.95
-
B
0.10(0.004)
6
0.25(0.010) M
C
A M B S
N
α
28
28
7
NOTES:
0°
8°
0°
8°
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
Rev. 2 6/05
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess of
“B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
FN4315.16
21
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Small Outline Plas tic Packages (SOIC)
M28.3 (JEDEC MS-013-AE ISSUE C)
N
28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
SYMBOL
MIN
MAX
MIN
2.35
0.10
0.33
0.23
MAX
2.65
0.30
0.51
0.32
18.10
7.60
NOTES
-B-
A
A1
B
C
D
E
e
0.0926
0.0040
0.013
0.1043
0.0118
0.0200
0.0125
-
-
1
2
3
L
9
SEATING PLANE
A
0.0091
0.6969
0.2914
-
0.7125 17.70
3
-A-
o
h x 45
D
0.2992
7.40
4
0.05 BSC
1.27 BSC
-
-C-
α
µ
H
h
0.394
0.01
0.419
0.029
0.050
10.00
0.25
0.40
10.65
0.75
1.27
-
e
A1
C
5
B
0.10(0.004)
L
0.016
6
0.25(0.010) M
C A M B S
N
α
28
28
7
o
o
o
o
0
8
0
8
-
NOTES:
Rev. 0 12/93
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. In-
terlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN4315.16
22
November 4, 2005
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