HGTG12N60C3D [INTERSIL]
24A, 600V, UFS Series N-Channel IGBT with Anti-Parallel Hyperfast Diode; 24A , 600V , UFS系列N沟道IGBT与反并联二极管超高速型号: | HGTG12N60C3D |
厂家: | Intersil |
描述: | 24A, 600V, UFS Series N-Channel IGBT with Anti-Parallel Hyperfast Diode |
文件: | 总7页 (文件大小:101K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HGTG12N60C3D
Data Sheet
January 2000
File Number 4043.2
24A, 600V, UFS Series N-Channel IGBT
with Anti-Parallel Hyperfast Diode
Features
o
• 24A, 600V at T = 25 C
C
The HGTG12N60C3D is a MOS gated high voltage switching
device combining the best features of MOSFETs and bipolar
transistors. The device has the high input impedance of a
MOSFET and the low on-state conduction loss of a bipolar
transistor. The much lower on-state voltage drop varies only
moderately between 25 C and 150 C. The IGBT used is the
development type TA49123. The diode used in anti parallel
with the IGBT is the development type TA49061.
o
• Typical Fall Time. . . . . . . . . . . . . . . . 210ns at T = 150 C
J
• Short Circuit Rating
• Low Conduction Loss
• Hyperfast Anti-Parallel Diode
o
o
Packaging
JEDEC STYLE TO-247
The IGBT is ideal for many high voltage switching
applications operating at moderate frequencies where low
conduction losses are essential.
E
C
G
Formerly Developmental Type TA49117.
Ordering Information
PART NUMBER
PACKAGE
BRAND
G12N60C3D
HGTG12N60C3D
TO-247
NOTE: When ordering, use the entire part number.
Symbol
C
G
E
INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS
4,364,073
4,598,461
4,682,195
4,803,533
4,888,627
4,417,385
4,605,948
4,684,413
4,809,045
4,890,143
4,430,792
4,620,211
4,694,313
4,809,047
4,901,127
4,443,931
4,631,564
4,717,679
4,810,665
4,904,609
4,466,176
4,639,754
4,743,952
4,823,176
4,933,740
4,516,143
4,639,762
4,783,690
4,837,606
4,963,951
4,532,534
4,641,162
4,794,432
4,860,080
4,969,027
4,587,713
4,644,637
4,801,986
4,883,767
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 2000
1
HGTG12N60C3D
o
Absolute Maximum Ratings T = 25 C, Unless Otherwise Specified
C
HGTG12N60C3D
UNITS
Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BV
600
V
CES
Collector Current Continuous
o
At T = 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
C
24
A
A
A
A
V
V
C25
C110
(AVG)
o
At T = 110 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
C
12
o
Average Diode Forward Current at 110 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
15
Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
96
±20
CM
GES
GEM
Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
o
±30
Switching Safe Operating Area at T = 150 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SSOA
J
24A at 600V
104
o
Power Dissipation Total at T = 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
C
W
D
o
o
Power Dissipation Derating T > 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0.83
W/ C
C
o
Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . T , T
-40 to 150
260
C
J
STG
o
Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
C
L
SC
SC
Short Circuit Withstand Time (Note 2) at V
Short Circuit Withstand Time (Note 2) at V
= 15V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t
= 10V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . t
4
µs
µs
GE
13
GE
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature.
o
2. V
= 360V, T = 125 C, R = 25Ω.
J G
CE(PK)
o
Electrical Specifications
T = 25 C, Unless Otherwise Specified
C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
-
MAX
-
UNITS
Collector to Emitter Breakdown Voltage
Emitter to Collector Breakdown Voltage
Collector to Emitter Leakage Current
BV
BV
I
I
= 250µA, V
= 0V
600
V
V
CES
ECS
C
GE
= 10mA, V
= 0V
T
15
25
-
C
GE
o
I
V
V
= BV
= BV
= 25 C
-
-
250
2.0
2.0
2.2
2.2
2.4
6.0
µA
mA
V
CES
CE
CE
CES
C
C
C
C
C
C
C
o
T
= 150 C
-
-
CES
o
Collector to Emitter Saturation Voltage
V
I
= I
,
T
= 25 C
-
1.65
1.85
1.80
2.0
5.0
CE(SAT)
C
C110
= 15V
V
o
GE
T
= 150 C
-
-
V
o
I
= 15A,
T
= 25 C
V
C
V
= 15V
o
GE
T
= 150 C
-
V
o
Gate to Emitter Threshold Voltage
V
I
= 250µA,
T
= 25 C
3.0
V
GE(TH)
C
V
= V
GE
CE
Gate to Emitter Leakage Current
Switching SOA
I
V
= ±20V
-
-
-
-
±100
nA
A
GES
GE
o
SSOA
T = 150 C,
V
V
= 480V
80
24
-
-
J
CE(PK)
V
= 15V,
= 25Ω,
GE
= 600V
A
CE(PK)
R
G
L = 100µH
Gate to Emitter Plateau Voltage
On-State Gate Charge
V
I
I
= I
= I
, V
C110 CE
= 0.5 BV
CES
-
-
-
-
-
-
-
-
-
-
7.6
48
-
55
71
-
V
nC
nC
ns
ns
ns
ns
µJ
µJ
V
GEP
C
Q
,
V
GE
= 15V
= 20V
G(ON)
C
C110
V
= 0.5 BV
CE
CES
V
62
GE
o
Current Turn-On Delay Time
Current Rise Time
t
T = 150 C,
14
d(ON)I
J
I
= I
CE
C110,
= 0.8 BV
t
16
-
rI
V
V
R
CE(PK)
CES,
Current Turn-Off Delay Time
Current Fall Time
t
270
210
380
900
1.7
400
275
-
d(OFF)I
= 15V,
GE
= 25Ω,
t
G
fI
L = 100µH
Turn-On Energy
E
ON
Turn-Off Energy (Note 3)
Diode Forward Voltage
E
-
OFF
V
I
= 12A
2.0
EC
EC
2
HGTG12N60C3D
o
Electrical Specifications
T = 25 C, Unless Otherwise Specified (Continued)
C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
34
30
-
MAX
42
UNITS
ns
Diode Reverse Recovery Time
t
I
I
= 12A, dI /dt = 100A/µs
-
-
-
-
rr
EC
EC
= 1.0A, dI /dt = 100A/µs
37
ns
EC
EC
o
Thermal Resistance
NOTE:
R
IGBT
1.2
1.5
C/W
θJC
o
Diode
-
C/W
3. Turn-Off Energy Loss (E
) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse, and ending
OFF
at the point where the collector current equals zero (I
= 0A). The HGTG12N60C3D was tested per JEDEC Standard No. 24-1 Method for
CE
Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. Turn-On losses include
diode losses.
Typical Performance Curves
o
80
70
PULSE DURATION = 250µs, DUTY CYCLE <0.5%, T = 25 C
C
DUTY CYCLE <0.5%, V
CE
= 10V
80
70
V
= 15.0V
PULSE DURATION = 250µs
GE
12.0V
60
50
40
30
60
50
o
T
= 150 C
C
10.0V
9.0V
o
40
30
20
T
= 25 C
C
o
T
= -40 C
C
20
8.5V
8.0V
10
0
10
0
7.5V
7.0V
4
6
8
10
12
14
0
2
4
6
8
10
V
, GATE TO EMITTER VOLTAGE (V)
GE
V , COLLECTOR TO EMITTER VOLTAGE (V)
CE
FIGURE 1. TRANSFER CHARACTERISTICS
FIGURE 2. SATURATION CHARACTERISTICS
80
70
80
PULSE DURATION = 250µs
PULSE DURATION = 250µs
DUTY CYCLE <0.5%, V
= 15V
DUTY CYCLE <0.5%, V
= 10V
GE
70
60
50
40
30
20
10
GE
o
T
= -40 C
60
50
40
30
20
C
o
T
= 25 C
C
o
o
= -40 C
T
= 150 C
T
C
C
o
T
= 150 C
C
o
T
= 25 C
C
10
0
0
0
1
2
3
4
5
0
1
2
3
4
5
V
, COLLECTOR TO EMITTER VOLTAGE (V)
V , COLLECTOR TO EMITTER VOLTAGE (V)
CE
CE
FIGURE 3. COLLECTOR TO EMITTER ON-STATE VOLTAGE
FIGURE 4. COLLECTOR TO EMITTER ON-STATE VOLTAGE
3
HGTG12N60C3D
Typical Performance Curves (Continued)
25
20
15
140
120
100
V
= 15V
o
GE
V
= 360V, R = 25Ω, T = 125 C
G J
CE
20
15
I
SC
80
60
10
5
10
5
40
20
t
SC
0
25
50
75
100
125
150
10
11
12
13
14
15
o
T
, CASE TEMPERATURE ( C)
V
, GATE TO EMITTER VOLTAGE (V)
C
GE
FIGURE 5. MAXIMUM DC COLLECTOR CURRENT vs CASE
TEMPERATURE
FIGURE 6. SHORT CIRCUIT WITHSTAND TIME
100
o
400
300
T
= 150 C, R = 25Ω, L = 100µH, V
= 480V
CE(PK)
J
G
o
T
= 150 C, R = 25Ω, L = 100mH, V
= 480V
J
G
CE(PK)
V
= 15V
GE
50
V
= 10V
GE
V
= 10V
= 15V
GE
200
100
30
20
V
GE
10
5
10
15
20
25
30
5
10
15
20
25
30
I
, COLLECTOR TO EMITTER CURRENT (A)
I
CE
, COLLECTOR TO EMITTER CURRENT (A)
CE
FIGURE 7. TURN-ON DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
FIGURE 8. TURN-OFF DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
200
300
o
= 150 C, R = 25Ω, L = 100µH, V = 480V
CE(PK)
o
= 150 C, R = 25Ω, L = 100µH, V = 480V
CE(PK)
T
T
J
G
J
G
100
V
= 10V
GE
200
V
= 10V or 15V
GE
V
= 15V
GE
10
5
100
90
80
5
10
15
20
25
30
5
10
15
20
25
30
I
, COLLECTOR TO EMITTER CURRENT (A)
I
CE
, COLLECTOR TO EMITTER CURRENT (A)
CE
FIGURE 9. TURN-ON RISE TIME vs COLLECTOR TO
EMITTER CURRENT
FIGURE 10. TURN-OFF FALL TIME vs COLLECTOR TO
EMITTER CURRENT
4
HGTG12N60C3D
Typical Performance Curves (Continued)
3.0
2.5
2.0
o
o
= 150 C, R = 25Ω, L = 100µH, V = 480V
CE(PK)
T
= 150 C, R = 25Ω, L = 100µH, V = 480V
CE(PK)
T
J
G
J
G
1.5
1.0
2.0
1.5
V
= 10V
GE
V
= 10V OR 15V
GE
1.0
0.5
V
= 15V
GE
0.5
0
0
5
10
15
20
25
30
5
10
15
20
25
30
I
, COLLECTOR TO EMITTER CURRENT (A)
I
, COLLECTOR TO EMITTER CURRENT (A)
CE
CE
FIGURE 11. TURN-ON ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
FIGURE 12. TURN-OFF ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
100
80
o
200
T
= 150 C, V = 15V, R = 25Ω, L = 100µH
GE G
o
o
J
T
= 150 C, T = 75 C
C
J
R
= 25Ω, L = 100µH
G
100
V
= 10V
GE
V
= 15V
GE
60
LIMITED BY
CIRCUIT
f
= 0.05/(t
D(OFF)I
+ t )
D(ON)I
MAX1
10
40
20
f
= (P - P )/(E
+ E
)
OFF
MAX2
D
C
ON
P
= ALLOWABLE DISSIPATION
D
P
= CONDUCTION DISSIPATION
C
(DUTY FACTOR = 50%)
o
R
= 1.2 C/W
θJC
0
1
0
100
200
300
400
500
600
5
10
20
30
V
, COLLECTOR TO EMITTER VOLTAGE (V)
CE(PK)
I
, COLLECTOR TO EMITTER CURRENT (A)
CE
FIGURE 13. OPERATING FREQUENCY vs COLLECTOR TO
EMITTER CURRENT
FIGURE 14. SWITCHING SAFE OPERATING AREA
o
I
= 1.276mA, R = 50Ω, T = 25 C
2500
G(REF)
L
C
FREQUENCY = 1MHz
15
12
600
480
C
IES
2000
1500
1000
V
= 600V
CE
360
240
9
6
V
= 400V
CE
V
= 200V
CE
500
0
120
0
3
0
C
OES
C
RES
0
5
10
15
20
25
0
10
20
30
40
50
60
V
, COLLECTOR TO EMITTER VOLTAGE (V)
Q
, GATE CHARGE (nC)
CE
G
FIGURE 15. CAPACITANCE vs COLLECTOR TO EMITTER
VOLTAGE
FIGURE 16. GATE CHARGE WAVEFORMS
5
HGTG12N60C3D
Typical Performance Curves (Continued)
0
10
0.5
0.2
0.1
t
1
-1
P
D
10
0.05
t
2
0.02
0.01
DUTY FACTOR, D = t / t
1
2
PEAK T = (P X Z
X R
) + T
JC C
J
D
JC
θ
θ
SINGLE PULSE
-2
10
-5
-4
-3
-2
-1
10
0
1
10
10
10
10
10
10
t , RECTANGULAR PULSE DURATION (s)
1
FIGURE 17. IGBT NORMALIZED TRANSIENT THERMAL IMPEDANCE, JUNCTION TO CASE
50
40
30
20
o
T
= 25 C, dI /dt = 100A/µs
C
EC
40
30
t
rr
o
t
100 C
a
20
o
o
t
150 C
b
25 C
10
0
10
0
0
5
I
10
15
20
0
0.5
1.0
1.5
2.0
2.5
3.0
, FORWARD CURRENT (A)
V
, FORWARD VOLTAGE (V)
EC
EC
FIGURE 18. DIODE FORWARD CURRENT vs FORWARD
VOLTAGE DROP
FIGURE 19. RECOVERY TIMES vs FORWARD CURRENT
Test Circuit and Waveform
L = 100µH
90%
RHRP1560
10%
V
V
GE
E
E
OFF
ON
R
= 25Ω
G
CE
+
90%
V
= 480V
DD
-
10%
d(OFF)I
I
CE
t
t
rI
t
fI
t
d(ON)I
FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT
FIGURE 21. SWITCHING TEST WAVEFORMS
6
HGTG12N60C3D
Operating Frequency Information
Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge
built in the handler’s body capacitance is not discharged
through the device. With proper handling and application
procedures, however, IGBTs are currently being extensively
used in production by numerous equipment manufacturers in
military, industrial and consumer applications, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the following basic precautions are
taken:
Operating frequency information for a typical device (Figure 13)
is presented as a guide for estimating device performance
for a specific application. Other typical frequency vs collector
current (I ) plots are possible using the information shown
CE
for a typical unit in Figures 4, 7, 8, 11 and 12. The operating
frequency plot (Figure 13) of a typical device shows f
or
MAX1
whichever is smaller at each point. The information is
f
MAX2
based on measurements of a typical device and is bounded
by the maximum rated junction temperature.
f
is defined by f
MAX1
= 0.05/(t
D(OFF)I
+ t ).
D(ON)I
MAX1
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “ECCOSORBD LD26” or equivalent.
are possible. t
D(OFF)I
and t
are defined in Figure 21.
D(ON)I
Device turn-off delay can establish an additional frequency
limiting condition for an application other than T . t
is important when controlling output ripple under a lightly
JM D(OFF)I
2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means, for example, with a metallic wristband.
loaded condition.
f
is defined by f
MAX2
= (P - P )/(E
OFF
+ E ). The
ON
MAX2
D
C
3. Tips of soldering irons should be grounded.
allowable dissipation (P ) is defined by P = (T - T )/R
.
D
D
JM θJC
C
The sum of device switching and conduction losses must not
4. Devices should never be inserted into or removed from
circuits with power on.
exceed P . A 50% duty factor was used (Figure 13) and the
D
conduction losses (P ) are approximated by
C
5. Gate Voltage Rating - Never exceed the gate-voltage
P
= (V x I )/2.
rating of V
. Exceeding the rated V can result in
C
CE CE
GEM
GE
permanent damage to the oxide layer in the gate region.
E
and E are defined in the switching waveforms
ON
OFF
6. Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate open-
circuited or floating should be avoided. These conditions
can result in turn-on of the device due to voltage buildup on
the input capacitor due to leakage currents or pickup.
shown in Figure 21. E
is the integral of the instantaneous
ON
power loss (I
CE
x V ) during turn-on and E
is the
OFF
CE
integral of the instantaneous power loss during turn-off. All
tail losses are included in the calculation for E ; i.e. the
OFF
collector current equals zero (I
= 0).
CE
7. Gate Protection - These devices do not have an internal
monolithic Zener Diode from gate to emitter. If gate
protection is required an external Zener is recommended.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
ECCOSORBD is a Trademark of Emerson and Cumming, Inc.
7
相关型号:
©2020 ICPDF网 联系我们和版权申明