HFA1100883 [INTERSIL]
850MHz Current Feedback Amplifier; 850MHz的电流反馈放大器型号: | HFA1100883 |
厂家: | Intersil |
描述: | 850MHz Current Feedback Amplifier |
文件: | 总16页 (文件大小:381K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TM
HFA1100/883
850MHz Current Feedback Amplifier
July 1994
Features
Description
• This Circuit is Processed in Accordance to MIL-STD- The HFA1100/883 is a high speed, wideband, fast settling
883 and is Fully Conformant Under the Provisions of current feedback amplifier. Built with Intersil’ proprietary,
Paragraph 1.2.1.
complementary bipolar UHF-1 process, it is the fastest
monolithic amplifier available from any semiconductor manu-
facturer.
• Low Distortion (HD3, 30MHz) . . . . . . . . . . -84dBc (Typ)
• Wide -3dB Bandwidth . . . . . . . . . . . . . . . 850MHz (Typ)
• Very High Slew Rate . . . . . . . . . . . . . . . 2300V/µs (Typ)
• Fast Settling (0.1%) . . . . . . . . . . . . . . . . . . . . 11ns (Typ)
• Excellent Gain Flatness (to 50MHz) . . . . . 0.05dB (Typ)
• High Output Current . . . . . . . . . . . . . . . . . . 65mA (Typ)
• Fast Overdrive Recovery . . . . . . . . . . . . . . <10ns (Typ)
The HFA1100/883’s wide bandwidth, fast settling character-
istic, and low output impedance, make this amplifier ideal for
driving fast A/D converters.
Component and composite video systems will also benefit
from this amplifier’s performance, as indicated by the excel-
lent gain flatness, and 0.03%/0.05 Deg. Differential Gain/
Phase specifications (R = 75Ω).
L
Applications
Ordering Information
• Video Switching and Routing
• Pulse and Video Amplifiers
• Wideband Amplifiers
• RF/IF Signal Processing
• Flash A/D Driver
TEMPERATURE
PART NUMBER
RANGE
PACKAGE
HFA1100MJ/883
-55oC to +125oC
8 Lead CerDIP
• Medical Imaging Systems
Pinout
HFA1100/883
(CERDIP)
TOP VIEW
NC
-IN
+IN
V-
1
2
3
4
8
7
6
5
NC
V+
-
+
OUT
NC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Spec Number 511104-883
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
174
FN3615.1
Specifications HFA1100/883
Absolute Maximum Ratings
Thermal Information
Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V
Thermal Resistance
θJA
θJC
CerDIP Package . . . . . . . . . . . . . . . . . 115oC/W
30oC/W
Voltage at Either Input Terminal. . . . . . . . . . . . . . . . . . . . . . V+ to V- Maximum Package Power Dissipation at +75oC
Output Current (50% Duty Cycle) . . . . . . . . . . . . . . . . . . . . . . . .±55mA
Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .< 2000V
Storage Temperature Range . . . . . . . . . . . . . .-65oC ≤ TA ≤ +150oC
Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . +300oC
CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.87W
Package Power Dissipation Derating Factor above +75oC
CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.7mW/oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating VSUPPLY (±VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5V
Operating Temperature Range. . . . . . . . . . . . .-55oC ≤ TA ≤ +125oC
RL ≥ 50Ω
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at: VSUPPLY = ±5V, AV = +1, RF = 510Ω, RSOURCE = 0Ω, RL = 100Ω, VOUT = 0V, Unless Otherwise Specified.
LIMITS
GROUP A
PARAMETERS
SYMBOL
CONDITIONS
VCM = 0V
SUBGROUPS
TEMPERATURE
+25oC
MIN
-6
MAX
UNITS
mV
Input Offset Voltage
VIO
1
6
10
-
2, 3
1
+125oC, -55oC
+25oC
-10
40
mV
Common Mode
Rejection Ratio
CMRR
PSRRP
PSRRN
∆VCM = ±2V
V+ = 3V, V- = -7V
V+ = 7V, V- = -3V
dB
2, 3
+125oC, -55oC
38
-
dB
Power Supply
Rejection Ratio
∆VSUPPLY = ±1.25V
V+ = 6.25V, V- = -5V
V+ = 3.75V, V- = -5V
1
+25oC
45
42
-
-
dB
dB
2, 3
+125oC, -55oC
∆VSUPPLY = ±1.25V
V+ = 5V, V- = -6.25V
V+ = 5V, V- = -3.75V
1
+25oC
45
42
-
-
dB
dB
2, 3
+125oC, -55oC
Non-Inverting Input (+IN)
Current
IBSP
VCM = 0V
1
+25oC
+125oC, -55oC
+25oC
-40
-65
-
40
65
40
50
µA
µA
2, 3
1
+IN Current Common
Mode Sensitivity
CMSIBP
∆VCM = ±2V
V+ = 3V, V- = -7V
V+ = 7V, V- = -3V
µA/V
µA/V
2, 3
+125oC, -55oC
-
+IN Resistance
+RIN
Note 1
1
2, 3
1
+25oC
+125oC, -55oC
+25oC
25
20
-50
-75
-
-
kΩ
kΩ
-
Inverting Input (-IN)
Current
IBSN
VCM = 0V
50
75
7
µA
2, 3
1
+125oC, -55oC
+25oC
µA
-IN Current Common
Mode Sensitivity
CMSIBN
∆VCM = ±2V
V+ = 3V, V- = -7V
V+ = 7V, V- = -3V
µA/V
µA/V
2, 3
+125oC, -55oC
-
10
-IN Current Power
Supply Sensitivity
PPSSIBN ∆VSUPPLY = ±1.25V
V+ = 6.25V, V- = -5V
1
+25oC
-
-
15
27
µA/V
µA/V
2, 3
+125oC, -55oC
V+ = 3.75V, V- = -5V
NPSSIBN ∆VSUPPLY = ±1.25V
V+ = 5V, V- = -6.25V
1
+25oC
-
-
15
27
µA/V
µA/V
2, 3
+125oC, -55oC
V+ = 5V, V- = -3.75V
Output Voltage Swing
VOP100
AV = -1
RL = 100Ω
VIN = -3.5V
IN = -3V
1
+25oC
+125oC, -55oC
+25oC
3
2.5
-
-
-
V
V
V
V
V
2, 3
1
VON100
AV = -1
RL = 100Ω
VIN=+3.5V
VIN = +3V
-3
2, 3
+125oC, -55oC
-
-2.5
Spec Number 511104-883
175
Specifications HFA1100/883
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Tested at: VSUPPLY = ±5V, AV = +1, RF = 510Ω, RSOURCE = 0Ω, RL = 100Ω, VOUT = 0V, Unless Otherwise Specified.
LIMITS
GROUP A
PARAMETERS
SYMBOL
CONDITIONS
SUBGROUPS
TEMPERATURE
+25oC, +125oC
-55oC
MIN
2.5
1.5
-
MAX
-
UNITS
V
Output Voltage Swing
VOP50
AV = -1
RL = 50Ω
VIN = -3V
VIN = -2V
VIN = +3V
VIN = +2V
1, 2
3
-
V
VON50
+IOUT
-IOUT
ICC
AV = -1
RL = 50Ω
1, 2
3
+25oC, +125oC
-55oC
-2.5
-1.5
-
V
-
V
Output Current
Note 2
1, 2
3
+25oC, +125oC
-55oC
50
30
-
mA
mA
mA
mA
mA
mA
mA
mA
-
Note 2
1, 2
3
+25oC, +125oC
-55oC
-50
-30
26
33
-14
-
-
Quiescent Power
Supply Current
RL = 100Ω
RL = 100Ω
1
+25oC
14
-
2, 3
1
+125oC, -55oC
+25oC
IEE
-26
-33
2, 3
+125oC, -55oC
NOTES:
1. Guaranteed from +IN Common Mode Rejection Test, by: +RIN = 1/CMSIBP
.
2. Guaranteed from VOUT Test with RL = 50Ω, by: IOUT = VOUT/50Ω.
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
Table 2 Intentionally Left Blank. See AC Specifications in Table 3
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Characterized at: VSUPPLY = ±5V, AV = +2, RF = 360Ω, RL = 100Ω, Unless Otherwise Specified.
LIMITS
PARAMETERS
SYMBOL
CONDITIONS
V = -1, RF = 430Ω
NOTES
TEMPERATURE
MIN
MAX
UNITS
-3dB Bandwidth
BW(-1)
A
1
+25oC
300
-
MHz
VOUT = 200mVP-P
BW(+1)
BW(+2)
GF30
A
V = +1, RF = 510Ω
1
1
1
1
1
+25oC
+25oC
+25oC
+25oC
+25oC
550
-
MHz
MHz
dB
VOUT = 200mVP-P
AV = +2,
350
-
VOUT = 200mVP-P
Gain Flatness
AV = +2, RF = 510Ω, f ≤ 30MHz
-
-
-
±0.04
±0.10
±0.30
VOUT = 200mVP-P
GF50
AV = +2, RF = 510Ω, f ≤ 50MHz
dB
VOUT = 200mVP-P
GF100
A
V = +2, RF = 510Ω, f ≤ 100MHz
dB
VOUT = 200mVP-P
Spec Number 511104-883
176
Specifications HFA1100/883
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Characterized at: VSUPPLY = ±5V, AV = +2, RF = 360Ω, RL = 100Ω, Unless Otherwise Specified.
LIMITS
PARAMETERS
Slew Rate
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
+SR(+1)
AV = +1, RF = 510Ω,VOUT = 5VP-
1, 2
+25oC
1200
-
V/µs
P
-SR(+1)
AV = +1, RF = 510Ω,VOUT = 5VP-
1, 2
+25oC
1100
-
V/µs
P
+SR(+2)
-SR(+2)
TR
A
V = +2, VOUT = 5VP-P
1, 2
1, 2
1, 2
+25oC
+25oC
+25oC
1650
1500
-
-
-
V/µs
V/µs
ns
AV = +2, VOUT = 5VP-P
AV = +2, VOUT = 0.5VP-P
Rise and Fall Time
1
TF
AV = +2, VOUT = 0.5VP-P
1, 2
+25oC
-
1
ns
Overshoot
+OS
-OS
A
V = +2, VOUT = 0.5VP-P
V = +2, VOUT = 0.5VP-P
1, 3
1, 3
1
+25oC
+25oC
+25oC
-
-
-
25
20
20
%
%
ns
A
Settling Time
TS(0.1)
AV = +2, RF = 510Ω
VOUT = 2V to 0V, to 0.1%
TS(0.05)
HD2(30)
HD2(50)
HD2(100)
A
V = +2, RF = 510Ω
1
1
1
1
+25oC
+25oC
+25oC
+25oC
-
-
-
-
33
ns
VOUT = 2V to 0V, to 0.05%
2nd Harmonic
Distortion
A
V = +2, f = 30MHz, VOUT = 2VP-
V = +2, f = 50MHz, VOUT = 2VP-
V = +2, f = 100MHz,
-48
-45
-35
dBc
dBc
dBc
P
A
P
A
VOUT = 2VP- P
3rd Harmonic
Distortion
HD3(30)
HD3(50)
A
V = +2, f = 30MHz,VOUT = 2VP-P
V = +2, f = 50MHz, VOUT = 2VP-
1
1
+25oC
+25oC
-
-
-65
-60
dBc
dBc
A
P
HD3(100)
A
V = +2, f = 100MHz,
1
+25oC
-
-40
dBc
VOUT = 2VP-P
NOTES:
1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These param-
eters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization
based upon data from multiple production runs which reflect lot-to-lot and within lot variation.
2. Measured between 10% and 90% points.
3. For 200ps input transition times. Overshoot decreases as input transition times increase, especially for AV = +1. Please refer to
Performance Curves.
TABLE 4. ELECTRICAL TEST REQUIREMENTS
MIL-STD-883 TEST REQUIREMENTS
Interim Electrical Parameters (Pre Burn-In)
Final Electrical Test Parameters
Group A Test Requirements
SUBGROUPS (SEE TABLE 1)
1
1 (Note 1), 2, 3
1, 2, 3
Groups C and D Endpoints
1
NOTE:
1. PDA applies to Subgroup 1 only.
Spec Number 511104-883
177
HFA1100/883
Die Characteristics
DIE DIMENSIONS:
63 x 44 x 19 mils ± 1 mils
1600µm x 1130µm x 483µm ± 25.4µm
METALLIZATION:
Type: Metal 1: AICu(2%)/TiW
Type: Metal 2: AICu(2%)
Thickness: Metal 1: 8kÅ ± 0.4kÅ
Thickness: Metal 2: 16kÅ ± 0.8kÅ
GLASSIVATION:
Type: Nitride
Thickness: 4kÅ ± 0.5kÅ
WORST CASE CURRENT DENSITY:
5
2
2.0 x 10 A/cm at 47.5mA
TRANSISTOR COUNT: 52
SUBSTRATE POTENTIAL (Powered Up): Floating (Recommend Connection to V-)
Metallization Mask Layout
HFA1100/883
+IN
-IN
V-
BAL
VH
VL
BAL
V+
OUT
Spec Number 511104-883
178
HFA1100/883
Test Circuit (Applies to Table 1)
V+
+
10
0.1
ICC
510
VIN
NC
K1
510
0.1 100
0.1
0.1
K2 = POSITION 1:
0.1
7
VX
VIO
VX
=
100
2
-
1K
6
+
-
510
510
VOUT
DUT
470pF
2
3
+
X100
1
100
100
K2
K2 = POSITION 2:
VX
4
-IBIAS
=
K3
200pF
50K
10
0.1
100K (0.01%)
+
VZ
+IBIAS
=
100K
-
+
NOTE:
1. All Resistors = ±1% (Ω)
VZ
IEE
0.1
HA-5177
2. All Capacitors = ±10% (µF)
3. Unless Otherwise Noted
V-
4. Chip Components Recommended
Test Waveforms
SIMPLIFIED TEST CIRCUIT FOR LARGE AND SMALL SIGNAL PULSE RESPONSE (Applies to Table 3)
AV = +1 TEST CIRCUIT
V+
AV = +2 TEST CIRCUIT
V+
VOUT
2
VOUT
2
VIN
VIN
+
+
-
-
50Ω
RF
RS
50Ω
RS
50Ω
RF
360Ω
50Ω
50Ω
50Ω
RG
360Ω
510Ω
V-
V-
NOTE:
NOTE:
1. VS = ±5V, AV = +2
1. VS = ±5V, AV = +1
2. RS = 50Ω
2. RS = 50Ω
3. RL=100Ω For Small and Large Signals
3. RL = 100Ω For Small and Large Signals
LARGE SIGNAL WAVEFORM
SMALL SIGNAL WAVEFORM
VOUT
VOUT
+2.5V
+2.5V
+250mV
+250mV
90%
90%
90%
90%
+SR
-SR
TR , +OS
-250mV
T
F , -OS
10%
10%
10%
10%
-2.5V
-2.5V
-250mV
Spec Number 511104-883
179
HFA1100/883
Burn-In Circuit
HFA1100MJ/883 CERAMIC DIP
R3
1
2
3
4
8
7
6
5
D3
C1
R2
R1
V+
-
D1
+
D4
V-
D2
C2
NOTES:
1. R1 = R2 = 1kΩ, ±5% (Per Socket)
2. R3 = 10kΩ, ±5% (Per Socket)
3. C1 = C2 = 0.01µF (Per Socket) or 0.1µF (Per Row) Minimum
4. D1 = D2 = 1N4002 or Equivalent (Per Board)
5. D3 = D4 = 1N4002 or Equivalent (Per Socket)
6. V+ = +5.5V ± 0.5V
7. V- = -5.5V ± 0.5V
Spec Number 511104-883
180
HFA1100/883
Packaging
c1 LEAD FINISH
F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A)
8 LEAD DUAL-IN-LINE FRIT-SEAL CERAMIC PACKAGE
INCHES MILLIMETERS
MIN
-D-
E
-A-
-B-
BASE
METAL
(c)
SYMBOL
MAX
0.200
0.026
0.023
0.065
0.045
0.018
0.015
0.405
0.310
MIN
-
MAX
5.08
0.66
0.58
1.65
1.14
0.46
0.38
10.29
7.87
NOTES
b1
A
b
-
-
2
3
-
M
M
0.014
0.014
0.045
0.023
0.008
0.008
-
0.36
0.36
1.14
0.58
0.20
0.20
-
(b)
b1
b2
b3
c
SECTION A-A
S
S
S
D
bbb
C A - B
D
4
2
3
5
5
-
BASE
Q
PLANE
A
-C-
c1
D
SEATING
PLANE
L
α
E
0.220
5.59
S1
eA
A A
e
e
0.100 BSC
2.54 BSC
b2
eA/2
b
c
eA
eA/2
L
0.300 BSC
0.150 BSC
7.62 BSC
3.81 BSC
-
-
M
S
S
M
S
S
D
ccc
C A - B
D
aaa
C A - B
0.125
0.200
0.060
-
3.18
5.08
1.52
-
-
Q
0.015
0.38
6
7
-
NOTES:
S1
S2
α
0.005
0.13
1. Index area: A notch or a pin one identification mark shall be locat-
ed adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark.
0.005
-
0.13
-
90o
105o
0.015
0.030
0.010
0.0015
90o
105o
0.38
0.76
0.25
0.038
-
aaa
bbb
ccc
M
-
-
-
-
-
-
-
-
-
2. The maximum limits of lead dimensions b and c or M shall be
measured at the centroid of the finished lead surfaces, when
solder dip or tin plate lead finish is applied.
-
-
2
8
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness.
N
8
8
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b1.
5. This dimension allows for off-center lid, meniscus, and glass
overrun.
6. Dimension Q shall be measured from the seating plane to the
base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling Dimension: Inch.
11. Lead Finish: Type A.
12. Materials: Compliant to MIL-I-38535.
Spec Number 511104-883
181
TM
HFA1100
Ultra High Speed
Current Feedback Amplifier
DESIGN INFORMATION
February 2002
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Typical Performance Curves VSUPPLY = ±5V, RF = 510Ω, RL = 100Ω, TA = +25°C, Unless Otherwise Specified
SMALL SIGNAL PULSE RESPONSE (AV = +2)
LARGE SIGNAL PULSE RESPONSE (AV = +2)
1.2
0.9
0.6
0.3
0
120
90
60
30
0
-30
-0.3
-0.6
-0.9
-1.2
-60
-90
-120
5ns/DIV
5ns/DIV
NON-INVERTING FREQUENCY RESPONSE (VOUT = 200mVP-P
)
INVERTING FREQUENCY RESPONSE (VOUT = 200mVP-P)
GAIN
GAIN
0
0
-3
-6
AV = -1
AV = -5
-3
-6
AV = +1
V = +2
A
AV = -10
AV = +6
-9
-9
AV = -20
AV = +11
-12
-12
PHASE
PHASE
180
90
0
0
-90
AV = -1
AV = -5
AV = +1
-180
-270
-360
AV = +2
AV = +6
A
V = -10
V = -20
-90
A
A
V = +11
-180
1K
0.3
1
10
FREQUENCY (MHz)
100
0.3
1
10
100
1K
FREQUENCY (MHz)
Spec Number 511104-883
182
HFA1100
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Typical Performance Curves VSUPPLY = ±5V, RF = 510Ω, RL = 100Ω, TA = +25°C, Unless Otherwise Specified
FREQUENCY RESPONSE FOR VARIOUS LOAD RESISTORS
(AV = +1, VOUT = 200mVP-P
FREQUENCY RESPONSE FOR VARIOUS LOAD RESISTORS
)
(AV = +2, VOUT = 200mVP-P)
+6
+3
0
RL = 1kΩ
RL = 1kΩ
+3
0
GAIN
GAIN
RL = 100Ω
-3
-6
-3
-6
R
L = 50Ω
RL = 100Ω
RL = 50Ω
RL = 50Ω
PHASE
RL = 50Ω
RL = 100Ω
RL = 100Ω
PHASE
0
0
-90
-90
RL = 1kΩ
RL = 1kΩ
-180
-270
-360
-180
-270
-360
RL = 100Ω
RL = 100Ω
RL = 1kΩ
RL = 1kΩ
0.3
1
10
100
1K
0.3
1
10
100
1K
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES
(AV = +1)
FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES
(AV = +2)
+20
+10
0
+20
+10
0
0.160VP-P
0.500VP-P
0.920VP-P
1.63VP-P
0.32VP-P
-10
-10
1.00VP-P
-20
-20
-30
1.84VP-P
-30
3.26VP-P
0.3
1
10
100
1K
0.3
1
10
100
1K
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES
(AV = +6)
-3dB BANDWIDTH vs TEMPERATURE (AV = +1)
+20
+10
0
950
900
850
800
750
-10
0.96 VP-P
TO
3.89 VP-P
-20
-30
700
-50 -25
0
+25 +50 +75 +100 +125
0.3
1
10
100
1K
TEMPERATURE (oC)
FREQUENCY (MHz)
Spec Number 511104-883
183
HFA1100
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Typical Performance Curves VSUPPLY = ±5V, RF = 510Ω, RL = 100Ω, TA = +25°C, Unless Otherwise Specified
GAIN FLATNESS (AV = +2)
DEVIATION FROM LINEAR PHASE (AV = +2)
+2.0
+1.5
+1.0
+0.5
0
0
-0.05
-0.10
-0.15
-0.20
-0.5
-1.0
-1.5
-2.0
0
15
30
45
60
75
90 105 120 135 150
1
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
SETTLING RESPONSE (AV = +2, VOUT = 2V)
3RD ORDER INTERMODULATION INTERCEPT (2-TONE)
40
35
30
25
0.6
0.4
0.2
0
20
15
-0.2
-0.4
-0.6
10
5
0
0
100
200
300
400
FREQUENCY (MHz)
-4
1
6
11 16 21 26 31 36 41 46
TIME (ns)
2nd HARMONIC DISTORTION vs POUT
3rd HARMONIC DISTORTION vs POUT
-30
-40
-30
-35
-40
-45
-50
-55
-60
-65
-70
-50
100MHz
50MHz
100MHz
50MHz
-60
-70
-80
-90
30MHz
30MHz
-100
-110
-5
-3
-1
1
3
5
7
9
11 13 15
-5
-3
-1
1
3
5
7
9
11 13
15
OUTPUT POWER (dBm)
OUTPUT POWER (dBm)
Spec Number 511104-883
184
HFA1100
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Typical Performance Curves VSUPPLY = ±5V, RF = 510Ω, RL = 100Ω, TA = +25°C, Unless Otherwise Specified
OVERSHOOT vs INPUT RISE TIME (AV = +1)
OVERSHOOT vs INPUT RISE TIME (AV = +2)
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
35
30
25
20
15
10
5
RF = 360Ω
V
OUT = 2VP-P
VOUT = 1VP-P
RF = 360Ω
VOUT = 1VP-P
RF = 360Ω
VOUT = 0.5VP-P
VOUT = 0.5VP-P
RF = 510Ω
OUT = 2VP-P
V
VOUT = 2VP-P
RF =510Ω
OUT = 1VP-P
V
RF = 510Ω
VOUT = 0.5VP-P
0
6
100 200 300 400 500 600 700 800 900 1000
INPUT RISE TIME(ps)
100 200 300 400 500 600 700 800 900 1000
INPUT RISE TIME(ps)
OVERSHOOT vs FEEDBACK RESISTOR
SUPPLY CURRENT vs TEMPERATURE
(AV = +2, tR = 200ps, VOUT = 2VP-P
)
36
25
24
23
22
21
20
19
18
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
-60 -40 -20
0
20
40
60
80 100 120
360
400
440
480
520
560
600
640
680
TEMPERATURE (oC)
FEEDBACK RESISTOR (Ω)
SUPPLY CURRENT vs SUPPLY VOLTAGE
VIO AND BIAS CURRENTS vs TEMPERATURE
22
21
20
19
18
17
16
15
14
13
12
11
10
9
2.8
45
42
39
36
33
30
27
24
21
18
15
12
9
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2
+IBIAS
VIO
1.9
1.8
1.7
1.6
1.5
1.4
1.3
-IBIAS
8
7
6
5
6
3
0
-60 -40 -20
0
20 40 60 80 100 120
5
6
7
8
9
10
TEMPERATURE (oC)
TOTAL SUPPLY VOLTAGE (V+ - V-, V)
Spec Number 511104-883
185
HFA1100
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Typical Performance Curves VSUPPLY = ±5V, RF = 510Ω, RL = 100Ω, TA = +25°C, Unless Otherwise Specified
OUTPUT VOLTAGE vs TEMPERATURE
(AV = -1, RL = 50Ω)
INPUT NOISE vs FREQUENCY
3.7
3.6
3.5
3.4
3.3
3.2
3.1
3
30
25
20
15
10
300
275
250
225
200
175
150
125
100
75
+VOUT
| - VOUT
|
2.9
2.8
2.7
2.6
2.5
5
0
50
ENI
INI-
25
INI+
0
100
1K
10K
100K
-60 -40 -20
0
20
40
60
80 100 120
TEMPERATURE (oC)
FREQUENCY (Hz)
Application Information
GAIN
BANDWIDTH
(MHz)
(ACL
)
RF (Ω)
430
Optimum Feedback Resistor
-1
580
850
670
520
240
125
The enclosed plots of inverting and non-inverting frequency
response illustrate the performance of the HFA1100 in vari-
ous gains. Although the bandwidth dependency on closed
loop gain isn’t as severe as that of a voltage feedback ampli-
fier, there can be an appreciable decrease in bandwidth at
higher gains. This decrease may be minimized by taking
advantage of the current feedback amplifier’s unique rela-
+1
510
+2
360
+5
150
+10
+19
180
tionship between bandwidth and R . All current feedback
amplifiers require a feedback resistor, even for unity gain
F
270
applications, and R , in conjunction with the internal com-
F
pensation capacitor, sets the dominant pole of the frequency
response. Thus, the amplifier’s bandwidth is inversely pro-
PC Board Layout
portional to R . The HFA1100 design is optimized for a
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The
use of low inductance components such as chip resis-
tors and chip capacitors is strongly recommended,
while a solid ground plane is a must!
F
510Ω R at a gain of +1. Decreasing R in a unity gain appli-
F
F
cation decreases stability, resulting in excessive peaking
and overshoot. At higher gains the amplifier is more stable,
so R can be decreased in a trade-off of stability for band-
F
width.
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.
The table below lists recommended R values for various
gains, and the expected bandwidth.
F
Spec Number 511104-883
186
HFA1100
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
Evaluation Board
The performance of the HFA1100 may be evaluated using
the HFA11XX Evaluation Board.
output must be minimized, or isolated as discussed in the
next section.
The layout and schematic of the board are shown in Figure
2. To order evaluation boards, please contact your local
sales office.
Care must also be taken to minimize the capacitance to
ground seen by the amplifier’s inverting input (-IN). The
larger this capacitance, the worse the gain peaking, resulting
in pulse overshoot and possible instability. To this end, it is
recommended that the ground plane be removed under
traces connected to -IN, and connections to -IN should be
kept as short as possible.
TOP LAYOUT
VH
An example of a good high frequency layout is the Evalua-
tion Board shown in Figure 2.
Driving Capacitive Loads
1
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
+IN
OUT
V-
V+
VL
avoided by placing a resistor (R ) in series with the output
S
GND
prior to the capacitance.
Figure 1 details starting points for the selection of this resis-
tor. The points on the curve indicate the R and C combina-
S
L
tions for the optimum bandwidth, stability, and settling time,
but experimental fine tuning is recommended. Picking a
point above or to the right of the curve yields an overdamped
response, while points below or left of the curve indicate
areas of underdamped performance.
BOTTOM LAYOUT
R and C form a low pass network at the output, thus lim-
S
L
iting system bandwidth well below the amplifier bandwidth
of 850MHz. By decreasing R as C increases (as illus-
S
L
trated in the curves), the maximum bandwidth is obtained
without sacrificing stability. Even so, bandwidth does
decrease as you move to the right along the curve. For
example, at A = +1, R = 50Ω, C = 30pF, the overall
V
S
L
bandwidth is limited to 300MHz, and bandwidth drops to
100MHz at A = +1, R = 5Ω, C = 340pF.
V
S
L
50
45
40
AV = +1
500
R1
500
35
VH
30
25
20
1
2
3
4
8
7
6
5
10µF
+5V
0.1µF
50Ω
50Ω
15
10
5
IN
OUT
VL
AV = +2
40
GND
0.1µF
10µF
0
0
80
120 160 200 240
280 320
360 400
-5V
GND
LOAD CAPACITANCE (pF)
FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT
FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs
LOAD CAPACITANCE
Spec Number 511104-883
187
HFA1100
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
TYPICAL PERFORMANCE CHARACTERISTICS
Device Characterized at: VSUPPLY = ±5V, RF = 360Ω, AV = +2V/V, RL = 100Ω, Unless Otherwise Specified
PARAMETERS
Input Offset Voltage *
Average Offset Voltage Drift
IO CMRR
CONDITIONS
TEMPERATURE
+25oC
TYPICAL
2
UNITS
mV
V
= 0V
CM
Versus Temperature
∆V = ±2V
Full
10
µV/oC
dB
V
+25oC
+25oC
46
CM
∆VS = ±1.25V
= 0V
VIO PSRR
50
dB
+Input Current *
V
+25oC
25
µA
CM
Versus Temperature
= 0V
Average +Input Current Drift
- Input Current *
Full
40
nA/oC
µA
V
+25oC
12
CM
Versus Temperature
∆V = ±2V
Average -Input Current Drift
+Input Resistance
Full
40
nA/oC
kΩ
+25oC
+25oC
50
CM
- Input Resistance
16
Ω
Input Capacitance
+25oC
+25oC
+25oC
2.2
4
pF
Input Noise Voltage *
+Input Noise Current *
-Input Noise Current *
Input Common Mode Range
Open Loop Transimpedance
Output Voltage
f = 100kHz
f = 100kHz
f = 100kHz
nV/√Hz
pA/√Hz
pA/√Hz
V
18
+25oC
21
Full
±3.0
500
±3.3
±3.0
±65
±50
0.1
AV = -1
+25oC
+25oC
kΩ
AV = -1, RL = 100Ω
AV = -1, RL = 100Ω
V
Full
V
Output Current *
A
V = -1, RL = 50Ω
+25oC to +125oC
-55oC to 0oC
+25oC
mA
AV = -1, RL = 50Ω
mA
DC Closed Loop Output
Resistance
Ω
Quiescent Supply Current *
-3dB Bandwidth *
RL = Open
Full
24
mA
AV = -1, RF = 430Ω, VOUT = 200mVP-P
+25oC
+25oC
580
850
MHz
MHz
AV = +1, RF = 510Ω, VOUT = 200mVP-
P
AV = +2, RF = 360Ω, VOUT = 200mVP-
+25oC
670
MHz
P
Slew Rate
A
V = +1, RF = 510Ω, VOUT = 5VP-P
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
1500
2300
220
V/µs
V/µs
MHz
dB
A
V = +2, VOUT = 5VP-P
Full Power Bandwidth
Gain Flatness *
VOUT = 5VP-P
To 30MHz, RF = 510Ω
To 50MHz, RF = 510Ω
To 100MHz, RF = 510Ω
To 100MHz, RF = 510Ω
±0.014
±0.05
±0.14
±0.6
dB
dB
Linear Phase Deviation *
Degrees
Spec Number 511104-883
188
HFA1100
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
TYPICAL PERFORMANCE CHARACTERISTICS
Device Characterized at: VSUPPLY = ±5V, RF = 360Ω, AV = +2V/V, RL = 100Ω, Unless Otherwise Specified
PARAMETERS
CONDITIONS
30MHz, VOUT = 2VP-P
TEMPERATURE
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
TYPICAL
-55
-49
-44
-84
-70
-57
30
UNITS
dBc
dBc
dBc
dBc
dBc
dBc
dBm
dBm
dB
2nd Harmonic Distortion *
50MHz, VOUT = 2VP-P
100MHz, VOUT = 2VP-P
30MHz, VOUT = 2VP-P
50MHz, VOUT = 2VP-P
100MHz, VOUT = 2VP-P
100MHz, RF = 510Ω
100MHz, RF = 510Ω
40MHz, RF = 510Ω
100MHz, RF = 510Ω
600MHz, RF = 510Ω
VOUT = 0.5VP-P
3rd Harmonic Distortion *
3rd Order Intercept *
1dB Compression
20
Reverse Isolation (S12
)
-70
-60
-32
500
800
11
dB
dB
Rise & Fall Time
ps
VOUT = 2VP-P
ps
Overshoot *
VOUT = 0.5VP-P, Input tR/tF = 550ps
%
Settling Time *
To 0.1%, VOUT = 2V to 0V, RF = 510Ω
11
ns
To 0.05%, VOUT = 2V to 0V,
19
ns
R
F = 510Ω
To 0.02%, VOUT = 2V to 0V,
+25oC
34
ns
R
F = 510Ω
Differential Gain
A
V = +2, RL = 75Ω, NTSC
+25oC
+25oC
+25oC
0.03
0.05
7.5
%
Degrees
ns
Differential Phase
AV = +2, RL = 75Ω, NTSC
RF = 510Ω, VIN = 5VP-P
Overdrive Recovery Time
* See Typical Performance Curves for more information.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reli-
able. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Spec Number 511104-883
189
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