HCTS283D/SAMPLE [INTERSIL]
Radiation Hardened 4 Bit Binary Full Adder with Fast Carry; 抗辐射4位二进制全加器与快速进
| 型号： | HCTS283D/SAMPLE |
| 厂家： | 
Intersil |
| 描述： | Radiation Hardened 4 Bit Binary Full Adder with Fast Carry |
| 文件： | 总9页 (文件大小：288K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TM
HCTS283MS
Radiation Hardened
4 Bit Binary Full Adder with Fast Carry
September 1995
Features
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
2
• SEP Effective LET No Upsets: >100 MEV-cm /mg
S1
B1
1
2
3
4
5
6
7
8
16 VCC
15 B2
14 A2
13 S2
12 A3
11 B3
10 S3
-9
• Single Event Upset (SEU) Immunity < 2 x 10 Errors/
Bit-Day (Typ)
A1
12
• Dose Rate Survivability: >1 x 10 RAD (Si)/s
S0
10
• Dose Rate Upset >10 RAD (Si)/s 20ns Pulse
A0
• Latch-Up Free Under Any Conditions
B0
o
o
CIN
GND
• Military Temperature Range: -55 C to +125 C
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
9
COUT
• LSTTL Input Compatibility
- VIL = 0.8V Max
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
- VIH = VCC/2V Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
S1
B1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC
B2
Description
The Intersil HCTS283MS is a Radiation Hardened 4 bit
binary full adder with fast carry that adds two 4 bit binary
numbers and generates a carry-out bit if the sum exceeds 15.
A1
A2
S0
S2
A0
A3
This device can be used in positive or negative logic. When
using positive logic the carry-in input must be tied low, if
there is no carry-in.
B0
B3
CIN
GND
S3
COUT
The HCTS283MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family .
The HCTS283MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
PART NUMBER
HCTS283DMSR
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
+25oC
SCREENING LEVEL
PACKAGE
16 Lead SBDIP
Intersil Class S Equivalent
HCTS283KMSR
Intersil Class S Equivalent
16 Lead Ceramic Flatpack
16 Lead SBDIP
HCTS283D/Sample
HCTS283K/Sample
HCTS283HMSR
Sample
Sample
Die
+25oC
16 Lead Ceramic Flatpack
Die
+25oC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Spec Number 518641
FN3381.1
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
1
HCTS283MS
Functional Diagram
7
5
6
3
2
14
15
12
11
CIN
A0
B0
A1
B1
A2
B2
A3
B3
8
GND
16
VCC
S0
4
S1
1
S2
13
S3
10
COUT
9
Spec Number 518641
2
Specifications HCTS283MS
Absolute Maximum Ratings
Reliability Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance
θJA
θJC
SBDIP Package. . . . . . . . . . . . . . . . . . . .
73oC/W
24oC/W
29oC/W
Ceramic Flatpack Package . . . . . . . . . . . 114oC/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W
If device power exceeds package dissipation capability, provide
heat sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.7mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.8mW/oC
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC
Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . 10ns/V Max
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . . . 2.0V to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
LIMITS
MIN
(NOTE 1)
CONDITIONS
PARAMETER
SYMBOL
TEMPERATURE
+25oC
MAX
40
750
1.6
3.2
-
UNITS
µA
Quiescent Current
ICC
VCC = 5.5V,
VIN = VCC or GND
1
2, 3
1
-
-
+125oC, -55oC
+25oC
µA
Delta ICC
DICC
IOL
VCC = 5.5V, VIN = VCC or
GND, 1 Input at 2.4V
-
mA
mA
mA
mA
mA
mA
V
2, 3
1
+125oC, -55oC
+25oC
-
Output Current
(Sink)
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
(Note 2)
4.8
4.0
-4.8
-4.0
-
2, 3
1
+125oC, -55oC
+25oC
-
Output Current
(Source)
IOH
VCC = VIH = 4.5V,
VOUT = VCC - 0.4V,
VIL = 0V (Note 2)
-
2, 3
1, 2, 3
+125oC, -55oC
+25oC, +125oC, -55oC
-
Output Voltage Low
VOL
VCC = 4.5V, VIH = 2.25V,
0.1
IOL = 50µA, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOL = 50µA, VIL = 0.80V
1, 2, 3
1, 2, 3
1, 2, 3
+25oC, +125oC, -55oC
+25oC, +125oC, -55oC
+25oC, +125oC, -55oC
-
0.1
V
V
V
Output Voltage High
VOH
VCC = 4.5V, VIH = 2.25V,
IOH = -50µA, VIL = 0.8V
VCC
-0.1
-
-
VCC = 5.5V, VIH = 2.75V,
IOH = -50µA, VIL = 0.80V
VCC
-0.1
Input Leakage
Current
IIN
FN
VCC = 5.5V, VIN = VCC or
GND
1
+25oC
-
-
-
±0.5
±5.0
-
µA
µA
-
2, 3
+125oC, -55oC
Noise Immunity
Functional Test
VCC = 4.5V, VIH = 2.25V,
VIL = 0.80V (Note 3)
7, 8A, 8B
+25oC, +125oC, -55oC
NOTES:
1. All voltages referenced to device GND.
2. Force/Measure functions may be interchanged.
3. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
Spec Number 518641
3
Specifications HCTS283MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
LIMITS
MIN
(NOTES 1, 2)
A SUB-
PARAMETER
SYMBOL
CONDITIONS
GROUPS
TEMPERATURE
+25oC
MAX
23
27
26
30
27
31
30
35
31
37
34
40
38
47
40
48
53
67
54
63
50
63
60
73
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Propagation Delay
CIN to S0
TPLH
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
9
10, 11
9
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
+125oC, -55oC
+25oC
TPHL
TPLH
TPHL
TPLH
TPHL
TPLH
TPHL
TPLH
TPHL
TPLH
TPHL
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
10, 11
9
+125oC, -55oC
+25oC
Propagation Delay
CIN to S1
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
10, 11
9
+125oC, -55oC
+25oC
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
10, 11
9
+125oC, -55oC
+25oC
Propagation Delay
CIN to S2 CIN to
COUT
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
10, 11
9
+125oC, -55oC
+25oC
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
10, 11
9
+125oC, -55oC
+25oC
Propagation Delay
CIN to S3
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
10, 11
9
+125oC, -55oC
+25oC
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
10, 11
9
+125oC, -55oC
+25oC
Propagation Delay
An, Bn to COUT
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
10, 11
9
+125oC, -55oC
+25oC
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
10, 11
9
+125oC, -55oC
+25oC
Propagation Delay
An, Bn to Sn
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
10, 11
9
+125oC, -55oC
+25oC
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
10, 11
+125oC, -55oC
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
+25oC
MIN
MAX
10
UNITS
pF
Input Capacitance
CIN
VCC = 5V, VIH = 5V,
VIL = 0V, f = 1MHz
1
1
1
1
1
1
-
-
-
-
-
-
+125oC, -55oC
+25oC
10
pF
Output Transition
Time
TTHL,
TTLH
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
15
ns
+125oC, -55oC
+25oC
22
ns
Capacitance Power
Dissipation
CPD
VCC = 5.5V, f = 1MHz
250
315
pF
+125oC, -55oC
pF
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
Spec Number 518641
4
Specifications HCTS283MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
200K RAD
LIMITS
(NOTES 1)
PARAMETER
Quiescent Current
Delta ICC
SYMBOL
ICC
CONDITIONS
TEMPERATURE
+25oC
MIN
MAX
0.75
3.2
UNITS
mA
VCC = 5.5V, VIN = VCC or GND
-
-
DICC
VCC = 5.5V, VIN = VCC or GND,
1 Input at 2.4V
+25oC
mA
Output Current (Sink)
IOL
IOH
VOL
VCC = 4.5V, VIH = 4.5, VOUT = 0.4V,
VIL = 0V
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
4.0
-
-
mA
mA
V
Output Current
(Source)
VCC = 4.5V, VIH = 4.5, VOUT = VCC -0.4V
VIL = 0V
-4.0
Output Voltage Low
Output Voltage High
Input Leakage Current
VCC = 4.5V, VIH = 2.25V, VIL = 0.80V,
IOL = 50µA
-
-
0.1
0.1
-
VCC = 5.5V, VIH = 2.75V, VIL = 0.80V,
IOL = 50µA
V
VOH
VCC = 4.5V, VIH = 2.25V, VIL = 0.80V,
IOL = 50µA
VCC
-0.1
V
VCC = 5.5V, VIH = 2.75V, VIL = 0.80V,
IOL = 50µA
VCC
-0.1
-
V
IIN
FN
VCC = 5.5V, VIN = VCC or GND
+25oC
+25oC
-
-
±5
µA
Noise Immunity
Functional Test
VCC = 4.5V, VIH = 2.25V, VIL = 0.80V,
(Note 2)
-
-
Propgation Delay
CIN to S0
TPLH
TPHL
TPLH
TPHL
TPLH
TPHL
TPLH
TPHL
TPLH
TPHL
TPLH
TPHL
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
2
2
2
2
2
2
2
2
2
2
2
2
27
30
31
35
37
40
47
48
67
63
63
73
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Propagation Delay
CIN to S1
Propagation Delay
CIN to S2, CIN to COUT
Propagation Delay
CIN to S3
Propagation Delay
An, Bn to COUT
Propagation Delay
An, Bn to Sn
NOTES:
1. All voltages referenced to device GND.
2. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC)
GROUP B
PARAMETER
SUBGROUP
DELTA LIMIT
ICC
IOL/IOH
5
5
12µA
-15% of 0 Hour
Spec Number 518641
5
Specifications HCTS283MS
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
Initial Test (Preburn-In)
METHOD
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
Sample/5005
Sample/5005
GROUP A SUBGROUPS
READ AND RECORD
ICC, IOL/H
1, 7, 9
1, 7, 9
Interim Test I (Postburn-In)
Interim Test II (Postburn-In)
PDA
ICC, IOL/H
ICC, IOL/H
1, 7, 9
1, 7, 9, Deltas
Interim Test III (Postburn-In)
PDA
1, 7, 9
ICC, IOL/H
1, 7, 9, Deltas
Final Test
2, 3, 8A, 8B, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Group A (Note 1)
Group B
Subgroup B-5
Subgroups 1, 2, 3, 9, 10, 11,
(Note 2)
Subgroup B-6
Sample/5005
Sample/5005
1, 7, 9
1, 7, 9
Group D
NOTES:
1. Alternate Group A, in accordance with Method 5005 of MIL-STD-883, may be exercised.
2. Table 5 parameters only.
TABLE 7. TOTAL DOSE IRRADIATION
TEST
READ AND RECORD
CONFORMANCE
GROUPS
METHOD
PRE RAD
POST RAD
PRE RAD
POST RAD
Group E Subgroup 2
5005
1, 7, 9
Table 4
1, 9
Table 4 (Note 1)
NOTE: 1. Except FN Test which will be performed 100% Go/No-Go.
TABLE 8. STATIC BURN-IN AND DYNAMIC
OSCILLATOR
OPEN
GROUND
1/2 VCC = 3V ± 0.5V
VCC = 6V ± 0.5V
50kHz
25kHz
STATIC BURN-IN I TEST CONNECTIONS (Note 1)
1, 4, 9, 10, 13
2, 3, 5, 6, 7, 8, 11,
12, 14, 15
-
-
16
-
-
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
1, 4, 9, 10, 13
8
2, 3, 5, 6, 7, 11, 12,
14, 15, 16
-
-
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2)
1, 4, 9, 10, 13
-
8
16
2, 6, 7, 11, 15
3, 5, 12, 14
NOTES:
1. Each pin except VCC and GND will have a resistor of 10kΩ ± 5% for static burn-in
2. Each pin except VCC and GND will have a resistor of 1KΩ ± 5% for dynamic burn-in
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
GROUND
VCC = 5V ± 0.5V
2, 3, 5, 6, 7, 11, 12, 14, 15, 16
1, 4, 9, 10, 13
8
NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing.
Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number 518641
6
HCTS283MS
Intersil Space Level Product Flow - ‘MS’
Wafer Lot Acceptance (All Lots) Method 5007
(Includes SEM)
100% Interim Electrical Test 1 (T1)
100% Delta Calculation (T0-T1)
GAMMA Radiation Verification (Each Wafer) Method 1019,
4 Samples/Wafer, 0 Rejects
100% Static Burn-In 2, Condition A or B, 24 hrs. min.,
o
+125 C min., Method 1015
100% Nondestructive Bond Pull, Method 2023
Sample - Wire Bond Pull Monitor, Method 2011
Sample - Die Shear Monitor, Method 2019 or 2027
100% Internal Visual Inspection, Method 2010, Condition A
100% Interim Electrical Test 2 (T2)
100% Delta Calculation (T0-T2)
100% PDA 1, Method 5004 (Notes 1and 2)
o
100% Dynamic Burn-In, Condition D, 240 hrs., +125 C or
100% Temperature Cycle, Method 1010, Condition C,
10 Cycles
Equivalent, Method 1015
100% Interim Electrical Test 3 (T3)
100% Delta Calculation (T0-T3)
100% Constant Acceleration, Method 2001, Condition per
Method 5004
100% PDA 2, Method 5004 (Note 2)
100% Final Electrical Test
100% PIND, Method 2020, Condition A
100% External Visual
100% Fine/Gross Leak, Method 1014
100% Radiographic, Method 2012 (Note 3)
100% External Visual, Method 2009
Sample - Group A, Method 5005 (Note 4)
100% Data Package Generation (Note 5)
100% Serialization
100% Initial Electrical Test (T0)
100% Static Burn-In 1, Condition A or B, 24 hrs. min.,
o
+125 C min., Method 1015
NOTES:
1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1.
2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the
failures from subgroup 7.
3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.
4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.
5. Data Package Contents:
• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quan-
tity).
• Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.
• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test
equipment, etc. Radiation Read and Record data on file at Intersil.
• X-Ray report and film. Includes penetrometer measurements.
• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).
• Lot Serial Number Sheet (Good units serial number and lot number).
• Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test.
• The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed
by an authorized Quality Representative.
Spec Number 518641
7
HCTS283MS
Propagation Delay Timing Diagram and Load Circuit
DUT
TEST
POINT
VIH
INPUT
VS
CL
RL
CL = 50pF
VSS
RL = 500Ω
TPLH
TPHL
VOH
VOL
VS
OUTPUT
Transition Timing Diagram
AC VOLTAGE LEVELS
TTLH
VOH
TTHL
PARAMETER
VCC
HCS
4.50
3.00
0.0
UNITS
80%
80%
V
V
V
V
V
20%
20%
OUTPUT
VOL
VIH
VIL
VS
1.30
0.0
GND
Spec Number 518641
8
HCTS283MS
Die Characteristics
DIE DIMENSIONS:
78 x 86 mils
2.21mm x 2.19mm
METALLIZATION:
Type: SiAl
Metal Thickness: 11kÅ ± 1kÅ
GLASSIVATION:
Type: SiO
2
Thickness: 13kÅ ± 2.6kÅ
5
2
WORST CASE CURRENT DENSITY: <2.0 x 10 A/cm
BOND PAD SIZE:
100µm x 100µm
4 x 4 mils
Metallization Mask Layout
HCTS283MS
S1
(1)
VCC
(16)
B2
(15)
A2
(14)
B1 (2)
(13) S2
A1 (3)
S0 (4)
(12) A3
(11) B3
A0 (5)
B0 (6)
(7)
CIN
(8)
GND
(9)
COUT
(10)
S3
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
Spec Number 518641
9
相关型号：
HCTS299D/SAMPLE
HCT SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP20
RENESAS
HCTS299DMSH
HCT SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP20
RENESAS
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