HC-5504B [INTERSIL]
EIA/ITU PABX SLIC with 40mA Loop Feed; EIA / ITU PABX SLIC与40毫安循环进型号: | HC-5504B |
厂家: | Intersil |
描述: | EIA/ITU PABX SLIC with 40mA Loop Feed |
文件: | 总9页 (文件大小:90K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HC-5504B
Data Sheet
July 1998
File Number 2886.5
EIA/ITU PABX SLIC with 40mA Loop Feed
Features
The Intersil SLIC incorporates many of the BORSHT functions
on a single IC chip. This includes DC battery feed, a ring relay
driver, supervisory and hybrid functions. This device is
designed to maintain transmission performance in the
presence of externally induced longitudinal currents. Using
the unique Intersil dielectric isolation process, the SLIC can
operate directly with a wide range of station battery voltages.
• Pin for Pin Replacement for the HC-5504
• Capable of 5V or 12V (V +) Operation
B
• Monolithic Integrated Device
• DI High Voltage Process
• Compatible With Worldwide PBX Performance
Requirements
• Controlled Supply of Battery Feed Current for Short Loops
(41mA)
The SLIC also provides selective denial of power. If the PBX
system becomes overloaded during an emergency, the SLIC
will provide system protection by denying power to selected
subscriber loops.
• Internal Ring Relay Driver
• Allows Interfacing With Negative Superimposed Ringing
Systems
The Intersil SLIC is ideally suited for the design of new digital
PBX systems by eliminating bulky hybrid transformers.
• Low Power Consumption During Standby
• Switch Hook Ground Key and Ring Trip Detection
Functions
Ordering Information
• Selective Denial of Power to Subscriber Loops
PART
NUMBER
TEMP. RANGE
o
( C)
PACKAGE
24 Ld CERDIP
24 Ld CERDIP
24 Ld PDIP
PKG. NO.
F24.6
Applications
HC1-5504B-5
HC1-5504B-9
HC3-5504B-5
HC3-5504B-9
HC4P5504B-5
HC4P5504B-9
HC9P5504B-5
HC9P5504B-9
0 to 75
-40 to 85
0 to 75
• Solid State Line Interface Circuit for Analog and
Digital PBX Systems
F24.6
E24.6
• Direct Inward Dial (DID) Trunks
• Voice Messaging PBXs
• Related Literature
-40 to 85
0 to 75
24 Ld PDIP
E24.6
28 Ld PLCC
28 Ld PLCC
24 Ld SOIC
24 Ld SOIC
N28.45
N28.45
M24.3
M24.3
-40 to 85
0 to 75
- AN549, The HC-5502S/4X Telephone Subscriber Line
Interface Circuits (SLIC)
-40 to 85
- AN571, Using Ring Sync with HC-5502A and HC-5504
SLICs
Pinouts
HC-5504B (PDIP, CERDIP, SOIC)
HC-5504B (PLCC)
TOP VIEW
TOP VIEW
TIP
1
2
24 TX
23 AG
4
3
2
1
28 27 26
RING
RFS
3
22
21
20
C
R
4
V +
RX
+IN
-IN
25
24
23
B
5
6
7
8
9
V +
B
4
X
C
3
+IN
C
3
5
DG
N/C
RS
DG
RS
RD
TF
6
19 -IN
22 N/C
7
18 OUT
8
17
C
OUT
21
2
9
16 RC
15 PD
C
RD 10
20
19
2
RF
10
11
12
TF
11
RC
14 GKD
13 SHD
V -
B
BG
12 13 14 15 16 17 18
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
51
HC-5504B
Absolute Maximum Ratings (Note 1)
Thermal Information
o
Maximum Continuous Supply Voltages
Thermal Resistance (Typical, Note 2)
θJA ( C/W)
(V -) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-60V to 0.5V
B
CERDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . .
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
52
65
65
(V +) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to 15V
B
(V + - V -) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75V
B
B
Relay Drive Voltage (V ). . . . . . . . . . . . . . . . . . . . . . .-0.5V to 15V
RD
75
o
Maximum Junction Temperature (Hermetic Packages) . . . . . .175 C
o
Maximum Junction Temperature (Plastic Packages) . . . . . . . .150 C
Operating Conditions
o
o
Maximum Storage Temperature Range. . . . . . . . . . -65 C to 150 C
Operating Temperature Range
HC-5504B-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 C to 75 C
HC-5504B-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 85 C
o
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300 C
o
o
(PLCC and SOIC - Lead Tips Only)
o
o
Relay Driver Voltage (V ) . . . . . . . . . . . . . . . . . . . . . . . . . 5 to 12V
RD
Positive Supply Voltage (V +) . . . . . . . 4.75 to 5.25 or 10.8 to 13.2V
Die Characteristics
B
Negative Supply Voltage (V -). . . . . . . . . . . . . . . . . . . . . -42 to -58V
High Level Logic Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . 2.4V
Low Level Logic Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6V
B
Transistor Count. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
Diode Count. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Die Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 x 102
Substrate Potential. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connected
Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bipolar-DI
Loop Resistance (R ) . . . . . . . . . . . . . . . . . . . . . . . . . 200 to 1200Ω
L
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired.
Functional operability under any of these conditions is not necessarily implied.
2. θ is measured with the component mounted on an evaluation PC board in free air.
JA
Electrical Specifications Unless Otherwise Specified, V - = -48V, V + = 12V and 5V, AG = BG = DG = 0V, Typical Parameters
B
B
o
T = 25 C. Min-Max Parameters are Over Operating Temperature Range
A
PARAMETER
On Hook Power Dissipation
Off Hook Power Dissipation
CONDITIONS
= 0 (Note 3), V + = 12V
MIN
TYP
170
425
-
MAX
235
550
6.0
5.3
41
UNITS
mW
mW
mA
I
-
LONG
B
R
R
R
R
R
R
= 600Ω, I
= 0 (Note 3), V + = 12V
-
L
L
L
L
L
L
LONG
LONG
LONG
LONG
B
o
Off Hook I +
= 600Ω, I
= 600Ω, I
= 600Ω, I
= 0 (Note 3), T = -40 C
A
-
B
o
Off Hook I +
= 0 (Note 3), T = 25 C
A
-
-
mA
B
Off Hook I -
B
= 0 (Note 3)
-
-
35
21
-
mA
Off Hook Loop Current
Off Hook Loop Current
= 1200Ω, I
= 0 (Note 3)
-
mA
LONG
= 1200Ω, V - = -42V, I
T = 25 C
= 0 (Note 3)
17.5
-
mA
B
LONG
o
A
Off Hook Loop Current
R
= 200Ω, I
= 0 (Note 3)
36
41
48
mA
L
LONG
Fault Currents
TIP to Ground
-
-
-
-
-
-
-
14
55
41
55
0.2
-
-
-
mA
mA
mA
mA
V
RING to Ground
TIP to RING
-
TIP and RING to Ground
-
Ring Relay Drive V
OL
I
= 62mA
0.5
100
3
OL
o
Ring Relay Driver Off Leakage
Ring Trip Detection Period
V
= 12V, RC = 1 = HIGH, T = 25 C
A
µA
RD
R
= 600Ω
2
Ring
L
Cycles
Switch Hook Detection Threshold
SHD = V
SHD = V
10
-
-
-
-
mA
mA
OL
5
OH
52
HC-5504B
Electrical Specifications Unless Otherwise Specified, V - = -48V, V + = 12V and 5V, AG = BG = DG = 0V, Typical Parameters
B
B
o
T = 25 C. Min-Max Parameters are Over Operating Temperature Range (Continued)
A
PARAMETER
CONDITIONS
MIN
TYP
-
MAX
UNITS
mA
mA
mA
ms
Ground Key Detection Threshold
GKD = V
GKD = V
20
-
-
10
-
OL
-
OH
Loop Current During Power Denial
Dial Pulse Distortion
R
= 200Ω
-
±2
-
L
0
-
5
Receive Input Impedance
Transmit Output Impedance
2-Wire Return Loss
(Note 3)
(Note 3)
110
10
-
kΩ
-
20
Ω
Referenced to 600Ω + 2.16µF (Note 3)
SR LO
-
-
-
15.5
24
-
-
-
dB
dB
dB
L
ER
L
SR HI
L
31
Longitudinal Balance
2-Wire Off Hook
1V 200Hz - 3400Hz (Note 3) IEEE Method
RMS
o
o
0 C ≤ T ≤ 75 C
A
58
60
50
-
65
63
58
-
-
-
dB
dB
2-Wire On Hook
4-Wire Off Hook
-
dB
Low Frequency Longitudinal Balance
R.E.A. Method (Note 3), R = 600Ω
23
-67
dBrnC
dBm0p
L
o
o
0 C ≤ T ≤ 75 C
A
-
-
Insertion Loss
at 1kHz, 0dBm Input Level, Referenced 600Ω
-
-
±0.05
±0.02
±0.2
dB
dB
2-Wire to 4-Wire, 4 Wire to 2-Wire
Frequency Response
200Hz - 3400Hz Referenced to Absolute Loss at
1kHz and 0dBm Signal Level (Note 3)
±0.05
Idle Channel Noise
(Note 3)
-
-
1
5
dBrnC
2-Wire to 4-Wire, 4 Wire to 2-Wire
-89
-85
dBm0p
Absolute Delay
(Note 3)
-
-
2
-
ms
dB
2-Wire to 4-Wire, 4 Wire to 2-Wire
Trans Hybrid Loss
Balance Network Set Up for 600Ω Termination at
36
40
1kHz
Overload Level
V + = +5V
B
1.5
-
-
-
-
V
V
PEAK
V + = 12V
B
1.75
2-Wire to 4-Wire, 4 Wire to 2-Wire
PEAK
Level Linearity
At 1kHz Referenced to 0dBm Level (Note 3)
+3 to -40dBm
-
-
-
-
-
-
±0.05
±0.1
±0.3
dB
dB
dB
2-Wire to 4-Wire, 4 Wire to 2-Wire
-40 to -50dBm
-50 to -55dBm
(Note 3)
Power Supply Rejection Ratio
V + to 2-Wire
30 - 60Hz, R = 600Ω
15
15
15
15
-
-
-
-
-
-
-
-
dB
dB
dB
dB
B
L
V + to Transmit
B
V - to 2-Wire
B
V - to Transmit
B
53
HC-5504B
Electrical Specifications Unless Otherwise Specified, V - = -48V, V + = 12V and 5V, AG = BG = DG = 0V, Typical Parameters
B
B
o
T = 25 C. Min-Max Parameters are Over Operating Temperature Range (Continued)
A
PARAMETER
CONDITIONS
200 - 16kHz, R = 600Ω
MIN
30
30
30
30
-
TYP
MAX
UNITS
dB
V + to 2-Wire
-
-
-
-
-
-
B
L
V + to Transmit
-
dB
B
V - to 2-Wire
-
-
dB
B
V - to Transmit
B
dB
Logic Input Current (RS, RC, PD)
Logic Inputs
0V ≤ V ≤ 5V
IN
±100
µA
Logic ‘0’ V
-
-
-
0.8
5.5
V
V
IL
Logic ‘1’ V
2.0
IH
Logic Outputs
Logic ‘0’ V
I
I
I
800µA, V + = 12V, 5V
-
0.1
5.0
-
0.5
5.5
5.0
V
V
V
OL
LOAD
LOAD
LOAD
B
Logic ‘1’ V
80µA, V + = 12V
2.7
2.7
OH
B
40µA, V + = 5V
B
Uncommitted Op Amp Specifications
PARAMETER
Input Offset Voltage
Input Offset Current
Input Bias Current
CONDITIONS
MIN
TYP
MAX
UNITS
-
-
-
-
-
-
-
-
±5
±10
20
1
-
mV
nA
-
-
nA
Differential Input Resistance
Output Voltage Swing
(Note 3)
-
MΩ
R = 10K, V + = 12V
±6.2
±3
10
1
±6.6
V
V
L
B
PEAK
R
= 10K, V + = 5V
-
-
-
L
B
PEAK
Output Resistance
Small Signal GBW
NOTES:
A
= 1 (Note 3)
Ω
VCL
(Note 3)
MHz
3. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial
design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and specification com-
pliance.
4. I
= Longitudinal Current
LONG
54
HC-5504B
Pin Descriptions
28 PIN
PLCC
24 PIN
DIP/SOIC
SYMBOL
DESCRIPTION
2
3
4
1
2
3
TIP
An analog input connected to the TIP (more positive) side of the subscriber loop through a 150Ω feed re-
sistor and a ring relay contact. Functions with the Ring terminal to receive voice signals from the telephone
and for loop monitoring purposes.
RING
RFS
An analog input connected to the RING (more negative) side of the subscriber loop through a 150Ω feed
resistor and a ring relay contact. Functions with the Tip terminal to receive voice signals from the telephone
and for loop monitoring purposes.
Senses ring side of loop for ground key and ring trip detection. During ringing, the ring signal is inserted
into the line at this node and RF is isolated from RFS via a relay.
5
6
4
5
V +
Positive Voltage Source - Most positive supply. V + is typically 12V or 5V.
B
B
C
Capacitor #3 - An external capacitor to be connected between this terminal and analog ground. Required
3
for proper operation of the loop current limiting function, and for filtering V -. Typical value is 0.3µF, 30V.
B
7
9
6
7
DG
Digital Ground - To be connected to zero potential and serves as a reference for all digital inputs and out-
(Note 5) puts on the SLIC microcircuit.
RS
Ring Synchronization Input - A TTL-compatible clock input. The clock should be arranged such that a pos-
itive pulse transition occurs on the zero crossing of the ring voltage source, as it appears at the RFS termi-
nal. For Tip side injected systems, the RS pulse should occur on the negative going zero crossing and for
Ring injected systems, on the positive going zero crossing. This ensures that the ring relay activates and
deactivates when the instantaneous ring voltage is near zero. If synchronization is not required, the pin
should be tied to 5V.
10
11
8
9
RD
TF
Relay Driver - A low active open collector logic output. When enabled, the external ring relay is energized.
Tip Feed - A low impedance analog output connected to the TIP terminal through a 150Ω feed resistor.
Functions with the RF terminal to provide loop current, feed voice signals to the telephone set, and sink
longitudinal current.
12
10
RF
Ring Feed - A low impedance analog output connected to the RING terminal through a 150Ω feed resistor.
Functions with the TF terminal to provide loop current, feed voice signals to the telephone set, and sink
longitudinal current.
13
14
16
17
11
12
13
14
V -
B
Negative Voltage Source - Most negative supply. V - is typically -48V with an operational range of -42V to
B
-58V. Frequently referred to as “battery”.
BG
Battery Ground - To be connected to zero potential. All loop current and some quiescent current flows into
(Note 5) this ground terminal.
SHD
GKD
Switch Hook Detection - A low active LS TTL - compatible logic output. This output is enabled for loop cur-
rents exceeding 10mA and disabled for loop currents less than 5mA.
Ground Key Detection - A low active LS TTL - compatible logic output. This output is enabled if the DC cur-
rent into the ring lead exceeds the DC current out of the tip lead by more than 20mA, and disabled if this
current difference is less than 10mA.
18
19
15
16
PD
RC
Power Denial - A low active TTL - Compatible logic input. When enabled, the switch hook detect (SHD) and
ground key detect (GKD) are not necessarily valid, and the relay driver (RD) output is disabled.
Ring Command - A low active TTL - Compatible logic input. When enabled, the relay driver (RD) output
goes low on the next high level of the ring sync (RS) input, as long as the SLIC is not in the power denial
state (PD = 0) or the subscriber is not already off- hook (SHD = 0).
20
17
C
Capacitor #2 - An external capacitor to be connected between this terminal and digital ground. Prevents
false ground key indications from occurring during ring trip detection. Typical value is 0.15µF, 10V. This ca-
pacitor is not used if ground key function is not required and (Pin 17) may be left open or connected to digital
ground.
2
21
23
18
19
OUT
-IN
The analog output of the spare operational amplifier. The output voltage swing is typically ±5V.
The inverting analog input of the spare operational amplifier.
55
HC-5504B
Pin Descriptions (Continued)
28 PIN
PLCC
24 PIN
DIP/SOIC
SYMBOL
+IN
DESCRIPTION
24
25
20
21
The non-inverting analog input of the spare operational amplifier.
RX
Receive Input, 4-Wire Side - A high impedance analog input which is internally biased. Capacitive coupling
to this input is required. AC signals appearing at this input differentially drive the Tip feed and Ring feed
terminals, which in turn drive tip and ring through 300Ω of feed resistance on each side of the line.
26
22
C
Capacitor #4 - An external capacitor to be connected between this terminal and analog ground. This ca-
pacitor prevents false ground key indication and false ring trip detection from occurring when longitudinal
currents are induced onto the subscriber loop from near by power lines and other noise sources. This ca-
pacitor is also required for the proper operation of ring trip detection. Typical value is 0.5µF, to 1.0µF, 20V.
This capacitor should be nonpolarized.
4
27
28
23
24
AG
Analog Ground - To be connected to zero potential and serves as a reference for the transmit output (TX)
(Note 5) and receive input (RX) terminals.
TX
Transmit Output, 4-Wire Side - A low impedance analog output which represents the differential voltage
across Tip and Ring. Transhybrid balancing must be performed (using the SLIC microcircuit’s spare op
amp) beyond this output to completely implement two to four wire conversion. This output is unbalanced
and referenced to analog ground. Since the DC level of this output varies with loop current, capacitive cou-
pling to the next stage is essential.
1, 8, 15, 22
NOTE:
NC
No internal connection.
5. All grounds (AG, BG, and DG) must be applied before V + or V -. Failure to do so may result in premature failure of the part. If a user wishes
B
B
to run separate grounds off a line card, the AG must be applied first.
Functional Diagram
RING
TRIP
RS
SHD
GKD
SWITCH HOOK
DETECTION
RING SYNC
RC
RD
RING
CONTROL
LOOP
MONITORING
RING COMMAND
GROUND KEY
DETECTION
TIP
1/2 RING
RELAY
DIFF
AMP
TIP
150Ω
TX
TRANSMIT
OUTPUT
-
+
150Ω
TF
2 WIRE
LOOP
V -
B
SECONDARY
PROTECTION
BATTERY
FEED
OUT
+1
BG
RF
V -
B
+IN
-IN
RX
LOOP
CURRENT
LIMITER
LINE
DRIVERS
RFS
+
-
1/2 RING
RELAY
OP
AMP
150Ω
-1
RING
RECEIVE
INPUT
RING
PD
150Ω
RING
VOLTAGE
POWER DENIAL
SLIC MICROCIRCUIT
V -
B
56
HC-5504B
Schematic Diagram
SLIC FUNCTIONAL SCHEMATIC
Pin Numbers for DIP/SOIC Package
21
22
11
12
23
6
4
20
19
18
BAT
GND
ANA
GND
DIG
GND
RX
C4
V
V +
B
+
-
OUT
BAT
V
+
V
+
B
B
V
V
V
V
V
B1
B2
B3
B4
B5
A-500
OP AMP
VOLTAGE AND CURRENT
BIAS NETWORK
V
BAT
+5V
R
I
17
B3
V
+
+
B
A-400
TIP FEED
AMP
I
I
I
I
I
I
I
I
I
I
I
V
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11
BAT
V
B2
TF
9
V
BAT
RING TRIP DETECTOR
5V
-
I
B4
I
V
+
B10
5V
B
R
12
V
+
B
R
7
-
GK
TIP
1
R
Q
Q
A-200
LONG’L
I/V AMP
20
D3 D36
R
V
+
8
B
V
I
V
+
BAT
B4
GKD
14
GND SHORTS
CURRENT
LIMITING
V
BAT
+
R
I
RING
FEED
SENSE
10
B7
R
B8
11
I
B1
V
BAT
V
R
9
+ V
BAT
B
R
R
23
3
22
-
+
C2
17
R
5
STTL
AND LOGIC
INTERFACE
V
B3
V
+
B
+
SWITCH HOOK
DETECTOR
R
3
A-100
TRANSV’L
I/V AMP
V
BAT
R
R
R
4
V
+
RING
2
B
SHD
13
-
V
SH
BAT
1
2
+
I
-
B6
V
B1
R
6
I
B6
R
16
15
Q
Q
D28
D27
V
REFERENCE
RC
16
BAT/2
R
THERMAL
LIMITING
V
B2
R
14
LOAD CURRENT
LIMITING
R
R
I
18
B2
RFC
R
-
21
PD
15
V
B5
A-300
V
B5
RF
10
-
RING FEED
AMP
+
+
V
BAT
19
V
BAT
I
B5
R
13
V
BAT
V
BAT
C3
5
TX
24
RS
RD
7
8
57
HC-5504B
Schematic Diagram (Continued)
LOGIC GATE SCHEMATIC
C2
LOGIC BIAS
GK
2
1
DELAY
3
6
7
8
9
4
5
12
SH
16
10
13
RELAY
DRIVER
11
14
15
STTL
TO
TTL
STTL
TO
TTL
TTL
TO
STTL
TTL
TO
STTL
TTL
TO
STTL
C
B
A
TO
21
R
A
B
C
RS
RC
PD
RD
SHD
GKD
SCHOTTKY LOGIC
TABLE 1.
Overvoltage Protection and Longitudinal
Current Protection
TEST
PERFORMANCE
(MAX)
PARAMETER
CONDITION
UNITS
The SLIC device, in conjunction with an external protection
bridge, will withstand high voltage lightning surges and
power line crosses.
Longitudinal
Surge
10µs Rise/
1000µs Fall
10µs Rise/
1000µs Fall
10µs Rise/
1000µs Fall
±1000 (Plastic)
±500 (Ceramic)
±1000 (Plastic)
±500 (Ceramic)
±1000 (Plastic)
±500 (Ceramic)
V
PEAK
V
V
V
V
V
PEAK
PEAK
PEAK
PEAK
PEAK
Metallic Surge
High voltage surge conditions are as specified in Table 1.
The SLIC will withstand longitudinal currents up to a
maximum or 30mA
RMS
, 15mA per leg, without any
RMS
T/GND
performance degradation.
R/GND
50/60Hz Current
T/GND
11 Cycles
Limited to
700 (Plastic)
V
RMS
RMS
R/GND
350 (Ceramic)
V
10A
RMS
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
58
HC-5504B
Applications Diagram
5V TO
12V
SYSTEM CONTROLLER
15
13
14
7
16
C
R
S1
S1
K
POWER SWITCH GROUND RING RING
K
BALANCE NETWORK
C
1
SYNC
DENIAL HOOK
KEY
CMD
RX
5
8
1
9
21
DETECT DETECT
RD
R
B1
C
6
TIP
1A
24
20
C
7
TIP
TX
R
B2
PCM
FILTER/
CODEC
ZB
SWITCHING
NETWORK
SLIC
HC-5504B
TIP FEED
+IN
R
1
SUBSCRIBER
LOOP
19
1
-IN
R
3
OP AMP
V
-
R
PRIMARY
PROTECTION
B
2
18
OUT
K
1B
10
3
RING FEED
17
5
C2
R
S2
RING FEED SENSE
C3
C4
C
S2
R
22
B4
2
NEG.
BATT.
BATT.
GND.
DIG. ANA.
GND. GND.
V
+
B
RING
RING
R
+
B3
11
12
6
23
4
C
C
C
4
2
3
PTC
+
C
C
8
9
V
+
-48V
B
150V
(MAX)
Z
1
PEAK
RING GENERATOR
-48V
FIGURE 1. TYPICAL LINE CIRCUIT APPLICATION WITH THE MONOLITHIC SLIC
Typical Component Values
C = 0.15µF, 10V
R = R = R = 100kΩ (0.1% Match Required, 1% absolute
2
1
2
3
value) ZB = 0 for 600Ω Terminations (Note 7).
C = 0.3µF, 30V
3
R
= R = R = R = 150Ω (0.1% Match Required, 1%
B2 B3 B4
B1
absolute value).
C = 0.5µF to 1.0µF, 10%, 20V (Should be nonpolarized)
4
C = 0.5µF, 20V
5
R
C
= R =1kΩ, typically.
S2
S1
S1
C = C = 0.5µF (10% Match Required) (Note 7)
6
7
= C = 0.1µF, 200V typically, depending on V
S2
and
RING
C = 0.01µF, 100V
8
line length.
C = 0.01µF, 20V, ±20%
9
Z = 150V to 200V transient protection.
1
PTC used as ring generator ballast.
NOTES:
6. Secondary protection diode bridge recommended is a 2A, 200V type.
7. To obtain the specified transhybrid loss it is necessary for the three legs of the balance network, C -R and R and C -ZB-R , to match in im-
6
1
2
7
3
pedance to within 0.3%. Thus, if C and C are 1µF each, a 20% match is adequate. It should be noted that the transmit output to C sees a -
6
7
6
22V step when the loop is closed. Too large a value for C may produce an excessively long transient at the op amp output to the PCM Fil-
6
ter/CODEC.
A 0.5µF and 100kΩ gives a time constant of 50ms. The uncommitted op amp output is internally clamped to stay within ±5.5V and also has
current limiting protection.
8. All grounds (AG, BG, and DG) must be applied before V + or V -. Failure to do so may result in premature failure of the part. If a user wishes
B
B
to run separate grounds off a line card, the AG must be applied first.
9. Application shows Ring Injected Ringing, Balanced or Tip injected configuration may be used.
10. Pin numbers given for DIP/SOIC package.
59
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