HA-5020/883 [INTERSIL]
100MHz Current Feedback Video Amplifier with Disable; 100MHz的电流反馈视频放大器具有禁用
| 型号： | HA-5020/883 |
| 厂家： | 
Intersil |
| 描述： | 100MHz Current Feedback Video Amplifier with Disable |
| 文件： | 总19页 (文件大小：573K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HA-5020/883
100MHz Current Feedback
Video Amplifier with Disable
January 1996
Features
Description
• This Circuit is Processed in Accordance to MIL-STD- The HA-5020/883 is a wide bandwidth, high slew rate
883 and is Fully Conformant Under the Provisions of amplifier optimized for video applications and gains between
Paragraph 1.2.1.
1 and 10. Manufactured on Intersil’s Reduced Feature
Complementary Bipolar DI process, this amplifier uses cur-
rent mode feedback to maintain higher bandwidth at a given
• Wide Unity Gain Bandwidth . . . . . . . . . . 105MHz (Min)
• Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800V/µs gain than conventional voltage feedback amplifiers. Since it
is a closed loop device, the HA-5020/883 offers better gain
accuracy and lower distortion than open loop buffers.
• Output Current . . . . . . . . . . . . . . . . . . . . . . ±30mA (Min)
• Drives 3.5V into 75Ω
The HA-5020/883 features low differential gain and phase and
will drive two double terminated 75Ω coax cables to video
levels with low distortion. Adding a gain flatness performance
of 0.1dB makes this amplifier ideal for demanding video
applications. The bandwidth and slew rate of the HA-5020/
883 are relatively independent of closed loop gain. The
105MHz unity gain bandwidth only decreases to 77MHz at a
gain of 10. The HA-5020/883 used in place of a conventional
op amp will yield a significant improvement in the speed
power product. To further reduce power, the HA-5020/883 has
a disable function which significantly reduces supply current,
while forcing the output to a true high impedance state. This
allows the outputs of multiple amplifiers to be wire-OR’d into
multiplexer configurations. The device also includes output
short circuit protection and output offset voltage adjustment.
• Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . 0.025%
• Differential Phase. . . . . . . . . . . . . . . . . . . . . . .0.025 Deg
• Low Input Noise Voltage . . . . . . . . . . . . . . . . 4.5nV/√Hz
• Low Supply Current. . . . . . . . . . . . . . . . . . . 10mA (Max)
• Wide Supply Range . . . . . . . . . . . . . . . . . . . ±5V to ±15V
• Output Enable/Disable
• High Performance Replacement for EL2020/883
Applications
• Unity Gain Video/Wideband Buffer
• Video Gain Block
The HA-5020/883 offers significant enhancements over
competing amplifiers, such as the EL2020. Improvements
include unity gain bandwidth, slew rate, video performance,
lower supply current, and superior DC specifications.
• Video Distribution Amp/Coax Cable Driver
• Flash A/D Driver
• Waveform Generator Output Driver
• Current to Voltage Converter; D/A Output Buffer
• Radar Systems
Ordering Information
PART
NUMBER
TEMPERATURE
RANGE
PACKAGE
8 Lead CerDIP
o
o
HA7-5020/883
HA4-5020/883
-55 C to +125 C
• Imaging Systems
o
o
-55 C to +125 C
20 Lead Ceramic LCC
Pinouts
HA-5020/883
(CERDIP)
HA-5020/883
(CLCC)
TOP VIEW
TOP VIEW
BAL
-IN
+IN
V-
1
2
3
4
8
7
6
5
DISABLE
V+
-
3
2
1
20 19
+
OUT
18
NC
NC
-IN
4
5
6
7
8
NC
17
NC
BAL
16
-
V+
+
15
NC
+IN
NC
14
OUT
9
10 11 12 13
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Spec Number 511080-883
File Number 3541.2
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
3-94
Specifications HA-5020/883
Absolute Maximum Ratings
Thermal Information (Typical)
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . . 36V
Differential Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V
Voltage at Either Input Terminal . . . . . . . . . . . . . . . . . . . . . . V+ to V-
Thermal Package Characteristics
θ
θ
JC
JA
o
o
CerDIP Package . . . . . . . . . . . . . . . . . . . . . . 115 C/W 30 C/W
Ceramic LCC Package . . . . . . . . . . . . . . . . . 75 C/W 23 C/W
Package Power Dissipation Limit at +75 C for T ≤ +175 C
CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.87W
Ceramic LCC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.33W
Package Power Dissipation Derating Factor Above +75 C
CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.7mW/ C
Ceramic LCC Package . . . . . . . . . . . . . . . . . . . . . . . . 13.3mW/ C
o
o
o
o
Peak Output Current. . . . . . . . . . . . . . . . Full Short Circuit Protected
J
o
Junction Temperature (T ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175 C
J
o
o
Storage Temperature Range . . . . . . . . . . . . . . . . . -65 C to +150 C
ESD Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .< 2000V
o
o
o
Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . +300 C
o
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
o
o
Operating Temperature Range. . . . . . . . . . . . . . . . -55 C to +125 C
V
≤ 1/2(V+ - V-)
R = 1kΩ
F
INCM
Operating Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . ±5V to ±15V
R
≥ 400Ω
V
= V+ or 0V
L
DISABLE
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at: Supply Voltage = ±15V, R = 0Ω, A = +1, R = 1kΩ, R = 400Ω, V = 0V, V = V+,
DISABLE
SOURCE
VCL
F
LOAD
OUT
Unless Otherwise Specified.
LIMITS
GROUP A
PARAMETERS
SYMBOL
CONDITIONS
= 0V
CM
SUBGROUP
TEMPERATURE
MIN
MAX
UNITS
mV
mV
dB
o
Input Offset Voltage
V
V
1
2, 3
1
+25 C
-8
-10
60
50
60
50
64
60
8
10
-
IO
o
o
+125 C, -55 C
o
Common Mode
Rejection Ratio
+CMRR
-CMRR
+PSRR
∆V
= +10V, V+ = 5V,
+25 C
CM
V- = -25V
o
o
2, 3
1
+125 C, -55 C
-
dB
o
∆V = -10V, V+ = 25V,
+25 C
-
dB
CM
V- = -5V
o
o
2, 3
1
+125 C, -55 C
-
dB
o
Power Supply Rejection
Ratio
∆V = 13.5V,
+25 C
-
dB
SUP
V+ = 4.5V, V- = -15V;
V+ = 18V, V- = -15V
o
o
2, 3
+125 C, -55 C
-
dB
o
-PSRR
∆V
= 13.5V,
1
+25 C
64
60
-
-
dB
dB
SUP
V+ = 15V, V- = -4.5V;
V+ = 15V, V- = -18V
o
o
2, 3
+125 C, -55 C
o
Non-Inverting (+IN)
Current
I
V
= 0V
CM
1
2, 3
1
+25 C
-8
8
20
0.1
0.5
0.1
0.5
-
µA
BP
o
o
+125 C, -55 C
-20
µA
o
+IN Common Mode
Rejection
IBPCMP
IBPCMN
∆V
V- = -25V
= +10V, V+ = 5V,
+25 C
-
-
µA/V
µA/V
µA/V
µA/V
MΩ
CM
o
o
2, 3
1
+125 C, -55 C
o
∆V = -10V, V+ = 25V,
V- = -5V
+25 C
-
CM
o
o
2, 3
1
+125 C, -55 C
-
o
Non-Inverting (+IN) Input
Impedance
+R
Calculated 1/IBPCMP
+25 C
10
2
-
IN
o
o
2, 3
1
+125 C, -55 C
-
MΩ
o
+IN Power Supply
Rejection
IBPPSP
IBPPSN
∆V
= 13.5V,
+25 C
0.06
0.2
µA/V
µA/V
SUP
V+ = 4.5V, V- = -15V;
V+ = 18V, V- = -15V
o
o
2, 3
+125 C, -55 C
-
o
∆V
= 13.5V,
1
+25 C
-
-
0.06
0.2
µA/V
µA/V
SUP
V+ = 15V, V- = -4.5V;
V+ = 15V, V- = -18V
o
o
2, 3
+125 C, -55 C
o
Inverting Input (-IN)
Current
I
V
= 0V
CM
1
+25 C
-20
-50
20
50
µA
µA
BN
o
o
2, 3
+125 C, -55 C
Spec Number 511080-883
3-95
Specifications HA-5020/883
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Tested at: Supply Voltage = ±15V, R
= 0Ω, A
= +1, R = 1kΩ, R
= 400Ω, V
= 0V, V
= V+,
SOURCE
VCL
F
LOAD
OUT
DISABLE
Unless Otherwise Specified.
LIMITS
MIN
GROUP A
SUBGROUP
PARAMETERS
SYMBOL
CONDITIONS
TEMPERATURE
MAX
0.4
0.5
0.4
0.5
0.2
0.5
UNITS
µA/V
µA/V
µA/V
µA/V
µA/V
µA/V
o
-IN Common Mode
Rejection
IBNCMP
∆V
= +10V, V+ = 5V,
V- = -25V
1
2, 3
1
+25 C
-
-
-
-
-
-
CM
o
o
+125 C, -55 C
o
IBNCMN
IBNPSP
∆V = -10V, V+ = 25V,
V- = -5V
+25 C
CM
o
o
2, 3
1
+125 C, -55 C
o
-IN Power Supply
Rejection
∆V = 13.5V,
+25 C
SUP
V+ = 4.5V, V- = -15V;
V+ = 18V, V- = -15V
o
o
2, 3
+125 C, -55 C
o
IBNPSN
∆V
= 13.5V,
1
+25 C
-
-
0.2
0.5
µA/V
µA/V
SUP
V+ = 15V, V- = -4.5V;
V+ = 15V, V- = -18V
o
o
2, 3
+125 C, -55 C
o
Common Mode Range
Transimpedance
+CMR
-CMR
V+ = 5V, V- = -25V
1
2, 3
1
+25 C
10
10
-
-
V
V
o
o
+125 C, -55 C
-
o
V+ = 25V, V- = -5V
+25 C
-10
V
o
o
2, 3
1
+125 C, -55 C
-
-10
V
o
+A
R = 400Ω, V
10V
= 0 to
= 0 to
+25 C
1
-
MΩ
MΩ
MΩ
MΩ
V
ZOL1
L
OUT
o
o
2, 3
1
+125 C, -55 C
1
-
o
-A
R = 400Ω, V
+25 C
1
-
ZOL1
L
OUT
-10V
o
o
2, 3
1, 2
3
+125 C, -55 C
1
-
o
o
Output Voltage Swing
+V
V
V
= 12.8V
= -12.8V
+25 C, +125 C
12
11
-
-
OUT
IN
IN
o
-55 C
-
-12
-11
-
V
o
o
-V
1, 2
3
+25 C, +125 C
V
OUT
o
-55 C
-
V
o
+V
V+ = 5V, V- = -5V,
= 3V
1
+25 C
2
V
OUT5
V
IN
o
o
2, 3
1
+125 C, -55 C
2
-
V
o
-V
V+ = 5V, V- = -5V,
= -3V
+25 C
-
-2
-2
-
V
OUT5
V
IN
o
o
2, 3
1, 2
3
+125 C, -55 C
-
V
o
o
Output Current
+I
Note 1
Note 1
+25 C, +125 C
30
27.5
-
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
OUT
o
-55 C
-
o
o
-I
1, 2
3
+25 C, +125 C
-30
-27.5
-
OUT
o
-55 C
-
o
Short Circuit Output
Current
+I
R = Open, V = 10V
1
+25 C
50
50
-
SC
L
IN
o
o
2, 3
1
+125 C, -55 C
-
o
-I
R = Open, V = -10V
+25 C
-50
-50
1
SC
L
IN
o
o
2, 3
1
+125 C, -55 C
-
o
Disabled Output Current
+I
V
= 0V, V
= +10V,
+25 C
-1
-1
-1
-1
-1
-1
LEAK
IN
OUT
R = Open, V
= 0V
L
DIS
o
3
-55 C
1
o
V
V
= 2V
2
+125 C
1
IN
IN
o
-I
= 0V, V
= -10V,
1
+25 C
1
LEAK
OUT
R = Open, V
= 0V
DIS
L
o
3
-55 C
1
o
V
= -2V
2
+125 C
1
IN
Spec Number 511080-883
3-96
Specifications HA-5020/883
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Tested at: Supply Voltage = ±15V, R
= 0Ω, A
= +1, R = 1kΩ, R
= 400Ω, V
= 0V, V
= V+,
SOURCE
VCL
F
LOAD
OUT
DISABLE
Unless Otherwise Specified.
LIMITS
GROUP A
PARAMETERS
SYMBOL
I
CONDITIONS
SUBGROUP
TEMPERATURE
MIN
MAX
UNITS
mA
mA
µA
o
o
Disable Pin Input Current
V
= 0V
DIS
1, 2
3
+25 C, +125 C
-1
-1.5
-
0
0
LOGIC
o
-55 C
o
Minimum DISABLE Pin
Current to Disable
I
Note 2
Note 3
1
+25 C
350
350
-
DIS
o
o
2, 3
1
+125 C, -55 C
-
µA
o
Maximum DISABLE Pin
Current to Enable
I
+25 C
20
20
-
µA
EN
CC
o
o
2, 3
1
+125 C, -55 C
-
µA
o
Quiescent Power Supply
Current
I
R = 400Ω
+25 C
10
10
-
mA
mA
mA
mA
mA
mA
mA
mA
mV
mV
mV
mV
L
o
o
2, 3
1
+125 C, -55 C
-
o
I
R = 400Ω
+25 C
-10
-10
-
EE
L
o
o
2, 3
1
+125 C, -55 C
-
o
Disabled Power Supply
Current
I
R = 400Ω, V
= 0V
= 0V
+25 C
5.6
7.5
-
CCDIS
L
DIS
DIS
o
o
2, 3
1
+125 C, -55 C
-
o
I
R = 400Ω, V
+25 C
-5.6
-7.5
30
25
-
EEDIS
L
o
o
2, 3
1
+125 C, -55 C
-
o
Offset Voltage
Adjustment
+V
Note 4
Note 4
+25 C
-
ADJ
o
o
2, 3
1
+125 C, -55 C
-
o
-V
+25 C
-30
-25
ADJ
o
o
2, 3
+125 C, -55 C
-
NOTES:
1. Guaranteed from V
test by I
= V
/400Ω.
OUT
OUT
OUT
2. This is the minimum current which must be sourced from the DISABLE pin, to disable the output. The output is considered disabled when
≤ 10mV. Conditions are: V = 10V, R = 100Ω. The test is performed by sourcing 350µA from the DISABLE pin, and testing that
V
OUT
IN
L
the output decreases below the test limit (10mV).
3. This is the maximum current that can be sourced from the DISABLE pin with the device remaining enabled. The device is considered
disabled when the supply current decreases by at least 0.5mA. Conditions are: R = 400Ω. Test is performed by sourcing 20µA from the
L
DISABLE pin, and testing that the supply current decreases by no more than the test limit (0.5mA).
4. The offset adjustment range is referred to the output. The inverting input current (-I
) can be adjusted with an external pot between pins
BIAS
1 and 5, wiper connected to V+. Since -I
flows through R , an adjustment of offset voltage results. The amount of offset adjustment is
BIAS
F
proportional to the value of R . Test conditions are: R = Open, 10kΩ from pin 5 to V+, 1kΩ from pin 1 to V+, for +V ; R = Open, 1kΩ
F
L
ADJ
L
from pin 5 to V+, 10kΩ from pin 1 to V+, for -V
.
ADJ
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at: Supply Voltage = ±15V, R
= 50Ω, R
= 400Ω, C
≤ 10pF, A = +1V/V, Unless Otherwise Specified.
VCL
SOURCE
LOAD
LOAD
LIMITS
GROUP A
PARAMETERS
Slew Rate
SYMBOL
CONDITIONS
SUBGROUP
TEMPERATURE
MIN
600
400
600
400
MAX
UNITS
V/µs
V/µs
V/µs
V/µs
o
+SR
V
V
= -10V to +10V
4
+25 C
-
-
-
-
IN
IN
o
o
5, 6
4
+125 C, -55 C
o
-SR
= +10V to -10V
+25 C
o
o
5, 6
+125 C, -55 C
Spec Number 511080-883
3-97
Specifications HA-5020/883
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Characterized at: Supply Voltage = ±15V, R
= 50Ω, R
= 400Ω, R = 1kΩ, V
= V+, C
≤ 10pF, A = +1V/V,
VCL
SOURCE
LOAD
F
DISABLE
LOAD
Unless Otherwise Specified.
LIMITS
PARAMETERS
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
105
77
MAX
UNITS
MHz
o
-3dB Bandwidth
BW
V
= 100mV
= 100mV
, A = +1
1
1
+25 C
-
-
1
O
RMS
V
o
BW
V
, A = +10,
+25 C
MHz
10
O
RMS
V
R = 360Ω, R = Open
F
L
o
Gain Flatness
GF
V
= 100mV
= 100mV
O
, f = 5MHz
1
1
+25 C
-0.075
+0.075
+0.2
3.7
dB
dB
ns
5
O
RMS
RMS
o
GF
V
, f = 10MHz
+25 C
-0.2
10
o
Rise Time
Fall Time
Overshoot
t
V
= 0V to 1V, R = 100Ω
1, 2
1, 3
1
+25 C
-
R
O
L
o
t
V
= 1V to 0V, R = 100Ω
+25 C
-
4.0
ns
F
O
O
L
o
+OVS
-OVS
V
= 0V to 1V, R = 100Ω
+25 C
-
-
18.0
16.6
-
%
L
o
V
= 1V to 0V, R = 100Ω
1
+25 C
%
O
L
o
Slew Rate
+SR
V
= -10V to 10V, A = +10,
1, 4
+25 C
1070
V/µs
10
O
V
R = 360Ω, R = Open
F
L
o
-SR
V
= 10V to -10V, A = +10,
1, 5
1, 6
1, 6
+25 C
860
-
V/µs
µs
10
O
V
R = 360Ω, R = Open
F
L
o
Disable Time
+t
V
= 2V to 0V, 50% of V to
DIS
+25 C
-
-
3.13
2.44
DIS
O
90% V
O
o
-t
V
= -2V to 0V, 50% of V to
DIS
+25 C
µs
DIS
O
90% V
O
o
Enable Time
NOTES:
+t
V
= 0V to 2V, 50% to 90%
1, 7
1, 7
+25 C
-
-
1.45
1.49
µs
µs
EN
O
o
-t
V
= 0V to -2V, 50% to 90%
+25 C
EN
O
1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These param-
eters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization
based upon data from multiple production runs which reflect lot to lot and within lot variation.
2. Measured from 10% to 90% of the output waveform.
3. Measured from 90% to 10% of the output waveform.
4. Measured from 25% to 75% of the output waveform.
5. Measured from 75% to 25% of the output waveform.
6. DISABLE = +15V to 0V. Measured from the 50% of DISABLE to V
7. DISABLE = 0V to +15V. Measured from the 50% of DISABLE to V
= ±200mV.
= ±1.8V.
OUT
OUT
TABLE 4. ELECTRICAL TEST REQUIREMENTS
MIL-STD-883 TEST REQUIREMENTS
SUBGROUPS (SEE TABLES 1 AND 2)
Interim Electrical Parameters (Pre Burn-In)
Final Electrical Test Parameters
Group A Test Requirements
1
1 (Note 1), 2, 3, 4, 5, 6
1, 2, 3, 4, 5, 6
1
Groups C and D Endpoints
NOTE:
1. PDA applies to Subgroup 1 only.
Spec Number 511080-883
3-98
HA-5020/883
Die Characteristics
DIE DIMENSIONS:
65 x 60 x 19 mils ± 1 mils
1640µm x 1520µm x 483µm ± 25.4µm
METALLIZATION:
Type: Al, 1% Cu
Thickness: 16kÅ ± 2kÅ
WORST CASE CURRENT DENSITY:
5.77 x 104 A/cm2 at 30mA
SUBSTRATE POTENTIAL (Powered Up): V-
GLASSIVATION:
Type: Nitride over Silox
Silox Thickness: 12kÅ ± 2kÅ
Nitride Thickness: 3.5kÅ ± 1kÅ
TRANSISTOR COUNT: 62
PROCESS: Bipolar Dielectric Isolation
Metallization Mask Layout
HA-5020/883
BAL
DISABLE
V+
7
2
1
8
-IN
6
OUT
3
4
5
+IN
V-
BAL
Spec Number 511080-883
3-99
HA-5020/883
Test Circuit (Applies to Table 1)
1K
10K
1K
K9
BAL. ADJ.
K10
10K
V+
10
0.1
ICC
VY
500
0.1
-IBIAS
=
100K
1K
(0.01%)
-
+
VY
x100
7
-
VX
V
=
1
500
IO
2
100
5
6
1K
-
+
VX
VOUT
DUT
0.1
500
K7
3
+
x100
8
400
100
200pF
150pF
4
K12
K1
200K (0.1%)
K3
K4
VZ
+IBIAS
=
200K
VZ
-
+
10
0.1
VDISABLE
HA-5177
VIN
IEE
NOTE: All Resistors = ±1% (Ω)
All Capacitors = ±10% (µF)
Unless Otherwise Noted
V-
Test Waveforms
SIMPLIFIED TEST CIRCUIT FOR LARGE AND SMALL SIGNAL PULSE RESPONSE (Applies to Tables 2 and 3)
A = +1 TEST CIRCUIT
A = +10 TEST CIRCUIT
V
V
V+
V+
VDISABLE
VDISABLE
VIN
VIN
+
-
+
-
VOUT
VOUT
RS
50Ω
RS
50Ω
RF
360Ω
CL
RL
RL
RG
40Ω
1kΩ
V-
V-
NOTE: V = ±15V, A = +10, C ≤ 10pF
NOTE: V = ±15V, A = +1, C ≤ 10pF
S
V
L
S
V
L
R = 360Ω, R = 40Ω
R = 1kΩ, R = 50Ω
F
S
G
F
S
R
= 50Ω, R = Open
R = 400Ω For Large Signal
L
L
R = 100Ω For Small Signal
L
LARGE SIGNAL WAVEFORM
SMALL SIGNAL WAVEFORM
VOUT
+10V
VOUT
+1V
+10V
+1V
90%
90%
75%
75%
+SR, +SR10
-10V
-SR, -SR10
-10V
tr, +OVS
0V
tf, -OVS
0V
25%
25%
10%
10%
NOTE: A = +1: +SR, -SR
V
A = +10: +SR10, -SR10
V
Spec Number 511080-883
3-100
HA-5020/883
Test Waveforms (Continued)
SIMPLIFIED TEST CIRCUIT FOR ENABLE/DISABLE TIMES
V+
VDISABLE
VIN
+
-
VOUT
CL
RL
RF
1kΩ
V-
NOTE: V = ±15V, A = +1, C ≤ 10pF
S
V
L
R = 1kΩ, R = 400Ω
F
L
POSITIVE ENABLE/DISABLE SWITCHING WAVEFORMS
VDISABLE
NEGATIVE ENABLE/DISABLE SWITCHING WAVEFORMS
VDISABLE
+15V
+15V
+15V
+15V
50%
50%
50%
50%
0V
V
0V
0V
0V
V
OUT
+2V
OUT
0V
+2V
0V
0V
90%
90%
10%
10%
0V
-2V
-2V
+t
+t
-t
DIS
-t
EN
DIS
EN
Spec Number 511080-883
3-101
HA-5020/883
Burn-In Circuits
HA7-5020/883 CERAMIC DIP
R3
1
2
3
4
8
7
6
5
R1
R2
V+
-
C1
D1
+
V-
D2
C2
Spec Number 511080-883
3-102
HA-5020/883
Schematic Diagram
BAL
BAL
V+
5Ibn
VDISABLE
OUT
+IN
-IN
+1
IREF
5Ibp
V-
Spec Number 511080-883
3-103
HA-5020/883
Packaging
c1 LEAD FINISH
F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A)
8 LEAD DUAL-IN-LINE FRIT-SEAL CERAMIC PACKAGE
INCHES MILLIMETERS
MIN
-D-
E
-A-
-B-
BASE
METAL
(c)
SYMBOL
MAX
0.200
0.026
0.023
0.065
0.045
0.018
0.015
0.405
0.310
MIN
-
MAX
5.08
0.66
0.58
1.65
1.14
0.46
0.38
10.29
7.87
NOTES
b1
A
b
-
-
2
3
-
M
M
0.014
0.014
0.045
0.023
0.008
0.008
-
0.36
0.36
1.14
0.58
0.20
0.20
-
(b)
b1
b2
b3
c
SECTION A-A
S
S
S
D
bbb
C A - B
D
4
2
3
5
5
-
BASE
Q
PLANE
A
-C-
c1
D
SEATING
PLANE
L
α
E
0.220
5.59
S1
eA
A A
e
e
0.100 BSC
2.54 BSC
b2
eA/2
b
c
eA
eA/2
L
0.300 BSC
0.150 BSC
7.62 BSC
3.81 BSC
-
-
M
S
S
M
S
S
D
ccc
C A - B
D
aaa
C A - B
0.125
0.200
3.18
5.08
-
Q
0.015
0.005
0.005
0.060
0.38
0.13
0.13
1.52
6
7
-
NOTES:
S1
S2
-
-
-
-
1. Index area: A notch or a pin one identification mark shall be locat-
ed adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark.
o
o
o
o
90
105
90
105
-
α
aaa
bbb
ccc
M
-
-
-
-
0.015
0.030
0.010
0.0015
-
-
-
-
0.38
0.76
0.25
0.038
-
2. The maximum limits of lead dimensions b and c or M shall be
measured at the centroid of the finished lead surfaces, when
solder dip or tin plate lead finish is applied.
-
-
2
8
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness.
N
8
8
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b1.
5. This dimension allows for off-center lid, meniscus, and glass
overrun.
6. Dimension Q shall be measured from the seating plane to the
base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling Dimension: Inch.
11. Lead Finish: Type A.
12. Materials: Compliant to MIL-M-38510.
Spec Number 511080-883
3-104
HA-5020/883
Packaging (Continued)
J20.A MIL-STD-1835 CQCC1-N20 (C-2)
20 PAD METAL SEAL LEADLESS CERAMIC CHIP CARRIER
D
D3
INCHES MILLIMETERS
MIN
j x 45o
SYMBOL
A
MAX
0.100
0.088
-
MIN
1.52
1.27
-
MAX
2.54
2.23
-
NOTES
0.060
0.050
-
6, 7
7
4
2, 4
-
A1
B
B1
B2
B3
D
0.022
0.028
0.56
0.71
E3
E
0.072 REF
1.83 REF
B
0.006
0.342
0.022
0.358
0.15
8.69
0.56
9.09
-
-
D1
D2
D3
E
0.200 BSC
0.100 BSC
5.08 BSC
2.54 BSC
-
-
h x 45o
-
0.358
0.358
-
9.09
9.09
2
-
0.342
8.69
E1
E2
E3
e
0.200 BSC
0.100 BSC
0.358
0.050 BSC
0.015
5.08 BSC
2.54 BSC
9.09
1.27 BSC
0.38
1.02 REF
0.51 REF
-
-
A
A1
-
-
2
-
PLANE 2
PLANE 1
e1
h
-
-
2
5
5
-
0.040 REF
0.020 REF
j
L
0.045
0.045
0.075
0.003
0.055
0.055
0.095
0.015
1.14
1.14
1.90
0.08
1.40
1.40
2.41
0.38
L3
L
e
L1
L2
L3
ND
NE
N
-
-
-
5
5
5
5
3
3
3
20
20
B3
B1
E1
NOTES:
1. Metallized castellations shall be connected to plane 1 terminals
and extend toward plane 2 across at least two layers of ceramic
or completely across all of the ceramic layers to make electrical
connection with the optional plane 2 terminals.
E2
L2
B2
2. Unless otherwise specified, a minimum clearance of 0.015 inch
(0.381mm) shall be maintained between all metallized features
(e.g., lid, castellations, terminals, thermal pads, etc.)
L1
D2
e1
3. Symbol “N” is the maximum number of terminals. Symbols “ND”
and “NE” are the number of terminals along the sides of length
“D” and “E”, respectively.
D1
4. The required plane 1 terminals and optional plane 2 terminals
shall be electrically connected.
5. The corner shape (square, notch, radius, etc.) may vary at the
manufacturer’s option, from that shown on the drawing.
6. Chip carriers shall be constructed of a minimum of two ceramic
layers.
7. Maximum limits allows for 0.007 inch solder thickness on pads.
8. Lead Finish: Type A.
9. Materials: Compliant to MIL-M-38510.
Spec Number 511080-883
3-105
HA-5020
100MHz Current Feedback
Video Amplifier with Disable
DESIGN INFORMATION
December 1999
The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application
and design information only. No guarantee is implied.
o
Typical Performance Curves V
= ±15V, A = +1, R = 1kΩ, R = 400Ω, T = +25 C, Unless Otherwise Specified
SUPPLY
V
F
L
A
INPUT NOISE vs FREQUENCY
INPUT OFFSET VOLTAGE vs TEMPERATURE
Average of 18 Units from 3 Lots
Absolute Value Average of 30 Units from 3 Lots
100
100
2.5
2.0
1.5
1.0
AV = +10
-INPUT NOISE CURRENT
VSUPPLY = ±15V
10
10
VSUPPLY = ±4.5V
INPUT NOISE VOLTAGE
VSUPPLY = ±10V
0.5
0.0
+INPUT NOISE CURRENT
1
10
1
100K
-60
-40
-20
0
20
40
60
80 100 120 140
100
1K
10K
TEMPERATURE (oC)
FREQUENCY (Hz)
+INPUT BIAS CURRENT vs TEMPERATURE
-INPUT BIAS CURRENT vs TEMPERATURE
Average of 30 Units from 3 Lots
Absolute Value Average of 30 Units from 3 Lots
0
-0.5
-1.0
-1.5
2.0
1.8
1.6
1.4
VSUPPLY = ±15V
VSUPPLY = ±15V
VSUPPLY = ±10V
VSUPPLY = ±10V
VSUPPLY = ±4.5V
-2.0
-2.5
1.2
1.0
VSUPPLY = ±4.5V
-60
-40
-20
0
20
40
60
80 100 120 140
-60
-40
-20
0
20
40
60
80 100 120 140
TEMPERATURE (oC)
TEMPERATURE (oC)
Spec Number 511080-883
3-106
HA-5020
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application
and design information only. No guarantee is implied.
o
Typical Performance Curves V
= ±15V, A = +1, R = 1kΩ, R = 400Ω, T = +25 C, Unless Otherwise Specified
SUPPLY
V
F
L
A
TRANSIMPEDANCE vs TEMPERATURE
SUPPLY CURRENT vs SUPPLY VOLTAGE
Average of 30 Units from 3 Lots
Average of 30 Units from 3 Lots
6
5
4
3
2
1
8
+125oC
VSUPPLY = ±15V
7
6
5
4
+25oC
-55oC
VSUPPLY = ±10V
VSUPPLY = ±4.5V
-60
-40
-20
0
20
40
60
80
100 120 140
3
5
7
9
11
13
15
TEMPERATURE (oC)
SUPPLY VOLTAGE (±V)
DISABLE SUPPLY CURRENT vs SUPPLY VOLTAGE
Average of 30 Units from 3 Lots
SUPPLY CURRENT vs DISABLE INPUT VOLTAGE
7
9
DISABLE = 0V
8
7
6
5
4
3
2
1
0
-55oC
VSUPPLY = ±4.5V
VSUPPLY = ±10V
VSUPPLY = ±15V
6
5
4
3
2
1
0
+25oC
+125oC
3
5
7
9
11
13
15
1
3
5
7
9
11
13
15
SUPPLY VOLTAGE (±V)
DISABLE INPUT VOLTAGE (V)
DISABLED OUTPUT LEAKAGE vs TEMPERATURE
DISABLE MODE FEEDTHROUGH vs FREQUENCY
Average of 30 Units from 3 Lots
0
1.0
0.5
0
DISABLE = 0V
VIN = 5Vp-p
RF = 750Ω
-10
-20
-30
-40
-50
-60
-70
-80
VOUT = +10V
VOUT = -10V
-0.5
-1.0
0
2
4
6
8
10
12
14
16
18
20
-60 -40 -20
0
20
40
60
80 100 120 140
TEMPERATURE (oC)
FREQUENCY (MHz)
Spec Number 511080-883
3-107
HA-5020
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application
and design information only. No guarantee is implied.
o
Typical Performance Curves V
= ±15V, A = +1, R = 1kΩ, R = 400Ω, T = +25 C, Unless Otherwise Specified
SUPPLY
V
F
L
A
ENABLE/DISABLE TIME vs OUTPUT VOLTAGE
Average of 9 Units from 3 Lots
NON-INVERTING GAIN vs FREQUENCY
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
20
18
16
14
12
10
8
+3
+2
+1
0
VOUT = 0.2Vpp
CL = 10pF
AV = +1
-1
-2
-3
-4
-5
-6
-7
ENABLE TIME
DISABLE TIME
AV = +2
AV = +6
72
6
4
AV = +10
2
0
10
-10
-8
-6
-4
-2
0
2
4
6
8
0
24
48
96
120
OUTPUT VOLTAGE (V)
FREQUENCY (MHz)
INVERTING FREQUENCY RESPONSE
PHASE vs FREQUENCY
+2
+1
0
+180
VOUT = 0.2Vpp
CL = 10pF
+135
+90
+45
0
AV = -1
AV = -2
R
F = 750Ω
-1
-2
-3
-4
-5
-6
-7
-8
+45
0
AV = -1
AV = -6
AV = -10
-45
AV = -2
-45
-90
AV = +1
AV = +2
V = +6
-90
-135
-180
-225
-270
AV = -6
AV = -10
-135
-180
A
AV = +10
48
0
24
48
72
96
120
0
24
72
96
120
FREQUENCY (MHz)
FREQUENCY (MHz)
BANDWIDTH AND GAIN PEAKING vs LOAD RESISTANCE
BANDWIDTH AND GAIN PEAKING vs FEEDBACK RESISTANCE
105
100
95
20
15
10
5
110
5
CL = 10pF
OUT = 0.2Vp-p
CL = 10pF
-3dB BANDWIDTH
V
VOUT = 0.2Vp-p
100
4
-3dB BANDWIDTH
90
3
2
1
GAIN PEAKING
80
70
60
90
GAIN PEAKING
85
0
1.5K
0
1000
700
900
1.1K
1.3K
0
200
400
600
800
FEEDBACK RESISTOR (Ω)
LOAD RESISTANCE (Ω)
Spec Number 511080-883
3-108
HA-5020
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application
and design information only. No guarantee is implied.
o
Typical Performance Curves V
= ±15V, A = +1, R = 1kΩ, R = 400Ω, T = +25 C, Unless Otherwise Specified
SUPPLY
V
F
L
A
BANDWIDTH AND GAIN PEAKING vs FEEDBACK RESISTANCE
BANDWIDTH vs FEEDBACK RESISTANCE
(A = +2)
(A = +10)
V
V
100
95
90
85
80
20
15
10
5
80
70
60
50
40
30
20
CL = 10pF
CL = 10pF
VOUT = 0.2Vp-p
VOUT = 0.2Vp-p
GAIN PEAKING = 0dB
-3dB BANDWIDTH
GAIN PEAKING
0
1.2K
10
200
400
600
800
1.0K
400
600
800
1000
FEEDBACK RESISTOR (Ω)
FEEDBACK RESISTOR (Ω)
REJECTION RATIOS vs TEMPERATURE
Average of 30 Units from 3 Lots
REJECTION RATIOS vs FREQUENCY
AV = +10
75
70
65
60
55
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
PSRR
CMRR
+PSRR
-PSRR
CMRR
-60 -40 -20
0
20
40
60
80
100 120 140
10K
100K
1M
10M
TEMPERATURE (oC)
FREQUENCY (Hz)
OUTPUT SWING OVERHEAD vs TEMPERATURE
Average of 30 Units from 3 Lots
OUTPUT VOLTAGE SWING vs LOAD RESISTANCE
3.5
3.0
2.5
2.0
1.5
30
(±VSUPPLY) - (±VOUT
)
VSUPPLY = ±15V
VSUPPLY = ±15V
25
20
15
10
5
VSUPPLY = ±10V
VSUPPLY = ±10V
VSUPPLY = ±4.5V
VSUPPLY = ±4.5V
0
-60
-40
-20
0
20
40
60
80
100 120 140
10
100
1K
10K
TEMPERATURE (oC)
LOAD RESISTANCE (Ω)
Spec Number 511080-883
3-109
HA-5020
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application
and design information only. No guarantee is implied.
o
Typical Performance Curves V
= ±15V, A = +1, R = 1kΩ, R = 400Ω, T = +25 C, Unless Otherwise Specified
SUPPLY
V
F
L
A
SMALL SIGNAL PULSE RESPONSE
Vertical Scale: V = 100mV/Div.; V = 100mV/Div.
IN
OUT
SHORT CIRCUIT CURRENT LIMIT vs TEMPERATURE
Horizontal Scale: 20ns/Div.
100
90
80
70
60
50
40
-ISC
IN
+ISC
OUT
-60 -40 -20
0
20
40
60
80
100 120 140
TEMPERATURE (oC)
LARGE SIGNAL PULSE RESPONSE
Vertical Scale: V = 5V/Div.; V = 5V/Div.
PROPAGATION DELAY vs TEMPERATURE
IN
OUT
Horizontal Scale: 50ns/Div.
Average of 18 Units from 3 Lots
7.0
6.5
6.0
5.5
5.0
IN
RLOAD = 100Ω
VOUT = 1Vp-p
OUT
-60
-40 -20
0
20
40
60
80
100 120 140
TEMPERATURE (oC)
Spec Number 511080-883
3-110
HA-5020
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application
and design information only. No guarantee is implied.
o
Typical Performance Curves V
= ±15V, A = +1, R = 1kΩ, R = 400Ω, T = +25 C, Unless Otherwise Specified
SUPPLY
V
F
L
A
PROPAGATION DELAY vs SUPPLY VOLTAGE
Average of 18 Units from 3 Lots
SMALL SIGNAL OVERSHOOT vs LOAD RESISTANCE
11.0
10.0
9.0
15
10
5
VOUT = 100mVp-p, CL = 10pF
AV = +10
(RF = 383Ω)
VSUPPLY = ±5V
AV = +2
AV = +1
8.0
7.0
6.0
5.0
VSUPPLY = ±15V
AV = +2
AV = +1
AV = +1
RLOAD = 100Ω
OUT = 1Vp-p
V
AV = +2
0
0
200
400
600
800
1000
3
5
7
9
11
13
15
SUPPLY VOLTAGE (±V)
LOAD RESISTANCE (Ω)
DIFFERENTIAL GAIN vs SUPPLY VOLTAGE
DISTORTION vs FREQUENCY
Average of 18 Units from 3 Lots
0.07
0.06
0.05
0.04
0.03
0.02
0.01
-50
-60
-70
-80
-90
VO = 2Vp-p
CL = 30pF
FREQUENCY = 3.58MHz
3rd ORDER IMD
HD2 (GEN)
RLOAD = 75Ω
3rd ORDER IMD
(GENERATOR)
HD3
HD2
RLOAD = 150Ω
RLOAD = 1K
13
HD3 (GEN)
3
5
7
9
11
15
1M
FREQUENCY (Hz)
10M
SUPPLY VOLTAGE (±V)
DIFFERENTIAL PHASE vs SUPPLY VOLTAGE
SLEW RATE vs TEMPERATURE
Average of 18 Units from 3 Lots
Average of 30 Units from 3 Lots
0.07
0.06
0.05
0.04
0.03
0.02
0.01
1200
1000
800
FREQUENCY = 3.58MHz
VOUT = 20Vp-p
RLOAD = 75Ω
+SLEW RATE
-SLEW RATE
RLOAD = 150Ω
RLOAD = 1K
9
600
-60 -40 -20
0
20
40
60
80 100 120 140
3
5
7
11
13
15
TEMPERATURE (oC)
SUPPLY VOLTAGE (±V)
Spec Number 511080-883
3-111
HA-5020
TYPICAL PERFORMANCE CHARACTERISTICS
Device Characterized at: Supply Voltage = ±15V, R = 1kΩ, A = +1V/V, R = 400Ω, C ≤ 10pF, V
= V+, Unless Otherwise Specified
F
V
L
L
DISABLE
DESIGN
PARAMETERS
Input Offset Voltage
CONDITIONS
TEMPERATURE
TYPICAL
2
LIMIT
Table 1
15
UNITS
o
V
= 0V
+25 C
mV
CM
o
Average Offset Voltage Drift
Positive Input Bias Current
Negative Input Bias Current
Input Common Mode Range
Offset Voltage Adjustment
Output Voltage Swing
Versus Temperature
Full
10
µV/ C
o
V
V
= 0V
= 0V
+25 C
3
Table 1
Table 1
Table 1
Table 1
Table 1
Table 1
Table 1
Table 1
Table 1
Table 1
Table 2
Table 3
8
µA
µA
CM
CM
o
+25 C
12
Full
Full
±12
±40
±12.7
±11.8
31.7
65
V
See Note 4, Table 1
mV
o
o
V
V
= ±12.8
= ±12.8
+25 C to +125 C
V
IN
IN
o
o
-55 C to 0 C
V
o
Output Current
Implied by V
/400Ω
+25 C
mA
OUT
o
Output Short Circuit Current
Quiescent Supply Current
Supply Current, Disabled
Slew Rate
V
= ±10V, V
= 0V
+25 C
mA
IN
OUT
R = Open
Full
Full
7.5
mA
L
R = Open, V
= 0V
DIS
5.0
mA
L
o
V
= 20Vp-p
+25 C
±800
7
V/µs
%
IN
O
o
Overshoot
V
= 1Vp-p, R = 100Ω
+25 C
L
o
Input Noise Voltage
Positive Input Noise Current
Negative Input Noise Current
Differential Gain
f = 1kHz
f = 1kHz
f = 1kHz
+25 C
4.5
nV ⁄ Hz
pA ⁄ Hz
pA ⁄ Hz
%
o
+25 C
2.5
4
o
+25 C
25
40
o
R = 150Ω, NTC-7 Composite
+25 C
0.025
0.025
0.05
L
o
Differential Phase
R = 150Ω, NTC-7 Composite
+25 C
0.05
Degrees
L
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
EUROPE
ASIA
Intersil Corporation
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
Intersil (Taiwan) Ltd.
Taiwan Limited
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (321) 724-7000
FAX: (321) 724-7240
Spec Number 511080-883
3-112
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