EL8173 [INTERSIL]
Micropower, Single Supply, Rail-to-Rail Input-Output Instrumentation Amplifiers; 微功耗，单电源，轨到轨输入输出仪表放大器
| 型号： | EL8173 |
| 厂家： | 
Intersil |
| 描述： | Micropower, Single Supply, Rail-to-Rail Input-Output Instrumentation Amplifiers |
| 文件： | 总14页 (文件大小：706K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EL8170, EL8173
®
Data Sheet
March 9, 2006
FN7490.1
Micropower, Single Supply, Rail-to-Rail
Input-Output Instrumentation Amplifiers
Features
• 78µA maximum supply current
The EL8170 and EL8173 are micropower instrumentation
amplifiers optimized for operation at 2.9V to 5V single
supplies. Inputs and outputs can operate rail-to-rail. As with
all instrumentation amplifiers, a pair of inputs provide very
high common-mode rejection and are completely
independent from a pair of feedback terminals. The
feedback terminals allow zero input to be translated to any
output offset, including ground. A feedback divider controls
the overall gain of the amplifier.
• Maximum offset voltage
- 250µV (EL8170)
- 1000µV (EL8173)
• 500pA input bias current
• 2µV/°C offset voltage drift
• 396kHz -3dB bandwidth (G = 10)
• 192kHz -3dB bandwidth (G = 100)
• 0.5V/µs slew rate
The EL8170 is compensated for a gain of 100 or more, and
the EL8173 is compensated for a gain of 10 or more. The
EL8170 and EL8173 have bipolar input devices for best
offset and 1/f noise performance.
• Single supply operation
- Input voltage range is rail-to-rail
- Output swings rail-to-rail
The amplifiers can be operated from one lithium cell or two
Ni-Cd batteries. The EL8170 and EL8173 input range
includes ground to slightly above positive rail. The output
stage swings to ground and positive supply - no pull-up or
pull-down resistors are needed.
• Output sources and sinks ±29mA load current
• 0.2% gain error
• Pb-free plus anneal available (RoHS compliant)
Applications
• Battery- or solar-powered systems
Pinout
EL8170, EL8173
(8 LD SO)
• Strain gauges
TOP VIEW
• Current monitors
+
-
ENABLE
IN-
1
2
3
4
8
7
6
5
FB+
VS+
OUT
FB-
• Thermocouple amplifiers
-
Σ
+
IN+
VS-
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2006. All Rights Reserved.
1
All other trademarks mentioned are the property of their respective owners.
EL8170, EL8173
Ordering Information
PART
TAPE &
REEL
PKG.
PART
PART NUMBER MARKING
TAPE &
REEL
PKG.
PART NUMBER
EL8170IS
MARKING
8170IS
PACKAGE
8 Ld SO
8 Ld SO
8 Ld SO
DWG. #
PACKAGE
8 Ld SO
8 Ld SO
8 Ld SO
DWG. #
-
7”
13”
-
MDP0027
MDP0027
MDP0027
MDP0027
EL8173IS
8173IS
8173IS
8173IS
8173ISZ
-
7”
13”
-
MDP0027
MDP0027
MDP0027
MDP0027
EL8170IS-T7
EL8170IS-T13
8170IS
EL8173IS-T7
EL8173IS-T13
8170IS
EL8170ISZ
(See Note)
8170ISZ
8 Ld SO
(Pb-free)
EL8173ISZ
(See Note)
8 Ld SO
(Pb-free)
EL8170ISZ-T7
(See Note)
8170ISZ
8170ISZ
7”
8 Ld SO
(Pb-free)
MDP0027
MDP0027
EL8173ISZ-T7
(See Note)
8173ISZ
8173ISZ
7”
8 Ld SO
(Pb-free)
MDP0027
MDP0027
EL8170ISZ-T13
(See Note)
13”
8 Ld SO
(Pb-free)
EL8173ISZ-T13
(See Note)
13”
8 Ld SO
(Pb-free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pin Description
EL8170/EL8173
PIN NAME
PIN FUNCTION
1
ENABLE
Active Low. When pulled up above 2V, the in-amp conserves 3µA disabled supply current and
the output is in a high impedance state. An internal pull down defines the ENABLE low when
left floating.
2
3
4
5
8
IN-
IN+
VS-
FB-
FB+
Inverting (IN-) and non-inverting (IN+) high impedance input terminals.
Negative supply terminal.
High impedance feedback terminals. The feedback terminals have a very similar equivalent
circuit as the input terminals. They also have an Input Bias Compensation/Cancelling Circuit.
The negative feedback (FB-) pin connects to an external resistive network to set the gain of
the in-amp. The positive feedback (FB+) can be used to shift the DC level of the output or as
an output offset.
7
6
VS+
Positive supply terminal.
Output Voltage.
VOUT
FN7490.1
2
March 9, 2006
EL8170, EL8173
Absolute Maximum Ratings (T = 25°C)
A
Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
S
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5V, V + + 0.5V
S
EN
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications V + = +5V, V - = GND, VCM = 1/2V +, T = 25°C, unless otherwise specified.
S
S
S
A
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
100
400
2
MAX
250
UNIT
µV
V
Input Offset Voltage
EL8170
EL8173
OS
1000
µV
TCV
Input Offset Voltage Temperature
Coefficient
Temperature = -40°C to 85°C
µV/°C
OS
I
I
Input Offset Current between IN+, and
IN- and between FB+ and FB-
0.5
0.5
2
2
nA
nA
OS
B
Input Bias Current (IN+, IN-, FB+, and
FB- terminals)
e
Input Noise Voltage
EL8170
EL8173
EL8170
EL8173
f = 0.1Hz to 10Hz
2
10
50
200
0.1
8
µV
µV
N
P-P
P-P
Input Noise Voltage Density
f = 1kHz
nV/√Hz
nV/√Hz
pA/√Hz
MΩ
MΩ
V
o
i
Input Noise Current Density
Input Resistance
f = 1kHz
o
N
R
EL8170
EL8173
IN
14
V
Input Voltage Range
Guaranteed by CMRR test
0
80
80
80
70
-1.5
-0.8
0
5
IN
CMRR
Common Mode Rejection Ratio
EL8170
EL8173
EL8170
EL8173
EL8170
EL8173
V
= 0V to +5V
108
104
104
90
dB
CM
dB
PSRR
Power Supply Rejection Ratio
Gain Error
V
= 2.9V to 5V
dB
S
dB
E
V
R
= 100kΩ to 2.5V
L
+0.3
+0.2
4
+1.5
+0.8
10
%
G
%
Maximum Voltage Swing
Output low, 100kΩ to 2.5V
Output low, 1kΩ to 2.5V
Output high, 100kΩ to 2.5V
Output high, 1kΩ to GND
mV
V
OUT
0.13
4.996
4.88
0.5
0.25
4.990
4.75
0.3
V
V
SR
Slew Rate
R = 1kΩ to GND
0.7
V/µs
L
FN7490.1
3
March 9, 2006
EL8170, EL8173
Electrical Specifications V + = +5V, V - = GND, VCM = 1/2V +, T = 25°C, unless otherwise specified. (Continued)
S
S
S
A
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
192
93
MAX
UNIT
kHz
kHz
kHz
kHz
kHz
kHz
kHz
kHz
µA
-3dB BW
-3dB Bandwidth
EL8170
Gain = 100V/V
Gain = 200
Gain = 500
Gain = 1000
Gain = 10
30
13
EL8173
396
221
69
Gain = 20
Gain = 50
Gain = 100
30
I
I
Supply Current, Enabled
Supply Current, Disabled
Enable Pin for Shut-down
Enable Pin for Power-on
Minimum Supply Voltage
40
1.5
2
60
78
5
S,EN
EN = V +
2.9
µA
S,DIS
S
V
V
V
V
ENH
ENL
S
0.8
2.4
V
2.2
±29
±7.5
V
I
Output Current into 10Ω to V /2
V
V
= 5V
±18
±4
mA
mA
O
S
S
= 2.9V
S
Typical Performance Curves
45
40
35
30
25
20
15
10
5
65
G=100
G=50
G=1000
60
G=500
55
50
G=20
G=10
G=5
G=200
45
G=100
40
G=50
35
30
V =5V
V =5V
S
S
25
20
0
1
10
100
1k
10k
100k
1M
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 1. EL8170 FREQUENCY RESPONSE vs CLOSED
LOOP GAIN
FIGURE 2. EL8173 FREQUENCY RESPONSE vs CLOSED
LOOP GAIN
FN7490.1
March 9, 2006
4
EL8170, EL8173
Typical Performance Curves (Continued)
45
25
20
15
10
5
V =5V
S
40
35
30
25
20
15
10
5
V =5V
S
V =3.3V
S
V =3.3V
S
V =2.9V
S
V =2.9V
S
A =100
A =10
V
V
L
R =10kΩ
R =10kΩ
L
C =10pF
C =10pF
L
L
R /R =99.02Ω
R /R =9.08Ω
F G
F
G
R =221kΩ
R =178kΩ
F
F
R
=2.23kΩ
R =19.6kΩ
G
G
0
0
100
1k
10k
100k
1M
100
1k
10k
FREQUENCY (Hz)
100k
1M
FREQUENCY (Hz)
FIGURE 3. EL8170 FREQUENCY RESPONSE vs SUPPLY
VOLTAGE
FIGURE 4. EL8173 FREQUENCY RESPONSE vs SUPPLY
VOLTAGE
50
45
30
C =100pF
L
25
20
15
10
5
C =47pF
L
C =820pF
L
C =470pF
L
40
35
30
25
C =27pF
L
C =220pF
L
C =2.7pF
L
C =56pF
L
A =100
A =10
V
V
V =5V
V =5V
S
S
R =10kΩ
R =10kΩ
L
L
R /R =99.02Ω
R /R =9.08Ω
F G
F
G
R =221kΩ
R =178kΩ
F
F
R
=2.23kΩ
R =19.6kΩ
G
G
0
100
1k
10k
FREQUENCY (Hz)
100k
1M
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 5. EL8170 FREQUENCY RESPONSE vs C
FIGURE 6. EL8173 FREQUENCY RESPONSE vs C
LOAD
LOAD
1500
1000
2000
1500
1000
V =3.3V
S
V =5.0V
500
0
S
V =5.0V
S
V =2.9V
500
0
S
V =3.3V
S
V =2.9V
S
-500
-0.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
COMMON-MODE INPUT VOLTAGE (V)
-0.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 7. EL8170 AVERAGE INPUT BIAS CURRENT vs
COMMON-MODE INPUT VOLTAGE @ 25°C
FIGURE 8. EL8173 AVERAGE INPUT BIAS CURRENT vs
COMMON-MODE INPUT VOLTAGE @ 25°C
FN7490.1
March 9, 2006
5
EL8170, EL8173
Typical Performance Curves (Continued)
100
100
-100
-300
V =2.9V
V =5.0V
S
V =2.9V
V =3.3V
S
S
S
V =3.3V
S
V =5.0V
S
-100
-300
-0.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
COMMON-MODE INPUT VOLTAGE (V)
-0.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 9. EL8170 INPUT OFFSET CURRENT vs COMMON-
MODE INPUT VOLTAGE @ 25°C
FIGURE 10. EL8173 INPUT OFFSET CURRENT vs COMMON-
MODE INPUT VOLTAGE @ 25°C
1500
2000
1500
V =5V
S
1000
500
85°C
25°C
1000
0
85°C
-45°C
25°C
-45°C
500
-500
0
0
-0.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
COMMON-MODE INPUT VOLTAGE (V)
-0.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 11. EL8170 AVERAGE INPUT BIAS CURRENT vs
COMMON-MODE INPUT VOLTAGE @ VS = 5V,
TEMPERATURE = -45°C, 25°C, AND 85°C
FIGURE 12. EL8173 AVERAGE INPUT BIAS CURRENT vs
COMMON-MODE INPUT VOLTAGE @ VS = 5V,
TEMPERATURE = -45°C, 25°C, AND 85°C
1500
2000
V =3.3V
S
1000
500
1500
25°C
85°C
25°C
85°C
1000
0
-45°C
500
-500
-1000
-45°C
1.5
0
-0.5
0
0.5
1.0
2.0
2.5
3.0 3.5
-0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
COMMON-MODE INPUT VOLTAGE (V)
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 13. EL8170 AVERAGE INPUT BIAS CURRENT vs
COMMON MODE INPUT VOLTAGE @ VS = 3.3V,
TEMPERATURE = -45°C, 25°C, AND 85°C
FIGURE 14. EL8173 AVERAGE INPUT BIAS CURRENT vs
COMMON MODE INPUT VOLTAGE @ VS = 3.3V,
TEMPERATURE = -45°C, 25°C, AND 85°C
FN7490.1
March 9, 2006
6
EL8170, EL8173
Typical Performance Curves (Continued)
1500
2000
1500
1000
500
0
V =2.9V
S
1000
500
25°C
85°C
25°C
85°C
0
-45°C
0.5
-500
-1000
-45°C
-0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
-0.5
0
1.0
1.5
2.0
2.5
3.0
COMMON-MODE INPUT VOLTAGE (V)
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 15. EL8170 AVERAGE INPUT BIAS CURRENTS vs
COMMON-MODE INPUT VOLTAGE @ VS = 2.9V,
TEMPERATURE = -45°C, 25°C, AND 85°C
FIGURE 16. EL8173 AVERAGE INPUT BIAS CURRENTS vs
COMMON-MODE INPUT VOLTAGE @ VS = 2.9V,
TEMPERATURE = -45°C, 25°C, AND 85°C
250
0
25°C
25°C
200
-200
VS=5V
VS=5V
150
-400
VS=3.3V
VS=3.3V
VS=2.9V
100
50
0
-600
VS=2.9V
-800
-1000
-0.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
COMMON-MODE INPUT VOLTAGE (V)
-0.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 17. EL8170 INPUT OFFSET VOLTAGE vs COMMON-
MODE INPUT VOLTAGE @ VS = 5V, 3.3V AND
2.9V AND TEMPERATURE = 25°C
FIGURE 18. EL8173 INPUT OFFSET VOLTAGE vs COMMON-
MODE INPUT VOLTAGE @ VS = 5V, 3.3V, AND
2.9V AND TEMPERATURE = 25°C
250
0
85°C
200
150
100
50
-200
-400
85°C
25°C
-45°C
-600
25°C
-800
-45°C
0
-1000
-0.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
COMMON-MODE INPUT VOLTAGE (V)
-0.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 19. EL8170 INPUT OFFSET VOLTAGE vs COMMON-
MODE INPUT VOLTAGE @ VS = 5.0V,
FIGURE 20. EL8173 INPUT OFFSET VOLTAGE vs COMMON-
MODE INPUT VOLTAGE @ VS = 5.0V,
TEMPERATURE = -45°C, 25°C, AND 85°C
TEMPERATURE = -45°C, 25°C, AND 85°C
FN7490.1
7
March 9, 2006
EL8170, EL8173
Typical Performance Curves (Continued)
250
0
-200
-400
-600
-800
85°C
200
150
100
50
85°C
25°C
25°C
-45°C
-45°C
3.0
0
-1000
-0.5
-0.5
0
0.5
1.0
1.5
2.0
2.5
3.5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
COMMON-MODE INPUT VOLTAGE (V)
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 21. EL8170 INPUT OFFSET VOLTAGE vs COMMON-
MODE INPUT VOLTAGE @ VS = 3.3V,
FIGURE 22. EL8173 INPUT OFFSET VOLTAGE vs COMMON-
MODE INPUT VOLTAGE @ VS = 3.3V,
TEMPERATURE = -45°C, 25°C, AND 85°C
TEMPERATURE = -45°C, 25°C, AND 85°C
450
0
85°C
300
200
100
0
-200
-400
85°C
25°C
25°C
-45°C
3.0
-600
-45°C
-800
-100
-1000
-0.5
0
0.5
1.0
1.5
2.0
2.5
3.5
-0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
COMMON-MODE INPUT VOLTAGE (V)
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 23. EL8170 INPUT OFFSET VOLTAGE vs COMMON-
MODE INPUT VOLTAGE @ VS = 2.9V,
FIGURE 24. EL8173 INPUT OFFSET VOLTAGE vs COMMON-
MODE INPUT VOLTAGE @ VS = 3.3V,
TEMPERATURE = -45°C, 25°C, AND 85°C
TEMPERATURE = - 45°C, 25°C, AND 85°C
1500
500
250
0
12 samples
Vs=5V
Average = 1.8uV/C
1000
500
0
-250
-500
-1000
-1500
12 samples
Vs=5V
Average = 2uV/C
-500
-750
-50
-25
0
25
50
TEMPERATURE (°C)
75
100
125
-50
-25
0
25
50
75
100
125
TEMPERATURE(°C)
FIGURE 25. EL8170 INPUT OFFSET VOLTAGE vs
TEMPERATURE @ VS = 5.0V
FIGURE 26. EL8173 INPUT OFFSET VOLTAGE vs
TEMPERATURE @ VS = 5.0V
FN7490.1
8
March 9, 2006
EL8170, EL8173
Typical Performance Curves (Continued)
1500
500
250
0
12 samples
Vs=2.9V
Average = 1.38uV/C
1000
500
0
-250
-500
-1000
-1500
12 samples
Vs=2.9V
Average = 2.2uV/C
-500
-750
-50
-25
0
25
50
TEMPERATURE (°C)
75
100
125
-50
-25
0
25
50
TEMPERATURE (°C)
75
100
125
FIGURE 27. EL8170 INPUT OFFSET VOLTAGE vs
TEMPERATURE @ VS = 2.9V
FIGURE 28. EL8173 INPUT OFFSET VOLTAGE vs
TEMPERATURE @ VS = 2.9V
120
110
120
110
GAIN=1000
GAIN=100
GAIN=1000
100
90
80
70
60
50
40
100
90
80
70
60
50
40
GAIN=100
10k
GAIN=10
10k
1
10
100
1k
100k
1M
1
10
100
1k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 29. EL8170 CMRR vs FREQUENCY
FIGURE 30. EL8173 CMRR vs FREQUENCY
120
110
100
90
100
90
80
70
60
50
40
PSRR+
PSRR-
PSRR+
80
70
60
PSRR-
50
30
20
40
1
10
100
1k
10k
100k
1M
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 31. EL8170 PSRR vs FREQUENCY
FIGURE 32. EL8173 PSRR vs FREQUENCY
FN7490.1
9
March 9, 2006
EL8170, EL8173
Typical Performance Curves (Continued)
1k
100
e
@ 1kHz = 50nV/√Hz
N
e
@ 1kHz = 200nV/√Hz
N
100
10
1k
10k
10
100
1k
10k
10
100
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 33. EL8170 VOLTAGE NOISE DENSITY
FIGURE 34. EL8173 VOLTAGE NOISE DENSITY
1
0.1
i
@ 1kHz = 0.1pA/√Hz
N
0.01
10
100
1k
10k
FREQUENCY (Hz)
FIGURE 35. EL8170 AND EL8173 CURRENT NOISE DENSITY
1s/DIV
1s/DIV
FIGURE 36. EL8170 0.1Hz TO 10Hz INPUT VOLTAGE NOISE
(GAIN = 100)
FIGURE 37. EL8173 0.1Hz TO 10Hz INPUT VOLTAGE NOISE
(GAIN = 10)
FN7490.1
March 9, 2006
10
EL8170, EL8173
Typical Performance Curves (Continued)
70
60
50
40
30
20
10
0
2
2.5
3
3.5
4
4.5
5
5.5
SUPPLY VOLTAGE (V)
FIGURE 38. EL8170 AND EL8173 SUPPLY CURRENT vs SUPPLY VOLTAGE
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
CONDUCTIVITY TEST BOARD
1.4
1.2
1
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
909mW
625mW
0.8
0.6
0.4
0.2
0
0
25
50
75 85 100
125
150
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 39. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 40. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
moderate to high gains. For higher gains, the EL8170 is
internally compensated for a minimum gain of 100. An
ENABLE pin is used to reduce power consumption, typically
2.9µA, while the instrumentation amplifier is disabled.
Description of Operation and Applications
Information
Product Description
The EL8170 and EL8173 are micropower instrumentation
amplifiers (in-amps) which deliver rail-to-rail input
amplification and rail-to-rail output swing on a single 2.9V to
5V supply. The EL8170 and EL8173 also deliver excellent
DC and AC specifications while consuming only 60µA typical
supply current. Because the EL8170 and EL8173 provide an
independent pair of feedback terminals to set the gain and to
adjust output level, these in-amps achieve high common-
mode rejection ratio regardless of the tolerance of the gain
setting resistors. The EL8173 is internally compensated for a
minimum closed loop gain of 10 or greater, well suited for
Input Protection
All input and feedback terminals of the EL8170 and EL8173
have internal ESD protection diodes to both positive and
negative supply rails, limiting the input voltage to within one
diode drop beyond the supply rails. The EL8170 has
additional back-to-back diodes across the input terminals
and also across the feedback terminals. If overdriving the
inputs is necessary, the external input current must never
exceed 5mA. On the other hand, the EL8173 has no clamps
to limit the differential voltage on the input terminals allowing
FN7490.1
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EL8170, EL8173
higher differential input voltages at lower gain applications. It
function can be derived. The gain of the EL8170 and EL8173
is set by two external resistors, the feedback resistor RF, and
the gain resistor RG.
is recommended however, that the input terminals of the
EL8173 is not overdriven beyond 1V to avoid offset drift. An
external series resistor may be used as an external
protection to limit excessive external voltage and current
from damaging the inputs.
2.9V to 5V
EN_BAR
7
1
VIN/2
VIN/2
Input Stage and Input Voltage Range
VS+
EN
3
2
8
5
IN+
IN-
+
The input terminals (IN+ and IN-) of the EL8170 and EL8173
are single differential pair bipolar PNP devices aided by an
Input Range Enhancement Circuit to increase the headroom
of operation of the common-mode input voltage. The
feedback terminals (FB+ and FB-) also have a similar
topology. As a result, the input common-mode voltage range
of both the EL8170 and EL8173 is rail-to-rail. These in-amps
are able to handle input voltages that are at or slightly
beyond the supply and ground making these in-amps well
suited for single 5V or 3.3V low voltage supply systems.
There is no need then to move the common-mode input of
the in-amps to achieve symmetrical input voltage.
-
6
EL8170/3
VOUT
FB+
FB-
+
-
VCM
VS-
4
RG
RF
FIGURE 41. GAIN IS SET BY TWO EXTERNAL RESISTORS,
R
AND R
F
G
Input Bias Cancellation/Compensation
Inside the EL8170 and EL8173 is an Input Bias
R
F
VOUT = 1 + -------- VIN
R
G
Cancellation/Compensation Circuit for both the input and
feedback terminals (IN+, IN-, FB+ and FB-), achieving a low
input bias current all throughout the input common-mode
range and the operating temperature range. While the PNP
bipolar input stages are biased with an adequate amount of
biasing current for speed and increased noise performance,
the Input Bias Cancellation/Compensation Circuit sinks most
of the base current of the input transistor leaving a small
portion as input bias current, typically 500pA. In addition, the
Input Bias Cancellation/Compensation Circuit maintains a
smooth and flat behavior of input bias current over the
common mode range and over the operating temperature
range. The Input Bias Cancellation/Compensation Circuit
operates from input voltages of 10mV above the negative
supply to input voltages slightly above the positive supply.
See Average Input Bias Current vs Common-Mode Input
Voltage in the performance curves section.
In Figure 41, the FB+ pin and one end of resistor RG are
connected to GND. With this configuration, the above gain
equation is only true for a positive swing in VIN; negative
input swings will be ignored and the output will be at ground.
Reference Connection
Unlike a three-op amp instrumentation amplifier, a finite
series resistance seen at the REF terminal does not degrade
the EL8170 and EL8173's high CMRR performance
eliminating the need for an additional external buffer
amplifier. Figure 42 uses the FB+ pin to provide a high
impedance REF terminal.
2.9V to 5V
EN_BAR
7
1
VIN/2
VS+
EN
3
2
8
5
IN+
IN-
+
Output Stage and Output Voltage Range
-
6
VIN/2
A pair of complementary MOSFET devices drives the output
VOUT to within a few millivolts of the supply rails. At a
100kΩ load, the PMOS sources current and pulls the output
up to 4mV below the positive supply, while the NMOS sinks
current and pulls the output down to 4mV above the negative
supply, or ground in the case of a single supply operation.
The current sinking and sourcing capability of the EL8170
and EL8173 are internally limited to 29mA.
VOUT
EL8170/3
FB+
FB-
+
-
2.9V to 5V
VS-
4
VCM
R1
REF
R2
RG
RF
Gain Setting
FIGURE 42. GAIN SETTING AND REFERENCE CONNECTION
VIN, the potential difference across IN+ and IN-, is replicated
(less the input offset voltage) across FB+ and FB-. The
obsession of the EL8170 and EL8173 in-amp is to maintain
the differential voltage across FB+ and FB- equal to IN+ and
IN-; (FB+ - FB-) = (IN+ - IN-). Consequently, the transfer
.
R
R
R
F
R
G
F
VOUT = 1 + -------- (VIN) + 1 + -------- (VREF)
G
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EL8170, EL8173
The FB+ pin is used as a REF terminal to center or to adjust
of the EL8170 and EL8173 and does not include the gain
error contributed by the resistors. There is an additional gain
error due to the tolerance of the resistors used. The resulting
non-ideal transfer function effectively becomes:
the output. Because the FB+ pin is a high impedance input,
an economical resistor divider can be used to set the voltage
at the REF terminal without degrading or affecting the CMRR
performance. Any voltage applied to the REF terminal will
shift VOUT by VREF times the closed loop gain, which is set
by resistors RF and RG. See Figure 42.
R
F
VOUT = 1 + -------- × [1 – (E
+ E
+ E )] × VIN
RF G
RG
R
G
The FB+ pin can also be connected to the other end of
resistor, RG. See Figure 43. Keeping the basic concept that
the EL8170 and EL8173 in-amps maintain constant
differential voltage across the input terminals and feedback
terminals (IN+ - IN- = FB+ - FB-), the transfer function of
Figure 43 can be derived.
Where:
ERG = Tolerance of RG
ERF = Tolerance of RF
EG = Gain Error of the EL8170 or EL8173
The term [1 - (ERG +ERF +EG)] is the deviation from the
theoretical gain. Thus, (ERG +ERF +EG) is the total gain
error. For example, if 1% resistors are used for the EL8170,
the total gain error would be:
2.9V to 5V
EN_BAR
7
1
VIN/2
VIN/2
VS+
EN
3
2
8
5
IN+
IN-
= ±(E
+ E
+ E (typical))
RF G
+
RG
-
6
= ±(0.01 + 0.01 + 0.003)
= ±2.3%
EL8170/3
VOUT
FB+
FB-
+
-
VCM
VS-
4
Disable/Power-Down
The EL8170 and EL8173 can be powered down reducing
the supply current to typically 2.9µA. When disabled, the
output is in a high impedance state. The active low ENABLE
bar pin has an internal pull down and hence can be left
floating and the in-amp enabled by default. When the
ENABLE bar is connected to an external logic, the in-amp
will power down when ENABLE bar is pulled above 2V, and
will power on when ENABLE bar is pulled below 0.8V.
RG
RF
VREF
FIGURE 43. REFERENCE CONNECTIONWITH AN AVAILABLE
VREF
R
F
VOUT = 1 + -------- (VIN) + (VREF)
R
G
A finite resistance RS in series with the VREF source, adds
an output offset of VIN*(RS/RG). As the series resistance Rs
approaches zero, the gain equation is simplified to the above
equation for Figure 43. VOUT is simply shifted by an amount
VREF.
External Resistor Mismatches
Because of the independent pair of feedback terminals
provided by the EL8170 and EL8173, the CMRR is not
degraded by any resistor mismatches. Hence, unlike a three
op amp and especially a two op amp in-amp, the EL8170
and EL8173 reduce the cost of external components by
allowing the use of 1% or more tolerance resistors without
sacrificing CMRR performance. The EL8170 and EL8173
CMRR will be 108dB regardless of the tolerance of the
resistors used.
Gain Error and Accuracy
The EL8173 has a Gain Error, EG, of 0.2% typical. The
EL8170 has an EG of 0.3% typical. The gain error indicated
in the electrical specifications table is the inherent gain error
FN7490.1
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EL8170, EL8173
Package Outline Drawing
NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at
http://www.intersil.com/design/packages/index.asp
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7490.1
14
March 9, 2006
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