EL5131IWZ-T7A [INTERSIL]
300MHz Low Noise Amplifiers; 300MHz的低噪声放大器型号: | EL5131IWZ-T7A |
厂家: | Intersil |
描述: | 300MHz Low Noise Amplifiers |
文件: | 总12页 (文件大小:343K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
EL5130, EL5131
®
Data Sheet
June 6, 2006
FN7381.3
300MHz Low Noise Amplifiers
Features
The EL5130 and EL5131 are ultra-low voltage noise, high
speed voltage feedback amplifiers that are ideal for
applications requiring low voltage noise, including
communications and imaging. These devices offer extremely
low power consumption for exceptional noise performance.
Stable at gains as low as 5, these devices offer 100mA of
drive performance. Not only do these devices find perfect
application in high gain applications, they maintain their
performance down to lower gain settings.
• 300MHz -3dB bandwidth
• Ultra low noise = 1.8nV/√Hz
• 350V/µs slew rate
• Low supply current = 4mA
• Single supplies from 5V to 12V
• Dual supplies from ±2.5V to ±6V
• Fast disable on the EL5130
• Low cost
These amplifiers are available in small package options
(SOT-23) as well as the industry-standard SO packages. All
parts are specified for operation over the -40°C to +85°C
temperature range.
• Pb-free plus anneal available (RoHS compliant)
Applications
• Imaging
Ordering Information
PART
TAPE &
REEL
PKG.
DWG. #
• Instrumentation
• Communications devices
PART NUMBER MARKING
PACKAGE
EL5130IS
5130IS
-
-
8 Ld SO
MDP0027
MDP0027
EL5130ISZ
(See Note)
5130ISZ
8 Ld SO
(Pb-free)
Pinouts
EL5130
(8 LD SO)
TOP VIEW
EL5130IS-T7
5130IS
7”
7”
8 Ld SO
MDP0027
MDP0027
EL5130ISZ-T7
(See Note)
5130ISZ
8 Ld SO
(Pb-free)
NC
IN-
1
2
3
4
8
7
6
5
CE
EL5130IS-T13
5130IS
13”
13”
8 Ld SO
MDP0027
MDP0027
VS+
OUT
NC
-
+
EL5130ISZ-T13 5130ISZ
(See Note)
8 Ld SO
(Pb-free)
IN+
VS-
EL5131IW-T7
BBAA
7”
5 Ld SOT-23 MDP0038
5 Ld SOT-23 MDP0038
(3k pcs)
EL5131IWZ-T7 BRAA
(See Note)
7”
EL5131
(5 LD SOT-23)
TOP VIEW
(3k pcs) (Pb-free)
EL5131IW-T7A BBAA
7”
5 Ld SOT-23 MDP0038
(250 pcs)
OUT
VS-
IN+
1
2
3
5
4
VS+
IN-
EL5131IWZ-T7A BRAA
(See Note)
7”
5 Ld SOT-23 MDP0038
(250 pcs) (Pb-free)
+
-
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003, 2004, 2006. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
EL5130, EL5131
Absolute Maximum Ratings (T = 25°C)
A
Supply Voltage from V + to V - . . . . . . . . . . . . . . . . . . . . . . . 13.2V
Slewrate between V + and V -. . . . . . . . . . . . . . . . . . . . . . . . 1V/µs
S S
S
S
I
-, I +, CE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5mA
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +125°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C
IN IN
Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications V + = +5V, V - = -5V, R = 500Ω, R = 50Ω, C = 5pF, T = 25°C, unless otherwise specified.
S
S
L
G
L
A
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
0.2
MAX
UNIT
mV
V
Offset Voltage
-0.9
0.9
OS
T V
C
Offset Voltage Temperature Coefficient
Input Bias Current
Measured from T
to T
0.8
µV/°C
µA
OS
MIN
MAX
MAX
IB
V
V
= 0V
= 0V
1.5
2.27
100
-3
3.3
IN
IN
I
Input Offset Current
-500
500
nA
OS
T I
Input Bias Current Temperature
Coefficient
Measured from T
to T
nA/°C
C OS
MIN
PSRR
CMRR
CMIR
Power Supply Rejection Ratio
Common Mode Rejection Ratio
Common Mode Input Range
Input Resistance
V
V
= ±4.75V to ±5.25V
= ±3.0V
75
95
±3
5
90
110
±3.3
20
dB
dB
S
IN
Guaranteed by CMRR test
Common mode
V
R
C
MΩ
pF
IN
Input Capacitance
1
IN
I
Supply Current
3.0
10
3.54
16
4.1
mA
kV/V
V
S
AVOL
Open Loop Gain
V
= ±2.5V, R = 1kΩ to GND
OUT L
V
Output Voltage Swing
R = 1kΩ, R = 900Ω, R = 100Ω
±3.5
±3.5
50
±3.8
±3.3
100
300
60
O
L
L
L
F
G
R
R
= 150Ω
= 10Ω
V
I
Short Circuit Current
-3dB Bandwidth
mA
MHz
MHz
MHz
°
SC
BW
A = +5, R = 500Ω
V L
BW
±0.1dB Bandwidth
Gain Bandwidth Product
Phase Margin
A = +5, R = 500Ω
V L
GBWP
PM
1500
55
R
= 1kΩ, C = 6pF
L
L
SR
Slew Rate
V
= ±5V, R = 150Ω, V
= ±2.5V
225
350
TBD
TBD
14
V/µs
ns
S
L
OUT
t , t
Rise Time, Fall Time
Propagation Delay
0.01% Settling Time
Differential Gain
±0.1V
R
F
STEP
STEP
t
t
±0.1V
ns
PD
S
ns
dG
dP
A
= +2, R = 1kΩ
0.01
0.01
1.8
%
V
F
Differential Phase
Input Noise Voltage
Input Noise Current
A
= +2, R = 1kΩ
°
V
F
e
f = 10kHz
f = 10kHz
nV/√Hz
pA/√Hz
N
i
1.1
N
FN7381.3
June 6, 2006
2
EL5130, EL5131
Typical Performance Curves
90
70
50
30
10
-10
0
5
3
300
180
60
V =±5V
S
PHASE
GAIN
72
144
216
288
360
1
-60
-1
-3
-5
V =±5V
S
A =-5
V
G
-180
R
=50Ω
R =500Ω
L
C =5pF
L
-300
1k
1k
10k
100k
1M
10M
100M 500M
0.1
1
10
100
FREQUENCY (Hz)
FREQUENCY (MHz)
FIGURE 1. OPEN LOOP GAIN AND PHASE vs FREQUENCY
FIGURE 2. GAIN AND PHASE vs FREQUENCY (INVERTING)
5
3
300
180
60
5
V =±5V
V =±5V
S
S
A =+5
R =50Ω
V
G
G
R
=50Ω
R =500Ω
L
3
1
R =500Ω
C =5pF
L
L
C =5pF
L
1
GAIN
A =+5
V
-60
-1
-3
-5
-1
-3
-5
A =+10
V
PHASE
-180
A =+20
V
-300
1k
0.1
1
10
FREQUENCY (MHz)
100
0.1
1
10
FREQUENCY (MHz)
100
1k
FIGURE 3. GAIN AND PHASE vs FREQUENCY
(NON-INVERTING)
FIGURE 4. GAIN vs FREQUENCY FOR VARIOUS A +
V
300
5
V =±5V
V =±5V
S
S
R
=50Ω
A =+5
G
L
V
R =500Ω
C =5pF
R =50Ω
G
180
60
3
1
C =5pF
L
L
R =1kΩ
L
-60
-1
-3
-5
A =+5
R =500Ω
L
V
A =+10
V
R =150Ω
L
-180
A =+20
V
R =100Ω
L
-300
0.1
1
10
100
1k
0.1
1
10
FREQUENCY (MHz)
100
1k
FREQUENCY (MHz)
FIGURE 5. PHASE vs FREQUENCY FOR VARIOUS A +
V
FIGURE 6. GAIN vs FREQUENCY FOR VARIOUS R (A =+5)
L
V
FN7381.3
June 6, 2006
3
EL5130, EL5131
Typical Performance Curves
5
5
3
V =±5V
S
V =±5V
S
R =1kΩ
A =+10
A =+5
F
V
G
V
R
=50Ω
R =500Ω
L
3
1
C =5pF
C =5pF
L
L
R =500Ω
F
1
-1
-3
-5
-1
-3
-5
R =1kΩ
L
R =200Ω
F
R =500Ω
L
R =150Ω
R =100Ω
F
L
R =100Ω
L
0.1
1
10
FREQUENCY (MHz)
100
1k
0.1
1
10
FREQUENCY (MHz)
100
1k
FIGURE 7. GAIN vs FREQUENCY FOR VARIOUS R (A =+10)
FIGURE 8. GAIN vs FREQUENCY FOR VARIOUS R (A =+5)
F V
L
V
5
3
5
3
V =±5V
V =±5V
S
S
A =+10
A =+5
V
V
C =22pF
L
R =500Ω
R =50Ω
G
L
C =5pF
R =500Ω
L
L
C =15pF
L
1
1
R =2.25kΩ
F
C =10pF
L
-1
-3
-5
-1
-3
-5
R =1.125kΩ
F
C =6pF
L
R =450Ω
F
R =225Ω
F
0.1
1
10
FREQUENCY (MHz)
100
1k
0.1
1
10
FREQUENCY (MHz)
100
1k
FIGURE 9. GAIN vs FREQUENCY FOR VARIOUS R (A =+10)
FIGURE 10. GAIN vs FREQUENCY FOR VARIOUS C (A =+5)
L V
F
V
5
3
5
3
V =±5V
S
V =±5V
S
C
=8.2pF
A =+10
A =+5
IN
V
G
V
C =47pF
L
R
=50Ω
R =50Ω
G
C
=4.7pF
R =500Ω
R =500Ω
IN
L
L
C =33pF
L
C =5pF
L
1
1
C =22pF
L
C =2.7pF
IN
-1
-3
-5
-1
-3
-5
C =12pF
L
C
=1pF
IN
0.1
1
10
100
1k
0.1
1
10
FREQUENCY (MHz)
100
1k
FREQUENCY (MHz)
FIGURE 11. GAIN vs FREQUENCY FOR VARIOUS C (A =+10)
FIGURE 12. GAIN vs FREQUENCY FOR VARIOUS C - (A =+5)
L
V
IN
V
FN7381.3
June 6, 2006
4
EL5130, EL5131
Typical Performance Curves
5
5
3
V =±5V
S
V =±5V
S
A =+10
A =+5
C
=25pF
V
G
V
IN
R
=50Ω
R =50Ω
G
C
=18pF
IN
3
1
R =500Ω
R =500Ω
L
L
C =5pF
C =5pF
L
L
V =±6
1
S
V =±2.5
S
C
C
=15pF
=10pF
IN
IN
-1
-3
-5
-1
-3
-5
V =±3
S
V =±4
S
V =±5
S
0.1
1
10
FREQUENCY (MHz)
100
1k
0.1
1
10
FREQUENCY (MHz)
100
1k
FIGURE 13. GAIN vs FREQUENCY FOR VARIOUS C
IN
-
FIGURE 14. GAIN vs FREQUENCY FOR VARIOUS ±V (A =+5)
S V
(A =+10)
V
5
3
5
3
V =±5V
V =±5V
S
S
A =+10
A =+5
V
G
V
R
=50Ω
R =50Ω
G
R =500Ω
R =500Ω
L
L
C =5pF
L
1
1
V =±6
S
-1
-3
-5
-1
-3
-5
V =±2.5
S
-3dB @
360MHz
V =±3
S
V =±4
S
V =±5
S
0.1
1
10
FREQUENCY (MHz)
100
1k
1
10
100
1k
FREQUENCY (MHz)
FIGURE 15. GAIN vs FREQUENCY FOR VARIOUS V ± (A =+10)
FIGURE 16. FREQUENCY RESPONSE (-3dB ROLL-OFF)
S
V
0.5
0.3
-40
V =±5V
V =±5V
S
S
A =+5
A =+5
V
G
V
R
=50Ω
R =50Ω
G
-60
-80
R =500Ω
R =500Ω
L
L
C =5pF
L
0.1
-0.1
-0.3
-0.5
-100
-120
-140
-0.1dB @
230MHz
1
10
100
1k
0.1
1
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE 17. FREQUENCY RESPONSE (0.1dB GAIN FLATNESS)
FIGURE 18. INPUT AND OUTPUT ISOLATION FOR DISABLE
AMPLIFIER
FN7381.3
June 6, 2006
5
EL5130, EL5131
Typical Performance Curves
10
-10
-30
A =+10
V =±5V
S
V
V =±5V
A =+5
S
V
R =150Ω
L
V +
-10
-30
-50
-70
-90
S
V -
S
-50
-70
V -
S
-90
V +
S
-110
0.01
1k
10k
100k
1M
10M
100M 500M
0.1
1
10
100
1k
100k
20
FREQUENCY (Hz)
FREQUENCY (MHz)
FIGURE 19. PSRR vs FREQUENCY
FIGURE 20. CMRR vs FREQUENCY
5
4
3
2
1
0
10
1
10
1
10
100
1k
100
1k
10k
FREQUENCY (MHz)
FREQUENCY (Hz)
FIGURE 21. GROUP DELAY vs FREQUENCY
FIGURE 22. INPUT VOLTAGE NOISE
-30
-40
-50
-60
-70
-80
V =±5V
S
A =+5
V
G
R
=50Ω
10
R =500Ω
L
C =5pF
L
OUT
THD
V
=2V
P-P
2ND HD
3RD HD
1
10
100
1k
10k
100k
0.5
1
10
FREQUENCY (Hz)
FUNDAMENTAL FREQUENCY (MHz)
FIGURE 23. INPUT CURRENT NOISE
FIGURE 24. HARMONIC DISTORITON vs FREQUENCY (A =+5)
V
FN7381.3
June 6, 2006
6
EL5130, EL5131
Typical Performance Curves
-30
-30
-40
-50
-60
-70
-80
-90
V =±5V
V =±5V
S
S
A =+10
A =+5
V
G
V
-40
-50
-60
-70
-80
-90
R
=50Ω
R =50Ω
G
THD
R =500Ω
R =500Ω
L
L
F
=10MHz
IN
THD
C =5pF
C =5pF
L
L
OUT
V
=2V
P-P
2ND HD
THD
F
F
=5MHz
IN
3RD HD
THD
=1MHz
IN
0.5
1
10
20
0
1
2
3
4
5
6
7
FUNDAMENTAL FREQUENCY (MHz)
OUTPUT VOLTAGE (V
)
P-P
FIGURE 25. HARMONIC DISTORTION vs FREQUENCY
(A =+10)
FIGURE 26. THD vs OUTPUT VOLTAGE (WORST HARMONIC)
V
100
10
5
A =+5
V =±5V
S
V
V =±5V
A =+5
S
V
G
R
=50Ω
3
1
R =500Ω
V
=0.5V
OUT
L
P-P
C =5pF
L
V
=1V
OUT
P-P
1
-1
-3
-5
V
=2V
OUT P-P
0.1
0.01
V
=4V
OUT P-P
V
=6V
OUT
P-P
10k
100k
1M
10M
100M
0.1
1
10
FREQUENCY (MHz)
100
1k
FREQUENCY (Hz)
FIGURE 27. OUTPUT IMPEDANCE vs FREQUENCY
FIGURE 28. OUTPUT SWING vs FREQUENCY
150
100
150
V =±5V
S
A =+5
V
G
100
50
R
=50Ω
R =500Ω
OUTPUT
FALL TIME
4ns
L
OUTPUT
RISE TIME
4ns
C =5pF
200mV
L
P-P
200mV
50
0
P-P
INPUT
0
40mV
P-P
INPUT
-50
-50
-100
-150
V =±5V
S
40mV
P-P
A =+5
V
G
R
=50Ω
-100
-150
R =500Ω
L
C =5pF
L
-20
-10
0
10
20
30
40
50
270
280
290
300
310
320
330
TIME (ns)
TIME (ns)
FIGURE 29. SMALL SIGNAL PULSE RESPONSE/RISE TIME
FIGURE 30. SMALL SIGNAL PULSE REPONSE/FALL TIME
FN7381.3
June 6, 2006
7
EL5130, EL5131
Typical Performance Curves
2
2
1
1
OUTPUT
2V
FALL TIME
4.4ns
INPUT
P-P
400mV
P-P
INPUT
400mV
0
-1
-2
0
P-P
OUTPUT
RISE TIME
4.4ns
V =±5V
S
V =±5V
S
V
2V
P-P
A =+5
A =+5
-1
-2
V
G
R
=50Ω
R =50Ω
G
R =500Ω
R =500Ω
L
L
C =5pF
C =5pF
L
L
-20
-10
0
10
20
30
40
50
30
40
50
60
70
80
90
100
TIME (ns)
TIME (ns)
FIGURE 31. LARGE SIGNAL PULSE RESPONSE/RISE TIME
FIGURE 32. LARGE SIGNAL PULSE RESPONSE/RISE TIME
3
2
3
2
1
OUTPUT
4V
SLEW RATE
275V/µs
1
0
P-P
OUTPUT
4V
SLEW RATE
281V/µs
P-P
0
-1
-2
-3
-1
-2
-3
V =±5V
V =±5V
S
A =+5
S
A =+5
V
G
V
R
=50Ω
R =50Ω
G
R =500Ω
R =500Ω
L
L
C =5pF
C =5pF
L
L
-20
-10
0
10
20
30
40
50
510
520
530
540
550
560
570
580
TIME (ns)
TIME (ns)
FIGURE 33. SLEW RATE (POSITIVE)
FIGURE 34. SLEW RATE (NEGATIVE)
A =+10
A =+10
V
S
V
V =±5V
V =±5V
S
CH1
CH2
CH1
CH2
CH1=1V
CH1=1V
CH2=200mV
CH2=200mV
200ns/DIV
200ns/DIV
FIGURE 35. ENABLE RESPONSE/TURN-ON TIME
FIGURE 36. DISABLE RESPONSE/TURN-OFF TIME
FN7381.3
June 6, 2006
8
EL5130, EL5131
Typical Performance Curves
20
3.6
3.5
3.4
3.3
3.2
R
=50Ω
G
L
L
R =500Ω
C =5pF
10
0
A =+10
V
A =+5
V
V =±5V
S
A =+5
-10
-20
V
G
R
=50Ω
R =500Ω
L
C =5pF
L
0.1
1
10
100
1k
2.5
3
3.5
4
4.5
5
5.5
6
FREQUENCY (MHz)
SUPPLY VOLTAGE (V)
FIGURE 37. THIRD-ORDER INTERCEPT POINT
FIGURE 38. SUPPLY CURRENT vs SUPPLY VOLTAGE
0.03
0.01
0.03
0.01
-0.01
-0.03
-0.01
-0.03
-10
0
10 20 30 40 50 60 70 80 90 100
IRE
-10
0
10 20 30 40 50 60 70 80 90 100
IRE
FIGURE 39. DIFFERENTIAL GAIN ERRORS
FIGURE 40. DIFFERENTIAL PHASE ERRORS
-20
V =±5V
S
A =+5
V
G
R
=50Ω
R =500Ω
-50
-80
L
C =5pF
L
f1
f1
2f2-f1
2f1-f2
-110
-140
400
440
480
520
560
600
FREQUENCY (kHz)
FIGURE 41. IP3
FN7381.3
June 6, 2006
9
EL5130, EL5131
Typical Performance Curves
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.4
1.2
1
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
909mW
625mW
391mW
0.8
0.6
0.4
0.2
0
435mW
0
25
50
75 85 100
125
150
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 42. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 43. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FN7381.3
June 6, 2006
10
EL5130, EL5131
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M
C A B
e
H
C
A2
A1
GAUGE
PLANE
SEATING
PLANE
0.010
L
4° ±4°
0.004 C
b
0.010 M
C
A
B
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
SO16
(0.150”)
SO16 (0.300”)
(SOL-16)
SO20
SO24
(SOL-24)
SO28
(SOL-28)
SYMBOL
SO-8
0.068
0.006
0.057
0.017
0.009
0.193
0.236
0.154
0.050
0.025
0.041
0.013
8
SO-14
0.068
0.006
0.057
0.017
0.009
0.341
0.236
0.154
0.050
0.025
0.041
0.013
14
(SOL-20)
0.104
0.007
0.092
0.017
0.011
0.504
0.406
0.295
0.050
0.030
0.056
0.020
20
TOLERANCE
MAX
NOTES
A
A1
A2
b
0.068
0.006
0.057
0.017
0.009
0.390
0.236
0.154
0.050
0.025
0.041
0.013
16
0.104
0.007
0.092
0.017
0.011
0.406
0.406
0.295
0.050
0.030
0.056
0.020
16
0.104
0.007
0.092
0.017
0.011
0.606
0.406
0.295
0.050
0.030
0.056
0.020
24
0.104
0.007
0.092
0.017
0.011
0.704
0.406
0.295
0.050
0.030
0.056
0.020
28
-
±0.003
±0.002
±0.003
±0.001
±0.004
±0.008
±0.004
Basic
-
-
-
c
-
D
1, 3
E
-
E1
e
2, 3
-
L
±0.009
Basic
-
L1
h
-
Reference
Reference
-
N
-
Rev. L 2/01
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
FN7381.3
June 6, 2006
11
EL5130, EL5131
SOT-23 Package Family
MDP0038
e1
D
SOT-23 PACKAGE FAMILY
A
SYMBOL
SOT23-5
1.45
0.10
1.14
0.40
0.14
2.90
2.80
1.60
0.95
1.90
0.45
0.60
5
SOT23-6
1.45
0.10
1.14
0.40
0.14
2.90
2.80
1.60
0.95
1.90
0.45
0.60
6
TOLERANCE
MAX
6
4
N
A
A1
A2
b
±0.05
±0.15
E1
E
±0.05
2
3
c
±0.06
0.15
2X
C
D
D
Basic
1
2
3
0.20
2X
C
E
Basic
5
e
E1
e
Basic
Basic
0.20
C
A-B
D
M
B
b
NX
e1
L
Basic
±0.10
L1
N
Reference
Reference
Rev. E 3/00
0.15
2X
C
A-B
1
3
NOTES:
D
1. Plastic or metal protrusions of 0.25mm maximum per side are
not included.
C
A2
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
SEATING
PLANE
3. This dimension is measured at Datum Plane “H”.
A1
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
0.10
NX
C
5. Index area - Pin #1 I.D. will be located within the indicated zone
(SOT23-6 only).
6. SOT23-5 version has no center lead (shown as a dashed line).
(L1)
H
A
GAUGE
PLANE
0.25
c
+3°
-0°
L
0°
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FN7381.3
June 6, 2006
12
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