DG444DJ [INTERSIL]
Monolithic, Quad SPST, CMOS Analog Switches; 单片四路SPST ， CMOS模拟开关
| 型号： | DG444DJ |
| 厂家： | 
Intersil |
| 描述： | Monolithic, Quad SPST, CMOS Analog Switches |
| 文件： | 总10页 (文件大小：106K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DG444, DG445
Data Sheet
June 1999
File Number 3586.5
Monolithic, Quad SPST, CMOS Analog
Switches
Features
• ON Resistance (Max). . . . . . . . . . . . . . . . . . . . . . . . . 85Ω
The DG444 and DG445 monolithic CMOS analog switches
are drop-in replacements for the popular DG211 and DG212
series devices. They include four independent single pole
single throw (SPST) analog switches and TTL and CMOS
compatible digital inputs.
• Low Power Consumption (P ) . . . . . . . . . . . . . . . . <35µW
D
• Fast Switching Action
- t
- t
(Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250ns
ON
(Max, DG444) . . . . . . . . . . . . . . . . . . . . . . . 140ns
OFF
• Low Charge Injection
These switches feature lower analog ON resistance (<85Ω)
and faster switch time (t
and DG212. Charge injection has been reduced, simplifying
sample and hold applications.
<250ns) compared to the DG211
ON
• Upgrade from DG211/DG212
• TTL, CMOS Compatible
• Single or Split Supply Operation
The improvements in the DG444 series are made possible
by using a high voltage silicon-gate process. An epitaxial
layer prevents the latch-up associated with older CMOS
technologies. The 44V maximum voltage range permits
controlling ±20V signals when operating with ±20V power
supplies.
Applications
• Audio Switching
• Battery Operated Systems
• Data Acquisition
The four switches are bilateral, equally matched for AC or
bidirectional signals. The ON resistance variation with
analog signals is quite low over a ±5V analog input range.
The switches in the DG444 and DG445 are identical,
differing only in the polarity of the selection logic.
• Hi-Rel Systems
• Sample and Hold Circuits
• Communication Systems
• Automatic Test Equipment
Pinout
DG444, DG445 (PDIP, SOIC)
Ordering Information
TOP VIEW
TEMP.
o
PART NUMBER RANGE ( C)
PACKAGE
PKG. NO.
E16.3
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN
D
IN
2
1
1
1
DG444DJ
DG444DY
DG445DJ
DG445DY
-40 to 85
-40 to 85
-40 to 85
-40 to 85
16 Ld PDIP
16 Ld SOIC
16 Ld PDIP
16 Ld SOIC
D
2
M16.15
E16.3
S
S
2
V-
V+
M16.15
GND
V
S
L
3
S
D
4
4
4
D
3
IN
IN
3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
DG444, DG445
Pin Descriptions
Functional Diagrams
PIN
SYMBOL
DESCRIPTION
DG444
DG445
1
IN
D
Logic Control for Switch 1
1
S
S
1
1
IN
IN
IN
IN
2
Drain (Output) Terminal for Switch 1
Source (Input) Terminal for Switch 1
Negative Power Supply Terminal
Ground Terminal (Logic Common)
Source (Input) Terminal for Switch 4
Drain (Output) Terminal for Switch 4
Logic Control for Switch 4
1
1
1
D
S
D
1
2
1
2
3
S
1
S
4
V-
IN
IN
2
3
2
D
S
D
5
GND
2
3
2
3
S
6
S
4
3
7
D
4
D
S
D
3
4
3
4
S
8
IN
4
3
IN
IN
4
4
9
IN
Logic Control for Switch 3
D
D
4
4
10
11
12
13
14
15
16
D
Drain (Output) Terminal for Switch 3
Source (Input) Terminal for Switch 3
Logic Reference Voltage.
3
SWITCHES SHOWN FOR LOGIC “1” INPUT
S
V
3
L
TRUTH TABLE
V+
Positive Power Supply Terminal (Substrate)
Source (Input) Terminal for Switch 2
Drain (Output) Terminal for Switch 2
Logic Control for Switch 2
LOGIC
V
DG444
ON
DG445
OFF
IN
S
2
0
1
≤0.8V
≥2.4V
D
2
OFF
ON
IN
2
Schematic Diagram (One Channel)
V+
S
V
L
V-
V+
IN
X
D
GND
V-
2
DG444, DG445
Absolute Maximum Ratings
Thermal Information
o
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V
GND to V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V
Thermal Resistance (Typical, Note 2)
θJA ( C/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
115
V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (GND - 0.3V) to (V+) + 0.3V
L
o
Digital Inputs, V , V (Note 1). . . . . (V-) -2V to (V+) + 2V or 30mA,
S
D
Maximum Junction Temperature (Plastic Packages) . . . . . . . 150 C
Maximum Storage Temperature Range. . . . . . . . . . -65 C to 150 C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300 C
o
o
Whichever Occurs First
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA
Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . 100mA
o
(SOIC - Lead Tips Only)
Operating Conditions
o
o
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 85 C
Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20V (Max)
o
o
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C
Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8V (Max)
Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4V (Min)
Input Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤20ns
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Signals on S , D , or IN exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
X
X
X
2. θ is measured with the component mounted on an evaluation PC board in free air.
JA
Electrical Specifications Test Conditions: V+ = +15V, V- = -15V, V = 5V, V = 2.4V, 0.8V (Note 3),
L
IN
Unless Otherwise Specified
TEMP
( C)
(NOTE 4)
MIN
(NOTE 5)
TYP
(NOTE 4)
MAX
o
PARAMETER
TEST CONDITIONS
UNITS
DYNAMIC CHARACTERISTICS
Turn-ON Time, t
ON
R
= 1kΩ, C = 35pF, V = ±10V
25
-
120
250
ns
L
L
S
(Figure 1)
Turn-OFF Time, t
OFF
DG444
25
25
25
25
25
-
-
-
-
-
110
160
-1
140
ns
ns
DG445
210
Charge Injection, Q (Figure 2)
OFF Isolation (Figure 4)
C
R
= 1nF, V = 0V, R = 0Ω
-
-
-
pC
dB
dB
L
G
G
= 50Ω, C = 5pF, f = 1MHz
60
L
L
Crosstalk (Channel-to-Channel)
(Figure 3)
-100
Source OFF Capacitance, C
f = 1MHz, V
ANALOG
= 0 (Figure 5)
25
25
25
-
-
-
4
4
-
-
-
pF
pF
pF
S(OFF)
Drain OFF Capacitance, C
D(OFF)
Channel ON Capacitance,
16
C
+ C
S(ON)
D(ON)
DIGITAL INPUT CHARACTERISTICS
Input Current V Low, I
V
Under Test = 0.8V,
Full
Full
-0.5
-0.5
-0.00001
0.00001
0.5
0.5
µA
µA
IN
IL
IN
All Others = 2.4V
Input Current V High, I
IN IH
V
Under Test = 2.4V,
IN
All Others = 0.8V
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
Full
25
-15
-
-
50
-
15
85
V
Ω
ANALOG
Drain-Source ON Resistance,
I
=
10mA, V = ±8.5V,
D
S
r
V+ = 13.5V, V- = -13.5V
DS(ON)
Full
25
-
100
0.5
5
Ω
Source OFF Leakage Current, I
V+ = 16.5V, V- = -16.5V,
V
-0.5
-5
0.01
-
nA
nA
S(OFF)
= ±15.5V, V
=
S
15.5V
D
85
3
DG444, DG445
Electrical Specifications Test Conditions: V+ = +15V, V- = -15V, V = 5V, V = 2.4V, 0.8V (Note 3),
L
IN
Unless Otherwise Specified (Continued)
TEMP
( C)
(NOTE 4)
MIN
(NOTE 5)
TYP
(NOTE 4)
MAX
o
PARAMETER
TEST CONDITIONS
UNITS
nA
Drain OFF Leakage Current,
V+ = 16.5V, V- = -16.5V,
25
85
25
85
-0.5
-5
0.01
0.5
5
I
V
= ±15.5V, V =
S
15.5V
D(OFF)
D
-
0.08
-
nA
Channel ON Leakage Current,
+ I
V+ = 16.5V, V- = -16.5V,
V = V , = ±15.5V
S
-0.5
-10
0.5
10
nA
I
D(ON)
S(ON)
D
nA
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 16.5V, V- = -16.5V,
= 0V or 5V
25
85
25
85
25
85
25
85
-
-
0.001
1
5
-
µA
µA
µA
µA
µA
µA
µA
µA
V
IN
-
Negative Supply Current, I-
-1
-5
-
-0.0001
-
-
Logic Supply Current, I
0.001
1
5
-
L
-
-
-0.001
-
Ground Current, I
-1
-5
GND
-
Electrical Specifications (Single Supply) Test Conditions: V+ = 12V, V- = 0V, V = 5V, V = 2.4V, 0.8V (Note 3),
L
IN
Unless Otherwise Specified
TEMP
( C)
(NOTE 4)
MIN
(NOTE 5)
TYP
(NOTE 4)
MAX
o
PARAMETER
TEST CONDITIONS
UNITS
DYNAMIC CHARACTERISTICS
Turn-ON Time, t
ON
R
= 1kΩ, C = 35pF, V = 8V
25
25
25
-
-
-
300
60
2
450
200
-
ns
ns
L
L
S
(Figure 1)
Turn-OFF Time, t
OFF
Charge Injection, Q (Figure 2)
C
= 1nF, V = 6V, R = 0Ω
pC
L
G
G
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
Full
25
0
-
-
100
-
12
V
Ω
Ω
Drain-Source ON Resistance, r
I
= -10mA, V = 3V, 8V
160
200
DS(ON)
S
D
V+ = 10.8V, V = 5.25V
L
Full
-
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 13.2V, V = 0V or 5V,
IN
25
Full
25
-
-
0.001
1
5
-
µA
µA
µA
µA
µA
µA
µA
µA
V
= 5.25V
L
-
Negative Supply Current, I-
-1
-5
-
-0.0001
Full
25
-
-
Logic Supply Current, I
0.001
1
5
-
L
Full
25
-
-
-0.001
-
Ground Current, I
NOTES:
-1
-5
GND
Full
-
3. V = input voltage to perform proper function.
IN
4. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
5. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
4
DG444, DG445
Test Circuits and Waveforms
V
is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and trailing
O
edge of the output waveform.
V
V+
L
3V
t < 20ns
r
t < 20ns
f
LOGIC
INPUT
D
50%
1
SWITCH
INPUT
S
V
1
1
O
0V
IN
t
OFF
SWITCH
INPUT
C
R
L
L
V
S
LOGIC
INPUT
3V
V
O
GND
80%
80%
V-
SWITCH
OUTPUT
0V
Repeat test for Channels 2, 3 and 4.
For load conditions, see Specifications. C includes fixture and
t
L
ON
stray capacitance.
R
L
+ r
DS(ON)
NOTE: Logic input waveform is inverted for switches that have
the opposite logic sense.
------------------------------------
L
V
= V
S
O
R
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V
V+
L
SWITCH
OUTPUT
∆V
O
R
G
D
1
V
O
IN
X
OFF
OFF
OFF
OFF
ON
ON
(DG444)
V
G
C
L
V-
V
= 3V
IN
IN
(DG445)
X
Q = ∆V x C
O
L
GND
FIGURE 2B. TEST CIRCUIT
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2. CHARGE INJECTION
+15V
+15V
V+
V+
C
C
SIGNAL
GENERATOR
SIGNAL
GENERATOR
50Ω
V
V
S
10dBm
V
10dBm
S
D
IN
0V, 2.4V
X
IN
0V, 2.4V
1
0V, 2.4V
NC
IN
2
V
D
V
ANALYZER
D
ANALYZER
C
R
L
C
V-
R
L
GND
V-
GND
-15V
-15V
FIGURE 3. CROSSTALK TEST CIRCUIT
FIGURE 4. OFF ISOLATION TEST CIRCUIT
5
DG444, DG445
Test Circuits and Waveforms (Continued)
+15V
V+
V
C
S
IN
0V, 2.4V
X
IMPEDANCE
ANALYZER
V
D
f = 1MHz
C
V-
GND
-15V
FIGURE 5. SOURCE/DRAIN CAPACITANCES TEST CIRCUIT
Application Information
+15V
FET INPUT
OP AMP
3
2
7
V
6
IN
+
-
V
+5V
+15V
V+
OUT
4
+5V
12
+15V
V
L
-15V
13
V+
+15V
IN
1
/
DG444
4
+15V
OUT
V
L
3
14
11
6
2
1
V
+5V
0V
GAIN
1
R
90kΩ
1
V
A
= 1
10kΩ
V
0V
15
16
GND
V-
GAIN
2
R
5kΩ
2
A
= 10
V
10
9
GAIN
3
R
3
4kΩ
FIGURE 7. LEVEL SHIFTER
A
= 20
V
7
8
GAIN
4
R
1kΩ
4
A
= 100
V
DG444 OR DG445
V-
GND
4
5
-15V
GAIN ERROR IS DETERMINED ONLY BY
THE RESISTOR TOLERANCE, OP AMP OFFSET
AND CMRR WILL LIMIT ACCURACY OF CIRCUIT
V
R + R + R + R
1 2 3 4
OUT
--------------- = ------------------------------------------------ = 100
V
R
4
IN
WITH SW CLOSED
4
FIGURE 6. PRECISION WEIGHTED RESISTOR
PROGRAMMABLE GAIN AMPLIFIER
6
DG444, DG445
Typical Performance Curves
5
10
10
10
10
4
3
4
3
2
I+, I
GND
2
10
1
-(I-)
V
= 7V
L
V
= 5V
L
0.1
1
0
0.01
I
L
0.001
-55
0
50
o
100
125
0
4
8
12
16
20
TEMPERATURE ( C)
SUPPLY VOLTAGE (±V)
FIGURE 8. SWITCHING THRESHOLD vs SUPPLY VOLTAGE
FIGURE 9. SUPPLY CURRENT vs TEMPERATURE
5
80
70
60
50
40
30
20
10
0
10
V+ = +15V
V- = -15V
4
10
3
10
o
85 C
2
10
o
25 C
10
1
o
0 C
o
-40 C
0.1
-55
0
50
100
125
-15
0
15
o
TEMPERATURE ( C)
V (V)
D
FIGURE 10. INPUT CURRENT vs TEMPERATURE
FIGURE 11. r
vs V AND TEMPERATURE
DS(ON) D
140
120
100
80
50
40
30
20
10
0
V+ = +15V
V- = -15V
CROSSTALK
OFF ISOLATION
C
= 10nF
L
60
C
= 1nF
L
40
-10
-20
-30
V+ = +15V
V- = -15V
20
P
= 10dBm
GEN
0
-10
0
10
100
1K
10K
100K
1M
10M
V
(V)
S
FREQUENCY (Hz)
FIGURE 12. CROSSTALK REJECTION AND OFF ISOLATION
vs FREQUENCY
FIGURE 13. CHARGE INJECTION vs SOURCE VOLTAGE
7
DG444, DG445
Typical Performance Curves (Continued)
25
20
V+ = +15V
V- = -15V
I
, I
S(OFF) D(OFF)
0
-20
20
C
+ C
D(ON)
S(ON)
15
10
5
-40
I
+ I
D(ON)
S(ON)
-60
V+ = +15V
V- = -15V
C
, C
D(OFF)
S(OFF)
-80
FOR I
, V = -V
D
(OFF)
S
0
-15
-100
-10
-5
0
5
10
15
-15
-10
-5
0
5
10
15
V
(V)
V , V (V)
A
S
D
FIGURE 14. SOURCE/DRAIN CAPACITANCE vs ANALOG
VOLTAGE
FIGURE 15. LEAKAGE CURRENTS vs ANALOG VOLTAGE
150
V+ = +15V, V- = -15V
160
V
= 5V
L
V+ = +15V
V- = -15V
140
t
ON
120
100
80
100
50
0
t
ON
t
OFF
t
60
OFF
40
20
2
3
4
5
2
3
4
5
V
(V)
V
(V)
IN
IN
FIGURE 16. SWITCHING TIME vs INPUT VOLTAGE (DG444)
160
FIGURE 17. SWITCHING TIME vs INPUT VOLTAGE (DG445)
160
V
= 5V
L
140
140
120
100
80
t
OFF
t
ON
120
100
80
t
ON
60
60
t
OFF
40
20
40
20
10
12
14
16
18
20
22
10
12
14
16
18
20
22
SUPPLY VOLTAGE (±V)
SUPPLY VOLTAGE (±V)
FIGURE 18. SWITCHING TIME vs POWER SUPPLY VOLTAGE
(DG444)
FIGURE 19. SWITCHING TIME vs POWER SUPPLY VOLTAGE
(DG445)
8
DG444, DG445
Typical Performance Curves (Continued)
400
500
400
300
200
100
V+ = +12V, V- = 0V
L
V- = 0V, V = 5V
L
V
= 5V
t
ON
300
200
100
0
t
(444)
ON
t
(445)
ON
t
OFF
t
OFF
(445)
16
t
(444)
OFF
0
8
10
12
14
18
20
22
2
3
4
5
V
(V)
IN
POSITIVE SUPPLY (V)
FIGURE 20. SWITCHING TIME vs INPUT VOLTAGE (DG444)
(SINGLE 12V SUPPLY)
FIGURE 21. SWITCHING TIMES vs SINGLE SUPPLY VOLTAGE
10
30
V+ = 12V
V- = 0V
I
, I
S(OFF) D(OFF)
0
-10
-20
-30
-40
20
10
C
= 10nF
L
C
= 1nF
I
+ I
D(ON)
L
S(ON)
V+ = +12V
V- = 0V
0
FOR I , V = 0
D
S
FOR I , V = 0
S
D
-10
0
6
12
0
4
8
V
(V)
V , V (V)
S
S D
FIGURE 22. CHARGE INJECTION vs SOURCE VOLTAGE
(SINGLE 12V SUPPLY)
FIGURE 23. SOURCE/DRAIN LEAKAGE CURRENTS (SINGLE
12V SUPPLY)
20
V+ = +12V
V- = 0V
C
+ C
D(ON)
S(ON)
15
10
5
C
, C
D(OFF)
S(OFF)
0
0
6
(V)
12
V
A
FIGURE 24. SOURCE/DRAIN CAPACITANCE vs ANALOG VOLTAGE (SINGLE 12V SUPPLY)
9
DG444, DG445
Die Characteristics
DIE DIMENSIONS:
PASSIVATION:
2160µm x 1760µm x 485
Type: Nitride
Thickness: 8kÅ ±1kÅ
METALLIZATION:
WORST CASE CURRENT DENSITY:
Type: SiAl
Thickness: 12kÅ ±1kÅ
4
2
9.1 x 10 A/cm
Metallization Mask Layout
DG444, DG445
D
IN
IN
2
1
1
(2)
(1)
(16)
(15) D
(14) S
2
S
(3)
2
1
(13) V+ SUBSTRATE
V- (4)
GND (5)
(12) V
L
(11) S
3
S
(6)
4
(7)
(8)
IN
(9)
IN
(10)
D
D
3
4
4
3
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
EUROPE
ASIA
Intersil Corporation
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
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