5962-86879013A [INTERSIL]
ARINC 429 Bus Interface Line Driver Circuit; ARINC 429总线接口线驱动器电路
| 型号： | 5962-86879013A |
| 厂家： | 
Intersil |
| 描述： | ARINC 429 Bus Interface Line Driver Circuit |
| 文件： | 总6页 (文件大小：42K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HS-3182
ARINC 429 Bus Interface Line Driver Circuit
March 1997
Features
Description
• TTL and CMOS Compatible Inputs
The HS-3182 is a monolithic dielectrically isolated bipolar differ-
ential line driver designed to meet the specifications of ARINC
429. This Device is intended to be used with a companion chip,
HS-3282 CMOS ARINC Bus Interface Circuit, which provides
• Adjustable Rise and Fall Times via Two External
Capacitors
• Programmable Output Differential Voltage via V
Input
REF
the data formatting and processor interface function.
All logic inputs are TTL and CMOS compatible. In addition to
the DATA (A) and DATA (B) inputs, there are also inputs for
CLOCK and SYNC signals which are AND’d with the DATA
inputs. This feature enhances system performance and allows
the HS-3182 to be used with devices other than the HS-3182.
• Operates at Data Rates Up to 100 Kilobits/Sec
• Output Short Circuit Proof and Contains Over-Voltage
Protection
• Outputs are Inhibited (0 Volts) If DATA (A) and DATA
(B) Inputs are Both in the “Logic One” State
Three power supplies are necessary to operate the
• DATA (A) and DATA (B) Signals are “AND’d” with Clock
and Sync Signals
HS-3182: +V = +15V ± 10%, -V = -15V ± 10%, and V = 5V
1
± 5%. V
is used to program the differential output voltage
REF
swing such that V
(DIFF) = ± 2V
. Typically, V =
• Full Military Temperature Range
OUT
V = 5V ± 5%, but a separate power supply may be used for
REF
REF
1
V
Ordering Information
which should not exceed 6V.
REF
o
The driver output impedance is 75Ω ± 20% at 25 C. Driver
output rise and fall times are independently programmed
through the use of two external capacitors connected to the
TEMPERATURE
RANGE
PKG.
NO
PACKAGE
PART NUMBER
o
o
SBDIP
-40 C to +85 C HS1-3182-9+
D16.3
D16.3
D16.3
J28.A
J28.A
C
and C inputs. Typical capacitor values are C = C
=
=
A
B
A
B
B
o
o
75pF for high-speed operation (100KBPS), and C = C
-55 C to +125 C HS1-3182-8
A
300pF for low-speed operation (12 to 14.5KBPS). The out-
puts are protected against over-voltage and short circuit as
shown in the Block Diagram. The HS-3182 is designed to
o
o
SMD#
CLCC
-55 C to +125 C 5962-8687901EA
o
o
-55 C to +125 C HS4-3182-8
o
o
operate with a case temperature range of -55 C to +125 C,
o
o
SMD#
-55 C to +125 C 5962-86879013A
o
o
or 0 C to +70 C.
Pinouts
HS-3182 (SBDIP)
HS-3182 (CLCC)
TOP VIEW
TOP VIEW
V
1
2
3
4
5
6
7
8
16 V
1
REF
GND
SYNC
15 NC
4
3
2
1
28 27 26
14 CLK
25
CLK
NC
DATA (A)
NC
5
6
7
8
9
DATA (A)
13 DATA (B)
24 NC
C
12 C
11 B
A
B
23 DATA (B)
A
OUT
OUT
C
22
NC
10 NC
9 +V
-V
B
C
A
21 NC
20 NC
19 NC
GND
NC 10
NC 11
TRUTH TABLE
SYNC CLK DATA (A) DATA (B)
A
B
COMMENTS
Null
12 13 14 15 16 17 18
OUT
OUT
X
L
L
X
H
H
H
H
X
X
L
X
X
L
0V
0V
0V
0V
0V
0V
Null
H
H
H
H
Null
L
H
L
-V
REF
+V
Low
REF
H
H
+V
REF
-V
High
REF
H
0V
0V
Null
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
File Number 2963.1
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 19959-178
HS-3182
Block Diagram
(9) (5)
+V
C
A
OUTPUT
DRIVER
(A)
(6)
A
(4)
F
LEVEL SHIFTER
AND SLOPE
CONTROL (A)
A
DATA (A)
OUT
R
OUT/2
(14)
CLOCK
(1)
(8)
V
GND
C
REF
L
R
L
(3)
OUTPUT
SYNC
DRIVER
(B)
R
F
OUT/2
B
LEVEL SHIFTER
AND SLOPE
CONTROL (B)
(13)
B
OUT
(11)
DATA (B)
(16)
V
1
CURRENT
(2)
REGULATOR
OVER-VOLTAGE
PROTECTION
-V
C
B
(7) (12)
Typical Application
(9)
PIN NUMBERS INDICATED BY ( )
(16) (1)
+5V
+15V
C
C
A
B
(5)
(12)
V
V
C
C
B
+V
1
REF
A
(14)
(3)
CLOCK
SYNC
A
OUT
TO BUS
(SEE
NOTE)
B
HS-3182
ARINC DRIVER
CIRCUIT
OUT
31
32
(4)
429D0
DATA (A)
DATA (B)
16 LEAD DIP
HS-3282
CMOS ARINC
CIRCUIT
(13)
GND
(2)
GND
(8)
-V
429D0
(7)
PIN NUMBER 10, 15 = NC
-15V
NOTE: The rise and fall time of the outputs are set to ARINC specified values by C and C . Typical C = C = 75pF for high speed and
A
B
A
B
300pF for low speed operation. The output HI and low levels are set to ARINC specifications by V
.
REF
5-179
HS-3182
Absolute Maximum Ratings
Thermal Information
Voltage Between +V and -V Terminals . . . . . . . . . . . . . . . . . . . . 40V Thermal Resistance (Typical)
θ
o
θ
JC
JA
o
V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
1
SBDIP Package. . . . . . . . . . . . . . . . . . 75 C/W
CLCC Package . . . . . . . . . . . . . . . . . . 60 C/W
Storage Temperature Range. . . . . . . . . . . . . . . . . .-65 C to +150 C
18 C/W
o
o
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
REF
14 C/W
o
o
Logic Input Voltage. . . . . . . . . . . . . . . . . . . . GND -0.3V to V +0.3V
1
o
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . See Note 1
Output Over-Voltage Protection . . . . . . . . . . . . . . . . . . . See Note 2
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +175 C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300 C
o
Die Characteristics
Recommended Operating Conditions
Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Operating Voltage
+V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+15V ± 10%
-V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15V ± 10%
V
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V ± 5%
1
(For ARINC 429) . . . . . . . . . . . . . . . . . . . . . . . . . . .5V ± 5%
REF
Operating Temperature Range
HS-3182-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 C to +70 C
HS-3182-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55 C to +125 C
NOTES:
o
o
o
o
o
o
1. Heat sink may be required for 100K bits/s at +125 C and output short circuit at +125 C.
2. The fuses used for output over-voltage protection may be blown by a fault at each output of greater than ± 6.5V relative to GND.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
DC Electrical Performance Specifications
(NOTE 1)
DC PARAMETER
Supply Current +V (Operating)
Supply Current -V (Operating)
SYMBOL
CONDITIONS
No Load (0-100K bits/s)
No Load (0-100K bits/s)
No Load (0-100K bits/s)
No Load (0-100K bits/s)
MIN
-
MAX
UNITS
mA
mA
µA
I
I
(+V)
(-V)
16
-
CCOP
I
-16
-
CCOP
Supply Current V (Operating)
(V )
975
-
1
CCOP
1
Supply Current V
REF
(Operating)
I
(V
CCOP REF
)
-1.0
2.0
-
mA
V
Logic “1” Input Voltage
V
-
IH
Logic “0” Input Voltage
V
0.5
V
IL
Output Voltage High (Output to GND)
V
No Load (0-100K bits/s)
No Load (0-100K bits/s)
No Load (0-100K bits/s)
V
V
OH
REF
REF
(+250mV)
(-250mV)
Output Voltage Low (Output to GND)
V
-V
-V
REF
(+250mV)
OL
REF
(-250mV)
Output Voltage Null
V
-250
+250
-
mV
µA
NULL
Input Current (Input Low)
Input Current (Input High)
I
-20
IL
I
-
-
10
µA
IH
Output Short Circuit Current
(Output High)
I
Short to GND
-80
mA
OHSC
Output Short Circuit Current
(Output Low)
I
Short to GND
o
80
60
o
-
mA
OLSC
Output Impedance
NOTE:
Z
T = +25 C
90
Ω
O
A
o
1. +V = +15V ± 10%, -V = -15V ± 10%, V = V
= 5V ± 5%, unless otherwise specified T = 0 C to +70 C for HS-3182-5 and
1
REF
A
o
o
T = -55 C to +125 C for HS-3182-8.
A
5-180
HS-3182
AC Electrical Performance Specifications
(NOTE 1)
AC PARAMETER
SYMBOL
CONDITIONS
MIN
1
MAX
2
UNITS
µS
Rise Time (A
, B
)
t
C
= C = 75pF, Note 2
A B
OUT OUT
R
o
(at T = -55 C Only)
0.9
3
2.4
9
µS
A
C
C
= C = 300pF, Note 2
µS
A
A
B
Fall Time (A
, B
)
t
= C = 75pF, Note 3
B
1
2
µS
OUT OUT
F
o
(at T = -55 C Only)
0.9
3
2.4
9
µS
A
C
C
C
= C = 300pF, Note 3
µS
A
A
A
B
Propagation Delay Input to Output
Propagation Delay Input to Output
NOTES:
t
t
= C = 75pF, No Load
-
3.3
3.3
µS
PLH
B
= C = 75pF, No Load
B
-
µS
PHL
o
o
o
o
1. +V = +15V, -V = -15V, V = V
1
= 5V, unless otherwise specified T = 0 C to +70 C for HS-3182-5 and T = -55 C to +125 C for
REF
A
A
HS-3182-8.
2. t measured 50% to 90% times 2, no load.
R
3. t measured 50% to 10% times 2, no load.
F
Electrical Performance Specifications
(NOTE 1)
PARAMETER
Input Capacitance
SYMBOL
CONDITIONS
MIN
MAX
15
UNITS
pF
o
C
T = +25 C
-
-
IN
A
o
Supply Current +V (Short Circuit)
Supply Current -V (Short Circuit)
NOTE:
I
(+V)
Short to GND, T = +25 C
A
150
-
mA
SC
o
I
(-V)
Short to GND, T = +25 C
-150
mA
SC
A
1. The parameters listed in Table 3 are controlled via design or process parameters and are not directly tested. These parameters are char-
acterized upon initial design and after major process and/or design changes affecting these parameters.
o
Power Specifications Nominal Power at +25 C, +V = +15V, -V = -15V, V1 = V
= 5V, Notes 1, 3
REF
DATA RATE
(K BITS/s)
POWERDISSIPATION
IN LOAD
LOAD
+V
V-
V
CHIP POWER
325mW
1
0-100
No Load
11mA
24mW
46mW
-10mA
-24mW
-46mW
600µA
600µA
600µA
0
12.5-14
100
Full Load, Note 2
Full Load, Note 2
660mW
60mW
325mW
1 Watt
NOTES:
1. Heat sink may be required for 100K bits/s at +125 C and output short circuit at +125 C.
o
o
Thermal characteristics: T
(CASE)
= T
- θ
P
.
(Junction)
(Junction - Case) (Dissipation)
o
Where:
T
= +175 C
o
(Junction Max)
o
θ
θ
= 10.9 C/W (6.1 C/W for LCC)
(Junction - Case)
(Junction - Ambient)
o
o
= 73.5 C/W (54.0 C/W for LCC)
2. Full Load for ARINC 429: R = 400Ω and C = 30,000pF in parallel between A
OUT
and B
(see block diagram).
OUT
L
L
3. Output Over-Voltage Protection: The fuses used for output over-voltage protection may be blown by a fault at each output of greater than
±6.5V relative to GND.
5-181
HS-3182
Driver Waveforms
5V
0V
50%
DATA (A) 0V
5V
0V
50%
DATA (B) 0V
ADJ. BY
V
REF
C
+4.75V TO +5.25V
-4.75V TO -5.25V
+4.75V TO +5.25V
B
A
0V
OUT
OUT
ADJ. BY
-V
V
REF
C
A
t
PHL
REF
50%
B
0V
-V
50%
OUT
t
PLH
-4.75V TO -5.25V
+9.5V TO +10.5V
REF
t
R
2V
REF
HIGH
A
- B
OUT
0V
NULL
DIFFERENTIAL
OUTPUT
NOTE: OUTPUTS UNLOADED
-9.5V TO -10.5V
-2V
REF
LOW
t
F
NOTES:
t
t
measured 50% to 90% times 2
measured 50% to 10% times 2
When the Data (A) input is in the Logic One state and the Data (B)
input is in the Logic Zero state, A is equal to V and B is
R
OUT REF OUT
F
equal to -V
. This constitutes the Output High state. Data (A) and
REF
V
V
= 5V
= 0V
V
= -4.75V to -5.25V
IH
IL
OL
Data (B) both in the Logic Zero state causes both A
OUT
and B to
OUT
be equal to 0V which designates the output Null state. Data (A) in
the Logic Zero state and Data (B) in the Logic One state causes
V
= 4.75V to 5.25V
OH
A
to be equal to -V
and B
REF OUT
to be equal to V which is
REF
OUT
the Output Low state.
Burn-In Schematic
V
DATA (B)
+V
1
V
IH
C
3
A
B
V
IL
16 15 14 13 12 11 10
HS-3182
9
8
R
C
1
1
2
3
4
5
6
7
V
IH
C
2
V
IL
DATA (A)
-V
GND
o
Ambient Temp. Max. = +125 C.
NOTES: R = 400Ω ± 5%
C
C
= 0.03µF ± 20%
Package = 16 Lead Side Brazed DIP.
1
2
= C = 500pF, NPO
Pulse Conditions = A & B = 6.25kHz ± 10%. B is delayed one-half
3
cycle and in sync with A.
+V = +15.5V ± 0.5V
-V = -15.5V ± 0.5V
V
V
= 2.0V Min.
= 0.5V Max.
IH
IL
V
= +5.5V ± 0.5V
1
A 0.0µF decoupling capacitor is required on each of the three
supply lines (+V, -V and V ) at every 3rd Burn-In socket.
1
5-182
HS-3182
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notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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5-183
相关型号：
5962-8688001XX
Serial I/O Controller, 1 Channel(s), 0.01220703125MBps, CMOS, CQCC44, CERAMIC, LCC-44
WEDC
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