TUA6032 [INFINEON]
3-Band TV Tuner IC; 3波段电视调谐器IC
| 型号： | TUA6032 |
| 厂家： | 
Infineon |
| 描述： | 3-Band TV Tuner IC |
| 文件： | 总49页 (文件大小：841K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Wireless Components
3-Band TV Tuner IC
TUA6030, TUA6032 Version 2.1
Specification July 2001
Revision History: Current Version: Preliminary Data Sheet,V1.1, August 2000
Previous Version:Target Data Sheet, V1.0, November 1999
Page
Page
Subjects (major changes since last revision)
(in previous
Version)
(in current
Version)
all
all
Version to V1.1, status to preliminary
Ordering code added.
Product Info
Product Info
4-2
4-3
5-2
5-5
4-2
4-3
5-2
5-5
Div. components changed.
Div. components changed.
Junction temperature and storage temperature +125 °C max.
Bus inputs SCL, SDA: V = 2.3 V.
IH
5-8,5-9, 5-10
5-10
5-8,5-9, 5-10
5-10
Input conductance, input capacitance corrected.
Phase noise @ ±1 kHz frequency offset deleted.
Phase noise, LOW band oscillator: Φ
= 92 dBc/Hz min @ ±10 kHz.
OSC
Phase noise, MID band oscillator: Φ
= 92 dBc/Hz min @ ±10 kHz.
OSC
5-11
5-11
Phase noise @ ±1 kHz frequency offset deleted.
Phase noise, HIGH band oscillator: Φ = 87 dBc/Hz min.
OSC
5-14
5-15
5-14
5-15
5-16
5-14
5-15
5-14
5-15
5-16
Table 5-5, Description of Symbols: CP and OS ’default’ added
Table 5-5, Test Modes: Normal operation ’default’ added.
Table 5-5, Description of Symbols: CP and OS ’default’ added.
Table 5-5, Test Modes: Normal operation ’default’ added.
Table 5-10, A to D converter levels, footnote ’No erratic codes in the transition’
added, Table 5-1, Defaults at power-on reset, Auxiliary byte, bit5 = 1.
5-18, 5-19,
5-20
5-18, 5-19,
5-20
Smith charts added..
div
div
Tbf’s replaced .
Revision History: Current Version: Data Sheet, V2.0, March 2001
Previous Version:Preliminary Data Sheet, V1.1, August 2000
all
all
Version to V2.0, preliminary deleted
LOW-/MID Oscillator: DC levels corrected
Application circuits modified
3-3
3-3
4-2, 4-3
5-2
4-2, 4-3
5-2
New definition of thermal properties.
Saturation Voltages for P0, 2, 3 added
5-6
5-6, 5-7
5-11
5-11
AGC take-over point: Min/max values added.
Mixer output impedance: Values added
Revision History: Current Version: Preliminary Data Sheet,V1.1, August 2000
5-11, 5-12
5-16
5-11, 5-12
5-16
Phase noise corrected
Table 5-1, Defaults at power-on reset, Auxiliary byte, bit5 = 1.
More telegram examples
5-18
5-18
Revision History: Current Version: Data Sheet, V2.1, July 2001
Previous Version:Preliminary Data Sheet, V2.0, March 2001
all
all
Mirror imaged version TUA6032 added
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Edition 03.99
Published by Infineon Technologies AG
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81541 München
© Infineon Technologies AG 04.07.01.
All Rights Reserved.
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plemented within components or assemblies.
The information describes the type of component and shall not be considered as assured characteristics.
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Critical components1 of the Infineon Technologies AG, may only be used in life-support devices or systems2 with the express written approval of the
Infineon Technologies AG.
1
A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-
support device or system, or to affect its safety or effectiveness of that device or system.
2
Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain human life. If they
fail, it is reasonable to assume that the health of the user may be endangered.
TUA6030, TUA6032
Product Info
Product Info
Package
General Description The TUA6030, TUA6032 devices com-
bine a mixer-oscillator block with a dig-
itally programmable phase locked loop
(PLL) for use in TV and VCR tuners.
Features General
ꢀ Suitable for PAL/NTSC and Digital
Video Broadcasting
ꢀ Wideband AGC detector for inter-
nal tuner AGC
− 5 programmable take-over points
− 2 programmable time constants
PLL
2
ꢀ 4 independent I C addresses
ꢀ Full ESD protection
2
ꢀ I C bus protocol compatible with
Mixer/Oscillator
3.3 V and 5V micro-controllers up
to 400 kHz
ꢀ High impedance mixer input (com-
mon emitter) for LOW band
ꢀ Short lock-in time
ꢀ High voltage VCO tuning output
ꢀ 4 PNP ports
ꢀ Low impedance mixer input (com-
mon base) for MID band
ꢀ Low impedance mixer input (com-
mon base) for HIGH band
ꢀ 3 NPN ports
ꢀ 2 pin oscillator for LOW band
ꢀ 2 pin oscillator for MID band
ꢀ 4 pin oscillator for HIGH band
IF-Amplifier
ꢀ 1 NPN port/ADC input
ꢀ Internal LOW/MID/HIGH band
switch
ꢀ Lock-in flag
ꢀ Programmable reference divider
ꢀ IF preamplifier with symmetrical
75 Ω output impedance able to
drive a SAW filter (500 Ω//40 pF)
ratio (24, 64, 80, 128)
ꢀ Programmable charge pump
current
Application ꢀ The IC is suitable for PAL and
NTSC tuners in TV- and VCR-sets
or set-top receivers for analog TV
ꢀ The AGC stage makes the
tuner AGC independent of the
Video-IF AGC.
and Digital Video Broadcasting.
Ordering Information
Type
TUA6030
TUA6032
Ordering Code
Q67037-A1146 (tape and reel)
Q67037-Axxxx (tape and reel)
Package
P-TSSOP-38
P-TSSOP-38
Wireless Components
Product Info
Specification, July 2001
1
Table of Contents
1
2
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
2.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
2.3 Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2.4 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
3
Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11
3.1 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.2 Pin Definition and Function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13
3.3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19
3.4 Circuit Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20
4
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-23
4-1 Application Circuit for NTSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-24
4-2 Application Circuit for PAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-25
5
Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-26
5.1 Electrical Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-27
5.1.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-27
5.1.2 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-29
5.1.3 AC/DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-30
5.2 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39
Table 5-4
Table 5-5
Table 5-6
Table 5-7
Table 5-8
Table 5-9
Bit Allocation Read / Write . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39
Description of Symbols. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39
Address selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40
Test modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40
Reference divider ratios . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40
AGC take-over point. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40
Table 5-10 A to D converter levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41
Table 5-11 Defaults at power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41
Table 5-12 Internal band selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41
5.3
I2C Bus Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-42
5.4 Electrical Diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-43
5.4.1 Input admittance (S11) of the LOW band mixer (40 to 140 MHz). . . 5-43
5.4.2 Input impedance (S11) of the MID band mixer (150 to 455 MHz) . . 5-43
5.4.3 Input impedance (S11) of the HIGH band mixer (450 to 865 MHz) . 5-44
Wireless Components
1 - 5
Specification, July 2001
TUA6030, TUA6032
Table of Contents
5.4.4 Output admittance (S22) of the of the Mixer output (30 to 50 MHz). 5-44
5.4.5 Output impedance (S22) of the IF amplifier (30 to 50 MHz) . . . . . . . 5-45
5.5 Measurement Circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-46
5.5.1 Gain (GV) measurement in LOW band. . . . . . . . . . . . . . . . . . . . . . . 5-46
5.5.2 Gain (GV) measurement in MID and HIGH bands . . . . . . . . . . . . . . 5-46
5.5.3 Matching circuit for optimum noise figure in LOW band . . . . . . . . . . 5-47
5.5.4 Noise figure (NF) measurement in LOW band . . . . . . . . . . . . . . . . . 5-47
5.5.5 Noise figure (NF) measurement in MID and HIGH bands . . . . . . . . 5-48
5.5.6 Cross modulation measurement in LOW band. . . . . . . . . . . . . . . . . 5-48
5.5.7 Cross modulation measurement in MID and HIGH bands . . . . . . . . 5-49
5.5.8 Ripple susceptibility measurement . . . . . . . . . . . . . . . . . . . . . . . . . . 5-49
Wireless Components
1 - 6
Specification, July 2001
2
Product Description
Contents of this Chapter
2.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
2.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
2.3 Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2.4 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
Wireless Components
2 - 7
Specification, July 2001
TUA6030, TUA6032
Product Description
2.1 Overview
The TUA6030, TUA6032 devices combine a mixer-oscillator block with a digi-
tally programmable phase locked loop (PLL) for use in TV and VCR tuners.
The mixer-oscillator block includes three balanced mixers (one mixer with an
unbalanced high-impedance input and two mixers with a balanced low-imped-
ance input), two 2-pin asymmetrical oscillators for the LOW and the MID band,
one 4-pin symmetrical oscillator for the HIGH band, an IF amplifier, a reference
voltage, and a band switch.
The PLL block with four independently selectable chip addresses forms a digit-
ally programmable phase locked loop. With a 4 MHz quartz crystal, the PLL per-
mits precise setting of the frequency of the tuner oscillator up to 1024 MHz in
increments of 31.25, 50, 62.5 or 166.7 kHz. The tuning process is controlled by
2
a microprocessor via an I C bus. The device has 8 output ports, one of them
(P6) can also be used as ADC input port. A flag is set when the loop is locked.
2
The lock flag can be read by the processor via the I C bus.
2.2 Features
General
ꢀ Suitable for PAL/NTSC and Digital Video Broadcasting
ꢀ Wideband AGC detector for internal tuner AGC
− 5 programmable take-over points
− 2 programmable time constants
ꢀ Full ESD protection
Mixer/Oscillator
ꢀ High impedance mixer input (common emitter) for LOW band
ꢀ Low impedance mixer input (common base) for MID band
ꢀ Low impedance mixer input (common base) for HIGH band
ꢀ 2 pin oscillator for LOW band
ꢀ 2 pin oscillator for MID band
ꢀ 4 pin oscillator for HIGH band
IF-Amplifier
ꢀ IF preamplifier with symmetrical 75 Ω output impedance able to drive a
SAW filter (500 Ω//40 pF)
PLL
2
ꢀ 4 independent I C addresses
2
ꢀ I C bus protocol compatible with 3.3 V and 5V micro-controllers up to
400 kHz
Wireless Components
2 - 8
Specification, July 2001
TUA6030, TUA6032
Product Description
ꢀ Short lock-in time
ꢀ High voltage VCO tuning output
ꢀ 4 PNP ports
ꢀ 3 NPN ports
ꢀ 1 NPN port/ADC input
ꢀ Internal LOW/MID/HIGH band switch
ꢀ Lock-in flag
ꢀ Programmable reference divider ratio (24, 64, 80, 128)
ꢀ Programmable charge pump current
2.3 Application
ꢀ The IC is suitable for PAL and NTSC tuners in TV- and VCR-sets or cable
set-top receivers for analog TV and Digital Video Broadcasting.
ꢀ The AGC stage makes the tuner AGC independent of the Video-IF AGC.
Recommended band limits in MHz:
Table 2-1 NTSC tuners
RF input
Oscillator
Band
LOW
MID
min
max
min
max
173
407
847
55.25
133.25
367.25
127.25
361.25
801.25
101
179
413
HIGH
Table 2-2 PAL tuners
RF input
Oscillator
Band
LOW
MID
min
max
min
max
44.25
161.25
447.25
154.25
439.25
863.25
83.15
193.15
478.15
902.15
200.15
486.15
HIGH
Note: Tuning margin of 3 MHz not included.
Wireless Components
2 - 9
Specification, July 2001
TUA6030, TUA6032
Product Description
2.4 Package Outlines
P-TSSOP-38
Wireless Components
2 - 10
Specification, July 2001
3
Functional Description
Contents of this Chapter
3.1 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.2 Pin Definition and Function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13
3.3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19
3.4 Circuit Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20
TUA6030, TUA6032
Functional Description
3.1 Pin Configuration
OSCLOWOUT
1
2
3
4
5
6
7
8
9
38 HIGHIN
37
36 MIDIN
35
OSCLOWIN
OSCGND
HIGHIN
OSCMIDIN
MIDIN
OSCMIDOUT
OSCHIGHIN
OSCHIGHOUT
OSCHIGHOUT
OSCHIGHIN
34 LOWIN
33 RFGND
32 MIXOUT
31
MIXOUT
30 P2
VCC 10
IFGND 11
IFOUT 12
IFOUT 13
PLLGND 14
VT 15
29 AGC
28 GND
27 SDA
26 SCL
25 AS
TUA6030
24 P1
CP 16
23 P0
P5 17
22 P3
P7 18
21 P4
XTAL 19
20 P6/ADC
TUA6030 Pin_config
Figure 3-1
Pin Configuration TUA6030
1
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
HIGHIN
OSCLOWOUT
OSCLOWIN
OSCGND
OSCMIDIN
OSCMIDOUT
OSCHIGHIN
OSCHIGHOUT
OSCHIGHOUT
OSCHIGHIN
VCC
2
HIGHIN
MIDIN
3
4
MIDIN
LOWIN
RFGND
MIXOUT
MIXOUT
P2
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
TUA6032
AGC
GND
SDA
IFGND
IFOUT
SCL
IFOUT
AS
PLLGND
VT
P1
P0
CP
P3
P5
P4
P7
P6/ADC
XTAL
TUA6032 Pin_config
Figure 3-2
Pin Configuration TUA6032
Wireless Components
3 - 12
Specification, July 2001
TUA6030, TUA6032
Functional Description
3.2 Pin Definition and Function
Remark: First pin number refers to TUA6030, second to TUA6032
Table 3-1 Pin Definition and Function
Pin
No.
Symbol
Equivalent I/O-Schematic
Average DC voltage
LOW
2.2 V
MID
HIGH
OSCLOWOUT
1/38
2/37
1/38
2/37
OSCLOWIN
1.5 V
OSCGND
oscillator ground
0.0 V
0.0 V
1.5 V
0.0 V
3/36
4/35
OSCMIDIN
5/34
OSCMIDOUT
2.2 V
4/35
5/34
Wireless Components
3 - 13
Specification, July 2001
TUA6030, TUA6032
Functional Description
Table 3-1 Pin Definition and Function (continued)
Pin
No.
Symbol
Equivalent I/O-Schematic
Average DC voltage
LOW
MID
HIGH
6/33
7/32
8/31
9/30
OSCHIGHIN
OSCHIGOUT
OSCHIGOUT
OSCHIGHIN
1.8 V
2.2 V
2.2 V
7/32
6/33
8/31
9/30
1.8 V
10/29
11/28
12/27
VCC
supply voltage
IF ground
5.0 V
0.0 V
5.0 V
0.0 V
5.0 V
0.0 V
IFGND
IFOUT
2.1 V
2.1 V
2.1 V
13/26
IFOUT
12/27
13/26
2.1 V
0.0 V
2.1 V
0.0 V
2.1 V
0.0 V
14/25
15/24
PLLGND
VT
PLL ground
VT
VT
VT
15/24
16/23
16/23
CP
1.9 V
1.9 V
1.9 V
Wireless Components
3 - 14
Specification, July 2001
TUA6030, TUA6032
Functional Description
Table 3-1 Pin Definition and Function (continued)
Pin
No.
Symbol
Equivalent I/O-Schematic
Average DC voltage
LOW
MID
HIGH
17/22
18/21
P5
5 V or
5 V or
5 V or
V
V
V
CE
CE
CE
17/22 or
18/21
P7
5 V or
5 V or
5 V or
V
V
V
CE
CE
CE
19/20
XTAL
3.3 V
3.3 V
3.3 V
19/20
20/19
P6/ADC
5 V or
5 V or
5 V or
V
V
V
CE
CE
CE
20/19
21/18
P4
5 V or
5 V or
5 V or
V
V
V
CE
CE
CE
21/18
22/17
P3
n.a.
n.a.
n.a.
0 V or
V
-
CC
V
CE
23/16
24/15
P0
P1
V
-
n.a.
CC
V
CE
22/17 or
23/16 or
24/15
n.a.
V
-
CC
n.a.
V
CE
Wireless Components
3 - 15
Specification, July 2001
TUA6030, TUA6032
Functional Description
Table 3-1 Pin Definition and Function (continued)
Pin
No.
Symbol
Equivalent I/O-Schematic
Average DC voltage
LOW
MID
HIGH
25/14
AS
V
V
V
AS
AS
AS
25/14
26/13
SCL
n.a.
n.a
n.a
26/13
27/12
SDA
n.a
n.a
n.a
27/12
28/11
GND
ground
0.0
0.0
0.0
Wireless Components
3 - 16
Specification, July 2001
TUA6030, TUA6032
Functional Description
Table 3-1 Pin Definition and Function (continued)
Pin
No.
Symbol
Equivalent I/O-Schematic
Average DC voltage
LOW
MID
HIGH
29/10
AGC
3.0 V
3.0 V
3.0 V
29/10
30/9
P2
n.a.
n.a.
0 V or
V
-
CC
V
CE
30/9
31/8
32/7
MIXOUT
MIXOUT
4.0 V
4.0 V
4.0 V
4.0 V
4.0 V
4.0 V
31/8
32/7
Oscillator
33/6
34/5
RFGND
LOWIN
IF ground
0.0 V
1.9 V
0.0 V
0.0 V
34/5
Wireless Components
3 - 17
Specification, July 2001
TUA6030, TUA6032
Functional Description
Table 3-1 Pin Definition and Function (continued)
Pin
No.
Symbol
Equivalent I/O-Schematic
Average DC voltage
LOW
MID
HIGH
35/4
36/3
MIDIN
0.75 V
35/4
36/3
MIDIN
0.75 V
37/2
38/1
HIGHIN
HIGHIN
0.75 V
0.75 V
37/2
38/1
Wireless Components
3 - 18
Specification, July 2001
TUA6030, TUA6032
Functional Description
3.3 Block Diagram
Remark: First pin number refers to TUA6030, second to TUA6032
1/38
2/37
38/1
OSCLOW
OUT
SCLOWIN
OSCGND
HIGHIN
HIGHIN
MIDIN
Oscillator
LOW
Mixer
HIGH
RF Input
HIGH
37/2
O
3/
36
36/3
35/4
P0
P0.P1
4/35
5/34
Oscillator
MID
Mixer
MID
RF Input
MID
MIDIN
OSCMIDIN
OSCMIDOUT
OSCHIGHIN
P1
34/5
LOWIN
RFGND
MIXOUT
P1
33
/6
6/
33
Oscillator
HIGH
Mixer
LOW
RF Input
LOW
7/
32
32/7
OSCHIG
HOUT
SCHIGHOUT
OSCHIGHIN
VCC
8/31
O
31/8
MIX
P2
P0
OUT
P0.P1
SAW
Driver
9/
30
30/9
VCC
10/
29
29/
10
AGC
AGC
ATC Detector
11/
28
28/
11
IFGND
GND
SDA
AGC
Prog.
Divider
I2C Bus
27/
12
IFOUT
12/27
13/26
FL
26/
13
IFOUT
SCL
AS
Lock
Detector
fdiv
14/
25
25/
14
PLL
GND
Phase/
Freq
Comp
Charge
Pump
15/
24
24/ P1
15
fref
VT
PORTS
ADC
CP, OS
23/
16
16/23
17/22
18/21
19/20
CP
P5
P0
P3
22/17
21/18
20/19
Crystal
Oscillator
Reference
Divider
P4
P7
P6/A
DC
XTAL
TUA6030_1 BlockDiag
Figure 3-3
Block Diagram
Wireless Components
3 - 19
Specification, July 2001
TUA6030, TUA6032
Functional Description
3.4 Circuit Description
3.4.1 Mixer-Oscillator block
The mixer-oscillator block includes three balanced mixers (one mixer with an
unbalanced high-impedance input and two mixers with a balanced low-imped-
ance input), two 2-pin asymmetrical oscillators for the LOW and the MID band,
one 4-pin symmetrical oscillator for the HIGH band, an IF amplifier, a reference
voltage, and a band switch.
Filters between tuner input and IC separate the TV frequency signals into three
bands. The band switching in the tuner front-end is done by using three PNP
port outputs. In the selected band the signal passes a tuner input stage with a
MOSFET amplifier, a double-tuned bandpass filter and is then fed to the mixer
input of the IC which has in case of LOW band a high-impedance input and in
case of MID or HIGH band a low-impedance input. The input signal is mixed
there with the signal from the activated on chip oscillator to the IF frequency
which is filtered out at the balanced mixer output pair by means of a parallel
tuned circuit. The following IF amplifier is capacitively coupled to the mixer out-
puts and has a low output impedance to drive the SAW filter directly.
3.4.2 PLL block
The oscillator signal is internally DC-coupled as a differential signal to the pro-
grammable divider inputs. The signal subsequently passes through a program-
mable divider with ratio N = 256 through 32767 and is then compared in a digital
frequency/phase detector with a reference frequency f = 31.25, 50, 62.5 or
ref
166.7 kHz. This frequency is derived from an unbalanced, low-impedance 4
MHz crystal oscillator (pin XTAL) divided by 128, 80,64 or 24. The reference fre-
quencies will be different with a quartz other than 4 MHz.
The phase detector has two outputs which drive two current sources of a charge
pump. If the negative edge of the divided VCO signal appears prior to the neg-
ative edge of the reference signal, the positive current source pulses for the
duration of the phase difference. In the reverse case the negative current
source pulses. If the two signals are in phase, the charge pump output (CP)
goes into the high-impedance state (PLL is locked). An active low-pass filter
integrates the current pulses to generate the tuning voltage for the VCO (inter-
nal amplifier, external pull-up resistor at VT and external RC circuitry). The
charge pump output is also switched into the high-impedance state if the control
bits T2, T1,T0 = 0, 1, 0. Here it should be noted, however, that the tuning volt-
age can alter over a long period in the high impedance state as a result of self
discharge in the peripheral circuity. VT may be switched off by the control bit OS
to allow external adjustments.
If the VCO is not oscillating the PLL locks to a tuning voltage of 33V (V ).
TH
Wireless Components
3 - 20
Specification, July 2001
TUA6030, TUA6032
Functional Description
By means of control bit CP the pump current can be switched between two val-
ues by software. This programmability permits alteration of the control response
of the PLL in the locked-in state. In this way different VCO gains can be com-
pensated, for example.
The software controlled ports P0 to P7 are general purpose open-collector out-
puts. The test bits T2, T1, T0 =1, 0, 0 switch the test signals f (divided input
div
signal) and f (i.e.4 MHz / 64) to P4 and P5 respectively.
ref
The lock detector resets the lock flag FL if the width of the charge pump current
pulses is greater than the period of the crystal oscillator (i.e. 250 ns). Hence, if
FL = 1, the maximum deviation of the input frequency from the programmed fre-
quency is given by
∆f = ± I
(K
/ f
)
(C1+C2) / (C1 C2)
the VCO gain, f
P
VCO XTAL
where I is the charge pump current, K
the crystal oscil-
Xtal
P
VCO
lator frequency and C , C the capacitances in the loop filter (Chapter 4). As the
1
2
charge pump pulses at i.e. 62.5 kHz (= f ), it takes a maximum of 16 µs for FL
ref
to be reset after the loop has lost lock state.
Once FL has been reset, it is set only if the charge pump pulse width is less than
250 ns for eight consecutive f periods. Therefore it takes between 128 and
ref
144 µs for FL to be set after the loop regains lock.
3.4.3 AGC
The wide-band AGC stage detects the level of the IF output signal and gener-
ates an AGC voltage for gain control of the tuner input transistors. The AGC
2
take-over and the time constant are selectable by the I C bus.
3.4.4 I2C-Bus Interface
2
Data is exchanged between the processor and the PLL via the I C bus. The
clock is generated by the processor (input SCL). Pin SDA functions as an input
or output depending on the direction of the data (open collector, external pull-
up resistor). Both inputs have a hysteresis and a low-pass characteristic, which
2
enhance the noise immunity of the I C bus.
2
The data from the processor pass through an I C bus controller. Depending on
their function the data are subsequently stored in registers. If the bus is free,
both lines will be in the marking state (SDA, SCL are high). Each telegram
begins with the start condition and ends with the stop condition. Start condition:
SDA goes low, while SCL remains high. Stop condition: SDA goes high while
Wireless Components
3 - 21
Specification, July 2001
TUA6030, TUA6032
Functional Description
SCL remains high. All further information transfer takes place during SCL = low,
and the data is forwarded to the control logic on the positive clock edge.
The table ’Bit Allocation’ (see Table 5-4 Bit Allocation Read / Write on page 39)
should be referred to for the following description. All telegrams are transmitted
byte-by-byte, followed by a ninth clock pulse, during which the control logic
returns the SDA line to low (acknowledge condition). The first byte is comprised
of seven address bits. These are used by the processor to select the PLL from
several peripheral components (address select). The LSB bit (R/W) determines
whether data are written into (R/W = 0) or read from (R/W = 1) the PLL.
In the data portion of the telegram during a WRITE operation, the MSB bit of the
first or third data byte determines whether a divider ratio or control information
is to follow. In each case the second byte of the same data type has to follow
the first byte. Appropriate setting of the test bits will decide whether the band-
switch byte or the auxiliary byte will be transmitted (see Table 5-7 Test modes on
page 40).
If the address byte indicates a READ operation, the PLL generates an acknowl-
edge and then shifts out the status byte onto the SDA line. If the processor gen-
erates an acknowledge, a further status byte is output; otherwise the data line
is released to allow the processor to generate a stop condition. The status word
consists of three bits from the A/D converter, the lock flag and the power-on flag.
Four different chip addresses can be set by an appropriate DC level at pin AS
(see Table 5-6 Address selection on page 40).
While the supply voltage is applied, a power-on reset circuit prevents the PLL
from setting the SDA line to low, which would block the bus. The power-on reset
flag POR is set at power-on and if V falls below 3.2 V. It will be reset at the
CC
end of a READ operation.
Wireless Components
3 - 22
Specification, July 2001
4
Applications
Contents of this Chapter
4.1 Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-24
4-1 Application Circuit for NTSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-24
4-2 Application Circuit for PAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-25
Wireless Components
4 - 23
Specification, July 2001
TUA6030, TUA6032
Applications
4.1 Circuits
Remark: Pinning refers to TUA6030
BB659C
2p2
2p7
1n
1n
1n
1n
2k7
HIGH
Input
OSCL
OWOUT
HIGHIN
1
2
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
TOKO B4F
617DB-1023
balun
1:1
100p
L1
HIG
HIN
OSCLOWIN
OSCGND
12
MID
Input
MID
3
TOKO B4F
617DB-1023
balun
1:1
BB659C
1p5
1p2
1p2
1p2
1p2
1p2
2k7
OSCM
IDIN
MIDIN
4
82p
L2
1n
LOW
Input
LOWIN
OSCMIDOUT
OSCHIGHIN
OSCHIGHOUT
5
8R2
12p
RFGND
MIXOUT
6
68p
1k8
7
L3
L4
BB659C
1k8
68p
4n7
O
SCHIGHOUT
MIXOUT
P2
8
P2
OSCHIGHIN
VCC
9
4n7
150n
AGC
10
11
12
+ 5 V
AGC
IFGND
GND
SDA
4n7
IFOUT
SDA
SCL
AS
IFOUT
trans-
former
2:10
220
220
220
12p
13
100p
100p
4n7
4n7
4n7
4n7
4n7
4n7
IFO
UT
SCL
AS
TOKO 7KL600
GCS-A1010DX
47n
PLLGND
VT
14
15
16
17
18
19
P1
P1
C2
C1
100n
560
33k
2n2
8k2
+ 33 V
P0
CP
P0
P3
100n
4n7
4n7
P5
P7
P3
P5
P4
P4
P7
4 MHz
18p
P6/ADC
P6/ADC
XTAL
App Circuit Ntsc
Figure 4-1
Application Circuit for NTSC
Recommended band limits in MHz
RF input Oscillator
Coils
turns
8.5
wire
min
55.25
max
min
max
173
407
847
L1
L2
L3
L4
3.2 mm
0.5 mm
0.5 mm
0.5 mm
0.3 mm
LOW
MID
127.25
101
179
413
3.5
2.5 mm
2.4 mm
3.5 mm
133.25 361.25
367.25 801.25
1.5
HIGH
12.5
Wireless Components
4 - 24
Specification, July 2001
TUA6030, TUA6032
Applications
Remark: Pinning refers to TUA6030
BB659C
2p2
2p7
1n
2k7
HIGH
Input
OSCLOWOU
OSCLOWIN
OSCGND
T
HIGHIN
HIGHIN
TOKO B4F
617DB-1023
1
2
38
1n
balun
1:1
100p
L1
37
1n
12
MID
Input
M
ID
3
36
1n
TOKO B4F
617DB-1023
balun
1:1
BB659C
1p5
1p2
1p2
1p2
1p2
1p2
2k7
MIDIN
LOWIN
OSCMIDIN
4
35
82p
L2
1n
LOW
Input
OSCMIDOUT
5
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
8R2
15p
OSCH
IGHIN
RFGND
MIXOUT
6
68p
68p
1k8
OSCHIGHOUT
OSCHIGHOUT
7
L3
L4
BB565
1k8
MIXOUT
P2
8
P2
OSCHIG
HIN
9
4n7
150n
4n7
AGC
VCC
10
11
12
+ 5 V
AGC
IFGND
IFOUT
IFOUT
GND
SDA
4n7
IFOUT
SDA
SCL
AS
trans-
former
2:10
220
220
220
12p
13
100p
100p
4n7
4n7
4n7
4n7
4n7
4n7
SCL
TOKO 7KL600
GCS-A1010DX
47n
A
S
PLLGND
VT
14
15
16
17
18
19
P1
P1
C2
2n2
C1
100n
560
33k
+ 33 V
P0
CP
P
0
8k2
100n
P3
P5
P7
P3
P5
4n7
4n7
P4
P4
P7
4 MHz
18p
P6/ADC
P6/ADC
XTAL
App Circuit PAL
Figure 4-2
Application Circuit for PAL
Recommended band limits in MHz
RF input Oscillator
Coils
turns
wire
min
44.25
max
min
83.15
max
L1
L2
L3
L4
8.5
2.5
3.2 mm
3 mm
0.5 mm
0.5 mm
0.5 mm
0.3 mm
LOW
MID
154.25
193.15
161.25 439.25 200.15 478.15
447.25 863.25 486.15 902.15
1.5
2.4 mm
4 mm
HIGH
14.5
Wireless Components
4 - 25
Specification, July 2001
5
Reference
Contents of this Chapter
5.1 Electrical Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-27
5.1.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-27
5.1.2 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-29
5.1.3 AC/DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-30
5.2 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39
Table 5-4 Bit Allocation Read / Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39
Table 5-5 Description of Symbols. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39
Table 5-6 Address selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40
Table 5-7 Test modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40
Table 5-8 Reference divider ratios . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40
Table 5-9 AGC take-over point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40
Table 5-10 A to D converter levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41
Table 5-11 Defaults at power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41
Table 5-12 Internal band selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41
5.3 I2C Bus Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-42
5.4 Electrical Diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-43
5.4.1 Input admittance (S11) of the LOW band mixer (40 to 140 MHz). . . 5-43
5.4.2 Input impedance (S11) of the MID band mixer (150 to 455 MHz) . . 5-43
5.4.3 Input impedance (S11) of the HIGH band mixer (450 to 865 MHz) . 5-44
5.4.4 Output admittance (S22) of the of the Mixer output (30 to 50 MHz). 5-44
5.4.5 Output impedance (S22) of the IF amplifier (30 to 50 MHz) . . . . . . . 5-45
5.5 Measurement Circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-46
5.5.1 Gain (GV) measurement in LOW band. . . . . . . . . . . . . . . . . . . . . . . 5-46
5.5.2 Gain (GV) measurement in MID and HIGH bands . . . . . . . . . . . . . . 5-46
5.5.3 Matching circuit for optimum noise figure in LOW band . . . . . . . . . . 5-47
5.5.4 Noise figure (NF) measurement in LOW band . . . . . . . . . . . . . . . . . 5-47
5.5.5 Noise figure (NF) measurement in MID and HIGH bands . . . . . . . . 5-48
5.5.6 Cross modulation measurement in LOW band. . . . . . . . . . . . . . . . . 5-48
5.5.7 Cross modulation measurement in MID and HIGH bands . . . . . . . . 5-49
5.5.8 Ripple susceptibility measurement . . . . . . . . . . . . . . . . . . . . . . . . . . 5-49
Wireless Components
5 - 26
Specification, July 2001
TUA6030, TUA6032
Reference
5.1 Electrical Data
5.1.1 Absolute Maximum Ratings
WARNING
The maximum ratings may not be exceeded under any circumstances, not
even momentarily and individually, as permanent damage to the IC may
result.
Table 5-1 Absolute Maximum Ratings, ambient temperature T
= - 10°C ... T
Amax
AMB
1).
Symbol
Limit Values
Unit
Remarks
Parameter
min
-0.3
max
Supply voltage
V
6
V
CC
Ambient temperature
T
-10
T
°C
A
Amax
2).
Storage temperature
T
T
T
-40
+125
+ 125
2
°C
°C
K
Stg
J
Junction temperature
Temperature difference junction to
JC
3).
case
PLL
CP
V
-0.3
3
1
6
V
mA
V
CP
Q
I
CP
Crystal oscillator pin XTAL
V
I
-5
mA
V
Q
Bus input/output SDA
Bus output current SDA
Bus input SCL
V
-0.3
6
10
6
SDA
I
mA
V
open collector
SDA(L)
V
V
V
-0.3
-0.3
-0.3
SCL
AS
Chip address switch AS
VCO tuning output (loop filter)
6
V
35
V
VT
Wireless Components
5 - 27
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-1 Absolute Maximum Ratings, ambient temperature T
= - 10°C ... + 85°C (continued)
AMB
1.)
Symbol
Limit Values
Unit
Remarks
Parameter
min
-0.3
max
6
NPN port output voltage
NPN port output current
V
V
open collector
open collector,
P4, 5, 7
I
-1
10
mA
P4, 5, 7(L)
t
= 0.1 sec. at 5.5 V
max
P6/ADC input/output voltage
NPN port output current
V
-0.3
-1
6
V
P6/ADC
I
10
mA
open collector,
= 0.1 sec. at 5.5 V
P6/ADC(L)
t
max
PNP port output voltage
PNP port output current
V
-0.3
+1
6
V
open collector
P0, 1, 2, 3
I
I
I
-25
mA
open collector,
P1(L)
t
= 0.1 sec. at 5.5 V
max
PNP port output current
PNP port output current
+1
+1
-10
-5
mA
mA
open collector,
= 0.1 sec. at 5.5 V
P0(L)
t
max
open collector,
P2, 3(L)
t
= 0.1 sec. at 5.5 V
max
Total port output current of
NPN ports
ΣI
ΣI
40
mA
mA
t
= 0.1 sec. at 5.5 V
P(L)
max
Total port output current of
PNP ports
-40
t
= 0.1 sec. at 5.5 V
P(L)
max
Mixer-Oscillator
Mix inputs LOW band
V
V
-0.3
3
2
6
3
V
V
LOW
Mix inputs MID/HIGH band
MID/HIGH
MID/HIGH
I
-5
mA
V
VCO base voltage
V
-0.3
LOW, MID and HIGH
band oscillators
B
C
VCO collector voltage
V
6
V
LOW, MID and HIGH
band oscillators
4).
ESD-Protection
all pins
V
2
kV
ESD
1). All values are referred to ground (pin), unless stated otherwise.
Currents with a positive sign flow into the pin and currents with a negative sign flow out of pin.
2). The maximum ambient temperature depends on the mounting conditions of the package. Any application
mounting must guarantee not to exceed the maximum junction temperature of 125 °C. As reference the tem-
perature difference junction to case is given.
3). Referred to top center of package.
4). According to EIA/JESD22-A114-B (HBM in-circuit test), as a single device in-circuit contact discharge test.
Wireless Components
5 - 28
Specification, July 2001
TUA6030, TUA6032
Reference
5.1.2 Operating Range
Within the operational range the IC operates as described in the circuit
description. The AC / DC characteristic limits are not guaranteed.
Table 5-2 Operating Range
Parameter
Symbol
Limit Values
Unit
Test Conditions
L
Item
min
max
Supply voltage
V
+4.5
+5.5
V
CC
Programmable divider factor
N
256
30
32767
200
LOW mixer input frequency
range
f
MHz
MHz
MIXV
MID and HIGH band mixer input
frequency range
f
130
900
MIXU
LOW oscillator frequency range
f
f
65
250
530
MHz
MHz
OH
OU
MID band oscillator frequency
range
165
HIGH band oscillator frequency
range
f
400
-10
950
MHz
OU
Ambient temperature
T
T
°C
AMB
Amax
1).
1). see 5.1.1 Absolute Maximum Ratings on page 27
Wireless Components
5 - 29
Specification, July 2001
TUA6030, TUA6032
Reference
5.1.3 AC/DC Characteristics
Table 5-3 AC/DC Characteristics with T
Symbol
= 25 °C, V = 5V
AMB
CC
Limit Values
Unit
Test Conditions
L
Item
min
typ
max
Supply
Supply voltage
V
4.5
5
5.5
V
CC
VCC
VCC
VCC
Current consumption
I
I
I
73
75
66
mA
mA
mA
LOW band
MID band
HIGH band
-
Digital Part
PLL
Crystal oscillator connections XTAL
Crystal frequency
Crystal resistance
Input impedance
f
3.2
25
4.0
4.48
300
MHz
Ω
series resonance
series resonance
XTAL
R
Q
Z
-1000
-1200
Ω
f
= 4 MHz
Q
XTAL
Charge pump output CP
High-level output current
I
I
I
±280
±60
+1
µA
µA
nA
CP = 1, V = 2 V
CP
CPH
CPL
CPZ
Low-level output current
Tristate current
CP = 0, V = 2 V
CP
T2, T1, T0 = 0, 1, 0,
V
= 2 V
CP
Output voltage
V
1.0
2.5
V
loop closed
CP
Tuning voltage output VT (open collector)
Leakage current
I
10
µA
V
V
= 33 V, OS = 1
TH
TH
Output voltage when the
loop is closed, (test mode
in normal operation)
V
0.4
32.7
OS=0, R
= 33 kΩ,
Load
TL
tuning supply = 33 V
2
I C-Bus
Bus inputs SCL, SDA
High-level input voltage
V
V
2.3
0
5.5
1.5
10
V
V
IH
IL
Low-level input voltage
High-level input current
I
µA
V
V
= 5.5 V,
= 0 V
IH
bus
CC
I
10
µA
V
V
= 5.5 V,
= 5.5 V
IH
bus
CC
Wireless Components
5 - 30
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-3 AC/DC Characteristics with T
Symbol
= 25 °C, V = 5V (continued)
CC
AMB
Limit Values
Unit
Test Conditions
L
Item
min
typ
max
10
Low-level input current
I
I
µA
µA
V
V
= 1.5 V,
= 0 V
IL
IL
bus
CC
-10
V
V
= 0 V,
bus
CC
= 5.5 V
Bus output SDA (open collector)
Leakage current
I
10
0.4
0.6
µA
V
V
= 5.5 V
OH
OH
Low-level output voltage
Low-level output voltage
V
V
I
I
= 3 mA
OL
OL
OL
V
= 6 mA at 400
OL
kHz
Edge speed SCL,SDA
Rise time
t
t
300
300
ns
ns
r
Fall time
f
Clock timing SCL
Frequency
f
t
t
0
100
400
kHz
µs
SCL
High pulse width
Low pulse width
0.6
1.3
H
µs
L
Start condition
Set-up time
t
t
0.6
0.6
µs
µs
susta
Hold time
hsta
Stop condition
Set up time
t
t
0.6
1.3
µs
µs
susto
Bus free
buf
Data transfer
Set-up time
t
t
0.1
0
µs
µs
sudat
Hold time
hdat
Input hysteresis
SCL, SDA
V
200
mV
hys
Pulse width of spikes
which are suppressed
t
0
50
ns
pF
sp
Capacitive load for each
bus line
C
400
L
PNP port outputs P0, P1, P2, P3 (open collector)
Output leakage current
I
-10
0.4
µA
V
V
= 5.5 V
CC
POH0to3
Output saturation
voltage port 0
V
0.25
0.25
I
= 10 mA
PL0
POL0
Output saturation
voltage port 1
V
0.4
V
I
= 15 mA
PL1
POL1
Wireless Components
5 - 31
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-3 AC/DC Characteristics with T
Symbol
= 25 °C, V = 5V (continued)
CC
AMB
Limit Values
Unit
Test Conditions
L
Item
min
typ
max
0.4
Output saturation
voltage ports 2, 3
V
0.25
V
I
= 5 mA
PL2 ,3
POL2, 3
NPN port outputs P4, P5, P6, P7 (open collector)
Output leakage current
I
10
µA
V
V
V
= 5.5,
CC
POH4to7
= 6 V
Pn4to7
Output saturation voltage
V
0.25
0.4
I
= 5 mA
PL04to7
POL4to7
ADC input
ADC input voltage
V
0
5.5
10
V
ADC
ADCH
ADCL
High-level input current
Low-level input current
I
I
µA
µA
-10
Address selection input AS
High-level input current
Low-level input current
I
50
µA
µA
V
V
= 5.5 V
ASH
ASH
ASL
I
-50
= 0 V
ASL
Analog Part
LOW band mixer mode (P0 = 1, P1 =0, including IF amplifier)
1).
RF frequency
Voltage gain
f
44.25
23.5
170.25
28.5
MHz
dB
RF
picture carrier
f = 44.25 MHz,
RF
G
26
26
8
V
V
see 5.5.1 on page 46
f = 170.25 MHz,
RF
G
23.5
28.5
10
dB
dB
see 5.5.1 on page 46
f = 50 MHz,
RF
Noise figure
NF
see 5.5.4 on page 47,
see 5.5.3 on page 47
Output voltage causing
0.3% of crossmodulation
in channel
V
V
108
108
111
111
dBµV
dBµV
f
= 44.25 MHz,
O
O
RF
see 5.5.6 on page 48
f
= 170.25 MHz,
RF
see 5.5.6 on page 48
2).
Output voltage causing
1.1 kHz incidental FM
V
V
108
108
111
111
dBµV
dBµV
kHz
O
O
f
f
f
= 44.25 MHz
= 170.25 MHz
= 170.25 MHz
RF
RF
RF
2.)
3).
Local oscillator FM
FM
2.12
I2C
2
caused by I C communi-
cation
4).
750 Hz Pulling
V
88
57
dBµV
dBc
i
f
= 154.25 MHz
RF
Channel S02 beat
INT
60
V
= 115 dBµV
RFpix
S02
5).
at IF output
Wireless Components
5 - 32
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-3 AC/DC Characteristics with T
Symbol
= 25 °C, V = 5V (continued)
CC
AMB
Limit Values
Unit
dBc
dBc
Test Conditions
L
Item
min
57
typ
60
max
Channel A-5 beat
INT
INT
V
= 115 dBµV
RFpix
A-5
6).
at IF output
Channel CH6 color beat
63
66
V
V
= 80 dBµV
= 80 dBµV
CH6
RFpix
7).
RFsnd
8).
RF input level without
lock-out
V
120
dBµV
mS
i
Input conductance
g
g
1
1
1
f
= 44.25 MHz,
i
RF
see 5.4.1 on page 43
f = 170.25 MHz,
RF
mS
pF
i
see 5.4.1 on page 43
f = 44.25 to
RF
Input capacitance
C
MixV
170.25 MHz,
see 5.4.1 on page 43
Mid band mixer mode (P0 = 0, P1 =1, including IF amplifier)
1.)
RF frequency
Voltage gain
f
154.25
33
454.25
39
RF
picture carrier
G
36
36
6
dB
dB
f
= 154.25 MHz,
V
V
RF
see 5.5.2 on page 46
f = 454.25 MHz,
RF
G
33
39
8
see 5.5.2 on page 46
f = 154.25 MHz,
RF
Noise figure
(not corrected for image)
NF
NF
dB
see 5.5.5 on page 48
f = 300 MHz,
RF
6
8
dB
see 5.5.5 on page 48
f = 154.25 MHz,
RF
Output voltage causing
0.3% of crossmodulation
in channel
V
V
108
108
111
111
dBµV
dBµV
O
O
see 5.5.7 on page 49
f
= 454.25 MHz,
RF
see 5.5.7 on page 49
2.)
Output voltage causing
1.1 kHz incidental FM
V
V
108
108
111
111
dBµV
dBµV
kHz
O
O
f
f
f
= 154.25 MHz
= 454.25 MHz
= 454.25 MHz
RF
RF
RF
2.)
3.)
Local oscillator FM
FM
2.12
I2C
2
caused by I C communi-
cation
N+5 - 1 MHz pulling
N+5
- 1 MHz
77
80
dBµV
f
f
= 359.25 MHz,
= 398.15 MHz,
RFw
OSC
9).
f
= 399.25 MHz
RFu
Wireless Components
5 - 33
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-3 AC/DC Characteristics with T
Symbol
= 25 °C, V = 5V (continued)
CC
AMB
Limit Values
Unit
Test Conditions
L
Item
min
78
typ
max
120
4.)
750 Hz Pulling
V
V
dBµV
i
i
f
= 439.25 MHz
RF
RF input level without
lock-out
dBµV 8.)
Input impedance
R
R
35
30
5
Ω
Ω
f
= 154.25.25 MHz,
s
s
RF
Z = (R + jωL )
see 5.4.2 on page 43
i
s
s
f
= 454.25 MHz,
RF
see 5.4.2 on page 43
f = 154.25.25 MHz,
RF
L
L
nH
nH
s
see 5.4.2 on page 43
f = 454.25 MHz,
RF
4.5
s
see 5.4.2 on page 43
HIGH band mixer mode (P0 = 0, P1 = 0, including IF amplifier)
1.)
RF frequency
Voltage gain
f
399.25
33
863.25
39
RF
picture carrier
G
36
36
dB
dB
f
= 407.25 MHz,
V
RF
see 5.5.2 on page 46
f = 863.25 MHz,
RF
G
33
39
V
see 5.5.2 on page 46
f = 407.25 MHz,
RF
Noise figure
(not corrected for image)
NF
NF
6
8
9
dB
dB
see 5.5.5 on page 48
f = 863.25 MHz,
RF
7
see 5.5.5 on page 48
f = 407.25 MHz,
RF
Output voltage causing
0.3% of crossmodulation
in channel
V
V
108
108
111
111
dBµV
dBµV
O
O
see 5.5.7 on page 49
f
= 863.25 MHz,
RF
see 5.5.7 on page 49
2.)
Output voltage causing
1.1 kHz incidental FM
V
V
108
108
111
111
dBµV
dBµV
kHz
O
O
f
f
f
= 407.25 MHz
= 454.25 MHz
= 863.25 MHz
RF
RF
RF
2.)
3.)
Local oscillator FM
FM
2.12
I2C
2
caused by I C communi-
cation
N+5 - 1 MHz pulling
N+5
- 1 MHz
77
78
80
dBµV
dBµV
f
f
= 823.25 MHz,
= 862.15 MHz,
RFw
OSC
9.)
f
=862.25 MHz
RFu
4.)
750 Hz Pulling
V
i
f
= 855.25 MHz
RF
Wireless Components
5 - 34
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-3 AC/DC Characteristics with T
Symbol
= 25 °C, V = 5V (continued)
CC
AMB
Limit Values
Unit
Test Conditions
L
Item
min
typ
max
120
RF input level without
lock-out
V
dBµV 8.)
i
Input impedance
R
R
35
30
5
Ω
Ω
f
= 407.25 MHz,
s
s
RF
Z = (R + jωL )
see 5.4.3 on page 44
i
s
s
f
= 863.25 MHz,
RF
see 5.4.3 on page 44
f = 407.25 MHz,
RF
L
L
nH
nH
s
see 5.4.3 on page 44
f = 863.25 MHz,
RF
4.5
s
see 5.4.3 on page 44
LOW band oscillator, Chapter 4
10).
Oscillator frequency
f
80
210
70
MHz
kHz
OSC
11).
Oscillator frequency shift
∆f
∆f
∆f
20
OSC(V)
OSC(V)
OSC(T)
∆V = 5 %
CC
11.)
110
300
kHz
kHz
∆V = 10 %
CC
Oscillator frequency drift
Oscillator frequency drift
500
250
∆T = 25 °C,
with compensation
12).
∆f
150
92
kHz
5 s to 15 min after
OSC(t)
13).
switch on
Phase noise, carrier to
noise sideband
Φ
88
15
dBc/
Hz
±10 kHz frequency
offset, worst case in
frequency range
OSC
Ripple susceptibility of V
RSC
20
mV
4.75 V < VP < 5.25 V,
worst case in fre-
quency range, ripple
frequency 500 kHz
14).
P
MID band oscillator, Chapter 4
Oscillator frequency
f
201
493
70
MHz
kHz
10.)
OSC
11.)
Oscillator frequency shift
∆f
∆f
∆f
20
OSC(V)
OSC(V)
OSC(T)
∆V = 5 %
CC
11.)
110
500
kHz
kHz
∆V = 10 %
CC
Oscillator frequency drift
Oscillator frequency drift
750
500
∆T = 25 °C; with com-
12.)
pensation
∆f
250
92
kHz
5 s to 15 min after
OSC(t)
OSC
13.)
switch on
Phase noise,
carrier to noise sideband
Φ
86
dBc/
Hz
±10 kHz frequency
offset, worst case in
frequency range
Wireless Components
5 - 35
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-3 AC/DC Characteristics with T
Symbol
= 25 °C, V = 5V (continued)
CC
AMB
Limit Values
Unit
Test Conditions
L
Item
min
15
typ
20
max
Ripple susceptibility of V
RSC
mV
4.75 < VP < 5.25 V,
worst case in fre-
P
quency range, ripple
frequency 500 kHz
14.)
HIGH band oscillator, Chapter 4
Oscillator frequency
f
435
905
70
MHz
kHz
10.)
OSC
11.)
Oscillator frequency shift
∆f
∆f
∆f
20
OSC(V)
OSC(V)
OSC(T)
∆V = 5 %
CC
11.)
300
600
kHz
kHz
∆V = 10 %
CC
Oscillator frequency drift
Oscillator frequency drift
1000
500
∆T = 25 °C; with com-
12.)
pensation
∆f
250
90
kHz
5 s to 15 min after
OSC(t)
OSC
13).
switch on
Phase noise,
carrier to noise sideband
Φ
86
15
dBc/
Hz
±10 kHz frequency
offset, worst case in
frequency range
Ripple susceptibility of V
RSC
20
mV
4.75 < VP < 5.25 V,
worst case in fre-
P
quency range, ripple
frequency 500 kHz
14.)
IF amplifier
Mixer output impedance
Gp
Cp
3
4
mS
pF
Ω
at 36 MHz,
see 5.4.4 on page 44
Y = Gs+ jωC
o
s
at 36 MHz,
see 5.4.4 on page 44
IF amplifier output imped-
ance
R
65
20
at 36 MHz,
see 5.4.5 on page 45
S
Z = R + jωL
o
s
s
L
nH
at 36 MHz,
S
see 5.4.5 on page 45
Rejection at the IF outputs
15).
Level of divider interfer-
ences in the IF signal
INT
INT
20
dBµV
dBc
DIV
, worst case
Crystal oscillator interfer-
ences rejection
60
60
66
66
V
= 100 dBµV,
IF
XTAL
worst case in fre-
16).
quency range
Reference frequency
rejection
INT
dBc
V
= 100 dBµV,
IF
REF
worst case in fre-
17).
quency range
AGC output
AGC take-over point
AGC
111
112
113
dBµV AL2, AL1, AL0 = 0,
1,0
TOP
Wireless Components
5 - 36
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-3 AC/DC Characteristics with T
Symbol
= 25 °C, V = 5V (continued)
AMB
CC
C
Limit Values
Unit
Test Conditions
L
Item
min
7.2
typ
9.0
max
10.8
Source current 1
AGC
AGC
AGC
µA
nA
µA
V
fast
slow
Source current 2
185
80
3.3
0
220
100
3.5
264
120
3.7
Peak sink to ground
AGC output voltage
AGC output voltage
peak
V
V
maximum level
minimum level
AGCmax
AGCmin
0.25
V
RF voltage range to
switch the AGC from
active to inactive mode
AGC
0.5
2.9
dB
SLIP
AGC output voltage
AGC
AGC
0
3
V
V
AGC bit high or AGC
active
RML
RMH
AGC output voltage
3.5
3.5
VCC-
0.5
or 4
AGC bit low or AGC
inactive
AGC leakage current
AGC output voltage
AGC
AGC
-50
3.3
50
nA
V
AL2, AL1, AL0 =
1,1,0
LEAK
OFF
0 < V
< V
AGC
CC
VCC-
0.5
AL2, AL1, AL0 =
1,1,1
or 4
AGC is disabled
ꢀꢀThis value is only guaranteed in lab.
1). The RF frequency range is defined by the oscillator frequency range and the intermediate frequency (IF).
2). This is the level of the RF unwanted signal (50% amplitude modulated with 1kHz) that causes a 1.1 kHz
FM modulation of the local oscillator and thus of the wanted signal; V
= 100 dBµV; f
=
+
wanted
unwanted fwanted
5.5 MHz.
2
3). Local oscillator FM modulation resulting from I C communication is measured at the IF output using a mod-
ulation analyser with a peak to peak detector ((P +P )/2) and a post detection filter 30 Hz - 200 kHz. The I C
2
+
-
messages are sent to the tuner in such a way that the tuner is addressed but the content of the PLL registers
are not altered. The refresh interval between each data set shall be 20 ms to 1s.
4). This is the level of the RF signal (100% amplitude modulated with 11.89 kHz) that causes a 750 Hz fre-
quency deviation on the oscillator signal producing sidebands 30 dB below the level of the oscillator signal.
5). Channel S02 beat is the interfering product of f
, f and f
of channel S02, f
= 37.35 MHz. The
RFpix IF
OSC
BEAT
possible mechanisms are f
- 2 x f or 2 x f - f
.
OSC
IF
RFpix OSC
6). Channel A-5 beat is the interfering product of f
f
and f
of channel A-5; f
= 45.5 MHz. The pos-
BEAT
RFpix, IF
OSC
sible mechanisms are: f
- 2 x f or 2 x f - f
.
OSC
IF
RFpix OSC
7). Channel 6 beat is the interfering product of f
+ f
- f
of channel 6 at 42 MHz.
RFpix
RFsnd OSC
8). The IF output signal stays stable within the range of the f step for a low level RF input up to 120 dBµV.
ref
9). N+5 -1 MHz is defined as the input level of channel N+5, at frequency 1 MHz lower, causing FM sidebands
30 dB below the wanted carrier.
10). Limits are related to the tank circuit used in the application board (Chapter 4). Frequency bands may be
adjusted by the choice of external components.
11). The frequency shift is defined as a change in oscillator frequency when the supply voltage varies from
V
= 5 to 4.75 V (4.5 V) or from V = 5 to 5.25 V (5.5 V). The oscillator is free running during this measure-
CC
CC
ment.
12). The frequency drift is defined as a change in oscillator frequency if the ambient temperature varies from
T
= 25 to 50 °C or from T
= 25 to 0 °C. The oscillator is free running during this measurement.
amb
amb
Wireless Components
5 - 37
Specification, July 2001
TUA6030, TUA6032
Reference
13). The switch-on drift is defined as a change in oscillator frequency between 5 s and 15 min after switch-on.
The oscillator is free running during this measurement.
14). The supply ripple susceptibility is measured in the application board (Chapter 4), using a spectrum ana-
lyser connected to the IF output. An unmodulated RF signal is applied to the test board RF input. A sinewave
signal with a frequency of 500 kHz is superposed onto the supply voltage (see 5.5.8 on page 49). The ampli-
tude of this ripple is adjusted to bring the 500 kHz sidebands around the IF carrier to a level of 53.5 dBc referred
to the carrier.
15). This is the level of divider interferences close to the IF frequency. For example channel S3: f
= 158.15
OSC
MHz, 1/4 f
= 39.5375 MHz. Divider interference is measured with the application board (Chapter 4). All
OSC
ground pins are connected to a single ground plane under the IC. The LOWIN input must be left open (i.e. not
connected to any load or cable). The MIDIN and HIGHIN inputs are connected to a hybrid. The measured level
of divider interference are influenced by layout, grounding and port decoupling. The measurement results be-
tween various applications and the reference board could vary as much as 10 dB.
16). Crystal oscillator interference means the 4 MHz sidebands caused by the crystal oscillator. The rejection
has to be greater than 60 dB for an IF output of 100 dBµV.
17). The reference frequency rejection is the level of reference frequency sidebands (e.g. 62.5 kHz) related to
the carrier. The rejection has to be greater than 60 dB for an IF output of 100 dBµV.
Wireless Components
5 - 38
Specification, July 2001
TUA6030, TUA6032
Reference
5.2 Programming
Table 5-4 Bit Allocation Read / Write
Name
Byte
Bits
Ack
MSB
bit6
bit5
bit4
bit3
bit2
bit1
LSB
Write Data
Address Byte
ADB
1
1
0
0
0
MA1
MA0
R/
A
W=0
Divider Byte 1
Divider Byte 2
Control byte
DB1
DB2
CB
0
N7
1
N14
N6
N13
N5
N12
N4
N11
N3
T0
P3
0
N10
N2
N9
N1
RSB
P1
N8
N0
OS
P0
0
A
A
A
A
A
CP
P6
T2
T1
RSA
P2
Bandswitch byte
BB
P7
ATC
P5
P4
1).
AB
AL2
AL1
AL0
0
0
Auxiliary byte
Read data
Address byte
ADB
SB
1
1
0
1
0
1
0
MA1
A2
MA0
A1
R/
W=1
A
A
Status byte
POR
FL
AGC
A0
1). AB replaces BB when T2, T1, T0 = 0, 1, 1, see Table 5-7 Test modes on page 40
Table 5-5 Description of Symbols
Symbol
A
Description
Acknowledge
MA0, MA1
N14 to N0
Address selection bits, see Table 5-6 Address selection on page 40
programmable divider bits:
14
13
3
2
1
N = 2 x N14 + 2 x N13 + ..... + 2 x N3 + 2 x N2 + 2 xN1 + N0
CP
charge pump current bit:
bit = 0: charge pump current = 60 µA
bit = 1: charge pump current = 280µA (default)
T0, T1, T2
RSA, RSB
OS
test bits, see Table 5-7 Test modes on page 40
reference divider bits, see Table 5-8 Reference divider ratios on page 40
tuning amplifier control bit:
bit = 0: enable V
T
bit = 1: disable V (default)
T
P0, P1, P2, P3
P4, P5, P6, P7
ATC
PNP ports control bits
bit = 0: Port is inactive, high impedance state (default)
bit = 1: Port is active, V
= V -V
OUT
CC CESAT
NPN ports control bits
bit = 0: Port is inactive, high impedance state (default)
bit = 1: Port is active, V
= V
OUT
CESAT
AGC time constant bit
bit = 0: I
bit = 1: I
=220nA; ∆t=2s with C=160nF (default)
=9µA; ∆t=50ms with C=160nF
AGC
AGC
Wireless Components
5 - 39
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-5 Description of Symbols
AL0, AL1, AL2
AGC take-over point bits
POR
FL
Power-on reset flag; POR =1 at power-on
PLL lock flag
bit = 1: loop is locked
AGC
internal AGC flag. AGC=1 when internal AGC is active (level below 3V)
digital output of the 5-level ADC
A0, A1, A2
Table 5-6 Address selection
Voltage at AS
MA1
MA0
(0 to 0.1) * V
open circuit
0
0
CC
0
1
1
0
(0.4 to 0.6) * V
CC
(0.9 to 1) * V
1
1
CC
Table 5-7 Test modes
Mode
T2
0
T1
0
T0
0
Normal operation
Normal operation (default)
0
0
1
CP is in high-impedance state
byte AB will follow (otherwise byte BB will follow)
0
1
0
0
1
1
P4 = f output, P5 = f output
1
0
0
div
ref
not in use
not in use
not in use
1
1
1
0
1
1
1
0
1
Table 5-8 Reference divider ratios
Reference divider ratio
1).
RSA
RSB
f
ref
80
50 kHz
31.25 kHz
166.7 kHz
62.5 kHz
0
0
1
1
0
1
0
1
128
24
64
1). With a 4 MHz quartz
Table 5-9 AGC take-over point
IF output level,
Remark
AL2
AL1
AL0
symmetrical mode
115 dBµV
115 dBµV
112 dBµV
109 dBµV
106 dBµV
0
0
0
0
1
0
0
1
1
0
0
1
0
1
0
default mode at POR
Wireless Components
5 - 40
Specification, July 2001
TUA6030, TUA6032
Reference
Table 5-9 AGC take-over point
103 dBµV
1
1
0
1
1
0
1).
I
= 0
AGC
External AGC
2).
3.5 V
1
1
1
Disabled
1). The AGC detector is disabled. Both the sinking and sourcing current from the IC is disabled. The AGC out-
put goes into a high impedance state and an external AGC source can be connected in parallel and will not be
influenced.
2). The AGC detector is disabled and I
= 9 µA.
AGC
1).
Table 5-10 A to D converter levels
Voltage at ADC
A2
A1
A0
(0 to 0.15) * V
0
0
0
CC
(0.15 to 0.3) * V
(0.3 to 0.45) * V
(0.45 to 0.6) * V
0
0
0
1
0
1
1
0
1
0
1
0
CC
CC
CC
(0.6 to 1) * V
CC
1). No erratic codes in the transition
Table 5-11 Defaults at power-on reset
Name
Byte
Bits
MSB
bit6
bit5
bit4
bit3
bit2
bit1
LSB
Write Data
Address Byte
Divider byte 1
Divider byte 2
Control byte
Bandswitch byte
Auxiliary byte
ADB
DB1
DB2
CB
1
0
X
1
0
0
1
X
X
1
0
0
0
X
X
0
0
1
0
X
X
0
0
0
0
X
X
1
0
MA1
X
MA0
X
R/W=0
X
X
1
0
X
X
X
X
BB
0
0
AB
Table 5-12 Internal band selection
Band
Mixer
Oscillator
1).
LOW
MID
P0.P1
P0.P1
P1.P0
P0.P1
P1.P0
P0.P1
2).
HIGH
1). Means: (P0 AND NOT P1); that is: LOW mixer is switched on if (P0=1 and P1=0)
2). The HIGH band is selected by default
Wireless Components
5 - 41
Specification, July 2001
Start
Stop
1st Byte Ack. 2nd Byte Ack. 3rd Byte Ack. 4th Byte Ack.
Ack.
Addressing
1
MA1
MA0
1
0
0
0
R/W
Telegram examples:
Abbreviations:
Start-ADB-DB1-DB2-CB-BB-Stop
Start-ADB-DB1-DB2-CB-AB-Stop
Start-ADB-CB-BB-DB1-DB2-Stop
Start-ADB-CB-AB-DB1-DB2-Stop
Start= start condition
ADB= address byte
DB1= prog. divider byte 1
DB2= prog. divider byte 2
CB= Control byte
Start-ADB-DB1-DB2-DB1-DB2-Stop
Start-ADB-DB1-DB2-Stop
Start-ADB-CB-BB-Stop
BB= Bandswitch byte
AB= Auxiliary byte
Start-ADB-CB-AB-Stop
Stop= stop condition
Start-ADB-CB-BB-CB-AB-Stop
Start-ADB-CB-AB-CB-BB-Stop
TUA6030, TUA6032
Reference
5.4 Electrical Diagrams
5.4.1 Input admittance (S11) of the LOW band mixer (40 to 140 MHz)
Y = 20mS
0
140MHz
0
5.4.2 Input impedance (S11) of the MID band mixer (150 to 455 MHz)
Z = 50 Ω
0
455 MHz
150 MHz
0
Wireless Components
5 - 43
Specification, July 2001
TUA6030, TUA6032
Reference
5.4.3 Input impedance (S11) of the HIGH band mixer
(450 to 865 MHz)
Z = 50 Ω
0
865 MHz
450 MHz
0
5.4.4 Output admittance (S22) of the of the Mixer output
(30 to 50 MHz)
Y = 20mS
0
0
Rdiff
38.9 MHz
Wireless Components
5 - 44
Specification, July 2001
TUA6030, TUA6032
Reference
5.4.5 Output impedance (S22) of the IF amplifier (30 to 50 MHz)
Z = 50 Ω
0
38.9 MHz
0
Wireless Components
5 - 45
Specification, July 2001
TUA6030, TUA6032
Reference
5.5 Measurement Circuits
5.5.1 Gain (GV) measurement in LOW band
LOWIN IFOUT
Transformer
50
Ω
Device
under
Test
N1
N2
Vmeas
RMS
50
Ω
V0
50
Ω
V
Vi
C
spectrum
analyser
V'meas
Votmeter
IFOUT
N1 : N2 = 10 : 2 turns
GVHF
ꢀ Z >> 50 Ω => V = 2 x V = 80 dBµV
meas
i
i
ꢀ V = V
+ 6dB = 80 dBµV
meas
i
ꢀ V = V’
+ 16 dB (transformer ratio N1:N2 and transformer loss
0
meas
ꢀ G = 20 log(V / V )
v
0
i
5.5.2 Gain (GV) measurement in MID and HIGH bands
MIDIN
IFOUT
HIGHIN
Transformer
50
Ω
Device
under
Test
N1
N2
Vmeas
RMS
Balun
1:1
Vi
V0
50
Ω
V
50
Ω
C
spectrum
analyser
V'meas
Votmeter
MIDIN
HIGHIN
IFOUT
N1 : N2 = 10 : 2 turns
GUHF3
ꢀ V = V
= 70 dBµV
meas
i
ꢀ V = V’
+ 16 dB (transformer ratio N1:N2 and transformer loss
0
meas
ꢀ G = 20 log(V / V ) + 1 dB (1 dB = insertion loss of balun)
v
0
i
Wireless Components
5 - 46
Specification, July 2001
TUA6030, TUA6032
Reference
5.5.3 Matching circuit for optimum noise figure in LOW band
15p
1n
22p
1n
In
Out
In
Out
7 turns
22p
wire
coil
⍪
0.5 mm
⍪
5.5 mm
50
τ
semi rigid cable
300 mm long
96 pF/m
33dB/100m
22p
NFM
For f = 150 MHz
For f = 50 MHz
RF
RF
ꢀ loss = 1.3 dB
ꢀ loss = 0 dB
ꢀ image suppression = 13 dB
ꢀ image suppression = 16 dB
5.5.4 Noise figure (NF) measurement in LOW band
Noise
Source
LOWIN IFOUT
IN OUT
Noise
Figure
Meter
Transformer
N1 N2
Matching
Circuit
Device
under
Test
C
IFOUT
N1 : N2 = 10 : 2 turns
NF = NFmeas - loss of matching circuit (dB)
NFVHF
Wireless Components
5 - 47
Specification, July 2001
TUA6030, TUA6032
Reference
5.5.5 Noise figure (NF) measurement in MID and HIGH bands
Noise
Source
MIDIN
HIGHIN
IFOUT
Noise
Figure
Meter
Transformer
N1 N2
Device
under
Test
Balun
1:1
C
MIDIN
HIGHIN
IFOUT
N1 : N2 = 10 : 2 turns
loss of balun = 1 dB
NF = NFmeas - loss of balun (dB)
NFUHF3
5.5.6 Cross modulation measurement in LOW band
Vmeas
50
Ω
V
RMS
Votmeter
unwanted
signal
source
AM = 30 %
18 dB
attenuator
A
LOWIN IFOUT
C
Transformer
N1 N2
50
Ω
Device
under
Test
38.9 MHz
50
Hybrid
V0
Vi
Ω
C
V
modulation
analyser
50
Ω
V'meas
B
D
IFOUT
N1 : N2 = 10 : 2 turns
RMS
Votmeter
wanted
signal
source
50
Ω
XVHF
ꢀ Z >> 50 Ω => V = 2 x V
i
i
meas
ꢀ V’
= V - 16 dB (transformer ratio N1:N2 and transformer loss)
0
meas
ꢀ wanted output signal at f , V = 100 dBµV
pix
o
ꢀ unwanted output signal at f
snd
Wireless Components
5 - 48
Specification, July 2001
TUA6030, TUA6032
Reference
5.5.7 Cross modulation measurement in MID and HIGH bands
Vmeas
50
Ω
V
RMS
Votmeter
unwanted
signal
source
AM = 30 %
MIDIN
HIGHIN
18 dB
attenuator
A
C
IFOUT
Transformer
N1 N2
50
Ω
Device
under
Test
Balun
1:1
38.9 MHz
50
Hybrid
Vi
V0
Ω
C
V
modulation
analyser
50
Ω
V'meas
MIDIN
HIGHIN
B
D
IFOUT
N1 : N2 = 10 : 2 turns
RMS
Votmeter
wanted
signal
source
50
Ω
XUHF3
ꢀ V’
= V - 16 dB (transformer ratio N1:N2 and transformer loss)
0
meas
ꢀ wanted output signal at f , V = 100 dBµV
pix
o
ꢀ unwanted output signal at f
snd
5.5.8 Ripple susceptibility measurement
Vsupply
10 µF
6k8
50
τ
BC847B
to application
board
10 µF
500 kHz sine
50=τ
Vripple
VCC + Vripple
Circuit to superimpose a 500 kHz ripple on VCC
RIP
Wireless Components
5 - 49
Specification, July 2001
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