TLV4961-1TA [INFINEON]
The TLV496x-xTA/B Hall sensor family comprises a line of Hall switches for contactless position sensing. The sensors are specially designed to provide an easy-to-use and cost effective solution for position sensing applications.;型号: | TLV4961-1TA |
厂家: | Infineon |
描述: | The TLV496x-xTA/B Hall sensor family comprises a line of Hall switches for contactless position sensing. The sensors are specially designed to provide an easy-to-use and cost effective solution for position sensing applications. |
文件: | 总19页 (文件大小:713K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
High Precision Hall Effect Latch for Consumer
Applications
Hall Effect Latch
TLV4961-1T
TLV4961-1TA
TLV4961-1TB
TLV4961-1T
Data Sheet
Revision 1.0, 2015-05-19
Sense & Control
TLV4961-1T
Table of Contents
1
Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Target Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1
1.2
1.3
2
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Configuration (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Functional Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Default Start-up Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1
2.2
2.3
2.4
2.5
2.6
3
Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Electrical and Magnetic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1
3.2
3.3
3.4
4
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Packing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
TO92S-3-2 Distance between Chip and Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Package Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1
4.2
4.3
4.4
5
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Data Sheet
2
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TLV4961-1T
List of Tables
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute Maximum Rating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
ESD Protection (TA = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Operating Conditions Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
General Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Magnetic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Data Sheet
3
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TLV4961-1T
List of Figures
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Image of TLV4961-1T TO92S-3-1 TO92S-3-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Configuration and Center of Sensitive Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Functional Block Diagram TLV4961-1T. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
TLV4961-1T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Output Signal TLV4961-1T. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Illustration of the Start-up Behavior of the TLV4961-1T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Basic Application Circuit #1: Only Pull-Up Resistor is necessary . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Enhanced Application Circuit #2 for extended ESD robustness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Definition of Magnetic Field Direction TO92S-3-2, TO92S-3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 10 Package Outline TLV4961-1TA: TO92S-3-1 (All Dimensions in mm). . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 11 Package Outline TLV4961-1TB: TO92S-3-2 (All Dimensions in mm). . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12 Packing of the TLV4961-1TB TO92S-3-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 13 Distance between Chip and Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 14 Marking of TLV4961-1T. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Data Sheet
4
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TLV4961-1T
Product Description
1
Product Description
1)
1.1
Overview
Characteristic
Latch
Supply Voltage Supply Current Sensitivity
Interface
Temperature TA
-40 °C to 125 °C
3.0~26 V
1.6 mA
BOP: 2 mT
BRP: -2 mT
Open Drain
Output
Figure 1
Image of TLV4961-1T TO92S-3-1 TO92S-3-2
1.2
Features
•
•
•
•
•
•
•
3.0 V to 26 V operating supply voltage
Operation from unregulated power supply
Output overcurrent & overtemperature protection
Active error compensation
High stability of magnetic thresholds
High ESD performance
Leaded, halogen-free package TO92S-3-1 for TLV4961-1TA, TO92S-3-2 for TLV4961-1TB
1.3
Target Applications
Target applications for the TLV496x Hall switch family are all applications which require a high precision Hall
Latch with an operating temperature range from -40 °C to 125 °C.
The magnetic behavior as a latch and switching thresholds of typical ±2 mT make the device especially suited
for the use with a pole wheel for index counting applications, for rotor position detection as in brushless DC
motor commutation and for white goods or open/closing detection.
For automotive applications please refer to the Infineon TLE Hall Switches series.
Table 1
Ordering Information
Product Name
TLV4961-1TA
TLV4961-1TB
Product Type
Hall Latch
Ordering Code
SP001274772
SP001283610
Package
TO92S-3-1 (Bulk)
TO92S-3-2 (Ammo pack)
Hall Latch
1) Only the package is halogen-free.
Data Sheet
5
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TLV4961-1T
Functional Description
2
Functional Description
2.1
General
The TLV4961-1T is an integrated Hall effect designed specifically for highly accurate applications with
superior supply voltage capability, and temperature stability of the magnetic thresholds.
2.2
Pin Configuration (top view)
1
2
3
Q
VDD GND
Figure 2
Pin Configuration and Center of Sensitive Area
2.3
Pin Description
Table 2
Pin Description
Pin No.
Symbol
VDD
GND
Q
Function
Supply voltage
GND
1
2
3
Output
Data Sheet
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TLV4961-1T
Functional Description
2.4
Block Diagram
VDD
To All Subcircuits
Voltage
Regulator
Oscillator and
Sequencer
Bias and
Compensation
Circuits
Reference
Q
Amplifier
Control
Spinning Hall
Probe
Comparator
with
Hysteresis
Low Pass
Filter
Overtemperature
& overcurrent
protection
GND
Figure 3
Functional Block Diagram TLV4961-1T
2.5
Functional Block Description
The chopped Hall IC switch comprises a Hall probe, bias generator, compensation circuits, oscillator and
output transistor.
The bias generator provides currents for the Hall probe and the active circuits. Compensation circuits stabilize
the temperature behavior and reduce influence of technology variations.
The active error compensation (chopping technique) rejects offsets in the signal path and the influence of
mechanical stress to the Hall probe caused by molding and soldering processes and other thermal stress in
the package. The chopped measurement principle together with the threshold generator and the comparator
ensures highly accurate and temperature stable magnetic thresholds.
The output transistor has an integrated overcurrent and overtemperature protection.
Data Sheet
7
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TLV4961-1T
Functional Description
Applied
Magnetic
Field
BOP
BRP
td
tf
td
tr
VQ
90%
10%
Figure 4
TLV4961-1T
VQ
B
BRP
0
BOP
Figure 5
Output Signal TLV4961-1T
Data Sheet
8
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TLV4961-1T
Functional Description
2.6
Default Start-up Behavior
The magnetic thresholds exhibit a hysteresis BHYS = BOP - BRP. In case of a power-on with a magnetic field B
within hysteresis (BOP > B > BRP) the output of the sensor is set to the pull up voltage level (VQ) per default. After
the first crossing of BOP or BRP of the magnetic field the internal decision logic is set to the corresponding
magnetic input value.
VDDA is the internal supply voltage which is following the external supply voltage VDD
.
This means for B > BOP the output is switching, for B < BRP and BOP > B > BRP the output stays at VQ.
VDDA
tPon
3V
The device always applies
Power on ramp
VQ level at start-up
t
VQ
independent from the
applied magnetic field !
Magnetic field above threshold
B > BOP
t
VQ
Magnetic field below threshold
B < BRP
t
t
VQ
Magnetic field in hysteresis
BOP > B > BRP
Figure 6
Illustration of the Start-up Behavior of the TLV4961-1T
Data Sheet
9
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TLV4961-1T
Specification
3
Specification
3.1
Application Circuit
The following Figure 7 shows the basic option of an application circuit. Only a pull-up resistor RQ is necessary.
The resistor RQ has to be in a dimension to match the applied VS to keep IQ limited to the operating range of
maximum 25 mA.
e.g.: VS = 12 V; IQ = 12 V/1200 Ω = 10 mA
Vs
VDD
RQ = 1.2kΩ
Q
GND
Figure 7
Basic Application Circuit #1: Only Pull-Up Resistor is necessary
Vs
VDD
RQ = 1.2kΩ
Q
CDD = 47nF
TVS diode
e.g. ESD24VS2U
GND
Figure 8
Enhanced Application Circuit #2 for extended ESD robustness
With an additional capacitor CDD and a transient voltage suppression (TVS) diode an extended ESD robustness
on system level is achieved (Figure 8).
Data Sheet
10
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TLV4961-1T
Specification
3.2
Absolute Maximum Ratings
Table 3
Absolute Maximum Rating Parameters
Symbol
Parameter
Values
Typ.
Unit Note or Test Condition
Min.
3
Max.
26
Supply voltage1)
VDD
VQ
–
–
–
–
–
–
V
–
Output voltage
-0.5
-70
-40
-40
–
26
V
–
Reverse output current
Junction temperature1)
Storage temperature
IQ
–
mA
°C
°C
K/W
–
TJ
150
150
250
–
TS
–
Thermal resistance
Junction ambient
RthJA
for TO92S-3 (2s2p)
1) This lifetime statement is an anticipation based on an extrapolation of Infineon’s qualification test results. The actual
lifetime of a component depends on its form of application and type of use etc. and may deviate from such
statement. The lifetime statement shall in no event extend the agreed warranty period.
Attention: Stresses above the max. values listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Maximum ratings are absolute ratings; exceeding only one of these values may
cause irreversible damage to the integrated circuit.
Calculation of the dissipated power PDIS and junction temperature TJ of the chip:
e.g. for: VDD = 12 V, IS = 2.5 mA, VQSAT = 0.5 V, IQ = 20 mA
Power dissipation: PDIS = 12 V x 2.5 mA + 0.5 V x 20 mA = 30 mW + 10 mW = 40 mW
Temperature ∆T = RthJA x PDIS = 250 K/W x 40 mW = 10 K
For TA = 50 °C: TJ = TA + ∆T = 50 °C + 10 K = 60 °C
Table 4
ESD Protection1) (TA = 25 °C)
Symbol
Parameter
Values
Typ.
Unit Note or Test Condition
Min.
-4
-1
Max.
ESD voltage (HBM)2)
ESD voltage (CDM)3)
VESD
VESD
–
4
kV
kV
R = 1.5 kΩ, C = 100 pF
–
1
–
1) Characterization of ESD is carried out on a sample basis, not subject to production test.
2) Human Body Model (HBM) tests according to ANSI/ESDA/JEDEC JS-001.
3) Charge device model (CDM) tests according to JESD22-C101.
Data Sheet
11
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TLV4961-1T
Specification
3.3
Operating Range
The following operating conditions must not be exceeded in order to ensure correct operation of the TLV4961-
1T.
All parameters specified in the following sections refer to these operating conditions unless otherwise
mentioned.
Table 5
Operating Conditions Parameters
Parameter
Symbol
Min.
Values
Typ.
Unit Note or
Test Condition
Max.
261)
26
Supply voltage
VDD
VQ
TA
IQ
3.0
3.0
-40
0
–
–
–
–
V
–
Output voltage
V
–
R
–
Operation temperature
125
°C
mA
thJA ≤ 250K/W
Output current
25
1) Latch-up test with factor 1.5 is not covered. Please see max ratings also.
3.4
Electrical and Magnetic Characteristics
Product characteristics involve the spread of values guaranteed within the specified voltage and ambient
temperature range. Typical characteristics are the median of the production and correspond to VDD = 12 V and
TA = 25 °C. The below listed specification is valid in combination with the application circuit shown in Figure 7
and Figure 8
Table 6
General Electrical Characteristics
Parameter
Symbol
Values
Unit Note or Test Condition
Min.
1.1
Typ.
1.6
Max.
2.5
Supply current
IS
mA
mA
–
Output current
limitation
IQLIMIT
30
56
70
internally limited & thermal
shutdown
Output fall time1)
Output rise time1)
Delay time1)2)
tf
0.17
0.4
12
0.4
0.5
15
1
μs
μs
μs
μs
1.2 kΩ / 50 pF, see Figure 4
1.2 kΩ / 50 pF, see Figure 4
see Figure 4
tr
1
td
30
150
Power-on time1)3)
tPON
–
80
VDD = 3 V, B ≤ BRP - 0.5 mT or
B ≥ BOP + 0.5 mT
1) Not subject to production test, verified by design/characterization.
2) Systematic delay between magnetic threshold reached and output switching.
3) Time from applying VDD = 3.0 V to the sensor until the output is valid.
Data Sheet
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TLV4961-1T
Specification
Table 7
Magnetic Characteristics
Symbol T (°C)
Parameter
Values
Unit
Note / Test
Condition
Min.
0.7
0.5
0.2
-3.7
-3.5
-3.1
2.8
2.6
2.0
–
Typ. Max.
Operating point
Release point
Hysteresis
BOP
BRP
BHYS
-40
25
2.2
3.7
3.5
3.1
-0.7
-0.5
-0.2
5.8
5.4
4.4
–
mT
–
–
–
–
–
–
–
–
–
2.0
125
-40
25
1.6
-2.2
-2.0
-1.6
4.4
mT
mT
125
-40
25
4.0
125
–
3.2
Temperaturecompensationof TC
magnetic thresholds1)
-2000
ppm/K –
1) Not subject to production test, verified by design/characterization.
Field Direction Definition
Positive magnetic fields are defined with the south pole of the magnet to the branded side of package.
N
S
Branded Side
Figure 9
Definition of Magnetic Field Direction TO92S-3-2, TO92S-3-1
Data Sheet
13
Revision 1.0, 2015-05-19
TLV4961-1T
Package Information
4
Package Information
The TLV4961-1TA is available in Bulk packing with TO92S-3-1-package.
The TLV4961-1TB is available in AMMO packing with TO92S-3-2-package.
4.1
Package Outline
Figure 10 Package Outline TLV4961-1TA: TO92S-3-1 (All Dimensions in mm)
Data Sheet
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TLV4961-1T
Package Information
Figure 11 Package Outline TLV4961-1TB: TO92S-3-2 (All Dimensions in mm)
Data Sheet
15
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TLV4961-1T
Package Information
4.2
Packing Information
Figure 12 Packing of the TLV4961-1TB TO92S-3-2
4.3
TO92S-3-2 Distance between Chip and Package
Figure 13 Distance between Chip and Package
Data Sheet
16
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TLV4961-1T
Package Information
4.4
Package Marking
Halogen free (H)
Year (Y) = 0...9
HYWWLL
Calendar Week (WW) = 01...52
Lot Code (LL)
V611T
Figure 14 Marking of TLV4961-1T
Data Sheet
17
Revision 1.0, 2015-05-19
TLV4961-1T
Revision History
5
Revision History
Revision Date
Changes
1.0
2015-05-18 Initial release.
Data Sheet
18
Revision 1.0, 2015-05-19
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MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave
Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™
of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc.
TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas
Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited.
Last Trademarks Update 2011-11-11
www.infineon.com
Edition 2015-05-19
Published by
Infineon Technologies AG
81726 Munich, Germany
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Document reference
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