TLT9252VLC [INFINEON]
AEC-Q100 Grade 0;
| 型号： | TLT9252VLC |
| 厂家： | 
Infineon |
| 描述： | AEC-Q100 Grade 0 |
| 文件： | 总50页 (文件大小：1344K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TLT9252VLC
High-Speed CAN FD Transceiver
1
Overview
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Fully compliant to ISO 11898-2 (2016) and SAE J2284-4/-5
Infineon automotive quality
AEC-Q100 Grade 0 (Ta: -40°C to +150°C) qualification for high temperature mission profiles
Guaranteed loop delay symmetry to support CAN FD data frames up to 5 MBit/s
Bus Wake-up Pattern (WUP) function with optimized filter time (0.5µs - 1.8µs) for worldwide OEM usage
Excellent ESD robustness +/-10kV (HBM) and +/-9kV (IEC 61000-4-2)
Very low current consumption in Sleep Mode of max. 25µA
Extended supply range on VCC and VIO supply
Dual Power Supply Solution via VBAT and VCC for robust behavior during battery cranking
Fail safe features like TxD time-out, RxD Recessive Clamping and Overtemperature shut-down
Very low electromagnetic emission (EME) for chokeless usage
Wide common mode range for electromagnetic immunity (EMI)
CAN short circuit proof to ground, battery and VCC
Undervoltage detection on VBAT, VCC and VIO
Autonomous bus biasing according to ISO 11898-2 (2016)
Bus Wake-up (WUP) and Local Wake-Up (LWU)
INH output to control external circuity
Improved robust local failure diagnosis via NERR output pin
Green Product (RoHS compliant)
Potential Applications
•
•
•
•
•
Car powertrain and transmission applications
Infotainment applications
Cluster Modules
Radar applications
HVAC
Datasheet
1
Rev. 1.0
2019-10-17
www.infineon.com/automotive-transceiver
TLT9252VLC
High-Speed CAN FD Transceiver
Overview
Product validation
Qualified for automotive applications with higher temperature requirements as well as with extended lifetime
requirements. Product validation according to AEC-Q100.
Description
The TLT9252VLC is a transceiver designed for HS CAN networks up to 5 Mbit/s in automotive and industrial
applications. As an interface between the physical bus layer and the CAN protocol controller, the TLT9252VLC
drives the signals to the bus and protects the microcontroller against interferences generated within the
network. Based on the high symmetry of the CANH and CANL signals, the TLT9252VLC provides very low
electromagnetic emission allowing the operation without a common mode choke. The non-low power modes
(Normal-operating Mode and Receive-only Mode) and low power modes (Sleep Mode and Stand-by Mode) are
optimized for reduced current consumption based on the required functionality. Even in Sleep Mode with a
quiescent current below 25 µA over the full temperature range, the TLT9252VLC is able to detect a Wake-Up
Pattern (WUP) on the HS CAN bus. The VIO voltage reference input is used to support 3.3 V and 5 V supplied
microcontrollers. The TLT9252VLC is integrated in an RoHS compliant PG-TSON-14 package and fulfills the
requirements of the ISO11898-2 (2016).
Type
Package
Marking
TLT9252VLC
PG-TSON-14
T9252V
Datasheet
2
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Table of contents
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Potential Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
3
3.1
3.2
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.1
4.2
4.3
5
High-Speed CAN functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6
6.1
6.2
6.3
6.4
6.5
6.5.1
6.5.2
6.6
6.7
6.8
6.8.1
6.8.2
6.9
Modes of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Normal-operating Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Receive-only Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Stand-by Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Go-to-Sleep command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Sleep Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Mode change to Sleep Mode or Stand-by Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Mode Change via EN and NSTB pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Power On Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Autonomous bus voltage biasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Wake-Up functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Wake-up Pattern (WUP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Local Wake-Up (LWU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Wake-up: RxD and NERR behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7
7.1
7.2
7.2.1
7.2.2
7.2.3
7.3
7.4
7.5
Fail safe functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Short Circuit Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Undervoltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Undervoltage and power-down detection on VBAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Undervoltage detection on VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Undervoltage detection on VIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Dual Power Supply Solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Unconnected logic pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
TxD time-out function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
RxD Recessive Clamping detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Delay time for mode change . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
7.6
7.7
7.8
8
Diagnosis-flags at NERR and RxD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Datasheet
3
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
9
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
9.1
9.2
9.2.1
9.2.2
9.2.3
9.3
9.4
9.5
9.6
9.7
General timing parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Power supply interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Current consumptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Undervoltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
INH output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
EN, NSTB and NERR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
CAN controller interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Dynamic transceiver parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Wake-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
General wake-up timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
WUP detection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Local Wake-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
9.8
9.8.1
9.8.2
9.8.3
10
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
ESD robustness according to IEC61000-4-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Voltage adaption to the microcontroller supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Application example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Further application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
10.1
10.2
10.3
10.4
11
12
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Datasheet
4
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Block diagram
2
Block diagram
VBAT
10
11
7
6
N.C.
INH
EN
3
13
12
VCC
Mode Control
Logic
CANH
CANL
Driver
Output
Stage
14
5
Temp.-
NSTB
VIO
Protection
+
timeout
Diagnosis &
Failure
Logic
VCC/2,
2.5V
1
8
TxD
Wake-Up
Detection
VIO
Normal
Receiver
NERR
RxD Output
Control
Low Power
Receiver
VBAT
VIO
9
Wake-Up
WAKE
Comparator
4
RxD
2
GND
Figure 1
Block diagram
Datasheet
5
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Pin configuration
3
Pin configuration
3.1
Pin assignment
1
TxD
NSTB
CANH
CANL
N.C.
14
13
12
11
10
9
GND
2
PAD
3
4
5
6
7
VCC
RxD
VIO
EN
VBAT
WAKE
NERR
INH
8
(Top-side x-ray view)
Figure 2
Pin configuration
3.2
Pin definitions
Table 1
Pin definitions and functions
Pin
Symbol
Function
1
TxD
Transmit Data input
Integrated “pull-up” current source to VIO;
Logical “low” to drive a dominant signal on CANH and CANL.
2
3
GND
Ground
VCC
Transmitter supply voltage
100 nF decoupling capacitor to GND recommended.
4
5
6
RxD
VIO
Receive Data output
Logical “low” while a dominant signal is on the HS CAN bus;
Output voltage adapted to the voltage on the VIO level shift input.
Level shift input
Reference voltage for the digital input and output pins;
100 nF decoupling capacitor to GND recommended.
EN
Mode control input
Integrated “pull-down” current source to GND;
Logical “high” for Normal-operating Mode.
Datasheet
6
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Pin configuration
Table 1
Pin definitions and functions (cont’d)
Pin
Symbol
Function
7
INH
Inhibit output
Open drain output to control external circuitry;
High impedance in Sleep Mode.
8
NERR
WAKE
VBAT
Error flag output
Failure and wake-up indication output;
Active “low”.
9
Wake-up input
Local wake-up input, terminated against GND and VBAT
Wake-up input sensitive on rising and falling edge.
;
10
Battery supply voltage
100 nF decoupling capacitor to GND recommended.
11
12
13
14
N.C.
Not connected
CANL
CANH
NSTB
Low-level HS CAN bus line
High-level HS CAN bus line
Stand-by control input
Integrated “pull-down” current source to GND;
Logical “high” for Normal-operating Mode.
Datasheet
7
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
General product characteristics
4
General product characteristics
4.1
Absolute maximum ratings
Table 2
Absolute maximum ratings1)
All voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit Note or
Test Condition
Number
Min.
Max.
Voltages
Battery supply voltage
Transmitter supply voltage
Digital voltage reference
VBAT
VCC
VIO
-0.3
-0.3
-0.3
-40
-40
-40
–
–
–
–
–
–
40
6.0
6.0
40
40
40
V
V
V
V
V
V
–
P_8.1.1
P_8.1.2
P_8.1.3
P_8.1.4
P_8.1.5
P_8.1.6
–
–
–
–
–
CANH DC voltage versus GND VCANH
CANL DC voltage versus GND VCANL
Differential voltage between VCAN_DIFF
CANH and CANL
Voltages at pin WAKE
Voltages at pin INH
VWAKE
VINH
-27
–
–
40
V
V
–
–
P_8.1.7
P_8.1.8
-0.3
VBAT +
0.3
Voltages at digital I/O pins: EN, VMAX_IO1
NSTB, TxD, RxD, NERR
-0.3
-0.3
–
–
6.0
V
V
–
–
P_8.1.9
Voltages at digital I/O pins: EN, VMAX_IO2
VIO
+
P_8.1.10
NSTB, TxD, RxD, NERR
0.3
Currents
Max. output current on INH
IINH_Max
-5
-5
–
–
–
5
mA
mA
–
–
P_8.1.11
P_8.1.12
Max. output current on NERR IOut_Max
and RxD
Temperatures
Junction temperature
Storage temperature
ESD resistivity
Tj
-40
-55
–
–
160
150
°C
°C
–
–
P_8.1.13
P_8.1.14
Tstg
ESD immunity at CANH, CANL, VESD_HBM_CAN -10
WAKE and VBAT versus to GND
–
10
kV
HBM2)
P_8.1.15
ESD immunity at all other pins VESD_HBM
ESD immunity at corner pins VESD_CDM_CP -750
ESD immunity at any pin VESD_CDM_OP -500
-2
–
–
–
2
kV
V
HBM2)
CDM3)
CDM3)
P_8.1.16
P_8.1.17
P_8.1.18
750
500
V
1) Not subject to production test, specified by design.
2) ESD susceptibility, Human Body Model “HBM” according to ANSI/ESDA/JEDEC JS001 (1.5k Ω, 100 pF.)
3) ESD susceptibility, Charged Device Model “CDM” according to EIA/JESD22-C101 or ESDA STM 5.3.1.
Datasheet
8
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
General product characteristics
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
4.2
Functional range
Table 3
Functional range
Parameter
Symbol
Values
Unit Note or Test Condition
Number
Min. Typ. Max.
Supply voltages
Battery supply voltage
Transmitter supply voltage
Digital voltage reference
Thermal parameters
Junction temperature
VBAT
VCC
VIO
5.5
4.5
3.0
–
–
–
40
V
V
V
–
–
–
P_8.2.1
P_8.2.2
P_8.2.3
5.5
5.5
Tj
-40
–
150
°C
–
P_8.2.4
Note:
Within the functional or operating range, the IC operates as described in the circuit description. The
electrical characteristics are specified within the conditions given in the Electrical Characteristics
table.
4.3
Thermal resistance
Note:
This thermal data was generated according to JEDEC JESD51 standards. Please visit
www.jedec.org.
Table 4
Thermal resistance
Parameter
Symbol
Values
Unit Note or Test Condition Number
Min. Typ. Max.
Thermal resistance
Junction to ambient
RthJA_TSON14
–
51
–
K/W 1)2) Exposed Pad
soldered to PCB
P_8.3.2
Thermal shut-down junction temperature
1)
Thermal shut-down temperature TJSD
170 180 190 °C
10 20
–
–
P_8.3.3
P_8.3.4
1)
Thermal shut-down hysteresis
∆T
5
K
1) Not subject to production test, specified by design.
2) Specified RthJA value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm board with 2 inner copper layers (2 × 70 mm Cu,
2 × 35 mm Cu).
Datasheet
9
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
High-Speed CAN functional description
5
High-Speed CAN functional description
HS CAN is a serial bus system which connects microcontrollers, sensors and actuators for real-time control
applications. The use of the Controller Area Network (abbreviated CAN) within road vehicles is described by
the international standard ISO 11898. According to the 7-layer OSI reference model the physical layer of a
HS CAN bus system specifies the data transmission from one CAN node to all other available CAN nodes within
the network. The physical layer specification of a CAN bus system includes all electrical specifications of a CAN
network. The CAN transceiver is part of the physical layer specification. The TLT9252VLC supports both Bus
Wake-up Pattern (WUP) functionality and Local Wake-up as defined by the ISO 11898 Standard. Additionally,
the TLT9252VLC supports CAN Flexible data rate (CAN FD) transmission up to 5 Mbit/s.
VIO
=
=
Digital supply voltage
Transmitter supply voltage
Transmit data input from
the microcontroller
TxD
VCC
TxD
VIO
=
RxD
=
Receive data output to
the microcontroller
CANH =
CANL =
Bus level on the CANH
input/output
t
t
Bus level on the CANL
input/output
CANH
CANL
VDiff
=
Differential voltage
VCC
between CANH and CANL
VDiff = VCANH – VCANL
VDiff
VCC
“dominant” receiver threshold
“recessive” receiver threshold
t
RxD
VIO
tLoop(H,L)
tLoop(L,H)
t
Figure 3
High-Speed CAN bus signals and logic signals
Datasheet
10
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
High-Speed CAN functional description
The TLT9252VLC is a High-Speed CAN transceiver operating as an interface between the CAN controller and
the physical bus medium. A HS CAN network is a two wire, differential network which allows data transmission
rates up to 5 MBit/s. The characteristic for a HS CAN network are the two signal states on the CAN bus:
dominant and recessive (see Figure 3). The CANH and CANL pins are the interface to the CAN bus and operate
as an input and output. The RxD and TxD pins are the interface to the microcontroller. The TxD pin is the serial
data input from the CAN controller. The RxD pin is the serial data output to the CAN controller.
The HS CAN transceiver TLT9252VLC includes a receiver and a transmitter unit, allowing the transceiver to
send data to the bus medium and monitors the data from the bus medium at the same time. The HS CAN
transceiver TLT9252VLC converts the serial data stream which is available on the transmit data input TxD, into
a differential output signal on the CAN bus, provided by the CANH and CANL pins. The receiver stage of the
TLT9252VLC monitors the data on the CAN bus and converts it to a serial, single-ended signal on the RxD
output pin. A logical “low” signal on the TxD pin creates a dominant signal on the CAN bus, followed by a
logical “low” signal on the RxD pin (see Figure 3). The feature, broadcasting data to the CAN bus and listening
to the data traffic on the CAN bus simultaneously is essential to support the bit-to-bit arbitration within CAN
networks.
The voltage levels for HS CAN transceivers are defined in ISO 11898-2. Whether a data bit is dominant or
recessive depends on the voltage difference between the CANH and CANL pins:
VDiff = VCANH - VCANL.
To transmit a dominant signal to the CAN bus the amplitude of the differential signal VDiff is higher than or
equal to 1.5 V. To receive a recessive signal from the CAN bus the amplitude of the differential VDiff is lower than
or equal to 0.5 V.
In partially supplied CAN networks, participants have different power supply status. Some nodes are powered,
other nodes are unpowered, or some other nodes are in Low-Power Mode. Therefore the TLT9252VLC provides
the Sleep Mode in which the device is still able to recognize a Wake-Up Pattern or a local wake-up and signals
the wake-up event to the external microcontroller via RxD and NERR output pin. The INH output pin allows to
control an external device e.g. a voltage regulator. The HS CAN transceiver TLT9252VLC provides two Low-
Power Modes Sleep Mode and Stand-by Mode with optimized very low current consumption.
The voltage level on the digital input TxD and the digital output RxD is determined by the reference supply
level at the VIO pin. Depending on the voltage level at the VIO pin, the signal levels on the logic pins (EN, NERR,
NSTB, TxD and RxD) are compatible with microcontrollers having a 5 V or 3.3 V I/O supply. Usually the digital
power supply VIO of the transceiver is connected to the I/O power supply of the microcontroller.
Datasheet
11
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Modes of operation
6
Modes of operation
The TLT9252VLC supports five different Modes of operation (see Figure 4). Each mode with specific
characteristics in terms of quiescent current, data transmission or failure diagnostic. For the mode selection
the digital input pins EN and NSTB are used. Both digital input pins are event triggered. A mode change via the
mode selection pins EN and NSTB is only possible if the power supply voltages VBAT OR VCC AND the digital
reference voltage VIO is in the functional range.
EN -> 1
NSTB -> 1
Normal-operating
Mode
EN = 1
NSTB = 1
EN -> 1
NSTB = 1
INH = „ON“
EN -> 0
NSTB = 1
EN -> 0
NSTB -> 0
EN = 1
NSTB -> 1
Receive-only
Mode
EN = 0
NSTB -> 0
Stand-by Mode
EN = 0
EN = 0
NSTB = 0
NSTB = 1
INH = „ON“
INH = „ON“
EN = 0
NSTB -> 1
VBAT > VBAT_UV
OR
VCC > VCC_UV
EN = 1
NSTB -> 0
EN = 0
EN -> 0
NSTB -> 1
NSTB -> 1
VIO > VIO_UV
Go-to Sleep
Power on Reset
EN -> 1
NSTB = 0
Command
EN = 1
INH = „OFF“
EN -> 0
t < tSLEEP
NSTB = 0
EN -> 1
NSTB -> 0
For VBAT > VBAT_POD
INH = „ON“
NSTB = 0
INH = „ON“
t > tSLEEP
NSTB = 0
No Wake-up pending
POR flag reset
VBAT < VBAT_POD
AND
VCC < VCC_UV
Sleep Mode
EN = X
Any Mode
WUP OR LWU
detected
NSTB = 0
EN = 1
NSTB -> 1
VIO > VIO_UV
INH = „OFF“
-> : Rising or falling edge detected
= : State remains stable
VCC < VCC_UV AND
tVCC_UV_T 1) expired
AND tSilence expired
VIO < VIO_UV AND
Any Mode
tVIO_UV_T 1) expired
AND tSilence expired
Any Mode
1)
Timer armed when VBAT > VBAT_UV
Figure 4
Modes of operation
Datasheet
12
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Modes of operation
The following operation modes are available on the TLT9252VLC:
•
•
•
•
•
Normal-operating Mode (Chapter 6.1)
Receive-only Mode (Chapter 6.2)
Stand-by Mode (Chapter 6.3)
Sleep Mode (Chapter 6.5)
Go-to-Sleep command (Chapter 6.4)
Depending on the mode, the output driver stage, the receiver stage and the bus biasing are active or inactive.
Table 5 shows the different operation modes depending on the logic signal on the input pins EN and NSTB
with the related status of the INH pin and the bus biasing.
Table 5
Overview operation modes
Operation mode
Normal-operating Mode
Receive-only Mode
Stand-by Mode
EN
1
NSTB
INH
VBAT
VBAT
VBAT
VBAT
Bus biasing
VCC/2
1
1
0
0
0
0
0
VCC/2
GND 1)
GND 1)
GND 1)
0
2)
Go-to-Sleep command
Sleep Mode
1
0
High-Z
Power On Reset
0
follows VBAT
Floating
1) Valid if tSilence has expired. The Bus biasing follows the Autonomous Bus Biasing described in Chapter 6.7.
2) INH stays connected to VBAT as long as tSLEEP has not expired OR if a wake-up is pending OR if the POR flag is set. If tSLEEP
expires AND no Wake-up is pending AND the POR flag is reset the INH is High Z.
Datasheet
13
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Modes of operation
6.1
Normal-operating Mode
In Normal-operating Mode all functions of the TLT9252VLC are available and the device is fully functional. Data
can be received from the HS CAN bus as well as transmitted to the HS CAN bus.
•
•
•
•
•
•
•
•
•
•
The transmitter is active and drives data stream on the TxD input pin to the bus pins CANH and CANL.
The receiver is active and converts the signals from the bus to a serial data stream on the RxD output pin.
The bus biasing is connected to VCC/2.
The TxD time-out function is enabled (see Chapter 7.5).
The overtemperature protection is enabled (see Chapter 7.6).
The RxD Recessive Clamping detection is enabled (see Chapter 7.7)
The undervoltage detection on VBAT, VCC and VIO are enabled (see Chapter 7.2).
The Local Wake-Up pin is disabled.
The INH output pin is connected to VBAT
.
Local failure detection is active and failures are indicated at the NERR output pin (see Chapter 8).
The TLT9252VLC enters Normal-operating Mode by setting the mode selection pins EN and NSTB to logical
“high” (see Figure 4 and Table 5). Normal-operating Mode can be entered if VBAT or VCC is in the functional
range and the reference voltage VIO is in the functional range.
Possible mode changes are described in Figure 5.
EN -> 1
NSTB = 1
EN -> 0
NSTB = 1
Receive-only
Mode
Receive-only
Mode
EN -> 1
Stand-by Mode
NSTB -> 1
Normal-operating
Mode
EN -> 0
NSTB -> 0
EN = 1
Stand-by Mode
NSTB = 1
INH = „ON“
Go-to-Sleep
Command
EN = 1
NSTB -> 1
Go-to-Sleep
Command
EN = 1
NSTB -> 1
EN = 1
NSTB -> 0
Sleep Mode
Figure 5
Mode changes in Normal-operating Mode
Datasheet
14
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Modes of operation
6.2
Receive-only Mode
In Receive-only Mode the transmitter is disabled and the receiver is enabled. The TLT9252VLC can receive data
from the HS CAN bus, but cannot transmit data to the HS CAN bus.
•
•
•
•
•
•
•
•
•
•
The transmitter is disabled and the data available on the TxD input is blocked.
The receiver is active and converts the signals from the bus to a serial data stream on the RxD output pin.
The bus biasing is connected to VCC/2.
The TxD time-out function is disabled.
The RxD Recessive Clamping detection is disabled.
The overtemperature protection is disabled.
The undervoltage detection on VBAT, VCC and VIO is enabled (see Chapter 7.2).
The INH output pin is connected to VBAT
.
The Local Wake-Up pin is disabled.
The Power-up flag is signalled at the pin NERR when coming from Standby, Sleep or Go-to Sleep Command
mode.
•
The VCC undervoltage detection is active and an undervoltage is indicated at the NERR output pin when
coming from Normal-operating Mode (see Chapter 8).
Conditions for Entering Receive-only Mode:
The TLT9252VLC enters Receive-only Mode by setting the mode selection pin EN to logical “low” and the NSTB
to logical “high” (see Figure 4 and Table 5). Receive-only Mode can only be entered if VBAT or VCC is in the
functional range and the reference voltage VIO is in the functional range.
Possible mode changes are described in Figure 6.
EN -> 0
NSTB = 1
EN -> 1
NSTB = 1
Normal-
operating Mode
Normal-
operating Mode
EN = 0
NSTB -> 1
Stand-by Mode
Receive-only
Mode
EN = 0
NSTB -> 0
Stand-by Mode
EN = 0
NSTB = 1
INH = „ON“
Go-to-Sleep
Command
EN -> 0
NSTB -> 1
Go-to-Sleep
Command
EN = 0
NSTB -> 1
EN -> 1
NSTB -> 0
Sleep Mode
Figure 6
Mode changes in Receive-only Mode
Datasheet
15
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Modes of operation
6.3
Stand-by Mode
Stand-by Mode is a low power mode of the TLT9252VLC and the transmitter and the receiver are disabled. In
Stand-by Mode the transceiver can neither send data to the HS CAN bus nor receive data from the HS CAN bus:
•
•
The transmitter is disabled and the data available on the TxD input is blocked.
The low power receiver is enabled and monitors the HS CAN bus for a valid Wake-Up Pattern. The RxD
output pin and NERR display a wake-up event (Chapter 6.9). After Power On Reset RxD and NERR output
pins are logical “high”. The default value of the RxD and NERR output pins are logical “high” if no wake-up
event is pending.
•
•
The Local Wake-Up (LWU) pin is active.
After Power On Reset the bus biasing connected to GND. The conditions for the bus biasing are defined in
Chapter 6.7.
•
•
•
•
•
•
TxD Dominant time-out function is disabled.
RxD Recessive Clamping detection is disabled.
The overtemperature protection is disabled.
The undervoltage detection on VBAT, VCC and VIO is enabled (see Chapter 7.2).
The INH output pin is connected to VBAT
.
Local failure detection on NERR pin is disabled.
Conditions for entering the Stand-by Mode:
•
•
•
•
After Power On Reset if VBAT or VCC is in the functional range for at least tPONthe TLT9252VLC will enter Stand-
by Mode. Mode changes by host command are only possible if VIO is in the functional range.
Stand-by Mode will be entered if a wake-up (WUP or LWU) has been detected in Sleep Mode or Go-to-Sleep
command.
The device is in Go-to-Sleep command and the EN pin goes logical “low” before the time t < tSLEEP has
expired.
The device is in Normal-operating Mode or Receive-only Mode and the input pins EN and NSTB are set to
logical “low”.
Possible mode changes are described in Figure 7.
EN -> 0
NSTB -> 0
EN -> 1
NSTB -> 1
Normal-
operating Mode
Normal-
operating Mode
Receive-only
EN = 0
NSTB -> 0
Mode
Stand-by Mode
VBAT > VBAT_UV for at least tPON
OR
VCC > VCC_UV for at least tPON
Receive-only
Mode
EN = 0
NSTB = 0
INH = „ON“
EN = 0
NSTB -> 1
Power On
Reset
EN -> 0
t < tSLEEP
NSTB = 0
Go-to-Sleep
Command
Go-to-Sleep
Command
EN -> 1
NSTB = 0
WUP OR LWU
detected
Sleep Mode
Figure 7
Mode changes in Stand-by Mode
Datasheet
16
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Modes of operation
6.4
Go-to-Sleep command
Go-to-Sleep command is a transition mode allowing external circuitry like a microcontroller to prepare the
ECU to go to Sleep Mode. The TLT9252VLC stays for the maximum time t = tSLEEP in Go-to-Sleep command. After
exceeding the time tSLEEP the device changes to Sleep Mode if no wake-up is pending AND the POR flag has
been reset. If a wake-up is pending OR the POR flag is set the device remains in Go-to-Sleep command and INH
is connected to VBAT. A wake-up is indicated on the RxD and NERR output pins. A mode change to Sleep Mode
via Host Command is only possible via the Go-to-Sleep command. The following conditions are valid for the
Go-to-Sleep command:
•
•
The transmitter is disabled and the data available on the TxD input is blocked.
The low power receiver is enabled and monitors the HS CAN bus for a valid Wake-Up Pattern. The RxD
output pin and NERR indicate a wake-up event (Chapter 6.9). The default value of the RxD and NERR
output pin are logical “high” if no wake-up event is pending.
•
•
•
•
•
•
•
The Local Wake-Up pin is active.
The bus biasing is GND if tSilence is expired. The conditions for the bus biasing are defined in Chapter 6.7.
The TxD time-out function is disabled.
The RxD Recessive Clamping detection is disabled.
The overtemperature protection is disabled.
The undervoltage detection on VBAT, VCC and VIO are enabled (see Chapter 7.2).
The INH output pin is connected to VBAT if the timer tSLEEP is not expired OR a wake-up is pending OR the
POR is set. If tSLEEP is expired and no wake-up is pending and the POR Flag is reset, the INH output pin is high
impedance.
Conditions for entering the Go-to-Sleep command:
Go-to-Sleep command is entered from Normal-operating Mode, Receive-only Mode and Stand-by Mode by
setting the NSTB input pin to logical “low” AND EN input pin to logical “high”.
EN = 1
NSTB -> 0
EN = 1
NSTB -> 1
Normal-
operating Mode
Normal-
operating Mode
Receive-only
Mode
EN -> 0
NSTB -> 1
Go-to Sleep
Command
EN = 1
Receive-only
Mode
EN -> 1
NSTB -> 0
NSTB = 0
EN -> 0
t < tSLEEP
NSTB = 0
INH = „ON“
Stand-by Mode
Sleep Mode
t > tSLEEP
NSTB = 0
No Wake-up pending
POR Flag reset
EN -> 1
NSTB = 0
Stand-by Mode
Figure 8
Mode changes in Go-to-Sleep command
Datasheet
17
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Modes of operation
6.5
Sleep Mode
Sleep Mode is a low power mode of the TLT9252VLC. In Sleep Mode the current consumption is reduced to a
minimum while the device is still able to detect a Wake-Up Pattern (WUP) on the HS CAN Bus OR a Local Wake-
Up event on the WAKE pin. The following conditions are valid for the Sleep Mode:
•
•
•
The transmitter is disabled and the data available on the TxD input is blocked.
The low power receiver is enabled and monitors the HS CAN bus for a valid Wake-Up Pattern.
The default value of the RxD and NERR output pin are logical “high” if no wake-up event is pending AND VIO
is in the functional range (see Chapter 8).
•
•
•
•
•
•
•
•
•
The Local Wake-Up pin is active.
The bus biasing is connected to GND. The conditions for the bus biasing are defined in Chapter 6.7.
The TxD time-out function is disabled.
The RxD Recessive Clamping detection is disabled.
The overtemperature protection is disabled.
The undervoltage detection on VBAT is disabled.
The undervoltage detection on VCC is disabled.
The undervoltage detection on VIO is enabled (see Chapter 7.2.3).
The INH output pin is High-Z.
Conditions for entering the Sleep Mode:
•
•
•
The Sleep Mode will be entered if VIO < VIO_UV AND tVIO_UV_T AND tSilence has been expired in Normal-operating
Mode, Receive-only Mode, Stand-by Mode and Go-to-Sleep command.
The Sleep Mode will be entered if VCC < VCC_UV AND tVCC_UV_T AND tSilence has been expired in Normal-
operating Mode, Receive-only Mode, Stand-by Mode and Go-to-Sleep command.
The Sleep Mode can be entered through Go-to-Sleep command if NSTB is set to logical “low” AND tSLEEP is
expired AND no wake-up is pending AND the POR flag is reset.
VCC undervoltage
AND
tVCC_UV_T expired
AND tSilence
EN = 1
Normal-
operating Mode
NSTB -> 1
Any Mode
V
IO > VIO_UV
Sleep Mode
EN = X
VIO undervoltage
AND
tVIO_UV_T expired
AND tSilence
EN = 0
Receive-only
Mode
Any Mode
NSTB -> 1
NSTB = 0
V
IO > VIO_UV
INH = „OFF“
t > tSLEEP
Stand-by
Mode
Go-to-Sleep
Command
NSTB = 0
WUP OR LWU
detected
No Wake-up pending
POR Flag reset
Figure 9
Mode changes in Sleep Mode
6.5.1
Mode change to Sleep Mode or Stand-by Mode
If the logical signal on the EN pin goes “low” before the transition time t < tSLEEP has been reached, the
TLT9252VLC enters Stand-by Mode and the INH pin remains connected to VBAT. In the case the logical signal on
Datasheet
18
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Modes of operation
the EN pin goes “low” after the transition time t > tSLEEP, the TLT9252VLC enters Sleep Mode with the expiration
of tSLEEP. The signal on the HS CAN bus has no impact to the mode change. The mode of operation can be
changed regardless if the CAN bus is dominant or recessive.
NSTB
tSLEEP
EN
t < tSLEEP
tMode
INH
Normal-
operating Mode
Mode
NSTB
Go-To-Sleep command
Stand-by Mode
tSLEEP
EN
tMode
INH
Normal-
operating Mode
Mode
Go-To-Sleep command
Sleep Mode
Assuming VIO and VCC in functional range AND no wake-up is pending AND POR flag is reset
Figure 10 Mode change to Stand-by Mode or Sleep Mode
Datasheet
19
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Modes of operation
6.5.2
Mode Change via EN and NSTB pin
Besides a mode change from Sleep Mode to Stand-by Mode issued by a wake-up event, the mode of operation
can be changed by changing the signals on the EN and NSTB input pins. Therefore the reference voltage VIO
has to be in the functional range. According to the mode diagram (see Figure 4) the mode of operation can be
changed directly from Sleep Mode to Receive-only Mode or Normal-operating Mode. In Sleep Mode once a
rising edge on the pin NSTB is detected (VIO > VIO_UV) either Normal-operating Mode or Receive-only Mode will
be entered, depending on the signal on the EN pin. The device will stay in Sleep Mode regardless of the signal
on the EN input pin if NSTB is statically logical “low”. A mode change to from Sleep Mode to Stand-by Mode is
only possible via a wake-up event.
NSTB
tSLP
V
V
Log_H
V
Log_L
EN
Log_H
VLog_L
INH
tWU_INH
0,7 VBAT
tMode
tMode
Normal-
operating Mode
Go-To-Sleep
command
Mode
Sleep Mode
Sleep Mode
Assuming VIO and VCC in functional range AND no wake-up is pending AND POR flag is reset
Figure 11 Mode change via EN and NSTB in Sleep Mode
Datasheet
20
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Modes of operation
6.6
Power On Reset
In Power On Reset all functions of the TLT9252VLC are disabled and the device is switched off.
•
•
•
•
•
•
•
•
•
•
The transmitter and receiver are disabled.
The bus biasing is connected to High impedance.
The RxD Recessive Clamping detection is disabled
The TxD time-out function is disabled.
The overtemperature protection is disabled.
The undervoltage detection on VBAT, VCC and VIO is disabled.
The logical input pins are blocked.
RxD and NERR output pins are high impedance.
Local Wake-Up is disabled.
The INH output pin is connected to VBAT if VBAT > VBAT_POD OR VCC > VCC_UV
.
Conditions for entering the Power On Reset:
BAT is below the VBAT_POD AND VCC is below VCC_UV threshold.
Conditions for leaving the Power On Reset:
Once the power supply voltage VBAT OR VCC is within the functional range the transceiver enters Stand-by
Mode within tPON
•
V
•
.
The internal Power On Reset flag will be set. After Power On Reset the TLT9252VLC enters Stand-by Mode.
Power-up and power-down transition is described in Figure 12:
Power on Reset
Stand-by Mode
EN = 0
V
BAT > VBAT_UV
V
BAT < VBAT_POD
INH = „OFF“
OR
AND
Any Mode
NSTB = 0
V
CC > VCC_UV
V
CC < VCC_UV
For VBAT > VBAT_POD
INH = „ON“
INH = „ON“
Figure 12 Power-down and power-up behavior
Datasheet
21
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Modes of operation
6.7
Autonomous bus voltage biasing
The autonomous bus voltage biasing was introduced for improving complete network EMC performance and
increasing the reliability of communication performance in networks using CAN networks. The autonomous
bus voltage biasing is enabled in all modes of Operation. The biasing unit will work independently from other
transceiver functions and depends only on the status of detected network activity (tSilence). Figure 13
describes the behavior for active and for low power modes in Detail as well as the status after a power-on reset
event.
Ini
Bus Bias
off
Bus recessive > tFilter
After Power On Reset
Wait
Bus dominant > tFilter
1
Bus Bias
off
tWake expired
Bus recessive > tFilter
2
Bus Bias
off
tWake expired
Bus dominant
1)
> tFilter
tSilence expired
AND
Tranceiver in:
3
Bus Bias
on
Tranceiver in:
- Sleep Mode
- Stand-by Mode
- Go-to-Sleep
Command
- Normal Operation Mode
- Receive Only Mode
Bus recessive
Bus dominant
1)
1)
> tFilter
> tFilter
tSilence expired
AND
Tranceiver in:
- Sleep Mode
- Stand-by Mode
- Go-to-Sleep
Command
4
Bus Bias
on
1) Restart of tSilence
Figure 13 Autonomous Bus Voltage Biasing
In low power modes, in case there has been no activity on the bus for longer than tSilence, the bus pins are
biased towards GND via the internal resistors. With the detection of a valid Wake-Up Pattern (WUP), the
internal biasing gets enabled and the biasing is stabilized via internal resistors towards 2.5 V . This activation
is being performed within the time t > tWU_Bias after the WUP detection.
Datasheet
22
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Modes of operation
6.8
Wake-Up functions
There are several possibilities for a mode change from Sleep Mode to another operation mode:
•
•
Wake-Up Pattern (WUP)
Local Wake-Up (LWU)
In typical applications the power supplies VCC and VIO are turned off in Sleep Mode. This means a mode change
can only be caused by an external event as WUP OR LWU. The detection of a valid WUP or LWU triggers a mode
change from Sleep Mode to Stand-by Mode.
6.8.1
Wake-up Pattern (WUP)
Within the maximum wake-up time tWAKE, the Wake-Up Pattern consists of a dominant signal with the pulse
width t > tFilter, followed by a recessive signal with the pulse width t > tFilter and another dominant signal with
the pulse width t > tFilter (see Figure 14).
t < tWake
VDiff
VDiff_LP_D
t > tFilter
t > tFilter
tWU
VDiff_LP_R
t > tFilter
t
VIO
RxD
30% of VIO
30% of VIO
t
t
VIO
NERR
Stand-by Mode
wake-up
detected
Figure 14 Wake-Up Pattern (WUP)
The diagnostic output NERR and RxD will indicate a valid Wake-Up Pattern on the HS CAN bus.
A Wake-Up Pattern is not valid under the following conditions:
•
A mode change to Normal-operating Mode OR Receive-only Mode is performed during the Wake-Up
Pattern.
•
•
The maximum wake-up time tWAKE expires before a valid WUP has been detected.
The transceiver is powered down (VBAT < VBAT_POD AND VCC < VCC_POD).
In Stand-by Mode the RxD output pin and the NERR diagnostic pin display the WUP detection (Details see
Chapter 8).
Datasheet
23
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Modes of operation
6.8.2
Local Wake-Up (LWU)
The WAKE input pin works bi-sensitive, meaning it is able to detect a rising and falling edge as a wake-up event.
Designed to withstand up to 40 V the WAKE pin can be directly connected to VBAT. The Local Wake-Up detection
works for VBAT > VBAT_UV. The Local Wake-Up timings and behavior is described in Figure 15.
t < tWAKE_filter
t > tWAKE_filter
V
WAKE
VWAKE_TH
LWU detected
t > tWAKE_filter
t < tWAKE_filter
V
WAKE
VWAKE_TH
LWU detected
Figure 15 Local Wake-Up
The filter time tWAKE_filter is implemented to protect the TLT9252VLC against unintended Wake-Ups, caused by
spikes on the WAKE pin. The wake-up thresholds VWAKE_TH depend on the level of the VBAT power supply. In
Stand-by Mode the RxD output pin and the NERR diagnostic pin display the wake-up event (Details see
Chapter 8). Once a LWU has been recognized in Sleep Mode the device goes to Stand-by mode and the INH
output pin is connected to VBAT
.
Datasheet
24
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Modes of operation
6.9
Wake-up: RxD and NERR behavior
The RxD and NERR output pin will signal a wake up event to the microcontroller (see Chapter 8). In Sleep
Mode, Stand-by Mode and Go-to-Sleep command by default values of RxD and NERR are logical “high” when
no wake-up event has been detected. If a valid wake up pattern (WUP) is detected, RxD and NERR will be
logical “low”. If a Local Wake-Up (LWU) is detected the RXD will be logical “low” and NERR will be logical
“high”.If both, LWU and WUP have been detected, then the WUP detection has higher priority and RxD and
NERR pin are set to logical “low”, regardless if a LWU event is pending.
WUP detected
Mode
RxD
Sleep Mode
Stand-by Mode
tMode
RxD remains logical „low“
NERR remains logical „low“
t
NERR
Assuming VCC OR VBAT is in the functional range
t
Figure 16 RxD and NERR: WUP detection (VIO not supplied)
WUP detected
Mode
RxD
Sleep Mode
Stand-by Mode
tMode
30% VIO
RxD remains logical „low“
NERR remains logical „low“
t
t
NERR
30% VIO
Assuming VCC OR VBAT is in the functional range
Figure 17 RxD and NERR: WUP detection (permanently supplied VIO)
Datasheet
25
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Modes of operation
LWU detected
Mode
RxD
Sleep Mode
Stand-by Mode
tMode
RxD remains logical „low“
t
t
INH
VIO
0.7 x VBAT
VIO_UV
t
t
NERR
NERR goes logical „high“
Assuming VCC OR VBAT is in the functional range
NERR goes logical „high“ when VIO > VIO_UV
Figure 18 RxD and NERR: LWU detection (VIO not supplied)
LWU detected
Mode
RxD
Sleep Mode
Stand-by Mode
tMode
30% VIO
RxD goes logical „low“
t
t
NERR
NERR remains logical „high“
Assuming VCC OR VBAT is in the functional range
Figure 19 RxD and NERR: LWU detection (permanently supplied VIO)
Datasheet
26
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Fail safe functions
7
Fail safe functions
7.1
Short Circuit Protection
The CANH and CANL bus pins are proven to withstand a short circuit fault against GND and against the supply
voltages. A current limiting circuit protects the transceiver against damages.
7.2
Undervoltage detection
The TLT9252VLC has three independent undervoltage detections: VBAT, VCC and VIO. Undervoltage events may
have impact on the functionality of the device and also may change the mode of operation (see Chapter 6).
7.2.1
Undervoltage and power-down detection on VBAT
The power-down is detected if the power supply VBAT is below VBAT_POD for more than the glitch filter time
VBAT_filter. This glitch filter is implemented in order to prevent an undervoltage detection due to short voltage
t
transients on VBAT. In case of an power-down detection on VBAT the TLT9252VLC is switched off (Power On
Reset). If VBAT recovers (VBAT > VBAT_UV) the TLT9252VLC enters by default Stand-by Mode. If VBAT > VBAT_POD the
INH output pin is connected to VBAT. Figure 20 shows the undervoltage scenario.
VBAT
VBAT_UV
VBAT_POD
tVBAT_filter
tPON
tVBAT_filter
t
Mode
Any Mode
Power On Reset
Stand-by Mode 1)
1) Assuming EN = NSTB = „0"
VCC = 0V
Figure 20
VBAT power-down undervoltage detection (VCC not available)
If an undervoltage is detected VBAT < VBAT_UV for t > tVBAT_filter the Local Wake-Up function is disabled (Figure 21).
In Stand-by Mode, Go-to-Sleep Mode and Sleep Mode
VBAT
VBAT_UV
VBAT_POD
tVBAT_filter tVBAT_Recovery
tVBAT_filter
tVBAT_filter
t
Local
Wake
Evaluation
Enabled
Disabled
Enabled
Figure 21
VBAT undervoltage detection
Datasheet
27
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Fail safe functions
7.2.2
Undervoltage detection on VCC
An undervoltage on VCC is detected if the VCC supply is below VCC_UV for more than the glitch filter time tVCC_filter
.
This glitch filter is implemented in order to prevent an undervoltage detection due to short voltage transients
on VCC. The following actions will be performed if a undervoltage has been detected:
•
•
The NERR pin switches from logical “high” to “low” (In Normal-operating Mode and Receive-only Mode).
The transmitter is disabled (Normal-operating Mode).
The transmitter will be re-enabled if the VCC > VCC_UV for more than the glitch filter time t > tVCC_filter + tVCC_RECOVERY
in Normal-operating Mode.
Normal-operating Mode
VIO and VBAT are within the functional range
VCC
VCC_UV
tVCC_RECOVERY
tVCC_filter
tVCC_filter
tVCC_filter
t
Transmitter:
NERR
enabled
disabled
„0"
enabled
„1"
„1"
Figure 22 VCC short-term undervoltage detection (VBAT in functional range)
VIO and VBAT are within the functional range
VCC
VCC_UV
tVCC_filter
tVCC_filter
tVCC_UV_T
t
enabled
„1"
disabled
Transmitter
NERR
„0"
„1"
Sleep Mode1)
Mode
Normal-operating Mode
1) Assuming no bus communication monitored and tSilence has expired
Figure 23
VCC long-term undervoltage detection
Datasheet
28
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Fail safe functions
The VCC long-term undervoltage timer tVCC_UV_T is armed once VBAT is in the functional range. If the VCC voltage
drops below VCC_UV for longer than t > tVCC_UV_T AND no communication is monitored on the HS CAN Bus (tSilence
is expired), this will trigger a mode change from any mode to Sleep Mode. If during the undervoltage event,
communication is monitored and tSilence does not expire, the device remains in the current mode of operation.
7.2.3
Undervoltage detection on VIO
An undervoltage on VIO is detected if the power supply VIO is below VIO_UV. As long as VIO < VIO_UV any signal on
the logic input pins EN, NSTB and TxD will be blocked (see Figure 24). The default value of NERR and RxD if VIO
> VIO_UV is logical “high”.
VBAT OR VCC is within the functional range
VIO
VIO_UV
tVIO_filter
tVIO_filter
tVIO_filter
t
Enabled
Enabled
Blocked
Figure 24
VIO short-term undervoltage detection
The VIO long-term undervoltage timer tVIO_UV_T is armed once VBAT is in the functional range. If the VIO voltage
drops below VIO_UV for longer than t > tVIO_UV_T AND no communication is monitored on the HS CAN bus (tSilence
is expired), this will trigger a mode change to Sleep Mode (see Figure 25). If during the undervoltage event,
communication is monitored and tSilence does not expire, the device does not enter Sleep Mode.
Normal-operating Mode: VBAT OR VCC is within the functional range
VIO
VIO_UV
tVIO_filter
tVIO_UV_T
t
Logic
Input pin
enabled
blocked
Mode
Any Mode
Sleep Mode 1)
1) Assuming no bus communication monitored and tSilence expired
Figure 25
VIO long-term undervoltage detection
Datasheet
29
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Fail safe functions
In Low-power Mode (Stand-by Mode, Sleep Mode, Go-to-Sleep Command) bus communication requires at
valid WUP detection (see Chapter 6.8.1). In Normal-operating Mode or Receive-only mode a single dominant
period of t > tfilter is reflecting bus communication.
7.3
Dual Power Supply Solution
The integrated Dual Power Supply Concept of TLT9252VLC offers the possibility to supply the device with VBAT
OR/AND VCC pin. During VBAT battery supply cranking, the TLT9252VLC remains functional if VCC stays in the
functional range.
7.4
Unconnected logic pins
The integrated pull-up and pull-down resistors at the digital input pins force the TLT9252VLC into fail safe
behavior if the input pins are not connected and floating (see Table 6).
Table 6
Input signal
TxD
Logical inputs when unconnected
Default state
“High”
Comment
“Pull-up” current source to VIO
“Pull-down” current source to GND
“Pull-down” current source to GND
EN
“Low”
NSTB
“Low”
7.5
TxD time-out function
The TxD time-out feature protects the CAN bus against permanent blocking in case the logical signal on the
TxD pin is continuously “low”. A continuous “low” signal on the TxD pin might have its root cause in a locked-
up microcontroller or in a short circuit on the printed circuit board, for example. In Normal-operating Mode, a
logical “low” signal on the TxD pin for the time t > tTXD_TO enables the TxD time-out feature and the TLT9252VLC
disables the transmitter (see Figure 26) and sets the NERR output pin to logical “low”. The receiver is still
active and the data on the bus continues to be monitored by the RxD output pin.
Normal-operating Mode
TxD
t
t > tTXD_TO
TxD time–out released
TxD time-out
CANH
CANL
t
t
RxD
NERR
Figure 26 TxD time-out function
Datasheet
30
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Fail safe functions
Figure 26 illustrates how the transmitter is deactivated and re-activated.To release the transmitter after a TxD
time-out event, the TLT9252VLC requires a signal change on the TxD input pin from logical “low” to logical
“high”.
7.6
Overtemperature protection
The TLT9252VLC has an integrated overtemperature detection to protect the TLT9252VLC against thermal
overstress of the transmitter. The overtemperature protection is active in Normal-operating Mode and is
disabled in all other Modes. The temperature sensor provides one temperature threshold: TJSD.When the
temperature exceeds the threshold TJSD the transmitter is disabled. This overtemperature event will be
signaled as logical “low” on the NERR output pin in Normal-operating Mode. After the device has cooled down,
the transmitter is re-enabled and NERR returns to logical “high”. A hysteresis is implemented within the
temperature sensor.
TJSD (shut down temperature)
cool down
TJ
ΔT
switch-on transmitter
t
t
CANH
CANL
TxD
RxD
t
t
Figure 27 Overtemperature protection
7.7
RxD Recessive Clamping detection
The RxD Recessive Clamping detection is only active in Normal-operating Mode. In Normal-operating mode a
permanent logical “high” signal on the RxD pin indicates the external microcontroller, there is no
communication on the HS CAN bus. The microcontroller then can transmit a message to the CAN bus, only if
the bus is in recessive state. In case the logical “high” signal on the RxD pin is caused by a a failure, like a short
circuit RxD to VIO, the RxD signal does not reflect the signal on the HS CAN bus. In this case the microcontroller
is able to place a message on the CAN bus at any time and corrupts the CAN messages on the bus. If the
TLT9252VLC detects a logical “high” signal on the RxD pin while the bus is dominant for t > tRRC the RxD
Recessive Clamping flag is set along with disabling the transmitter in Normal-operating Mode. In order to
avoid any data collision on the CAN bus, the transmitter is disabled in Normal-operating Mode as long as the
RxD-Recessive Clamping is present. In Normal-operating Mode the TLT9252VLC indicates the RxD clamping by
a logical “low” signal on the NERR pin. On detection the transmitter is disabled immediately, so that the
corrupted, non-synchronized node is prevented from disturbing the remaining bus traffic. The corrupted node
Datasheet
31
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Fail safe functions
is then excluded from communication. The TLT9252VLC releases the failure flag and the output stage if the
RxD clamping failure disappears. Whenever the pin RXD becomes dominant while the bus signal is dominant
for t > tRRC the RxD Recessive Clamping flag is reset along with enabling the transmitter again in Normal-
operating Mode (see Figure 28).
Normal-operating Mode
VIO and VBAT are within the functional range
RxD
t
tRRC
tRRC
Vdiff
0.9V
tRRC_NERR
tRRC_NERR
„1"
„0"
„1"
RxD Recessive
Clamping detected
RxD Recessive
Clamping reset
Figure 28 RxD Recessive Clamping in Normal-operating Mode
7.8
Delay time for mode change
The HS CAN transceiver TLT9252VLC changes the modes of operation within the time window tMode. During
mode changes from low-power mode to Normal-operating Mode or low-power mode to Receive-only Mode,
the RxD output pin is set to logical “high” and does not reflect the status on the CANH and CANL input pins.
Datasheet
32
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Diagnosis-flags at NERR and RxD
8
Diagnosis-flags at NERR and RxD
Table 7
NSTB
1
Diagnosis-flags at NERR and RxD
EN
INH
Mode
Event
NERR1) RxD1)
1
VBAT
Normal-operating No failure detected
1
0
“Low”: bus
Dominant,
“High”: bus
recessive
•
•
•
•
VCC undervoltage
Overtemperature
TxD time-out
RxD recessive clamping
1
0
VBAT
Receive-only
Stand-by
No failure detected
1
0
“Low”: bus
Dominant,
“High”: bus
recessive
•
•
Power-Up-Flag2) OR
CC undervoltage
V
0
0
0
0
VBAT
WUP detected
0
1
1
1
0
0
0
1
1
0
LWU detected
No Wake-up event detected
No Wake-up event detected
No Wake-up event detected3)
High-Z Sleep
1) Only valid if VIO is in the functional range.
2) Power-Up-Flag only available if VBAT or VCC is in the functional range for at least tPON. Power-Up-Flag will be cleared
once entering Normal-operating Mode.
3) Valid if VIO = 0 V.
Datasheet
33
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Diagnosis-flags at NERR and RxD
Whenever the pin RXD becomes dominant while The HS CAN Bus is
Dominant for
t > tRRC, the RXD Recessive Clamping Flag is reset.
Whenever the pin TxD Is dominant for t > tTxD_TO the TxD Dominant
Flag is set. If VCC < VCC_UV for t > tVCC_filter the VCC undervoltage flag
is set. If VCC recovers for t > tVCC_filter + tVCC_Recovery in Normal-
operating Mode the NERR goes high and the VCC undervoltage flag is
reset. If an overtemperature is detected the overtemperature flag is set.
If no overtemperature is detected the Overtemperature Flag is reset. In
Normal-operating mode And Receive-only mode failure recovery is
reflected on the pin NERR going HIGH again.
Normal-operating Mode:
(NERR = 0)
Transmitter blocked:
ꢀTxD Dom. Timeout
ꢀOvertemperature
ꢀRxD Recessive Clamping
ꢀVCC undervoltage
Local Failure Flags are: VCC Undervoltage, RxD Recessive Clamping, TxD
Dominant Timeout, Overtemperature
NSTB = 1
EN = 0
NSTB = 1
EN = 1
Normal-operating Mode
Receive-only Mode
Local Failure Flags
cleared
NSTB = 1
EN = 1
The POR Flag is signaled at the
pin NERR in Receive-only Mode
mode when coming from
Standby, Sleep or Go-to Sleep
Command mode. It is set if The
supply voltages VBAT OR VCC
recover to functional range after
NSTB = 1
EN = 1
Receive-only Mode:
(NERR = 0)
Power-up Flag
VBAT < VBAT_POD
Receive-only Mode:
VCC undervoltage Flag is set in Receive-only
Mode when VCC VCC_UV for
tVCC_filter and coming from Normal-
operating Mode. If VCC recovers for
tVCC_filter + tVCC_Recovery in Receive-only
Mode the NERR goes high and the
undervoltage flag is reset.
(NERR = 0)
<
t >
Transmitter blocked:
ꢀVCC undervoltage
a
Power On Reset Event. The
t
>
POR Flag is reset once the
Normal-operating
entered.
mode
is
NSTB = 0
EN = 0
NSTB = 1
EN = 0
Sleep Mode
NSTB = 0
EN = 0
NSTB = 0
EN = 0
As long as the POR flag OR WUP
Flag OR LWU Flag is set a mode
change via Host Command to
Sleep Mode is not possible.
Go-To-Sleep
Command Mode
Stand-by Mode
Sleep Mode/Stand-by
Mode:
Wake-up Source Flag
NERR = 0: WUP
NERR = 1: LWU
Default flag settings:
Power-Up Flag „SET“
Bus Wake-up Flag „RESET“
Local Wake-up Flag „RESET“
VCC Undervoltage Flag „RESET“
RxD Recessive Clamping „RESET“
Overtemperature Flag „RESET“
TxD Dominant Flag „RESET“
V
BAT > VBAT_UV
Figure 29 Diagnosis flowchart
Datasheet
34
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Electrical characteristics
9
Electrical characteristics
The electrical characteristics are specified in the defined temperature range. Beyond this temperature range
and below the absolute maximum rating the TLT9252VLC operates as described in the circuit description,
parameter deviation is possible.
9.1
General timing parameter
Table 8
General timing parameter
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; 5.5 V < VBAT < 40 V; RL = 60 Ω; -40°C < TJ < 150°C;
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Power-up delay time
tPON
–
–
–
–
500 µs
See Figure 20
P_9.1.1
P_9.1.2
P_9.1.3
P_9.1.4
Delay time for mode change tMode
CAN bus silence time-out tSilence
20
µs
s
–
0.6 0.9 1.2
–
Min. hold time in Go-to-Sleep tSleep
10
25
50
µs
See Figure 10
command
RxD Recessive Clamping
detection time
tRRC
–
1.2 1.8
µs
µs
See Figure 28
See Figure 28
P_9.1.5
P_9.1.6
RxD Recessive Clamping
indication delay
tRRC_NERR
-
-
1
9.2
Power supply interface
9.2.1
Current consumptions
Table 9
Current consumptions
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; 5.5 V < VBAT < 40 V; RL = 60 Ω; -40°C < TJ < 150°C;
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit Note or
Test Condition
Number
Min.
Max.
Normal-operating Mode
V
BAT supply current
IBAT_NM
ICC_NM_D
ICC_NM_R
IIO_NM
–
–
–
–
0.8
35
1.2
48
mA
mA
mA
µA
INH = not
connected
P_9.2.1
P_9.2.2
P_9.2.3
P_9.2.4
VCC supply current
dominant bus signal
–
VCC supply current
recessive bus signal
1.0
2.0
4.0
8.0
–
VIO supply current
steady state,
TxD= VIO
Receive-only Mode
Datasheet
35
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Electrical characteristics
Table 9
Current consumptions (cont’d)
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; 5.5 V < VBAT < 40 V; RL = 60 Ω; -40°C < TJ < 150°C;
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Typ.
0.8
Unit Note or
Test Condition
Number
Min.
Max.
VBAT supply current
VCC supply current
VIO supply current
IBAT_ROM
ICC_ROM
IIO_ROM
–
1.2
mA
µA
µA
INH = not
connected
P_9.2.5
P_9.2.6
P_9.2.7
–
–
33
50
TxD= VIO,
V
BAT > 12 V
2.0
8.0
steady state,
TxD= VIO
Stand-by Mode
VBAT supply current
IBAT_STB
–
22
50
µA
INH = n.c.,
P_9.2.8
VBAT < 18 V,
t
Silence expired,
WAKE = GND
VCC supply current
ICC_STB
IIO_STB
–
–
2.0
2.0
8.0
5.0
µA
µA
TxD= VIO,
P_9.2.11
P_9.2.12
V
BAT > 12 V
VIO supply current
Sleep Mode
TxD= VIO
VBAT supply current
IBAT_SLP
–
12.0
25.0
µA
VCC = VIO = 0 V,
VBAT < 18 V,
P_9.2.13
bus biasing = GND,
INH = n.c.
VBAT supply current TJ < 85°C IBAT_SLP_85
–
–
18.0
µA
VCC = VIO = 0 V,
INH = n.c.,
P_9.2.14
bus biasing = GND,
V
BAT < 18 V,
TJ < 85°C 1);
TxD= VIO,
V
CC supply current
ICC_SLP
IIO_SLP
–
–
0.5
2.0
5.0
5.0
µA
µA
P_9.2.16
P_9.2.17
V
BAT > 12 V
VIO supply current
TxD= VIO;
1) Not subject to production test, specified by design
9.2.2
Undervoltage detection
Table 10 Undervoltage detection
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; 5.5 V < VBAT < 40 V; RL = 60 Ω; -40°C < TJ < 150°C;
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit Note or
Test Condition
Number
Min.
Max.
Undervoltage detection VBAT
Undervoltage detection
threshold
VBAT_UV
4.8
5.1
5.5
V
–
P_9.2.18
Datasheet
36
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Electrical characteristics
Table 10 Undervoltage detection (cont’d)
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; 5.5 V < VBAT < 40 V; RL = 60 Ω; -40°C < TJ < 150°C;
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Typ.
4.0
Unit Note or
Test Condition
Number
Min.
Max.
Power-down threshold
VBAT_POD
tVBAT_filter
3.0
4.5
V
Falling edge,
CC = 0V
P_9.2.20
P_9.2.22
V
VBAT undervoltage glitch
–
–
50
µs
See Figure 20
filter
Undervoltage detection VCC
Undervoltage detection
threshold
VCC_UV
4.0
–
4.25
4.5
V
See Figure 22
P_9.2.24
Undervoltage glitch filter
tVCC_filter
–
10
µs
µs
ms
See Figure 22
See Figure 22
See Figure 23
P_9.2.27
P_9.2.28
P_9.2.29
Undervoltage recovery time tVCC_RECOVERY 15
25
380
35
Response time VCC for long- tVCC_UV_T
term undervoltage
300
450
detection
Undervoltage detection VIO
Undervoltage detection
threshold
VIO_UV
2.4
2.65
3.0
V
See Figure 24
P_9.2.30
Undervoltage glitch filter
tVIO_filter
–
10
µs
See Figure 24
See Figure 25
P_9.2.32
P_9.2.33
Response time VIO for long- tVIO_UV_T
term undervoltage
300
380
450
ms
detection
9.2.3
INH output
Table 11 INH output
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; 5.5 V < VBAT < 40 V; RL = 60 Ω; -40°C < TJ < 150°C;
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit Note or
Test Condition
Number
Min.
Max.
Analog output INH
Output voltage INH enabled VINH
VBAT -0.8 –
–
V
IINH = - 0.2 mA,
Normal-operating
Mode,
P_9.2.34
Receive-only
Mode,
Stand-by Mode,
Go-to-Sleep
command
Absolute leakage current
IINH_Leak
–5.0
–
–
µA VINH = 0 V,
P_9.2.35
Sleep Mode
Datasheet
37
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Electrical characteristics
9.3
EN, NSTB and NERR
Table 12 EN, NSTB and NERR
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; 5.5 V < VBAT < 40 V; RL = 60 Ω; -40°C < TJ < 150°C;
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit Note or
Test Condition
Number
Min.
Max.
VIO
Mode control inputs EN, NSTB
“High” level input range
“Low” level input range
VMODE_H
0.7 x
VIO
–
–
+
V
V
P_9.3.1
P_9.3.2
0.3V
VMODE_L
-0.3 V
0.3 x
VIO
“High” level input current
“Low” level input current
Diagnosis output NERR
IMODE_H
IMODE_L
20
–
–
220
2.0
µA
µA
VMode = VIO
VMODE = 0 V
P_9.3.3
P_9.3.4
-2.0
“High” level output current INERR_H
“Low” level output current INERR_L
–
-4.0
4.0
-1.0
–
mA
mA
VNERR = VIO - 0.4 V
VNERR = 0.4 V
P_9.3.5
P_9.3.6
1.0
9.4
CAN controller interface
Table 13 CAN controller interface
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; 5.5 V < VBAT < 40 V; RL = 60 Ω; -40°C < TJ < 150°C;
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit Note or
Test Condition
Number
Min.
Max.
Receiver output RxD
“High” level output current IRxD_H
“Low” level output current IRxD_L
Transmitter input TxD
–
-4.0
4.0
-1.0
–
mA
mA
VRxD = VIO - 0.4 V,
Diff < 0.5 V
VRxD = 0.4 V,
Diff > 0.9 V
P_9.4.1
P_9.4.2
V
1.0
V
“High” level input voltage
threshold
VTxD_H
–
0.5 x
VIO
0.7 x
VIO
V
V
Recessive state
Dominant state
P_9.4.4
P_9.4.5
“Low” level input voltage
threshold
VTxD_L
0.3 x
VIO
0.4 x
VIO
–
“High” level input current
“Low” level input current
ITxD_H
ITxD_L
-2.0
-200
1
–
2.0
-20.0
4
µA
µA
ms
VTxD = VIO
VTxD = 0 V
P_9.4.7
P_9.4.8
–
TxD permanent dominant
time-out
tTxD_TO
2.45
Normal-operating P_9.4.9
Mode, see
Figure 26
1)
Input capacitance
CTxD
–
–
10
pF
P_9.4.10
1) Not subject to production test, specified by design.
Datasheet
38
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Electrical characteristics
9.5
Transmitter
Table 14 Transmitter
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; 5.5 V < VBAT < 40 V; RL = 60 Ω; -40°C < TJ < 150°C;
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or Test Condition Number
Min. Typ. Max.
Bus transmitter
CANH, CANL recessive output VCANL/H
voltage
2.0 2.5 3.0
V
Normal-operating
Mode,
P_9.5.1
Receive-only Mode,
V
TxD = VIO,
No load
CANH, CANL recessive output VDiff_R_NM
=
-50
–
–
50
mV VTxD = VIO,
P_9.5.2
P_9.5.3
voltage difference
VCANH - VCANL
No load
CANH dominant output
voltage
VCANH
2.75
4.5
V
V
V
VTxD = 0 V,
50 Ω < RL < 65 Ω,
4.75V < VCC < 5.25
Normal-operating Mode
CANL dominant output
voltage
VCANL
0.5
–
2.25
VTxD = 0 V,
50 Ω < RL < 65 Ω,
4.75V < VCC < 5.25
P_9.5.4
P_9.5.5
Normal-operating Mode
CANH, CANL dominant output VDiff_D
1.5 2.0 2.5
VTxD = 0 V,
voltage difference:
50 Ω < RL < 65 Ω,
4.75V < VCC < 5.25
VDiff_D = VCANH - VCANL
Normal-operating Mode
CANH, CANL dominant output VDiff_D_EXT_BL 1.4
voltage difference
extended bus load
VDiff_D = VCANH - VCANL
Normal-operating Mode
–
–
3.3
5.0
V
V
VTxD = 0 V,
RL = 45 Ω < RL < 70Ω,
4.75V < VCC < 5.25
P_9.5.6
P_9.5.7
CANH, CANL dominant
output voltage difference high
extended bus load
VDiff_D_HEXT_BL 1.5
VTxD = 0 V,
RL = 2240 Ω1),
4.75 V < VCC < 5.25,
static behavior
Normal-operating mode
VDiff = VCANH - VCANL
CANH, CANL recessive
output voltage
Sleep Mode
VCANL_H
VDiff_SLP
VSYM
-0.1
-0.2
–
–
0.1
0.2
V
V
-
No load
No load
P_9.5.8
P_9.5.9
CANH, CANL recessive
output voltage difference
Sleep Mode
Driver symmetry
0.9 1.0 1.1
RL = 60 Ω, C1 = 4.7 nF 1)2) P_9.5.10
VSYM = (VCANH + VCANL)/VCC
Datasheet
39
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Electrical characteristics
Table 14 Transmitter (cont’d)
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; 5.5 V < VBAT < 40 V; RL = 60 Ω; -40°C < TJ < 150°C;
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or Test Condition Number
Min. Typ. Max.
-115 -75 -40
CANH short circuit current
ICANHSC
mA VCANHshort = -3 V,
t < tTXD_TO
TxD = 0 V,
VCC = 5 V
115 mA VCANLshort = 18 V,
t < tTXD_TO
P_9.5.11
,
V
CANL short circuit current
ICANLSC
40
75
P_9.5.12
,
V
V
TxD = 0 V,
CC = 5 V
Leakage current CANH
Leakage current CANL
ICANH_Ik
-5
-5
–
–
–
–
5
µA
VCC =VBAT = VIO = 0 V3),
0 V < VCANH ≤ 5 V,
VCANH = VCANL
VCC =VBAT = VIO = 0 V3),
0 V < VCANL ≤ 5 V,
P_9.5.14
P_9.5.15
P_9.5.16
ICANL_Ik
5
µA
V
CANH = VCANL
V/µs 1)30% to 70% of
measured differential
CANH, CANL output voltage
difference slope, recessive to
dominant
Vdiff_slope_rd
70
bus voltage,
C2 = 100 pF, RL = 60 Ω,
4.75 V < VCC < 5.25 V
CANH, CANL output voltage
difference slope, dominant to
recessive
Vdiff_slope_dr
–
–
70
V/µs 1)30% to 70% of
P_9.5.17
measured differential
bus voltage,
C2 = 100 pF, RL = 60 Ω,
4.75 V < VCC < 5.25 V
1) Not subject to production test, specified by design.
2) VSYM shall be observed during dominant and recessive state and also during the transition from dominant to recessive
and vice versa, while TxD is stimulated by a square wave signal with a frequency of 1 MHz.
3) Additional requirement VIO = VCC connected via 47 kΩ to GND.
9.6
Receiver
Table 15 Receiver
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; 5.5 V < VBAT < 40 V; RL = 60 Ω; tBit(min) = 500 ns; tBit(Flash) = 200 ns;
-40°C < TJ < 150°C;
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit Note or
Test Condition
Number
Min.
Max.
Bus receiver
Common mode range
VCMR
-12
–
12
V
–
P_9.6.1
Datasheet
40
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Electrical characteristics
Table 15 Receiver (cont’d)
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; 5.5 V < VBAT < 40 V; RL = 60 Ω; tBit(min) = 500 ns; tBit(Flash) = 200 ns;
-40°C < TJ < 150°C;
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Typ.
–
Unit Note or
Test Condition
Number
Min.
Max.
Differential receiver
threshold dominant
Normal-operating Mode
Receive-only Mode
VDiff_D
–
0.9
V
VCMR
P_9.6.2
1)
Differential range dominant VDiff_D_Range 0.9
Normal-operating Mode
Receive-only Mode
–
–
8.0
–
V
V
VCMR
P_9.6.3
P_9.6.4
Differential receiver
threshold recessive
Normal-operating Mode
Receive-only Mode
VDiff_R
0.5
VCMR
1)
1)
Differential range recessive VDiff_R_Range -3.0
Normal-operating Mode,
Receive-only Mode
–
0.5
–
V
VCMR
P_9.6.5
P_9.6.6
Differential receiver
hysteresis
VDiff_Hys
–
30
mV VCMR
Normal-operating Mode,
Receive-only Mode
Single ended internal
resistance
RCAN_H,
RCAN_L
6
–
50
kΩ Recessive state
-2 V < VCANH,L < 7 V
P_9.6.7
P_9.6.8
P_9.6.9
P_9.6.10
P_9.6.11
Input resistance deviation
between CANH and CANL
∆Ri
-3.0
12
–
–
3.0
100
40
%
Recessive state
CANH = VCANL = VCC = 5 V
V
Differential internal
resistance
RDiff
CIn
–
kΩ Recessive state
-2 V < VCANH,L < 7 V
pF 2)Recessive state
Input capacitance CANH,
CANL versus GND
20
10
Differential input
capacitance
CInDiff
–
20
pF 2)Recessive state
1) Not subject to production test, specified by design.
2) Not subject to production test, specified by design, S2P-Method, f = 10 MHz.
Datasheet
41
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Electrical characteristics
9.7
Dynamic transceiver parameter
Table 16 Propagation delay and CAN FD parameters
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; 5.5 V < VBAT < 40 V; RL = 60 Ω; tBit(min) = 500 ns; tBit(Flash) = 200 ns;
-40°C < TJ < 150°C;
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit Note or
Test Condition
Number
Min.
Max.
Propagation delay characteristic
Propagation delay,
TxD to RxD
tLoop
80
175
500
215
ns
ns
CL = 100 pF,
CRxD = 15 pF, see
Figure 31
P_9.7.1
P_9.7.6
Received recessive bit width tBit(RxD)_2M
at 2 MBit/s
400
120
435
155
-65
-45
550
220
530
210
40
CL = 100 pF,
C
RxD = 15 pF,
t
Bit = 500 ns,
see Figure 32
Received recessive bit width tBit(RxD)_5M
at 5 MBit/s
200
500
200
ns
ns
ns
ns
ns
CL = 100 pF,
CRxD = 15 pF,
P_9.7.7
P_9.7.8
P_9.7.9
P_9.7.10
P_9.7.11
t
Bit = 200 ns,
see Figure 32
Transmitted recessive bit
width at 2 MBit/s
tBit(Bus)_2M
CL = 100 pF,
C
RxD = 15 pF,
tBit = 500 ns
(see Figure 32)
Transmitted recessive bit
width at 5 MBit/s
tBit(Bus)_5M
CL = 100 pF,
C
RxD = 15 pF,
t
Bit = 200 ns;
(see Figure 32)
Receiver timing symmetry at ∆tRec_2M
2 MBit/s
∆tRec_2M = tBit(RxD)_2M
tBit(Bus)_2M
CL = 100 pF,
CRxD = 15 pF,
tBit = 500 ns,
-
see Figure 32
Receiver timing symmetry at ∆tRec_5M
5 MBit/s
15
CL = 100 pF,
CRxD = 15 pF,
∆tRec_5M = tBit(RxD)_5M
-
t
Bit = 200 ns,
tBit(Bus)_5M
see Figure 32
Datasheet
42
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Electrical characteristics
VCC
VIO
100 nF
100 nF
TLT9252V
INH
TxD
RxD
EN
RINH
CRxD
VBAT
100 nF
NSTB
NERR
WAKE
CANH
RL/2
CL
C1
RL/2
CANL
GND
Figure 30 Test circuit for dynamic characteristics
TxD
0.7 x VIO
0.3 x VIO
t
t
td(L),T
td(H),T
VDiff
0.9 V
0.5 V
td(H),R
td(L),R
tLoop(H,L)
tLoop(L,H)
RxD
0.7 x VIO
0.3 x VIO
t
Figure 31 Timing diagrams for dynamic characteristics
TxD
0.7 x VIO
0.3 x VIO
0.3 x VIO
t
t
5 x tBit
tBit
tLoop(H,L)
tBit(Bus)
VDiff = VCANH - VCANL
VDiff
0.9 V
0.5 V
tLoop(L,H)
tBit(RxD)
RxD
0.7 x VIO
0.3 x VIO
t
Figure 32 Recessive bit time for five dominant bits followed by one recessive bit
Datasheet
43
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Electrical characteristics
9.8
Wake-up
9.8.1
General wake-up timings
Table 17 General wake-up timings
4.5 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; 5.5 V < VBAT < 40 V; RL = 60 Ω; -40°C < TJ < 150°C;
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Typ.
–
Unit Note or
Test Condition
Number
Min.
Max.
INH wake-up delay time
tWU_INH
–
30.0
µs
VBAT = 14.0 V,
INH = 100 kΩ,
P_9.8.1
R
see Figure 33
Bias reaction time
tWU_Bias
–
–
100
µs
See Figure 33
P_9.8.2
LWU, WUP detected
VBAT
INH pin
70% of VBAT
t
tWU_INH
tMode
Mode
Sleep Mode
Stand-by Mode
2,5V
tWU_Bias
Bus Biasing
Connected to GND
Figure 33 Wake-up detection
Datasheet
44
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Electrical characteristics
9.8.2
WUP detection characteristics
Table 18 WUP detection
4.75 V < VCC < 5.25 V; 3.0 V < VIO < 5.5 V; 5.5 V < VBAT < 40 V; RL = 60 Ω; -40°C < TJ < 150°C;
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Typ.
–
Unit Note or
Test Condition
Number
Min.
Max.
1)
Differential range dominant VDiff_D_SLP_Range 1.15
low power modes
8.0
V
VCMR
VCMR
VCMR
VCMR
P_9.8.4
P_9.8.5
P_9.8.6
P_9.8.7
Differential input threshold VDiff_D_SLP
dominant low power modes
–
–
–
–
1.15
0.4
–
V
1)
+Differential range recessive VDiff_R_SLP_Range -3.0
low power modes
V
Differential input threshold VDiff_R_SLP
0.4
V
recessive low power modes
CAN activity filter time
Bus wake-up time-out
Bus wake-up delay time
tFilter
tWAKE
tWU
0.5
0.8
–
–
–
–
1.8
µs
Figure 14
P_9.8.9
10.0
5.0
ms Figure 14
µs Stand-by Mode,
Figure 14
P_9.8.10
P_9.8.11
1) Not subject to production test, specified by design.
9.8.3
Local Wake-Up
Table 19 Local Wake-Up
4.75 V < VCC < 5.5 V; 3.0 V < VIO < 5.5 V; 5.5 V < VBAT < 40 V; RL = 60 Ω; -40°C < TJ < 150°C;
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit Note or
Test Condition
Number
Min.
Max.
Local Wake-Up detection
threshold
VWAKE_TH
VWAKE_TH
IWAKE_H
0.35 x 0.5 x
VBAT VBAT
0.25 x 0.5 x
0.65x
VBAT
V
5.5 V < VBAT < 32 V P_9.8.12
Local Wake-Up detection
threshold
0.75 x
VBAT
V
32 V < VBAT < 40 V
P_9.8.13
P_9.8.15
P_9.8.16
P_9.8.17
VBAT
VBAT
“High” level input current
(pull-up)
-20
-9
-2
µA
µA
µs
“Low” level input current
(pull-down)
IWAKE_L
2
9
20
70
Wake pulse filter time
tWAKE_Filter
10
25
Figure 15
Datasheet
45
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Application information
10
Application information
10.1
ESD robustness according to IEC61000-4-2
Tests for ESD robustness according to IEC61000-4-2 “Gun test” (150 pF, 330 Ω) have been performed. The
results and test conditions are available in a separate test report.
Table 20 ESD robustness according to IEC61000-4-2
Performed Test
Result Unit
Remarks
1)Positive pulse
Electrostatic discharge voltage at pin CANH and ≥ +9
CANL, VBAT, WAKE versus GND
kV
Electrostatic discharge voltage at pin CANH and ≤ -9
CANL, VBAT, WAKE versus GND
kV
1)Negative pulse
1) ESD susceptibility “ESD GUN” according to GIFT / ICT paper: “EMC Evaluation of CAN Transceivers, version 03/02/IEC
TS62228”, section 4.3. (DIN EN61000-4-2).
Tested by external test facility (IBEE Zwickau).
10.2
Voltage adaption to the microcontroller supply
To adapt the digital input and output levels of the TLT9252VLC to the I/O levels of the microcontroller, connect
the power supply pin VIO to the microcontroller voltage supply (see Figure 34).
Note:
In case the digital supply voltage VIO is not required in the application, connect the digital supply
voltage VIO to the transmitter supply VCC
.
Datasheet
46
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Application information
10.3
Application example
VBAT
I
Q1
Q2
22 uF
TLE4476D
GND
100 nF
CANH
CANL
EN
100 nF
22 uF
100 nF
3
5
120
Ohm
VCC
VIO
TLT9252V
VIO
1
7
10
13
12
Out
In
INH
TxD
4
RxD
14
VBAT
Out
NSTB
CANH
CANL
Microcontroller
e.g. XC22xx
6
8
Out
In
EN
NERR
WAKE
optional:
3.3k
GND
9
Ohm
common mode choke
GND
2
20k
Ohm
I
Q1
Q2
22 uF
TLE4476D
GND
100 nF
EN
100 nF
22 uF
100 nF
3
5
VCC
VIO
TLT9252V
VIO
1
7
10
13
12
Out
In
INH
TxD
4
RxD
14
VBAT
Out
NSTB
CANH
CANL
Microcontroller
e.g. XC22xx
6
8
Out
In
EN
NERR
WAKE
optional:
3.3k
GND
Ohm
9
common mode choke
120
Ohm
GND
2
20k
Ohm
CANH
CANL
Figure 34 Application circuit
10.4
Further application information
•
•
Please contact us for information regarding the pin FMEA.
For further information you may visit: http://www.infineon.com/
Datasheet
47
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Package outline
11
Package outline
Figure 35 PG-TSON-14
Green product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant
with government regulations the device is available as a green product. Green products are RoHS-Compliant
(i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.
Dimensions in mm
Datasheet
48
Rev. 1.0
2019-10-17
TLT9252VLC
High-Speed CAN FD Transceiver
Revision history
12
Revision history
Revision
Date
Changes
1.0
2019-10-17 Initial datasheet
Datasheet
49
Rev. 1.0
2019-10-17
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
IMPORTANT NOTICE
The information given in this document shall in no For further information on technology, delivery terms
Edition 2019-10-17
Published by
Infineon Technologies AG
81726 Munich, Germany
event be regarded as a guarantee of conditions or and conditions and prices, please contact the nearest
characteristics ("Beschaffenheitsgarantie").
Infineon Technologies Office (www.infineon.com).
With respect to any examples, hints or any typical
values stated herein and/or any information regarding
the application of the product, Infineon Technologies
hereby disclaims any and all warranties and liabilities
of any kind, including without limitation warranties of
non-infringement of intellectual property rights of any
third party.
In addition, any information given in this document is
subject to customer's compliance with its obligations
stated in this document and any applicable legal
requirements, norms and standards concerning
customer's products and any use of the product of
Infineon Technologies in customer's applications.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer's technical departments to
evaluate the suitability of the product for the intended
application and the completeness of the product
information given in this document with respect to
such application.
WARNINGS
Due to technical requirements products may contain
dangerous substances. For information on the types
in question please contact your nearest Infineon
Technologies office.
© 2019 Infineon Technologies AG.
All Rights Reserved.
Do you have a question about any
aspect of this document?
Email: erratum@infineon.com
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized representatives of Infineon Technologies,
Infineon Technologies’ products may not be used in
any applications where a failure of the product or any
consequences of the use thereof can reasonably be
expected to result in personal injury.
Document reference
Z8F66182131
相关型号：
©2020 ICPDF网 联系我们和版权申明