TLE9893-2QTA62S [INFINEON]
The MOTIX™ TLE9893-2QTA62S is part of the MOTIX™ TLE989x product family. It is a fully integra;型号: | TLE9893-2QTA62S |
厂家: | Infineon |
描述: | The MOTIX™ TLE9893-2QTA62S is part of the MOTIX™ TLE989x product family. It is a fully integra |
文件: | 总144页 (文件大小:4233K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for
BLDC Applications
AK step
Compute
Features
Arm®
Cortex-M3
•
•
•
32-bit Arm® Cortex®*-M3 core at up to 60 MHz
FLASH0
FLASH1
SRAM
ROM
DMA
Debug
NVIC
Single power supply from 5.5 V to 28 V
FLASH0 up to 32 KB, FLASH1 up to 256 KB with
EEPROM emulation, RAM up to 32 KB
System
Timer
Motor Control
Capture Compare Unit
(CCU7)
Power
Management
Unit
SYSTICK
SYSWDT
T20/21
GPT12
Monitoring
ADC - 10 bit
(ADC2)
2 or 3~ Bridge Driver
(BDRV)
•
•
•
1x CAN-FD protocol handler and transceiver
2x UART (with LIN support), 2x SSC
(PMU)
System
Control Unit
(SCU)
TMPSNS
ARVG
Charge
Pump
N-FET
Stage
TLE989x/
TLE988x
3-phase bridge driver with charge pump and
PWM generation (CCU7) and safe switch off path
Safe Switch Off Path
Communication
CAN-FD
CANTRX
BEMF Comparator
(BEMFC)
•
1x low side shunt current sense amplifier and
comparator
MultiCAN+
Measurement ADC
12 Bit
Safe switch off path
Sensor Interface
UART0/1
SSC0/1
(ADC1)
Sigma Delta ADC
14 Bit
Input/Output
Current Sense
•
•
3x BEMF comparators
CSC
CSA
MON
GPIO
(SDADC)
1x 12-bit ADC with 19 inputs and 1x 10-bit ADC
with 14 inputs
•
14-bit SDADC with 2x2 differential inputs for
rotary sensor measurement
•
•
•
12x 16-bit timer, 1x 24-bit timer (SYSTICK)
8/16 GPIOs (incl. RESET, SWD) and 7/10 GPIs (incl. XTALI/O), package dependent (TQFP-48/LQFP-64)
Fail safe mechanism and error handling with safe switch off path for bridge driver (according to ISO26262
Safety Element out of Context for safety requirements up to ASIL-B)
•
•
•
Security: Layered access right management, secured boot and key storage
Temperature Range TJ: -40°C up to 175°C
Ultra compact application footprint with packages TQFP-48 and LQFP-64
Potential applications
•
Automotive motor control for auxiliary drives like pumps, fans, HVAC, actuators, sunroof
Product validation
Qualified for automotive applications. Product validation according to AEC-Q100
*
Arm and Cortex are trademarks of ARM Limited, UK
Datasheet, Z8F80164852
www.infineon.com/motixmcu
1
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Table of contents
1
2
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3
3.1
3.1.1
3.1.2
3.2
Product definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Device pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Device pinout 48 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Device pinout 64 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Device packages and ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Special pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
RESET and FIFO pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Debugging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Clock input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Analog reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Device startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Brown-out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
General electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.3
3.4
3.4.1
3.4.2
3.4.3
3.4.4
3.4.5
3.5
3.6
3.7
3.7.1
3.7.2
3.7.3
3.7.4
3.7.5
4
BLDC driver application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4.1
Further application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5
5.1
5.2
5.3
Power Management Unit (PMU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Electrical characteristics PMU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Supply characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Voltage regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Master supply characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
VDDP characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
VDDC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
VDDEXT characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Clock Generators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Master clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Safe reference clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
System state control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
FIFO Fail-safe supervision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Monitoring and supply generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
5.3.1
5.3.2
5.3.2.1
5.3.2.2
5.3.2.3
5.3.2.4
5.3.3
5.3.3.1
5.3.3.2
5.3.4
5.3.5
5.3.6
6
System Control Unit (SCU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Electrical characteristics SCU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Oscillators and PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
6.1
6.2
6.3
6.3.1
Datasheet, Z8F80164852
2
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
6.3.2
External clock characteristics (XTAL1, XTAL2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
7
Microcontroller Unit (MCU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Electrical characteristics Flash parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
FLASH0 and FLASH1 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
7.1
7.2
7.3
7.3.1
8
8.1
8.2
System Watchdog Timer (SYSWDT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
9
9.1
9.2
Universal Asynchronous Receiver Transmitter (UART0/1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
10
High-Speed Synchronous Serial Interface (SSC0/1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Electrical characteristics SSC0/1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
SSC timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
10.1
10.2
10.3
10.3.1
11
11.1
11.2
CAN Controller (MultiCAN+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
12
CAN Transceiver (CANTRX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Electrical characteristics CANTRX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
CANTRX characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
12.1
12.2
12.3
12.3.1
13
13.1
13.2
13.3
13.3.1
13.3.2
13.3.3
General Purpose Ports (GPIO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Electrical characteristics GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Description of keep and force current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Port 0, Port 1, TMS and Reset DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Port 2 DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
14
High-Voltage Monitor Input (MON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Electrical characteristics MON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
MON characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
14.1
14.2
14.3
14.3.1
15
Analog Reference Voltage Generation (ARVG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Electrical characteristics ARVG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
VREF1V2 DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
VREF5 DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
15.1
15.2
15.3
15.3.1
15.3.2
16
Analog Digital Converter 1 (ADC1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Datasheet, Z8F80164852
3
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
16.1
16.2
16.3
16.3.1
16.3.2
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Electrical characteristics ADC1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
A/D converter characteristics ADC1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Analog inputs characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
17
Monitoring Analog Digital Converter 2 (ADC2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Electrical characteristics ADC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
A/D converter characteristics ADC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Attenuators characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
17.1
17.2
17.3
17.3.1
17.3.2
18
18.1
18.2
18.3
18.3.1
18.3.2
18.3.3
Current Sense Amplifier (CSA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Electrical characteristics CSA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Description of electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Transfer characteristic and error definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
CSA characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
19
Current Sense Comparator (CSC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Electrical characteristics CSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
CSC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
19.1
19.2
19.3
19.3.1
20
Temperature Sensor Unit (TMPSNS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Electrical characteristics TMPSNS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
TMPSNS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
20.1
20.2
20.3
20.3.1
21
BEMF Comparators (BEMFC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Feature overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Electrical characteristics BEMFC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Threshold and hysteresis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
BEMFC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
21.1
21.2
21.3
21.3.1
21.3.2
22
Sigma Delta ADC (SDADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Electrical characteristics SDADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
SDADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
22.1
22.2
22.3
22.3.1
23
23.1
23.1.1
Timer20 (T20) and Timer21 (T21) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
24
24.1
24.2
General Purpose Timer Units (GPT12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Datasheet, Z8F80164852
4
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
25
25.1
25.2
Capture/Compare Unit 7 (CCU7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
26
26.1
26.2
26.3
Bridge Driver (BDRV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Features overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Electrical characteristics BDRV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Description of electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Switch-on parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Switch-off parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Gate current settling behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Timing measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
MOSFET driver output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Charge-discharge current timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Timing measurement comparators characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
Drain source monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
Open load diagnosis currents characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
Charge pump characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
VSD overvoltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
26.3.1
26.3.1.1
26.3.1.2
26.3.1.3
26.3.1.4
26.3.2
26.3.3
26.3.4
26.3.5
26.3.6
26.3.7
26.3.8
27
28
29
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
Datasheet, Z8F80164852
5
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Overview
1
Overview
The TLE989x/TLE988x has following features:
•
Arm® Cortex®-M3 core system
–
–
–
–
–
Up to 60 MHz CPU and system frequency
Arm® NVIC interrupt controller with 32 interrupt requests and 32 levels
Arm® Coresight debug with 2 hardware breakpoints and 2-wire interface (SWD)
Arm® µDMA direct memory access controller with 8 channels
Arm® SysTick system timer (24-bit)
•
•
Single system power supply connected to battery supply (VS pin)
–
–
–
Operating range from 5.5 V to 28 V, extended operating range from 3 V to 40 V
Low-dropout voltage regulators (LDO) for pad and CAN supply (VDDP, VCAN) and core supply (VDDC)
5 V low-dropout voltage regulator for on-board loads (VDDEXT)
On-chip clock generation
–
Low power oscillators as clock source in startup and power saving modes, also used as independent
safe watchdog timer clock
–
–
–
High precision oscillator as base and fallback clock source for system with clock watchdog
Oscillator circuit for external crystal/resonator for accurate clock source with clock watchdog
Two low jitter phase lock loop circuits (PLL0/1) with programmable prescaler for system clock
with loss-of-lock detection and fallback clock
•
Control state machine for switching the system states
–
Active mode: system fully operational with power saving options for frequency and peripherals;
bridge driver in active mode, brake mode or off; current consumption typ. 20 mA at VS (MCU and
CAN active, bridge driver off)
–
–
Stop mode: MCU subsystem stopped with monitoring and communication peripherals listening
Sleep mode: MCU subsystem unpowered with wake monitoring active; wake-up time typ. 2 ms and
typ. 30 µA at VS
–
Wake capabilities for stop and sleep modes via cyclic timer event or CAN/MON event
•
•
On-chip memory
–
–
–
–
–
–
Up to 256 KByte FLASH1 for non-volatile code and data storage with ECC
Up to 32 KByte FLASH0 for non-volatile code and data storage with ECC, EEPROM emulation support
1024 Byte 100 Time Programmable Memory with ECC (100 TP)
Up to 32 KByte RAM with ECC
BootROM for startup firmware, bootstrap loader (BSL) and flash routines
Key storage for supporting security routines
Security features
–
–
–
–
Secured boot mechanism as anchor for in-field software updates
CMAC and AES functions
Key storage with key management support
Layered access right management
Datasheet, Z8F80164852
6
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Overview
•
Communication features
–
–
–
–
MultiCAN+ protocol handler with CAN-FD support (up to 2 MBaud) and 32 message objects
CAN-FD transceiver compliant to ISO11898-2 and ISO11898-5 up to 5 MBaud
2x full duplex asynchronous serial interface (UART0/1) with LIN support
2x synchronous serial channel (SSC0/1) up to 30 MHz (master mode) and 15 MHz (slave mode)
•
•
Wake-up capable high voltage monitoring input(s) (MONx) with input range of -28 V to 40 V (with
series resistor)
General-purpose I/O Ports (GPIO) with push-pull, open-drain and pull-up/down arrangement
–
–
TQFP-48: 8 GPIOs (incl. RESET, SWD)
LQFP-64: 16 GPIOs (incl. RESET, SWD)
•
•
General-purpose input Ports (GPI) with pull-up/down arrangement
–
–
TQFP-48: 7 GPIs (incl. XTALI/O)
LQFP-64: 10 GPIs (incl. XTALI/O)
Optimized functionality for BLDC motor control
–
3-phase bridge driver for N-Channel MOSFETs with programmable current driven output stage, various
diagnosis and protection features in on and off state. The bridge driver allows an EMC and thermally
optimized switching behavior for MOSFETs of up to 6 x 150 nC at 20 kHz
–
–
–
–
2-stage charge pump operating down to VSD = 5.4 V allowing motor operation for wide supply range
from VS = 4.4 V to 28 V (cranking and load dump situation)
High speed current sense amplifier (CSA) for single shunt current measurement in ground path with
programmable gain
Current sense comparator (CSC) with programmable threshold for fast overcurrent detection and safe
switch off request
12-bit ADC (ADC1) for measurement of eight high and ten middle voltage inputs with deterministic
sample trigger, four time-triggered sequences and digital postprocessing
–
–
3x BEMF comparators for sensorless block commutation
Capture/compare unit (CCU7) with five 16-bit timers for sophisticated 3-phase PWM pattern generation
•
Sensor interface
–
14-bit Sigma Delta ADC (SDADC) for rotary sensors with two differential channels supporting
AMR/GMR/TMR type sensors
•
•
General purpose timer
GPT12 (five 16-bit), Timer 20 (16 bit), Timer 21 (16 bit)
Monitoring ADC
–
–
10-bit ADC (ADC2) for background monitoring of five external and eight internal voltages with
programmable threshold, warning flag indication, shut down and interrupt request
•
Fail-safe mechanism and error handling
–
–
–
–
Power-on and undervoltage/brown-out reset generator
Supervision of all system supply voltages
Clock monitoring for master clock, external clock, system clock and PLL with error handling
Overtemperature detection sensing the junction temperature at two die locations with warning flag
indication and automatic error handling
–
Drain source monitoring of bridge driver for detection of short circuit (in on/off state) and open load
diagnosis (in off state)
Datasheet, Z8F80164852
7
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Overview
–
–
–
All memories (flash and RAM) with single bit error correction and double bit correction (SECDET)
2x window watchdog (FS_WDT and SYSWDT) with independent clock source
Safe switch off for bridge driver at severe system malfunction (FS_WDT overflow, shunt overcurrent,
supply under-/overvoltage, failure input active) and failure indication according to ISO 26262 Safety
Element out of Context for safety requirements up to ASIL-B
•
•
•
•
Temperature range TJ: -40°C up to 175°C
Packages TQFP-48 and LQFP-64
Green package (RoHS compliant)
AEC qualified (Grade 0)
Datasheet, Z8F80164852
8
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Block diagram
2
Block diagram
Compute
FLASH0
Arm®
Cortex-M3
FLASH1
SRAM
ROM
DMA
TMS
P0.0
Debug
NVIC
System
Timer
Motor Control
Power
Management
Unit
VS
VDDP
Capture Compare Unit
(CCU7)
SYSTICK
T20/21
Monitoring
ADC - 10 bit
(ADC2)
VCP
CP1H/L
CP2H/L
VDH
VSD
VDDC
SYSWDT
GPT12
2 or 3~ Bridge Driver
(BDRV)
(PMU)
VDDEXT
P0.10/RESET
System
Control Unit
(SCU)
TMPSNS
ARVG
GHx
XTALI/O
Charge
Pump
N-FET
Stage
SHx
TLE989x/
TLE988x
GLx
Safe Switch Off Path
FIFO
SL
Communication
CAN-FD
CANTRX
BEMF Comparator
(BEMFC)
VCAN
CANH/L
MultiCAN+
VAREF
VAGND
P2.x
Measurement ADC
12 Bit
Safe switch off path
Sensor Interface
UART0/1
SSC0/1
(ADC1)
Sigma Delta ADC
14 Bit
Input/Output
Current Sense
P0.x
CSAN
CSAP
CSC
CSA
P1.x
MON
GPIO
(SDADC)
MONx
Figure 1
Block diagram TLE989x/TLE988x
Datasheet, Z8F80164852
9
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Product definitions
3
Product definitions
Device pinout
3.1
3.1.1
Device pinout 48 pins
1
2
3
4
5
6
36
35
34
33
32
31
30
29
28
27
26
25
MON1
VS
VDH
VSD
CP1L
CP1H
VCP
CP2H
CP2L
SH1
VAGND
P2.6
P2.5
P2.4
P2.3
P2.2
CSAP
CSAN
P0.3
P0.2
P0.1
P0.0
TLE989x/TLE988x
(TQFP-48)
7
8
9
10
11
12
GH1
SH2
EP***
*) 2- or 3-phase device variant
**) configurable option (via 100 TP)
***) exposed pad (backside)
Pinout48.vsdx
Figure 2
Pinout for 48 pin package
Datasheet, Z8F80164852
10
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Product definitions
3.1.2
Device pinout 64 pins
1
2
3
4
5
6
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
MON3
MON2
MON1
FIFO
VS
VDH
VSD
CP1L
CP1H
VCP
P2.6
P2.5
P2.4
P2.3
P2.2
CSAP
CSAN
P0.9
P0.8
P0.7
P0.6
P0.5
P0.4
P0.3
P0.2
P0.1
TLE989x
(LQFP-64)
7
8
9
10
11
12
13
14
15
16
CP2H
CP2L
SH1
EP**
GH1
SH2
GH2
*) configurable option (via 100 TP)
**) exposed pad (backside)
Pinout64.vsdx
Figure 3
Pinout for 64 pin package
Datasheet, Z8F80164852
11
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Product definitions
3.2
Device packages and ordering information
The device is offered in following package(s), see Table 1.
Table 1
Name
Device packages
Number of Body size Pin pitch
Epad
Designed for automatic lead
tip inspection (LTI)
pins
[mm2]
[mm]
TQFP-48
LQFP-64
48
7 x 7
0.5
yes
yes
yes
yes
64
10 x 10
0.5
Ordering information
This datasheet covers the products with different package markings. Each marking has a separate ordering
number. The features of the different markings are described in Table 2.
Table 2
Ordering info
Package FLASH1 FLASH0/ RAM Security CAN
Marking
SDADC Functional
safety
[KB]
EEPROMB [KB] [KB] 2)
[KB] 1)
TLE989x Grade-0 (3 ph)
TLE9893-2QKW62S
TLE9893QKW62S
TLE9893-2QTW62S
TLE9891-2QTW61
TLE9891-2QTW60
LQFP-64 248
LQFP-64 248
TQFP-48 248
TQFP-48 120
TQFP-48 120
24+8
24+8
24+8
24+8
24+8
31
31
31
16
16
8+1
8+1
8+1
0
CAN-FD Yes
ASIL-B
ASIL-B
ASIL-B
ASIL-B
QM
CAN-FD No
CAN-FD Yes
CAN-2.0 Yes
CAN-2.0 Yes
0
TLE989x Grade-1 (3 ph)
TLE9893-2QTA62S
TLE9893-2QTA62
TLE9891QTA61
TQFP-48 248
24+8
24+8
24+8
31
31
16
8+1
0
CAN-FD Yes
CAN-FD Yes
CAN-2.0 No
ASIL-B
ASIL-B
ASIL-B
TQFP-48 248
TQFP-48 120
0
TLE988x Grade-0 (2 ph)
TLE9883-2QTW62S
TLE9881-2QTW60
TQFP-48 248
TQFP-48 120
24+8
24+8
31
16
8+1
0
CAN-FD Yes
CAN-2.0 Yes
ASIL-B
QM
TLE988x Grade-1 (2 ph)
TLE9883QTA62
TQFP-48 248
24+8
31
0
CAN-FD No
ASIL-B
Notes
1. The EEPROM is emulated in FLASH0 and allocates 8 KB, the remaining 24 KB are free for user functions.
2. The security functions allocate 8 KB of FLASH1 and 1 KB of RAM.
3. Functional safety term “ASIL-B” refers to “Safe Switch Off”, see also Safety Manual (Z8F63951407).
JTAG ID
The JTAG ID of the TLE989x/TLE988x is 0x1021 F083.
Datasheet, Z8F80164852
12
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Product definitions
Customer ID
The Customer ID contains the device specific variant information. It can be read using a firmware API routine,
refer to the firmware user manual. The decoding of the Customer ID is described in the following figure.
Figure 4
Customer ID decoding
Datasheet, Z8F80164852
13
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Product definitions
3.3
Pin definitions
The functions and default states of the external pins are provided in Table 3.
The following pin types exist:
•
•
•
•
I/O: Input or output
I: Input only
O: Output only
P: Power supply
After reset, all pins have a defined setting. The following options are possible:
•
•
•
•
•
•
•
•
Input with pull-up device enabled (I/PU)
Input with pull-down device enabled (I/PD)
Input with both pull-up and pull-down devices disabled (I/HiZ)
Input floating to a voltage level (float)
Input/Output with driver off (HiZ)
Output with driver off and pull-down device enabled (PD)
Output with driver off floating to a voltage level (float)
Power supply (powered or GND)
Table 3
Pin definitions and functions
Symbol Pin no. Type Reset
Function
Description
state
64 48
General purpose I/Os
P0.0
32 25 I/O I/HiZ
GPIO
Connect to SWDCLK for debugging;
Leave open if not used
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P0.8
P0.9
33 26 I/O I/HiZ
34 27 I/O I/HiZ
35 28 I/O I/HiZ
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
Leave open if not used
Leave open if not used
Leave open if not used
Leave open if not used
Leave open if not used
Leave open if not used
Leave open if not used
Leave open if not used
Leave open if not used
36
37
38
39
40
41
–
–
–
–
–
–
I/O I/HiZ
I/O I/HiZ
I/O I/HiZ
I/O I/HiZ
I/O I/HiZ
I/O I/HiZ
P0.10 or 31 24 I/O I/HiZ
GPIO or
pin RESET
Configurable option (via 100TP);
Leave open if not used
RESET
P1.0
P1.1
P1.2
P1.3
P1.4
I/PU
25 20 I/O I/HiZ
26 21 I/O I/HiZ
27 22 I/O I/HiZ
GPIO
GPIO
GPIO
GPIO
GPIO
Leave open if not used
Leave open if not used
Leave open if not used
Leave open if not used
Leave open if not used
28
29
–
–
I/O I/HiZ
I/O I/HiZ
Datasheet, Z8F80164852
14
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Product definitions
Table 3
Pin definitions and functions (cont’d)
Symbol Pin no. Type Reset
Function
Description
state
64 48
Analog inputs
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P2.8
P2.9
CSAN
55 39 I
54 38 I
44 31 I
45 32 I
46 33 I
47 34 I
48 35 I
I/HiZ
I/HiZ
I/HiZ
I/HiZ
I/HiZ
I/HiZ
I/HiZ
I/HiZ
I/HiZ
I/HiZ
I/HiZ
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
Leave open if not used
Leave open if not used
Leave open if not used
Leave open if not used
Leave open if not used
Leave open if not used
Leave open if not used
Leave open if not used
Leave open if not used
Leave open if not used
51
52
53
–
–
–
I
I
I
42 29 I
CSA negative Connect via shunt resistor to CSAP;
input Connect to GNDVSSP if not used
CSA positive Connect via shunt resistor to CSAN;
input Connect to GNDVSSP if not used
CSAP
43 30 I
I/HiZ
Fail input/output
FIFO
4
-
I/O I/HiZ
Fail in /fail out Connect via resistor to an external signal;
Connect via 10 k pull-up to VDDP if not used
High-Voltage Monitoring inputs
MON1
MON2
MON3
3
2
1
1
–
–
I
I
I
I/HiZ
I/HiZ
I/HiZ
HV monitor
input 1
Connect via resistor to an external signal;
Connect to GNDVSSP if not used
HV monitor
input 2
Connect via resistor to an external signal;
Connect to GNDVSSP if not used
HV monitor
input 3
Connect via resistor to an external signal;
Connect to GNDVSSP if not used
CAN interface
CANH
CANL
VCAN
64 48 I/O HiZ
CAN high bus Connect resistor to CANL;
Leave open if not used
63 47 I/O HiZ
CAN low bus Connect resistor to CANH;
Leave open if not used
61 45 P
–
–
Supply input Connect to VDDP;
for CAN
Connect capacitor to GNDCAN
transceiver
GNDCAN 62 46 P
Ground for
CAN
Connect to GNDVSSP;
Connect capacitor to VCAN
transceiver
Datasheet, Z8F80164852
15
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Product definitions
Table 3
Pin definitions and functions (cont’d)
Symbol Pin no. Type Reset
Function
Description
state
64 48
Bridge Driver
SL
22 19 I
19 16 O
20 17 O
21 18 –
21 18 O
GND
PD
PD
–
BDRV ground Source low side FETs;
Connect to GNDVSSP if not used
GL1
GL2
NC
BDRV gate
low side 1
Connect to gate of low side MOSFET 1;
Leave open if not used
BDRV gate
low side 2
Connect to gate of low side MOSFET 2;
Leave open if not used
–
2-phase device variant;
Leave open
GL3
PD
BDRV gate
low side 3
3-phase device variant;
Connect to gate of low side MOSFET 3;
Leave open if not used
SH1
GH1
SH2
GH2
NC
13 10 I
14 11 O
15 12 I
16 13 O
17 14 –
17 14 I
Float to
GND+1*Vdiode high 1
BDRV source Connect to source of high side MOSFET 1;
Leave open if not used
PD
BDRV gate
high 1
Connect to gate of high side MOSFET 1;
Leave open if not used
Float to
GND+1*Vdiode high 2
BDRV source Connect to source of high side MOSFET 2;
Leave open if not used
PD
BDRV gate
high 2
connect to gate of high side MOSFET 2;
Leave open if not used
–
–
2-phase device variant;
Leave open
SH3
Float to
BDRV source 3-phase device variant;
GND+1*Vdiode high 3
Connect to source of high side MOSFET 3;
Leave open if not used;
NC
18 15 –
18 15 O
–
–
2-phase device variant;
Leave open
GH3
PD
BDRV gate
high 3
3-phase device variant;
Connect to gate of high side MOSFET 3;
Leave open if not used;
Charge pump
CP1L
CP1H
VCP
8
5
6
7
O
O
P
HiZ
CP stage 1 out Connect external capacitor to CP1H;
low Leave open if not used
CP stage 1 out Connect external capacitor to CP1L;
Leave open if not used
charge pump Connect via capacitor to star point of DC link high;
9
Float to
VSD-1*Vdiode high
10
Float to
VSD-1*Vdiode output
voltage
Connect to VSD if not used
CP2L
12
9
O
HiZ
CP stage 2 out Connect external capacitor to CP2H;
low Leave open if not used
Datasheet, Z8F80164852
16
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Product definitions
Table 3
Pin definitions and functions (cont’d)
Symbol Pin no. Type Reset
Function
Description
state
64 48
CP2H
VSD
11
8
O
P
Float to
VSD-1*Vdiode high
CP stage 2 out Connect external capacitor to CP2L;
Leave open if not used
BDRV supply Connect with RC filter from star point of
7
4
–
input
DC link high;
Connect to VS if not used
VDH
6
3
I
I/HiZ
BRDV sense
input
Connect with RC filter from star point of
DC link high;
Connect to SL if not used
Other pins
TMS
30 23 I/O I/PD
Test mode
select input
Connect to SWDIO for debugging;
Connect to GNDVSSP if not used
Power supply
VS
5
2
P
–
–
Supply input Connect via reverse polarity diode to VBAT;
Connect capacitor to GNDVSSP
VDDP
24, 43 P
59
Output of
VDDP
Connect capacitor to GNDVSSP;
Connect to VCAN
regulator
VDDC
56 40 P
–
–
–
–
–
Output of
VDDC
regulator
Connect capacitor to GNDVSSC
VDDEXT 60 44 P
Output of
VDDEXT
regulator
Connect capacitor to GNDVSSP;
Connect to sensor supply input
GNDVSSP 23, 42 P
58
Ground of
VDDP
regulator
Connect capacitor to VDDP;
Connect to module GND;
Do not connect to GNDVSSC
GNDVSSC 57 41 P
Ground of
VDDC
regulator
Connect capacitor to VDDC;
Do not connect to GNDVSSP
VAGND
VAREF
49 36 P
50 37 P
Reference
ground for
If VREF5V is used: do not connect to GNDVSSP;
If external reference is used: connect to GNDVSSP;
mixed signal Always connect via capacitor to VAREF
peripherals
–
Optional
output of
VREF5V
Connect to capacitor to VAGND;
Optionally connect to VDDEXT or other reference;
Leave open if not used
regulator;
Reference
input for
ADC1, SDADC,
CSA, CSC
EP
–
–
P
–
Exposed pad Connect to GNDVSSP
Datasheet, Z8F80164852
17
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Product definitions
3.4
Special pin functions
3.4.1
RESET and FIFO pins
The following reset and fail-safe pins are available:
•
RESET pin: P0.10 can be configured via a config sector setting (via 100TP) as bidirectional RESET function
(default for P0.10 is GPIO)
•
FIFO pin (only in 64 pin variant): this is a dedicated pin with bidirectional safe switch off (SSO) function
3.4.2
Programming
The device flash modules can be programmed using the following interfaces:
•
•
Via standard Cortex SWD interface (pins TMS and P0.0, latched at start up, bootlatch) and SWD protocol
Via bootstrap loader (BSL) interface (pins CANH and CANL) and UART protocol over CAN transceiver
Note:
TMS is a dedicated pin. P0.0 is configured as SWDCLK in case TMS is latched high.
3.4.3
Debugging
The device can be debugged via standard Cortex SWD interface (pins TMS and P0.0) and SWD protocol.
Note:
TMS is a dedicated pin. P0.0 is configured as SWDCLK in case TMS is latched high.
3.4.4
Clock input
•
•
An external crystal or resonator can be connected to P2.0/XTALI and P2.1/XTALO
An external digital clock can be connected to P2.0/XTALI
3.4.5
Analog reference
•
The pins VAREF and VAGND serve as buffer for the analog reference voltage and analog reference ground
for ADC1, CSA, CSC and SDADC
•
A buffer capacitor (CVAREF, P_ARVG_03_03) has to be placed externally
Datasheet, Z8F80164852
18
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Product definitions
3.5
Device startup
After a device reset, the BootROM firmware is executed to initialize the device.
The execution of the BootROM firmware has a certain execution time until execution is handed over to the user
application.
FS_WDT Long Open Window
180 ms
Power-up / Sleep-exit
5 ms / 2.5 ms
BSL connection timeout
0 - 135 ms
Init
0.2 ms
CMAC
17.5 ms / KB
Finish
0.65 ms
Flash Service
up to 33 * tER
Application
Initial BootROM firmware
execution time depends
on whether it is a Power-
up or Sleep-exit
Occurs only in an
EEPROM emulation
error situation, may
erase up to 33 pages
After BootROM firmware
execution, the application is
started and the FS_WDT should
be serviced from now on
Depending on the NAC setting,
the BSL timeout is between 0
and 135 ms
Only if Secure Boot is enabled and
executed by the BootROM firmware
t
Figure 5
Device bootup timing
Note:
The Power-up, Sleep-exit, and FS_WDT Long Open Window timings refer to typical values of MCLK.
The timings for the BSL connection timeout and Secure Boot refer to typical values of HP_CLK.
Datasheet, Z8F80164852
19
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Product definitions
3.6
Brown-out
The integrated VDDP regulator will enter dropout operation as the VS pin voltage is dropping below the
minimum supply voltage (P_GEN_09_01). As a consequence the regulator will enter dropout and can no
longer maintain its output voltage within the regulation limits.
The MCU subsystem remains fully functional down to the minimum extended supply voltage range
(P_GEN_09_03 and P_GEN_09_14).
Care should be taken while operating following peripherals under low-supply conditions:
•
•
•
Derated electrical performance for VDDEXT, VREF5V (VAREF), CSA, CSC, SDADC, MON, BDRV
Derated ADC1 electrical performance (relating to a drift on the VREF5V (VAREF) reference)
CAN transceiver interface
Figure 6 illustrates the operation under low-supply (brown-out) conditions:
Supply rail
VS
P_GEN_09_01 (Min.) – Supply voltage in active mode
PH_PMU_03_37 - VDDP LDO dropout
VDDP
VDDC
P_GEN_09_14 (Min.) – Extended supply voltage in active mode
P_GEN_09_03 (Min.) – Extended supply voltage in active mode
P_PMU_03_06 - VDDP undervoltage reset
P_PMU_04_05 - VDDC undervoltage reset
Time
VDDP_UV_RST
VDDC_UV_RST
Low_VS_operation.vsdx
Figure 6
Operation under low-supply (brown-out) conditions
Datasheet, Z8F80164852
20
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General electrical characteristics
3.7
General electrical characteristics
3.7.1
Absolute maximum ratings
Table 4
Voltages Supply Pins
Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
VS voltage
VS_max
-0.3
-
40
V
1) Load dump;
P_GEN_01_01
t=400ms
1)
VSD voltage max1 VSD_max1
VSD voltage max2 VSD_max2
-0.3
-2.8
-
-
48
48
V
V
P_GEN_01_02
P_GEN_01_03
1) For -2.8V external
2.2Ω is required to
limit the output
current; t=8ms
1)
VDDP voltage
VDDEXT voltage
VCAN voltage
VDDC voltage
VDDP_max
VDDEXT_max
VCAN_max
VDDC_max
VAREF_max
-0.3
-0.3
-0.3
-0.3
-0.3
-
-
-
-
-
5.5
V
P_GEN_01_04
P_GEN_01_05
P_GEN_01_06
P_GEN_01_07
1)
1)
1)
VS+0.3 V
5.5
1.6
V
V
V
Analog reference
voltage
VDDP
+0.3
1) VAREF < VDDP_max; P_GEN_01_08
between pin VAREF
and VAGND
1)
Analog reference
ground
VAGND_max
-0.3
-
0.3
V
P_GEN_01_09
1) Not subject to production test, specified by design
Table 5
Voltages High Voltage Pins
Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Voltage at MONx
pins
VMON_max
-28
-2.8
-8
-
-
-
40
V
V
V
1) The overload
current must be
P_GEN_02_01
limited via an external
1kΩ resistor at pin
1) The overload
current must be
limited via an external
1kΩ resistor at pin
1)
Voltage at VDH pin VVDH_max
48
P_GEN_02_02
P_GEN_02_03
Voltage at GHx pins VGH
48
Datasheet, Z8F80164852
21
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General electrical characteristics
Table 5
Voltages High Voltage Pins (cont’d)
Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1)
Voltage at GHx vs. VGHvsSH
-0.3
-
14
V
P_GEN_02_04
SHx pins
1)
1)
1)
Voltage at SHx pins VSH
Voltage at GLx pins VGL
-8
-
-
-
48
48
14
V
V
V
P_GEN_02_05
P_GEN_02_06
P_GEN_02_07
-8
Voltage at GLx vs.
SL pins
VGLvsSL
-0.3
1)
Voltage at SL pin
VSL
-8
-
-
48
48
V
V
P_GEN_02_08
Voltage at charge
pump pins CP1H,
CP1L, CP2H, CP2L,
VCP
VCPx
-0.3
1) Limit output current P_GEN_02_09
to ICPx > -200μA
Voltage at FIFO pin VFIFO_max
-28
-
40
V
1) The overload
P_GEN_02_10
current must be
limited via an external
1 kΩ resistor at pin
1) Not subject to production test, specified by design
Table 6
Voltages CAN Transceiver
Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1)
Voltage on CANH, VBus_max
CANL
-27
-
40
V
P_GEN_03_01
P_GEN_03_02
1)
Differential voltage Vdiff
-5
-
10
V
V
= VCANH - VCANL
diff
1) Not subject to production test, specified by design
Table 7
Voltages GPIOs
Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1)
Voltage on port pin VIN
P0.x, P1.x, P2.x,
TMS
-0.3
-
VDDP+0 V
V <VDDP_max
P_GEN_04_01
IN
.3
1) Not subject to production test, specified by design
Datasheet, Z8F80164852
22
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General electrical characteristics
Table 8
Voltages at Current Sense Amplifier Inputs
Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1)
InputvoltageCSAN, VOAI
-7
-
7
V
P_GEN_05_01
CSAP
1) Not subject to production test, specified by design
Table 9
Currents
Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1)
Max. current at VCP IVCP
-15
-
-
mA
P_GEN_06_02
pin
1) Not subject to production test, specified by design
Table 10 Overload currents
Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Overload current
on digital inputs
P0.x, P1.x, TMS
Iovdig
-2
-
2
mA 1) 2) 3) Overload current P_GEN_06_01
must be limited, e.g.
via series resistor
mA 1) 2) 3) Overload current P_GEN_06_04
must be limited, e.g.
Overload current
on analog inputs
P2.x (except P2.0,
P2.1 and P2.5)
Iovana
-1
-
2
via series resistor
Sum of overload
currents
Iovsum
-4
-
4
mA 1) 2) 3) The number of P_GEN_06_03
pins with overload
must be limited to
maximum 4 pins
1) Overload current is allowed in following operation modes: unpowered, active and sleep mode
2) Overload conditions occur if the standard operating conditions are exceeded, i.e. the input voltage VIN at the pin
exceeds the specified range: VIN > VDDP + 0.3 V (Iov > 0) or VIN < -0.3 V (Iov < 0)
3) Not subject to production test, specified by design
Datasheet, Z8F80164852
23
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General electrical characteristics
Pad
PMU
wake
Overload definition
a) Vin > VDDP+0.3V
b) Vin < -0.3V
VDDP
VDDP
VBAT
1
VDDP
Vin
Iov
4
sleep
3
R
GPIO
ADC
VDDP
regulator
Iovsum
Pad
2
KOVAN
KOVAP
Effect of overload
1
Stress on diode
ADC
2
Coupling to ADC
Adjacent pin
GPIO
3
Wake & startup behaviour
4
Regulator performance
lov_0000063040-21.vsdx
Figure 7
Overload current
Table 11 Temperatures
Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1)
Junction
temperature
Tj
-40
-
175
°C
P_GEN_07_01
P_GEN_07_02
1)
Storage
Tstg
-55
-
175
°C
temperature
1) Not subject to production test, specified by design
Datasheet, Z8F80164852
24
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General electrical characteristics
EMC
EMC susceptibility according to BISS generic IC test specification, release 2.0.
Table 12 ESD susceptibility
Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1) 2)
ESD susceptibility VESD1
HBM all pins
-2
-
2
kV
P_GEN_08_01
P_GEN_08_08
ESD susceptibility VESD_CDM
CDM
-500
-
500
V
2) Charged device
model, acc. JEDEC
JESD22-C101
ESD susceptibility VESD_CDM_Corner -750
CDM on corner pins
-
750
V
2) Charged device
model, acc. JEDEC
JESD22-C101
P_GEN_08_09
1) ESD susceptibility, ″JEDEC HBM″ according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF)
2) Not subject to production test, specified by design
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Datasheet, Z8F80164852
25
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General electrical characteristics
3.7.2
Functional range
Note:
Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics
table.
Table 13 Functional Range
Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Supply voltage at
VS in active mode -
voltage range 1
VS_act1
5.5
-
28
V
P_GEN_09_01
Extended supply
voltage at VS in
active mode -
VS_act2
28
-
40
V
Allowed for tmax
400ms with
parameter deviation
<
P_GEN_09_02
voltage range 2
Extended supply
voltage at VS in
active mode -
VS_act3
3.0
-
5.5
V
Due to derived voltage P_GEN_09_03
dependencyfollowing
modules show
voltage range 3
parameter deviation:
VDDEXT, VREF5V, CSA,
CSC, SDADC, MON,
BDRV. Module
CANTRX is out of its
functional range
Extended supply
voltage at VS in
active mode -
VS_act4
4.2
-
5.5
V
1) Due to dependency P_GEN_09_14
to VAREF, the ADC1
shows parameter
voltage range 4
deviations
Supply voltage at
VS in sleep mode
VS_slpmin
VS_stpmin
ΔVS/Δt
3.0
3.0
-5
-
-
-
-
V
V
P_GEN_09_07
P_GEN_09_06
Supply voltage at
VS in stop mode
-
Supply voltage
transients slew rate
5
V/µs 2) For rising and falling P_GEN_09_08
transient: not faster
than this
Supply voltage at
VSD in active mode
for bridge driver
supply
VSD_act1
5.4
-
29
V
P_GEN_09_04
Datasheet, Z8F80164852
26
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General electrical characteristics
Table 13 Functional Range (cont’d)
Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Extended
VSD_act2
29
29
-
32
V
Allowed for tmax
400ms with
parameter deviation
<
P_GEN_09_05
maximum supply
voltage at VSD in
active mode for
bridge driver
supply
Extended supply
voltage at VSD in
active mode for
bridge driver
supply - active
brake
VSD_ab
-
40
V
Active brake mode
with low-side drivers,
charge pump off
P_GEN_09_16
Analog reference
voltage
VAREF
3.8
-
-
-
VDDP
+0.3
V
2) between pin VAREF P_GEN_09_15
and VAGND
Analog reference
voltage ground
VAGND
-0.05
-50
0.05
V
2) at VAGND pin
P_GEN_09_17
3) 2)
Output sum current IGPIO,sum
50
mA
P_GEN_09_11
for all GPIO pins
System frequency 0 fsys0
5
5
-
-
60
80
MHz
MHz
P_GEN_09_12
P_GEN_09_13
System frequency 1 fsys1
1) ADC1 calibration is done at VS = 13.5 V and VAREF = 5.0 V, for low VS range calibration shall be disabled (CALEN.CALENi
= 0) and VAREF measurement from ADC2 shall be used
2) Not subject to production test, specified by design
3) This is a system requirement; it has to be ensured that current stays within limits
Datasheet, Z8F80164852
27
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General electrical characteristics
3.7.3
Current consumption
Table 14 Current Consumption
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Current
consumption in
active mode
IVs_act60
-
-
60
mA VS=3V to 28V; see
Table 15Activemode
current consumption
P_GEN_10_01
Current
IVs_act20
-
-
50
mA VS=3V to 28V; see
Table 15Activemode
current consumption
P_GEN_10_02
P_GEN_10_03
consumption in
active mode with
reduced frequency
Current
IVs_actCAN
-
-
35
mA VS=3V to 28V; see
Table 15Activemode
current consumption
consumption in
active mode at
reduced frequency
and with CAN
communication
only
Current
IVs_slp0
IVs_slp1
IVs_slp2
-
-
-
-
-
-
35
µA VS=9V to 28V; TJ=-40ºC P_GEN_10_04
to 85ºC; see Table 16
consumption in
sleep mode at
normal voltage and
temperature range
Sleep mode current
consumption
Current
50
µA VS=5.5Vto9V;TJ=-40ºC P_GEN_10_05
to 85ºC; see Table 16
consumption in
sleep mode at low
voltage and normal
temperature range
Sleep mode current
consumption
Current
250
µA VS=3V to 28V; TJ=-40ºC P_GEN_10_06
to 150ºC; see Table 16
consumption in
sleep mode at
extended voltage
range and
Sleep mode current
consumption
temperature range
Current
IVs_stp1
-
-
-
-
120
175
µA TJ=-40ºC to 25ºC; see P_GEN_10_11
Table 17 Stop mode
consumption in
stop mode -
temperature range
1
current consumption
Current
IVs_stp2
µA TJ=25ºC to 85ºC; see P_GEN_10_12
Table 17 Stop mode
consumption in
stop mode -
temperature range
2
currentconsumption
Datasheet, Z8F80164852
28
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General electrical characteristics
Table 14 Current Consumption (cont’d)
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Current
IVs_stp3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
2.2
6
mA TJ=85ºC to 175ºC; see P_GEN_10_13
Table 17 Stop mode
consumption in
stop mode -
temperature range
3
currentconsumption
Current
IVs_stp4
IVs_MONx
IVs_CAN
IVs_CYC
IVs_GPIO
IVSD_on
mA VS=3V to 28V; TJ=-40ºC P_GEN_10_14
to 175ºC; see Table 17
consumption in
stop mode -
extended voltage
range
Stop mode current
consumption
Current
1
µA 1) Additional to
Ivs_slp, Ivs_stp if
configured
P_GEN_10_23
P_GEN_10_24
P_GEN_10_25
P_GEN_10_26
P_GEN_10_18
consumption of
one MONx as wake
source in sleep or
stop mode
Current
4
µA 1) Additional to
Ivs_slp, Ivs_stp if
configured
consumption of
CAN as wake source
in sleep or stop
mode
Current
5
µA 1) Additional to
Ivs_slp, Ivs_stp if
configured; while
VDDEXT is off
consumption of
CYCLIC TIMER as
wake source in
sleep or stop mode
Current
1
µA 1) Additional to
Ivs_slp, Ivs_stp if
configured
consumption of
one GPIO as wake
source in stop
mode
Current
70
mA 3x HS/LS @ 20 kHz
with 6x CL=10nF;
consumption at pin
VSD - bridge driver
fully operating
5.4V≤VSD≤29V
Datasheet, Z8F80164852
29
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General electrical characteristics
Table 14 Current Consumption (cont’d)
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Current
IVSD_ab
-
-
-
10
5
mA 3x LS statically on;
P_GEN_10_19
consumption at pin
VSD - bridge driver
in active brake
mode
5.4V≤VSD≤40V
Current
IVSD_off
-
µA 3x HS and LS off with P_GEN_10_22
passive pulldown
consumption at pin
VSD - bridge driver
off
1) Not subject to production test, specified by design
Table 15 Active mode current consumption
IVs_act60
IVs_act20
IVs_actCAN
PLL0/PLL1
locked on XTAL
60 MHz
locked on XTAL
20 MHz
locked on XTAL
20 MHz
SYS0_CLK (for MCU)
SYS1_CLK (for CAN)
MCU subsystem
80 MHz
80 MHz
80 MHz
active
active
active with CPU
DEEPSLEEP mode
Timers, UARTs, SSCs
ADC1, CSA/CSC
active
active
disabled
disabled
converting
converting
CANTRX, MultiCAN
receiving,
2 Mbit
receiving,
2 Mbit
receiving,
2 Mbit
BDRV, CP
PWM @3ph with 20 KHz
disabled
PWM @3ph with 20 KHz
disabled
disabled
VDDEXT
disabled
GPIO
input without load
via MON1
input without load
via MON1
input without load
via MON1
Wake configuration
Table 16 Sleep mode current consumption
lVs_slp0
lVs_slp1
OFF
OFF
OFF
OFF
OFF
OFF
OFF
lVs_slp2
OFF
OFF
OFF
OFF
OFF
OFF
OFF
lVs_slp3
OFF
OFF
OFF
OFF
OFF
OFF
OFF
PLL0/PLL1
OFF
OFF
OFF
OFF
OFF
OFF
OFF
SYS0_CLK (for MCU)
SYS1_CLK (for CAN)
MCU subsystem
Timers, UARTs, SSCs
ADC1, CSA/CSC
CANTRX, MultiCAN
Datasheet, Z8F80164852
30
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General electrical characteristics
Table 16 Sleep mode current consumption
lVs_slp0
lVs_slp1
lVs_slp2
lVs_slp3
BDRV, CP
SSO active
OFF
SSO active
OFF
SSO active
OFF
SSO active
OFF
VDDEXT
GPIO
no load
via MON1
no load
via MON1
no load
via MON1
no load
via MON1
Wake configuration
Table 17 Stop mode current consumption
lVs_stp1
lVs_stp2
OFF
lVs_stp3
OFF
lVs_stp4
OFF
PLL0/PLL1
OFF
SYS0_CLK (for MCU)
SYS1_CLK (for CAN)
MCU subsystem
Timers, UARTs, SSCs
ADC1, CSA/CSC
CANTRX, MulitCAN
BDRV, CP
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
stopped
OFF
stopped
OFF
stopped
OFF
stopped
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
SSO active
OFF
SSO active
OFF
SSO active
OFF
SSO active
OFF
VDDEXT
GPIO
no load
via MON1
no load
via MON1
no load
via MON1
no load
via MON1
Wake configuration
Datasheet, Z8F80164852
31
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General electrical characteristics
3.7.4
Thermal resistance
Table 18 Thermal Resistance - TQFP-48
Parameter Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1)
Junction to case for Rthjc_T48
-
6
-
K/W
P_GEN_12_01
P_GEN_12_02
TQFP-48
2) 1)
Junction to
ambient for TQFP-
48
Rthja_T48
-
33
-
K/W
1) Not subject to production test, specified by design
2) According to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board. Board: 76.2x114.3x1.5mm3 with 2 inner
copper layers (35μm thick), with thermal via array under the exposed pad contacting the first inner copper layer and
300mm2 cooling area on the bottom layer (70μm).
Table 19 Thermal Resistance - LQFP-64
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1)
Junction to case for Rthjc_L64
LQFP-64
-
6
-
K/W
P_GEN_13_01
P_GEN_13_02
2) 1)
Junction to
ambient for LQFP-
64
Rthja_L64
-
33
-
K/W
1) Not subject to production test, specified by design
2) According to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board. Board: 76.2x114.3x1.5mm3 with 2 inner
copper layers (35μm thick), with thermal via array under the exposed pad contacting the first inner copper layer and
300mm2 cooling area on the bottom layer (70μm).
Datasheet, Z8F80164852
32
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General electrical characteristics
3.7.5
Timing characteristics
Table 20 System Timing
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Power-up time
tstartup
-
-
5
ms 1) VS ramp-up (0 V to P_GEN_14_01
14 V in 100 µs) until
start of user code
Sleep-Exit
tslpex
-
-
2.5
ms 1) CAN/MON wake
event until start of
user code
P_GEN_14_02
Sleep-Entry
Stop-Exit
tslpen
tstpex
-
-
-
-
0.2
0.3
ms 1) From setting
PMCON0.SLEEP
ms 1) CAN/MON/GPIO
wake event until start
of user code
P_GEN_14_03
P_GEN_14_04
Stop-Entry
tstpen
-
-
0.2
ms 1) From setting
PMCON0.STOP
P_GEN_14_06
1) Not subject to production test, specified by design
Datasheet, Z8F80164852
33
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
BLDC driver application information
4
BLDC driver application information
Figure 8 shows the TLE989x/TLE988x in an electric drive application setup controlling a BLDC motor.
EMC filter
LPFILT
Reverse polarity protection
TRP
VDC
VBAT
GND
DVS
CVS1
CPFILT1
CPFILT2
QRP
RRP1
DRP
RRP2
CVS2
CVCP2
VS
VDDP
VCP
CP1H
CP1L
CP2H
CP2L
VSD
VDDP
CVDDP2
CVDDP1
CCPS1
GNDVSSP
alternative
CVCP1
VDDC
CVDDC1
CCPS2
CVDDC2
GNDVSSC
RVSD
RVDH
VAREF
CVSD
CVDH
CVAREF
VAGND
VDDEXT
VDH
VDDEXT
CVDDEXT1
CVDDEXT2
TH1
RGH1
CPH1
GH1
SH1
GL1
VCAN
VDDP
RGSH1
CVCAN
CGSH1
U
GNDCAN
CXIN
CSH1
RGL1
P2.0/XTALI
P2.1/XTALO
TL1
QXTAL
RXD
RGSL1
CXOUT
CGSL1
SL
TH2
VDC
Serial Wire Debug
SUPPLY
VDDP
RGH2
CPH2
P0.10/RESET
TMS
RESET
SWDIO
GH2
SH2
GL2
RGSH2
CGSH2
V
SWDCLK
P0.0
CSH2
RGL2
TL2
P0.1
P0.2
P0.3
P0.4*
P0.5*
P0.6*
P0.7*
P0.8*
P0.9*
P1.0
P1.1
P1.2
P1.3*
P1.4*
P2.7*
P2.8*
P2.9*
RGSL2
TLE989x
CGSL2
SL
TH3
VDC
RGH3
CPH3
GH3
SH3
GL3
RGSH3
CGSH3
Unused pins
- 6 (14*) digital GPIOs
- 3* digital inputs
W
CSH3
RGL3
TL3
- 2* HV monitoring inputs
RGSL3
CGSL3
RCSAP
CCSA
SL
CCSAP
CSAP
RSHUNT
RCSAN
CCSAN
MON2*
MON3*
CSAN
CANH
3 phase
BLDC motor
CCAN
RCAN1
CANH
CANL
VDDEXT
U
V
W
RCAN2
RMON1
CANL
RT
TEMP
COSN
SINP
COSP
SINN
P2.2
P2.3
P2.4
P2.5
P2.6
WAKE
MON1
FIFO*
CMON11
CMON12
RFIFO
TMR
Sensor
M
SOFF
CFIFO1
CFIFO2
EP
ApplicationDiagram.vsdx
*) 64-pin package only
Figure 8
Simplified application diagram example for a BLDC system
Datasheet, Z8F80164852
34
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
BLDC driver application information
Note:
The following information is given as a hint for the implementation of the device only and shall not
be regarded as a description or warranty of a certain functionality, condition or quality of the device.
This is a very simplified example of an application circuit and bill of material. The function must be
verified in the actual application.
Table 21 External components (BOM)
Symbol
DVS
Function
Component
Reverse polarity protection diode
Decoupling capacitor at VS pin
Buffer capacitor at VS pin
e.g. BAS52-02V
CVS1
see P_PMU_01_06
CVS2
see P_PMU_01_07
CVDDP1
CVDDP2
CVDDEXT1
CVDDEXT2
CVCAN
CVDDC1
CVDDC2
CVAREF
CCPS1
Decoupling capacitor at VDDP pin
Stability capacitor at VDDP pin
Decoupling capacitor at VDDEXT pin
Stability capacitor at VDDEXT pin
Decoupling capacitor at VCAN pin
Decoupling capacitor at VDDC pin
Decoupling capacitor at VDDC pin
Stability capacitor at VAREF pin
Charge pump flying capacitor stage 1
Charge pump flying capacitor stage 2
see P_PMU_03_22
see P_PMU_03_22
see P_PMU_05_13
see P_PMU_05_13
see P_PMU_03_23
see P_PMU_04_21
see P_PMU_04_21
see P_ARVG_03_03
application dependent, min. 100 nF
application dependent, min. 100 nF
application dependent, min. 220 nF
CCP2S
CVCP1
Charge pump storage capacitor (placing
option 1)
CVCP2
Charge pump storage capacitor (placing
option 2)
application dependent, min. 220 nF
RMON1
CMON11
CMON12
RFIFO
Resistor at MON1 pin for ISO pulses
Pi Filter Capacitor at MONx
Pi Filter Capacitor at MONx
Resistor at FIFO pin for ISO pulses
Pi Filter Capacitor at FIFO pin
Pi Filter Capacitor at FIFO pin
DC link capacitor
application dependent, e. g. 1 kΩ
application dependent, e. g. 10 nF
application dependent, e. g. 1 nF
application dependent, e. g. 1 kΩ
application dependent, e. g. 10 nF
application dependent, e. g. 1 nF
application dependent, e. g. 680 µF
application dependent, e. g. 680 µF
application dependent, e. g. 680 µF
application dependent, e. g. 1 nF
application dependent, e. g. 12 Ω
application dependent, e. g. 12 Ω
application dependent, e. g. 1 nF
application dependent, e. g. 1 nF
application dependent, e. g. 5 mΩ
2 Ω
CFIFO1
CFIFO2
CPH1
CPH2
DC link capacitor
CPH3
DC link capacitor
CCSA
Filter capacitor
RCSAN
RCSAP
CCSAN
CCSAP
RSHUNT
RVSD
Filter resistor (optional)
Filter resistor (optional)
Filter capacitor (optional)
Filter capacitor (optional)
Shunt resistor
Limitation of reverse current due to
transient (-2 V, 8 ms)
Datasheet, Z8F80164852
35
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
BLDC driver application information
Table 21 External components (BOM) (cont’d)
Symbol
CVSD
Function
Component
Capacitor
1 µF
RVDH
Filter resistor
optional, e. g. 1 kΩ
optional, e. g. 100 nF
optional, 2 Ω
CVDH
Filter capacitor
RGH1/2/3
RGL1/2/3
RGSH1/2/3
RGSL1/2/3
CGSH1/2/3
CGSL1/2/3
TH1/2/3
TL1/2/3
TRP
Resistor
Resistor
optional, 2 Ω
Resistor
optional, 100 kΩ
optional, 100 kΩ
optional, 4.7 nF
optional, 4.7 nF
e.g. IPC70N04S5-4R6
e.g. IPC70N04S5-4R6
e.g. IPC70N04S5-4R6
e.g. BC817
Resistor
Capacitor
Capacitor
N-channel MOSFET
N-channel MOSFET
Reverse polarity protection MOSFET
Reverse polarity protection transistor
Reverse polarity protection resistor 1
Reverse polarity protection resistor 2
Reverse polarity protection circuit diode
EMC filter coil
QRP
RRP1
10 kΩ
RRP2
3.3 kΩ
DRP
e.g. BAS52-02V
e.g. 4.7 µH
LPFILT
CPFILT1/2
CSH1/2/3
RSH2
EMC filter capacitor
Capacitor
e.g. 22 µF
optional
Resistor
optional
RSH3
Resistor
optional
QXTAL
RXD
Crystal or ceramic resonator
Damping resistor
Capacitor
optional , e. g. NG3225GA, 16 MHz
optional, e. g. 330 Ω
optional, e. g. 0 Ω
optional, e. g. 4.7 pF
optional, e. g. 4.7 nF
optional, e. g. 62 Ω
optional
CXIN
CXOUT
CCAN
Capacitor
Capacitor
RCAN1/2
RT
Resistor
Thermal resistor (e. g. NTC)
TMR sensor
TMR
optional, e. g. TLE5501
4.1
Further application information
•
•
Please contact Infineon Technologies for information regarding the pins FMEA and Safety Manual
For further information, please follow the link: https://www.infineon.com/motixmcu
Datasheet, Z8F80164852
36
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Power Management Unit (PMU)
5
Power Management Unit (PMU)
5.1
Features overview
The Power Management Unit (PMU) manages all functions related to the device power supply and its
supervision. The PMU controls all operating mode transitions and ensures a fail-safe behavior.
The PMU provides following features:
•
State control
–
–
–
–
–
Operating state machine (Start-up, Active, Stop, Sleep and Fail-Sleep)
Voltage regulator control
Master clock generation (MCLK) acting as PMU clock
Reset management controlling the reset behavior of the entire device
Bi-directional reset pin (P0.10/RESET) as reset input and reset output indicating an internally
generated reset
–
Wake-up control for wake-up in Stop/Sleep modes via MON, CAN, BDRV, GPIOs, cyclic timer
•
•
Voltage regulators
–
–
–
–
–
Linear voltage regulators (VMSUP) for internal supply of the device
Linear voltage regulator (VDDP, 5 V typ.) for GPIO and CAN transceiver supply
Linear voltage regulator (VDDC, 1.5 V typ.) for internal digital logic supply
Reference voltage generation (VAREFSUP)
Linear voltage regulator (VDDEXT, 5 V typ.) for external sensors supply
Fail-safe supervision
–
–
–
–
–
–
System monitor, monitoring of fail-safe relevant signals
Supply monitor, monitoring of fail-safe relevant voltages
Safe reference clock (REF_CLK) and clock watchdog for monitoring of the MCLK
Fail-safe input/output (FIFO pin) for external safe shutdown request or indication
Fail-safe window watchdog (FS_WDT) for monitoring the CPU execution timing
Safe shutdown mechanism to bring the bridge driver (BDRV) into a safe off-state
•
Retention memory (GPUDATA with 96 bits) for data storage in Sleep and Fail-sleep modes
5.2
Block diagram
The PMU module consists of the following major functional parts:
•
•
•
•
State control
Voltage regulators
Fail-safe supervision
Retention memory
Datasheet, Z8F80164852
37
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Power Management Unit (PMU)
PMU
State control
AHB
Master clock
generation
Reset
management
Voltage regulator
control
RESET_TYPE_3
RESET_TYPE_4
RESET_TYPE_5
RESET_TYPE_6
MCLK
P0.10/RESET
MCLK
P0[10:0]
P1[4:0]
P2[9:2]
Operating state
machine
Bi-directional
RESET pin
Wake control
WAKEVSDOV
WAKECAN
WAKEMON[3:1]
FAIL_SLEEP_REQ
HP_CLK_EN
IRQ[5:0]
Voltage regulators
VDDP
Master supply
generation
VDDDP
VDDC
VDDEXT
VDDEXT
VS
VMSUP
VGEN_REF
VGEN_ADC
VDD5V_PD
VMSUP
VAREF supply
VAREFSUP
VDDC
VAREF
VAREFSUP
Fail safe supervision
System monitor
Fail-safe WDT
(FS_WDT)
Safe reference
clock & monitor
FIFO
REF_CLK
CSC_OC
CSC_EN
FAIL_SLEEP_REQ
SSONOUT
Bi-directional
FIFO pin
Supply monitor
OT/UV/OV
Safe shutdown
CSC_BIST_FAIL
SYS_OT
FASTDIS
REF_CLK
HP_CLK_FAIL
Retention memory
GPUDATA
PMU_BD.vsdx
Figure 9
Block diagram PMU
Datasheet, Z8F80164852
38
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics PMU
5.3
Electrical characteristics PMU
5.3.1
Supply characteristics
Table 22
PMU Supply DC Specification
Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1)
External Supply in VS
5.5
13.5 28
V
P_PMU_01_01
regulation mode
VS input voltage
transient time
tVSSLEW
5
-
-
-
-
µs
µF
1) VS voltage rise time P_PMU_01_05
rate from 0V to 28V
1) Buffering capacitor P_PMU_01_06
to cut off battery
spikes, value
Required VS input CVS1
capacitance
0.1
depending on
application
requirements, ESR <
1Ω;
1)
Required VS input CVS2
10
-
-
µF
P_PMU_01_07
capacitance
1) Not subject to production test, specified by design
5.3.2
Voltage regulators
5.3.2.1 Master supply characteristics
Table 23
Master Supply DC Specification
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Master Supply
output voltage
VMSUP
1.4
1.5
1.6
V
all parameters within P_PMU_02_01
specification limits
Master Supply
overvoltage
threshold
VMSUPOV
1.65
1.72 1.79
V
P_PMU_02_02
Master Supply
overvoltage filter
time (analog)
tVMSUPOVFT
1
-
3
µs
1) Step on VMSUP from P_PMU_02_03
VMSUP@typ to
VMSUPOV@max
Datasheet, Z8F80164852
39
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics PMU
Table 23
Master Supply DC Specification (cont’d)
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1)
Master Supply
input voltage in
regulation mode
VMSUPIN
5.5
1.2
1
12
28
V
P_PMU_02_04
Master Supply
undervoltage
threshold
VMSUPUV
tMSUPUVFT
VGEN_ADC
1.275 1.35
V
P_PMU_02_06
Master Supply
undervoltage filter
time (analog)
-
3
µs
V
1) Step on VMSUP from P_PMU_02_07
VMSUP@typ to
VMSUPUV@min
Central PMU
1.0
1.1
1.3
PH_PMU_02_18
bandgap reference
voltage measured
at ADC2
1) Not subject to production test, specified by design
5.3.2.2 VDDP characteristics
Table 24
VDDP DC Specification
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
VDDP output
voltage including
line and load
regulation
VDDP
4.9
5.0
5.1
V
all parameters within P_PMU_03_01
specification limits
1mA ≤ IDDP ≤ 170mA;
VDDP regulatorinhigh
current mode
VDDP output
current @ High
Current Mode
(HCM)
IDDPHCM
IDDPLCM1
IDDPLCM2
0
0
0
-
-
-
170
2
mA 1) external 5V Supply, P_PMU_03_03
Supply for VDDC
regulator
VDDP output
mA 1) external 5V Supply, P_PMU_03_04
Supply for VDDC
current @ Low
Current Mode
(LCMN and LCMA)
regulator
VDDP output
7
mA 1) external 5V Supply, P_PMU_03_05
Supply for VDDC
current @ Low
Current Mode
(LCMN and LCMA)
regulator
Datasheet, Z8F80164852
40
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics PMU
Table 24
VDDP DC Specification (cont’d)
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
VDDP undervoltage VDDPUVFALL
falling threshold
2.55
2.65
0.85
4.34
2.67 2.77
V
P_PMU_03_06
P_PMU_03_07
P_PMU_03_09
P_PMU_03_10
1)
1)
VDDP undervoltage VDDPUVRISE
rising threshold
2.77 2.87
V
VDDP undervoltage tVDDPUVFT
filter time
1
1.15
µs
V
VDDP undervoltage VDDPUVWFALL
warning falling
threshold
4.52 4.7
4.62 4.8
1)
VDDP undervoltage VDDPUVWRISE
warning rising
threshold
4.44
1
V
P_PMU_03_11
1)
1)
VDDP undervoltage tVDDPUVWFT
warning filter time
2
3
µs
V
P_PMU_03_12
P_PMU_03_13
P_PMU_03_14
VDDP overvoltage VDDPOVFALL
falling threshold
5.554 5.785 6.016
5.666 5.902 6.138
VDDP overvoltage VDDPOVRISE
V
rising threshold
VDDP current
limitation
IDDPILIM
500
2
700
4
900
6
mA current flowing out of P_PMU_03_16
the pin, VDDP = 0V
1)
VDDP current
limitation filter
time
tVDDPILIMFT
µs
°C
P_PMU_03_17
P_PMU_03_18
P_PMU_03_20
1)
VDDP
overtemperature
threshold
TjVDDPOTSHD
180
40
190
-
200
-
VDDP ripple
rejection
PSRRVDDP
dB 1) @10 ... 20 KHz;
@0.5Vpp; 6V ≤ VS ≤
28V; IDDPHCM = 85mA;
VDDP regulatorinhigh
current mode
Required VDDP
output buffer
capacitance
CVDDP
0.57
-
4.4
µF
1) ESR < 0.1Ω; the
specified capacitor
value is a value
P_PMU_03_22
including tolerances
Datasheet, Z8F80164852
41
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics PMU
Table 24
VDDP DC Specification (cont’d)
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Buffer Capacitance CVCAN
on CAN transceiver
supply to counter
EMI
1
-
3.83
µF
1) Total capacitance of P_PMU_03_23
CVDDP1, CVDDP2 and
CVCAN shall not exceed
4.4μF in order to
ensure startup time
within specification.
The specified
capacitor value is a
value including
tolerances
VDDP_REG current IVDDPREGLCM1
consumption@LCM
-
-
29
µA 1) Low-Current Mode PH_PMU_03_24
1; IDDPLCM1 ≤ 60 μA; -
1, adaptive on or off
40°C<TJ<85°C
µA 1) Low-Current Mode PH_PMU_03_42
2; IDDPLCM1 ≤ 60 μA; -
VDDP_REG current IVDDPREGLCM2
consumption@LCM
-
-
39
2, adaptive on or off
40°C<TJ<85°C
VDDP output
voltage@short
circuit on CAN, High
Current Mode
(HCM)
VDDPSHORT
4.75
5.0
5.25
V
170mA<IDDP≤240mA
PH_PMU_03_30
VDDP output
voltage including
line and load
regulation@Low
CurrentMode(LCM)
VDDPLCMN
4.9
-
5.15
450
V
1µA≤IDDP≤IDDPLCM1/2@ma PH_PMU_03_32
x
VDDP output drop VDDPDROP
0
-
mV IDDP=125mA; VS=3.0V PH_PMU_03_37
1) Not subject to production test, specified by design
Datasheet, Z8F80164852
42
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics PMU
5.3.2.3 VDDC characteristics
Table 25
VDDC DC Specification
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
VDDC output
voltage including
line and load
regulation in HCM
and LCM
VDDC
1.47
1.5
1.56
V
all parameters within P_PMU_04_01
specification limits;
IDDC ≤ 60mA
VDDC output
voltage in LCMN or
LCMA mode
VDDCLCM
0.88
0
0.9
-
0.97
60
V
No external load; MCU P_PMU_04_02
in stop mode; 2.6 ≤
VDDP ≤ 5.5 V
VDDC output
current @ High
Current Mode
(HCM)
IDDCHCM
mA 1) only used as internal P_PMU_04_03
core supply and
supply of internal
analog modules
VDDC output
IDDCLCM
0
-
2.5
mA 1) only used as internal P_PMU_04_04
core supply and
current @ Low
Current Mode
(LCMN and LCMA)
supply of internal
analog modules
VDDC undervoltage VDDCUVFALL
falling threshold
1.2
1.25 1.3
V
P_PMU_04_05
P_PMU_04_06
P_PMU_04_08
P_PMU_04_09
1)
1)
VDDC undervoltage VDDCUVRISE
rising threshold
1.23
0.85
1.28 1.33
V
VDDC undervoltage tVDDCUVFT
filter time (analog)
2
4
µs
V
VDDC undervoltage VDDCUVWFALL
warning falling
threshold
1.317 1.372 1.427
1.349 1.405 1.461
1)
VDDC undervoltage VDDCUVWRISE
warning rising
V
P_PMU_04_10
threshold
1)
VDDC undervoltage tVDDCUVWFT
warning filter time
27
32
37
µs
V
P_PMU_04_11
P_PMU_04_12
P_PMU_04_13
P_PMU_04_14
P_PMU_04_15
VDDC overvoltage VDDCOVFALL
falling threshold
1.62
1.65
1
1.69 1.76
1.72 1.79
1) VS > 3V
VDDC overvoltage VDDCOVRISE
rising threshold
V
1)
1)
VDDC overvoltage tVDDCOVFT
filter time
2
3
µs
mA
VDDC overcurrent IDDCOCFALL
70
90
120
falling threshold
Datasheet, Z8F80164852
43
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics PMU
Table 25
VDDC DC Specification (cont’d)
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
VDDC overcurrent IDDCOCRISE
rising threshold
80
100
32
-
130
mA
P_PMU_04_16
P_PMU_04_17
1)
VDDC overcurrent tVDDCOCFT
filter time
27
37
µs
VDDC current
limitation
IVDDCILIM
CVDDC
110
0.57
180
2
mA 1) current flowing out P_PMU_04_19
of the pin, VDDC = 0 V
Required VDDC
output buffer
capacitance
-
µF
1) ESR ≤ 0.1Ω; the
specified capacitor
value is a value
P_PMU_04_21
including tolerances
VDDC_REG current IVDDCREGLCMAON
consumption@LCM
, adaptive on
-
-
23
µA 1) -40°C<TJ<85°C
PH_PMU_04_23
PH_PMU_04_24
VDDC under-
voltage falling
threshold 0.9 V
mode
VDDCUV0V9FALL
762
793
825
mV VS>3V
VDDC under-
voltage rising
threshold 0.9 V
mode
VDDCUV0V9RISE
792
-
823
-
855
20
mV VS>3V
PH_PMU_04_25
PH_PMU_04_31
VDDC_REG current IVDDCREGLCMAOFF
consumption@LCM
µA 1) -40°C<TJ<85°C
, adaptive off
1) Not subject to production test, specified by design
5.3.2.4 VDDEXT characteristics
Table 26
VDDEXT DC Specification
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
External Sensor
Supply Regulator
output voltage
VDDEXTILIM
4.9
5
5.1
V
IDDEXT≤20mA
P_PMU_05_14
External Sensor
Supply Regulator
output voltage
VDDEXTTLIM
4.9
5
5.1
V
IDDEXT=40mA; -
40ºC≤TJ≤150ºC
P_PMU_05_15
Datasheet, Z8F80164852
44
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics PMU
Table 26
VDDEXT DC Specification (cont’d)
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
External Sensor
Supply Regulator
output voltage
VDDEXT
4.8
5
5.2
V
-40ºC≤TJ≤175ºC
P_PMU_05_01
VDDEXT voltage
drop with respect
to VS
VDDEXTDROP
0
50
300
mV 0mA≤IDDEXT≤20mA;
3V≤VS≤5V
P_PMU_05_02
1)
VDDEXT output
current
IDDEXT
0
-
-
-
40
10
50
mA
P_PMU_05_03
P_PMU_05_16
VDDEXT load
regulation
VDDEXTLOR
-100
mV 1) 0mA≤IDDEXT≤40mA
1)
VDDEXT dynamic
load regulation
VDDEXTLOR_DYN -130
mV
I
jumping from P_PMU_05_17
DDEXT
0mA to 40mA and
from 40mA to 0mA
with Δl/Δt=40mA/μs
VDDEXT line
regulation
VDDEXTLIR
-60
-
-
60
mV 1) 0mA≤IDDEXT≤40mA
P_PMU_05_18
VDDEXT dynamic
line regulation
VDDEXTLIR_DYN
-500
500
mV 1) VS jumping from 5.5V P_PMU_05_19
to 18V and from 18V to
5.5V with ΔV/Δt=5V/μs
VDDEXT output
discharge
resistance
RVDDEXT_DISCHG 16
20
1.9
8
24
2.1
10
kΩ IVDDEXT = 0.2mA, MCU in P_PMU_05_20
active state,
VDDEXT_CTRL=[00000
000]h
VDDEXT
VDDEXTUV
1.55
V
P_PMU_05_04
P_PMU_05_05
undervoltage
shutdown
threshold
1)
VDDEXT
tVDDEXTUVFT
6
µs
undervoltage filter
time
VDDEXT current
limitation
IDDEXTILIM
100
180
250
200
380
215
mA 1) current flowing out P_PMU_05_06
of the pin, VDDEXT = 0 V
1)
VDDEXT
overtemperature
threshold
TjVDDEXTOTSHD
°C
µs
P_PMU_05_07
P_PMU_05_08
1)
VDDEXT
tVDDEXTOTFT
8
10
12
overtemperature
filter time
Datasheet, Z8F80164852
45
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics PMU
Table 26
VDDEXT DC Specification (cont’d)
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
VDDEXT ripple
rejection 1
PSRRVDDEXT1
50
-
-
dB 1) @0mA≤Iload≤20mA; P_PMU_05_09
@2Vpp @Vs=13.5V @
0kHz<f≤1kHz
VDDEXT ripple
rejection 2
PSRRVDDEXT2
PSRRVDDEXT3
38
26
-
-
-
-
dB 1) @2Vpp @Vs=13.5V; P_PMU_05_10
@1kHz≤f≤10kHz
VDDEXT ripple
rejection 3
dB 1) @0.5Vpp
@Vs=13.5V;
P_PMU_05_11
P_PMU_05_13
@10kHz≤f≤20kHz
Required VDDEXT CVDDEXT
output buffer
capacitance
0.43
-
2
µF
1) ESR < 0.1Ω; the
specified capacitor
value is a value
including tolerances
1) Not subject to production test, specified by design
Datasheet, Z8F80164852
46
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics PMU
5.3.3
Clock Generators
5.3.3.1 Master clock characteristics
Table 27
Master Clock Specification
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Master clock
frequency
fMCLK
17
0.8
20
20
23
1.2
40
MHz
P_PMU_06_01
P_PMU_06_03
1)
Master clock
settling time
tMCLKRDY
1
µs
Master clock failure tMCLKWDGFT
detection time
30
µs
1) Timing is refered to P_PMU_06_04
REFCLK
1) Not subject to production test, specified by design
5.3.3.2 Safe reference clock characteristics
Table 28
Safe Reference Clock Specification
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Safe reference
clock frequency
fSAFERCLK
85
100
115
kHz
P_PMU_07_01
P_PMU_07_03
1)
Safe reference
tSAFERCLKRDY
40
50
60
µs
clock settling time
1) Not subject to production test, specified by design
Datasheet, Z8F80164852
47
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics PMU
5.3.4
System state control
Table 29
System State Control
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Reset pin input
filter time
Tfilt_RESET
80
100
120
µs
Filter time starts when P_PMU_11_01
the configurable
blanking/blind time
expired
MONx wake source tMONx_FT
filter time
27.2
27.2
27.2
27.2
0.8
32
32
32
32
1
36.8
36.8
36.8
36.8
1.2
µs
µs
µs
µs
ms
1) Two values
configurable
1)
P_PMU_08_01
P_PMU_08_02
P_PMU_08_03
P_PMU_08_04
P_PMU_08_05
Port0.x wake
source filter time
tPORT0_x
tPORT1_x
tPORT2_x
tVDDPUVTO
1)
1)
1)
Port1.x wake
source filter time
Port2.x wake
source filter time
Fail-Safe Sleep
VDDP_TMOUT
trigger timeout
1)
1)
1)
1)
Fail-Safe Sleep
VDDC_TMOUT
trigger timeout
tVDDCUVTO
tLOSSFSYSFT
tSYSOTFT
400
500
32
600
µs
µs
µs
µs
P_PMU_08_06
P_PMU_08_07
P_PMU_08_08
P_PMU_08_09
Fail-Safe Sleep
SYSTEM_CLK_WDG
_FAIL
27.2
27.2
27.2
36.8
36.8
36.8
Fail-Safe Sleep
SYSTEM_OT filter
time
32
Fail-Safe Sleep
tFSWDTFT
32
SAFE_WDT _FAIL
1) Not subject to production test, specified by design
Datasheet, Z8F80164852
48
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics PMU
5.3.5
FIFO Fail-safe supervision
Table 30
FIFO Fail Safe Supervision
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Fail safe output low VFO,L
voltage
-
0.6
1
V
IFO < 4mA
P_PMU_10_01
P_PMU_10_02
P_PMU_10_03
P_PMU_10_04
Fail Safe input
leakage current
IFO,LK
VFIth
-
-
2
µA VFO < 28V
Fail-safe input
2
3
-
3.8
0.7
V
V
threshold voltage
Fail safe input
threshold
VFIth,hys
0.1
hysteresis
1)
Fail-safe input filter tFI,filt
time
6
8
10
50
µs
P_PMU_10_05
Fail-safe input pull- RFI,PU
up resistor
30
40
kΩ 1) Switchable resistor P_PMU_10_06
to VS
1) Not subject to production test, specified by design
Datasheet, Z8F80164852
49
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics PMU
5.3.6
Monitoring and supply generation
Table 31
Monitoring Reference and Supply Generation Specification
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
PMU Failsafe
Analog current
consumption in
sleep mode
IPMUFSSLEEP
-
-
10
µA 1) Only
VMON_SUP_REF and
PH_PMU_10_01
VMSUP_MON active; -
40°C<Tj<85°C
1) Not subject to production test, specified by design
Table 32
VAREF Monitoring Specification
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
VAREF over-voltage VAREFOVRISE
rising threshold
5.4
5.63 5.85
V
PH_PMU_11_02
PH_PMU_11_03
1)
VAREF over-voltage VAREFOVHST
threshold
-
100
-
mV
hysteresis
1) Not subject to production test, specified by design
Datasheet, Z8F80164852
50
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
System Control Unit (SCU)
6
System Control Unit (SCU)
6.1
Features overview
The SCU provides following features:
•
Flexible clock management with different clock sources and prescaler options. This allows a high flexibility
for the operation modes and ensures a fail-safe behavior in case of a clock failure
•
Flexible peripheral management when enabling and disabling peripherals, when switching the system
states and when debugging. The SCU supports the shutdown for some peripherals and the whole system
in case of a critical system state
•
The assignment of interrupt and exception request events to the NVIC and DMA request events to the DMA
module is done inside the SCU
6.2
Block diagram
SCU
CLKOUT
XTALI
CPU_CLK
To
System clock control
Peripherals
XTALO
Peripheral
clocks
Supply
Master clock
To
PMU
Peripheral and operation mode
management
STOP/SLEEP
requests
From
PMU
Resets
Exceptions
IRQ[31:0]
Interrupt
requests
To
NVIC
From
Peripherals
Interrupt and DMA
assignment
DMA req[7:0]
To
DMA
SCU_BlockDiagram.vsdx
Figure 10 Block diagram SCU
Datasheet, Z8F80164852
51
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics SCU
6.3
Electrical characteristics SCU
6.3.1
Oscillators and PLL characteristics
The following table contains the ECs of all system oscillators and the integrated PLL.
Table 33 HP_CLK Oscillator (SCU Clock Control)
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
HP_CLK frequency fHP
range
78.4
80
81.6
MHz This is the fHP
frequency range over
P_SCU_02_02
all operating
conditions
HP_CLK short term fHPST
frequency
deviation
-0.4%
-
0.4% MHz frequencydeviationof P_SCU_02_03
fHP within 100 ms, incl.
VDDC variation
(VDDCmin and
VDDCmax) and
temperature variation
of 30 K
HP_CLK Start-up
time
tHPUP
-
-
1
µs
1) from power supply P_SCU_02_04
stable
1) Not subject to production test, specified by design
Table 34
PLL0
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
VCO reference
frequency range
fREF0
fVCO0
fin0
0.8
48
4
1
1.27
160
40
MHz 1) fref0 = fin0/PDIV0
P_SCU_03_01
P_SCU_03_02
P_SCU_03_03
P_SCU_03_04
P_SCU_03_05
1)
VCO frequency
(tuning) range
-
MHz
1)
Input frequency
range
-
MHz
1)
Output frequency fPLL0
range
5
-
80
MHz
1)
Free-running
frequency
fVCOfree0
10
21.5 45
MHz
Datasheet, Z8F80164852
52
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics SCU
Table 34
PLL0 (cont’d)
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Accumulated jitter tjacc0
with external
oscillator
-5
-
5
ns
µs
1) accumulated over
300 cycles;
@fPLL0 = 60 MHz,
NDIV = 120, PDIV = 2;
P_SCU_03_06
fXTAL = 16 MHz
Lock-in time
tL0
-
-
260
1) from enable till lock P_SCU_03_07
1) Not subject to production test, specified by design
Table 35
PLL1
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
VCO reference
frequency range
fREF1
fVCO1
fin1
0.8
48
4
1
1.27
160
40
MHz 1) fref1 = fin1/PDIV1
P_SCU_04_01
P_SCU_04_02
P_SCU_04_03
P_SCU_04_04
P_SCU_04_05
P_SCU_04_06
1)
VCO frequency
(tuning) range
-
MHz
1)
Input frequency
range
-
MHz
1)
Output frequency fPLL1
range
5
-
80
MHz
1)
Free-running
frequency
fVCOfree1
10
-5
21.5 45
MHz
Accumulated jitter tjacc1
with external
oscillator
-
5
ns
µs
1) accumulated over
300 cycles;
@fPLL1 = 80 MHz,
NDIV = 160, PDIV = 2;
fXTAL = 16 MHz
Lock-in time
tL1
-
-
260
1) from enable till lock P_SCU_04_07
1) Not subject to production test, specified by design
Table 36
Current consumption
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
PLLx active current IDDPLL
-
-
1
mA 1) @ fPLL = 20 to 80 MHz P_SCU_05_01
1) Not subject to production test, specified by design
Datasheet, Z8F80164852
53
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics SCU
6.3.2
External clock characteristics (XTAL1, XTAL2)
Table 37
Functional Range
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1)
Input voltage range VIXI
for signal on XTALI
-0.2
-
1.7
V
P_SCU_06_01
P_SCU_06_02
Input amplitude on VAXI
XTALI
0.6
-
-
V
1) Peak-to-peak
voltage
XTALI input current IIL
-20
4
-
-
20
40
µA 1) 0V<VIN<VDDC
MHz 2) 1) on XTALI
P_SCU_06_03
P_SCU_06_04
Digital oscillator
input frequency
fXTALI
fXTAL
t1
Analog oscillator
input frequency
4
6
-
-
16
-
MHz 1) connected to
XTALI/XTALO
P_SCU_06_05
P_SCU_06_06
XTALI high time
XTALI low time
XTALI rise time
ns
ns
ns
1) this is a system
requirementandmust
be ensured by
application
t2
6
-
-
-
-
1) this is a system
requirementandmust
be ensured by
P_SCU_06_07
P_SCU_06_08
application
t3
8
1) this is a system
requirementandmust
be ensured by
application; 10% to
90%
XTALI fall time
t4
-
-
8
ns
1) this is a system
requirementandmust
be ensured by
application; 90% to
10%
P_SCU_06_09
1) Not subject to production test, specified by design
2) Above 24MHz the hysteresis needs to be switched off (see register SCU_XTAL_CTRL).
Datasheet, Z8F80164852
54
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Microcontroller Unit (MCU)
7
Microcontroller Unit (MCU)
7.1
Features overview
The MCU provides following features:
•
Arm® Cortex®-M3 processor
–
–
–
–
Arm® Cortex®-M3 processor core
Arm® System Timer (SYSTICK)
Nested Vector Interrupt Controller (NVIC)
Arm® CoreSightTM Debug Unit (SW-DP)
•
•
Direct Memory Access (DMA)
Memory system
–
–
–
–
–
Non-volatile memory uncached (FLASH0)
Non-volatile memory cached (FLASH1)
Program SRAM memory (PSRAM)
Data SRAM memory (DSRAM)
Read-only memory (ROM)
•
•
Cache system
Multilayer Bus Matrix
–
–
Bus Matrix interconnect topology
AHB watcher
•
•
Memory Access Control (MAC)
–
–
–
Memory protection
Trusted Gate mechanism
Firmware
Peripheral Bridge (PBA0/1)
Datasheet, Z8F80164852
55
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Microcontroller Unit (MCU)
7.2
Block diagram
The Figure 11 illustrates the top-level architecture of the Microcontroller Unit sub-system.
Debug
Interface
Arm®
Cortex®-M3
Processor
DMA
FLASH1
FLASH0
DSRAM
PSRAM
ROM
Interrupts
Cache
master
Memory Access Control
Multilayer Bus Matrix
PBA0
PBA1
Peripherals 0
Peripherals 1
Figure 11 Block diagram MCU
Datasheet, Z8F80164852
56
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics Flash parameters
7.3
Electrical characteristics Flash parameters
7.3.1
FLASH0 and FLASH1 characteristics
This chapter includes the parameters of the embedded flash module (incl. config sector).
Table 38 Flash Characteristics
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Read time
tread_ac
-
-
75
ns
Read accesses to the P_NVM_01_01
flash module which is
under
write/erase/verify
operation is not
allowed; 3V≤Vs≤28V
Programming time tPR
per 128 Byte page
-
-
3
-
3.5
4
ms 3V≤Vs≤28V
P_NVM_01_02
P_NVM_01_03
Programming time tPR_FW
per 128 Byte page
incl. Firmware
ms 3V≤Vs≤28V
routine runtime for
program operation
Erase time per
sector/page
tER
-
-
4
-
4.5
5
ms 3V≤Vs≤28V
ms 3V≤Vs≤28V
P_NVM_01_04
P_NVM_01_05
Erase time per
sector/page incl.
Firmware routine
runtime for erase
operation
tER_FW
Data retention time tRET
20
50
30
-
-
-
-
-
-
year @NER
s
year 1) 2) @NER; Tj=30°C
s
P_NVM_01_06
P_NVM_01_07
P_NVM_01_08
Data retention time tRET_strg
for device storage
Flash endurance for NER_high
page within user
kcyc Valid for FLASH0
les
sectors for FLASH0
Flash erase
endurance for
security pages
NSEC
10
32
-
-
-
-
cycl Data retention time 20 P_NVM_01_09
es
years; Tj=25°C
3)
Drain disturb limit NDD
kcyc
les
P_NVM_01_10
Datasheet, Z8F80164852
57
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics Flash parameters
Table 38
Flash Characteristics (cont’d)
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Flash endurance for NER
page within user
sectors for
1
-
-
kcyc Valid for FLASH0 and P_NVM_01_11
les FLASH1
FLASH0/1
Data retention time tRET_short
5
-
-
year @NER_high
P_NVM_01_12
for high endurance
s
1) Derived by extrapolation of lifetime tests.
2) Not subject to production test, specified by design
3) This parameter limits the number of subsequent programming operations within a physical sector without a given
page in this sector being (re-)programmed. The drain disturb limit is applicable if wordline erase is used repeatedly.
For normal sector erase/program cycles this limit will not be violated. For data sectors the integrated EEPROM
emulation firmware routines handle this limit automatically, for wordline erases in code sectors (without EEPROM
emulation) it is recommended to execute a software based refresh, which may make use of the integrated random
number generator NVMBRNG to statistically start a refresh.
Datasheet, Z8F80164852
58
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
System Watchdog Timer (SYSWDT)
8
System Watchdog Timer (SYSWDT)
8.1
Features overview
The System Watchdog Timer (SYSWDT) belongs to the MCU subsystem. The SYSWDT resets the
MCU subsystem in case it is not serviced within a defined time. Therefore it can bring the system into a defined
state if the software is not executing according to its normal timing scheme due to a malfunction.
The SYSWDT provides following features:
•
•
•
•
16-bit window watchdog timer
Programmable watchdog period and window
Selectable input frequency
Prewarning interrupt for debug purpose
8.2
Block diagram
SYSWDT
8-bit reload value
SYSWDTCON.
WDTRS
SYSWDTREL.WDTREL
clear
/2
WDT
CLK
0
1
8-bit up counter
8-bit up counter
CPU_CLK
SYSWDT.WDT[7:0]
SYSWDT.WDT[15:8]
/128
overflow
To
NVIC
NMISR.NMIWDT
(EXCEPT [-14])
SYSWDTCON.
WDTPR
SYSWDTCON.
WDTEN
SYSWDTCON.
WDTIN
Overflow and boundary control
SYSWDTCON.
WDTBEN
SYSWDTWINB.
WDTWINB
SCU_WDT_TIMEOUT
(reset request)
To
PMU
SYSWDT_FunctionalBlock.vsd
Figure 12 Block diagram SYSWDT
Datasheet, Z8F80164852
59
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Universal Asynchronous Receiver Transmitter (UART0/1)
9
Universal Asynchronous Receiver Transmitter (UART0/1)
9.1
Features overview
The UART0/1 provide a full-duplex asynchronous receiver/transmitter, i.e., it can transmit and receive
simultaneously. They are also receive-buffered (1 byte), i.e., they can commence reception of further bytes
before a previously received byte has been read from the receive register. However, if the first byte still has not
been read by the time the reception of the second byte is complete, the previous byte will be lost. The serial
port receive and transmit registers are accessed at Special Function Register (SFR) TXBUF and RXBUF. Writing
to TXBUF loads the transmit register, and reading RXBUF accesses a physically separate receive register.
The UART0/1 provides following features:
•
Full-duplex asynchronous modes
–
–
8-bit or 9-bit data frames, LSB first
fixed or variable baud-rate
•
•
•
•
•
Receive buffered (1 Byte)
Transmit buffered (1 Byte)
Multiprocessor communication
Interrupt generation on the completion of a data transmission or reception
Baud-rate generator with fractional divider for generating a wide range of baud-rates, e.g. 9.6 kBaud,
19.2 kBaud, 115.2 kBaud, 125 kBaud, 250 kBaud, 500 kBaud, 2 MBaud
•
•
•
Hardware logic for break and synch Byte detection
Tx inverter logic
LIN support: connected to timer channel for synchronization to LIN baud-rate
In all modes, transmission is initiated by any instruction that uses TXBUF as a destination register or by writing
to the start bit or by an external event. The start selection is programmable. Reception is initiated in the modes
by the incoming start bit if REN = 1.
The serial interface also provides interrupt requests when transmission or reception of the frames has been
completed. The corresponding interrupt request flags are TI or RI, respectively. If the serial interrupt is not
used (i.e., serial interrupt not enabled), TI and RI can also be used for polling the serial interface.
Datasheet, Z8F80164852
60
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Universal Asynchronous Receiver Transmitter (UART0/1)
9.2
Block diagram
UART
Module
RI
TI
TXDx
RXDx
GPIO
SCU
Interrupt
Control
P0.x
P1.x
P2.x
ERRSYN
EOFSYN
Interrupt
Control
LIN Break/
Sync Detection
Inter-
connection
SCU
Clock
Control
fUART_CLK
RXDO
TXEVx
Baud Rate
Generator
I/O and Start
Control
CANH
CANL
CAN TRX
SCU
Peripheral
UART_DIS
Management
Figure 13 Block diagram UART
Datasheet, Z8F80164852
61
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
High-Speed Synchronous Serial Interface (SSC0/1)
10
High-Speed Synchronous Serial Interface (SSC0/1)
10.1
Features overview
The two high-speed synchronous serial interfaces SSC0/1 support both full-duplex and half-duplex serial
synchronous communication.
The SSC0/1 provides following features:
•
Master and Slave Mode operation
Full-duplex or half-duplex operation
•
•
•
Transmit and receive buffered
Flexible data format
•
•
•
•
Programmable number of data bits: 2 to 64-bits
Programmable shift direction: Least Significant Bit (LSB) or Most Significant Bit (MSB) shift first
Programmable clock polarity: idle low or high state for the shift clock
Programmable clock/data phase: data shift with leading or trailing edge of the shift clock
•
•
•
•
•
Variable baud-rate, up to 15 MBaud (Slave mode), 30 MBaud (Master Mode)
Chip Select (Master), for 1 … 4 slaves
Chip Select (Slave)
Compatible with Serial Peripheral Interface (SPI)
Interrupt generation
•
•
•
Interrupt on a transmitter empty condition
Interrupt on a receiver full condition
Interrupt on an error condition (receive, phase, baud-rate, transmit error)
Datasheet, Z8F80164852
62
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
High-Speed Synchronous Serial Interface (SSC0/1)
10.2
Block diagram
SSC0/1
General configuration
Baud-rate
generator
Master & slave
mode
Input selection
Receive and transmit configuration
AHB
Single & continues
transfer
Data format
Chip select
SSC_CLK
MTSR[D:A]
MRST[D:A]
SCLK[D:A]
SLS[D:A]
MTSR
Receive and transmit engine
MRST
SCLK
CS[3:0]
Transmit
start
Shift register
2-64 Bit
Error
detection
START[D:A]
Event generation
TIR
RIR
EIR
Status
Interrupt and DMA request
SSC_FuncBD.vsdx
Figure 14 Block diagram SSC
Datasheet, Z8F80164852
63
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics SSC0/1
10.3
Electrical characteristics SSC0/1
10.3.1
SSC timing characteristics
Table 39
SSC Master Mode Timing (Operating Conditions apply, CL = 50 pF)
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1) 2)
SCLK clock period t0
2 *TSSC
-
-
-
-
V
>2.7V
P_SSC_01_01
P_SSC_01_02
DDP
2)
MTSR delay from
SCLK
t1
10
ns
V
>2.7V
DDP
2)
MRST setup to SCLK t2
10
15
-
-
-
-
ns
ns
V
>2.7V
>2.7V
P_SSC_01_03
P_SSC_01_04
DDP
2)
MRST hold from
SCLK
t3
V
DDP
1) TSSCmin = TCPU = 1/fCPU
.
If fCPU = 20 MHz, t0 = 100 ns. TCPU is the CPU clock period. Additionally, the
speed limitation of the GPIO needs to be taken into account.
2) Not subject to production test, specified by design
t0
SCLK1)
t1
t1
1)
MTSR
t2
t3
Data
valid
MRST1)
t1
1) This timing is based on the following setup: CON.PH = CON.PO = 0.
SSC_Tmg1
Figure 15 SSC master mode timing
Datasheet, Z8F80164852
64
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
CAN Controller (MultiCAN+)
11
CAN Controller (MultiCAN+)
11.1
Features overview
The MultiCAN+ provides a communication interface which is compliant to the CAN specification CAN FD
ISO11898-1 (non-ISO CAN FD format and ISO CAN FD), providing communications at up to 1 Mbit/s in
classical CAN (ISO 11898-1:2003(E) mode and/or CAN FD until 2 MBaud data speed, dependent on frequency
and nodes).
The MultiCAN+ for the TLE989x/TLE988x consists of 1 module (i.e. MultiCAN with 1 CAN nodes), representing 1
serial communication interfaces. All nodes are CAN FD capable. Each CAN node communicates over two pins
(TXD and RXD). The device ports which are used for TXD and RXD may be individually configured within the
GPIO block. Several port configuration options are available to provide application-specific flexibility.
The MultiCAN+ contains 1 independently operating CAN node with Full-CAN functionality that is able to
exchange Data and Remote Frames via a gateway function. Each CAN node can receive and transmit standard
frames with 11-bit identifiers as well as extended frames with 29-bit identifiers.
All CAN nodes share a common set of 32 message objects. Each message object can be individually allocated
to one of the CAN nodes. Besides serving as a storage container for incoming and outgoing frames, message
objects can be combined to build gateways between the CAN nodes or to setup a FIFO buffer.
The message objects are organized in double-chained linked lists, where each CAN node has its own list of
message objects. A CAN node stores frames only into message objects that are allocated to the message object
list of the CAN node, and it transmits only messages belonging to this message object list. A powerful,
command-driven list controller performs all message object list operations.
The bit timings for the CAN nodes are derived from the module timer clock (fCAN) and are programmable up to
a data rate of 1 Mbit/s in Classical CAN (ISO 11898-1:2003(E) mode or up to 2 MBaud in CAN FD mode. External
bus transceivers are connected to a CAN node via a pair of receive and transmit pins.
The MultiCAN+ provides the following features:
•
•
Compliant with ISO 11898 and SAE J 1939
Supports CAN with Flexible Data-Rate Specification CAN FD (non-ISO CAN FD format and ISO CAN FD) with
max. 64 data bytes
•
•
•
•
•
•
Data transfer rates up to 1 Mbit/s when operating in Classical CAN mode per ISO 11898-1:2003(E)
Supports up to 2 MBaud, when operating in CAN FD mode.
Support for asynchronous clock sources for baud-rate generation
Flexible and powerful message transfer control and error handling capabilities
Advanced CAN bus bit timing analysis and baud-rate detection for each CAN node via a frame counter
Full-CAN functionality: A set of 32 message objects can be individually
–
–
–
–
Configured as transmit or receive object
Setup to handle frames with 11-bit or 29-bit identifier
Identified by a timestamp via a frame counter
Configured to remote monitoring mode
•
Advanced Acceptance Filtering
–
–
Each message object provides an individual acceptance mask to filter incoming frames
A message object can be configured to accept standard or extended frames or to accept both standard
and extended frames
–
Message objects can be grouped into different priority classes for transmission and reception
Datasheet, Z8F80164852
65
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
CAN Controller (MultiCAN+)
–
The selection of the message to be transmitted first can be based on frame identifier, IDE bit and RTR
bit according to CAN arbitration rules, or on its order in the list
•
Advanced CAN node features
–
–
–
–
Analyzer mode supports monitoring of bus traffic without actively participating on the bus
Internal Loop-Back mode is available for test purposes
Data transmission from a node can be stopped without affecting reception
Programmable minimum delay between two consecutive messages
•
•
Advanced message object functionality
–
Message objects can be combined to build FIFO message buffers of arbitrary size, limited only by the
total number of message objects
Advanced data management
–
–
–
–
The message objects are organized in double-chained lists
up to 8 lists can be used for message objects
List reorganizations can be performed at any time, even during full operation of the CAN nodes
A powerful, command-driven list controller manages the organization of the list structure and ensures
consistency of the list
–
Message FIFOs are based on the list structure and can easily be scaled in size during CAN operation
•
Advanced interrupt handling
–
–
–
Message interrupts, node interrupts can be generated
Interrupt requests can be routed individually to one of the 3 interrupt output lines
Message post-processing notifications can be combined flexibly into a dedicated register field of
256 notification bits
11.2
Block diagram
CAN Controller
Baud
Rate
Clock
Block
MultiCAN+
fASYN_CLK
fCAN
Pin x.y
fSYN_CLK
fCLC
Clock
Control
.
.
.
GPIO
Message
Object
Buffer
Linked
List
Control
AHB
m
Objects
CAN
Transceiver
CANH
CANL
DMA
NVIC
TXDC
CAN
Node 0
CAN Control
RXDC
MultiCanPlusTLE988x9x.vsd
Figure 16 Block diagram MultiCAN+
Datasheet, Z8F80164852
66
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
CAN Transceiver (CANTRX)
12
CAN Transceiver (CANTRX)
12.1
Features overview
The CAN transceiver (CANTRX) meets the physical layer requirements of the ISO11898-2:2016 High-Speed
Controller Area Network (CAN) specification providing an interface between the CAN bus and the CAN protocol
controller (MultiCAN+).
The CANTRX provides following features:
•
•
•
•
Compliant to ISO11898-2:2016
Compliant to classical CAN and CAN-FD up to 5 Mbps
Fulfills CAN interfaces (v1.2) OEM hardware requirements
Supports four operating modes:
–
–
–
–
Off mode
Normal mode (Rx, Tx)
Receive-only mode (Rx-only)
Sleep mode for low-power operation. Wake-up time: <100 µs typ. Wake-up pattern recognition
•
Interfaces with multiple hosts:
–
–
–
–
MultiCAN+ protocol controller
UART
GPIO
Timer GPT12 and Timer2 (T2)
•
•
CAN bus bias control. Ideal passive behavior when unpowered.
Diagnostics:
–
–
–
CAN supply (VCAN) undervoltage supervision
CAN bus dominant timeout
CAN transceiver input (TxD) dominant timeout
•
Overtemperature protection
Datasheet, Z8F80164852
67
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
CAN Transceiver (CANTRX)
12.2
Block diagram
CANTRX
AHB
SYS0_CLK
MCLK
TXD_IN_SEL
Transmitter
TFILT_CLK
TXDA
TXDB
TXDC
TXDD
TxD
VCAN
Driver
CANH
CANL
Diagnostic
and
protection
VCAN_UV
GNDCAN
TO
Bus bias
EN
MODE
TSIL_EN
VCAN/2
Receiver
RXD
Wake receiver WUP detection
WAKECAN
Event generation
IRQS.
BUS_TO_STS
TXD_TO_STS
OT_STS
UV_STS
BUS_TO_IS
TXD_TO_IS
OT_IS
IRQ
BUS_ACT_IS
CANTRX_BD.vsdx
Figure 17 Block diagram CANTRX
Datasheet, Z8F80164852
68
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics CANTRX
12.3
Electrical characteristics CANTRX
12.3.1
CANTRX characteristics
Table 40
CAN Bus Receiver
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
CAN = 4.75 V to 5.25 V, RL = 60 Ω, CAN Normal mode, all voltages with respect to ground, positive current flowing
into pin (unless otherwise specified)
V
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
"Dominant"
differential range
Vdiff, D_range
0.9
-
8.0
V
V
V
CAN Normal/Receive- P_CAN_01_01
only Mode; -
12V≤VCM(CAN)≤12V;
Vdiff=VCANH - VCANL
"Recessive"
differential range
Vdiff, R_range
-3.0
-
0.5
CAN Normal/Receive- P_CAN_01_02
only Mode; -
12V≤VCM(CAN)≤12V;
Vdiff=VCANH - VCANL
1)
Common Mode
Range
CMR
-12
20
40
-3
-
12
50
100
3
P_CAN_01_03
CANH, CANL Input Rin
Resistance
40
80
-
kΩ Recessive state; -
2V≤VCANL/H≤7V
P_CAN_01_04
P_CAN_01_05
P_CAN_01_06
Differential Input
Resistance
Rin_diff
DRi
kΩ Recessive state; -
2V≤VCANL/H≤7V
Input Resistance
Deviation between
CANH and CANL
%
1) Recessive state;
VCANL=VCANH = 5V
Input Capacitance Cin
CANH, CANL versus
GND
-
20
40
pF
1) Recessive state; S2P P_CAN_01_07
method @ f=10MHz
Differential Input
Capacitance
Cin_diff
-
10
-
20
pF
V
1) Recessive state; S2P P_CAN_01_08
method @ f=10MHz
"Dominant"
Vdiff,D_range_sleep 1.15
8.0
CAN Sleep Mode; -
P_CAN_01_09
differential range,
CAN Sleep Mode
12V≤VCM(CAN)≤12V;
Vdiff=VCANH - VCANL
"Recessive"
Vdiff,R_range_sleep -3.0
-
0.4
V
CAN Sleep Mode; -
P_CAN_01_10
differential range,
CAN Sleep Mode
12V≤VCM(CAN)≤12V;
Vdiff=VCANH - VCANL
1) Not subject to production test, specified by design
Datasheet, Z8F80164852
69
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics CANTRX
Table 41
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
CAN = 4.75 V to 5.25 V, RL = 60 Ω, CAN Normal mode, all voltages with respect to ground, positive current flowing
into pin (unless otherwise specified)
CAN Bus Transmitter
V
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
CANH/CANL
Recessive Output
Voltage
VCANL/H_NM
2.0
-
3.0
V
CAN Normal/Receive- P_CAN_02_01
only Mode; no load
CANH/CANL
VCANL/H_LP
-0.1
-
0.1
V
CAN Sleep Mode; no P_CAN_02_02
load
Recessive Output
Voltage, CAN Sleep
Mode
CANH, CANL
Recessive Output
Voltage Difference
Vdiff_r_N
-500
-200
-
-
50
mV CAN Normal/Receive- P_CAN_02_03
only Mode; no load;
Vdiff=VCANH - VCANL
CANH, CANL
Vdiff_r_W
200
mV CAN Sleep Mode; no P_CAN_02_04
Recessive Output
Voltage Difference,
CAN Sleep Mode
load; Vdiff=VCANH - VCANL
CANL Dominant
Output Voltage
VCANL
0.5
-
-
-
2.25
4.5
V
V
V
CAN Normal Mode;
50Ω≤RL≤65Ω; VCAN=5V
P_CAN_02_05
P_CAN_02_06
P_CAN_02_07
CANH Dominant
Output Voltage
VCANH
2.75
1.5
CAN Normal Mode;
50Ω≤RL≤65Ω; VCAN=5V
CANH, CANL
Dominant Output
Voltage Difference
Vdiff_d_N
2.5
CAN Normal Mode;
50Ω≤RL≤65Ω;
4.9V≤VCAN≤5.25V;
Vdiff=VCANH - VCANL
CANH, CANL
Vdiff_d_N
1.5
1.4
-
-
-
-
5.0
3.3
70
V
V
1) CAN Normal Mode; P_CAN_02_08
RL=2240Ω;
4.9V≤VCAN≤5.25V;
Dominant Output
Voltage Difference
(resistance during
arbitration)
Vdiff=VCANH - VCANL
CANH, CANL
Vdiff_d_N
1) CAN Normal Mode; P_CAN_02_09
45Ω≤RL≤70Ω;
4.9V≤VCAN≤5.25V;
Dominant Output
Voltage Difference
(extended bus load
range)
Vdiff=VCANH - VCANL
CANH, CANL output Vdiff_slope_rd
voltage difference
slope, recessive to
dominant
V/µs 1) 30% to 70% of
measured differential
bus voltage; CL=100pF
P_CAN_02_14
Datasheet, Z8F80164852
70
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics CANTRX
Table 41
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
CAN = 4.75 V to 5.25 V, RL = 60 Ω, CAN Normal mode, all voltages with respect to ground, positive current flowing
into pin (unless otherwise specified)
Parameter Symbol
CAN Bus Transmitter (cont’d)
V
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
CANH, CANL output Vdiff_slope_dr
voltage difference
slope, dominant to
recessive
-
-
70
V/µs 1) 70% to 30% of
measured differential
bus voltage; CL=100pF
P_CAN_02_15
Driver Symmetry
VSYM
4.5
-
5.5
V
2) CAN Normal Mode; ; P_CAN_02_10
SPLIT=4.7nF;
50Ω≤RL≤60Ω; VCAN=5V
mA CAN Normal Mode;
CAN=5V; VCANHshort=-3V
mA CAN Normal Mode;
CAN=5V; VCANLshort=18V
VSYM = VCANH + VCANL
C
CANH Short Circuit ICANHsc
Current
-115
50
-
-80
80
2
-50
115
5
P_CAN_02_11
P_CAN_02_12
P_CAN_02_13
V
CANL Short Circuit ICANLsc
Current
V
3)
Leakage Current
ICANH,lk ICANL,lk
µA
R
=0 / 47kΩ;
test
0V≤VCANH,L≤5V; VS=VCAN
= 0V
1) Not subject to production test, specified by design
2) VSYM shall be observed during dominant and recessive state and also during the transition dominant to recessive and
vice versa while TXD is simulated by a square signal (50% duty cycle) with a frequency of up to 1 MHz (2 MBit/s)
3) Rtest between (Vs/VCAN) and 0 V (GND)
Table 42
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
CAN = 4.75 V to 5.25 V, RL = 60 Ω, CAN Normal mode, all voltages with respect to ground, positive current flowing
into pin (unless otherwise specified)
Dynamic CAN-Transceiver Characteristics
V
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Min. Dominant
Time for Bus Wake-
up
tWake1
0.5
1.2
1.8
µs
1) CAN Sleep Mode;
TJ = -40ºC to 85ºC; -
12V≤VCM(CAN)≤12V
P_CAN_03_01
Wake-up Time-out, tWake2
Recessive Bus
0.8
-
10
ms 2) 1) CAN Sleep Mode
P_CAN_03_02
P_CAN_03_03
Wake-up reaction tWU_WUP
time (WUP)
-
100
µs
ns
ns
3) 2) 4) 1) Wake-up
reaction time after a
valid WUP
5) CAN Normal Mode; P_CAN_03_04
CL=100pF; CRXD=15pF;
RL=60Ω
5) CAN Normal Mode; P_CAN_03_05
CL=100pF; CRXD=15pF;
RL=60Ω
Loop delay
(recessive to
dominant)
tLOOP,f
-
-
150
150
255
255
Loop delay
(dominant to
recessive)
tLOOP,r
Datasheet, Z8F80164852
71
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics CANTRX
Table 42
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
CAN = 4.75 V to 5.25 V, RL = 60 Ω, CAN Normal mode, all voltages with respect to ground, positive current flowing
into pin (unless otherwise specified)
Parameter Symbol
Dynamic CAN-Transceiver Characteristics (cont’d)
V
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Propagation Delay td(L),T
TXDCAN low to bus
dominant
-
90
140
140
140
140
550
ns
ns
ns
ns
ns
CAN Normal Mode;
CL=100pF; RL=60Ω
P_CAN_03_06
Propagation Delay td(H),T
TXDCAN high to bus
recessive
-
100
100
100
-
CAN Normal Mode;
CL=100pF; RL=60Ω
P_CAN_03_07
P_CAN_03_08
P_CAN_03_09
P_CAN_03_11
Propagation Delay td(L),R
bus dominant to
RXDCAN low
-
CAN Normal Mode;
CL=100pF; RL=60Ω
Propagation Delay td(H),R
bus recessive to
RXDCAN high
-
CAN Normal Mode;
CL=100pF; RL=60Ω
Received Recessive tbit(RXD)_2M
bit width (CAN FD
up to 2Mbps)
400
CAN Normal Mode;
Parameter definition
according to ISO
11898-2; CL=100pF;
CRXD=15pF; RL=60Ω;
tbit(TXD)=500ns
Transmitted
Recessive bit width
(CAN FD up to
2Mbps)
tbit(BUS)_2M
455
-45
120
-
-
-
510
15
ns
ns
ns
CAN Normal Mode;
Parameter definition
according to ISO
P_CAN_03_12
11898-2; CL=100pF;
CRXD=15pF; RL=60Ω;
tbit(TXD)=500ns
Receiver timing
symmetry (CAN FD
up to 2Mbps)
ΔtRec_2M
6) CAN Normal Mode; P_CAN_03_13
Parameter definition
according to ISO
11898-2; CL=100pF;
CRXD=15pF; RL=60Ω;
tbit(TXD)=500ns
Received Recessive tbit(RXD)_5M
bit width (CAN FD
up to 5Mbps)
220
CAN Normal Mode;
Parameter definition
according to ISO
P_CAN_03_14
11898-2; CL=100pF;
CRXD=15pF; RL=60Ω;
tbit(TXD)=200ns
Datasheet, Z8F80164852
72
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics CANTRX
Table 42
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
CAN = 4.75 V to 5.25 V, RL = 60 Ω, CAN Normal mode, all voltages with respect to ground, positive current flowing
into pin (unless otherwise specified)
Dynamic CAN-Transceiver Characteristics (cont’d)
V
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Transmitted
Recessive bit width
(CAN FD up to
5Mbps)
tbit(BUS)_5M
155
-45
8
-
210
ns
ns
µs
CAN Normal Mode;
Parameter definition
according to ISO
P_CAN_03_15
11898-2; CL=100pF;
CRXD=15pF; RL=60Ω;
tbit(TXD)=200ns
Receiver timing
symmetry (CAN FD
up to 5Mbps)
ΔtRec_5M
-
15
6) CAN Normal Mode; P_CAN_03_16
Parameter definition
according to ISO
11898-2; CL=100pF;
CRXD=15pF; RL=60Ω;
tbit(TXD)=200ns
CAN Transceiver
Enabling Time
tCAN,EN
12
18
2) 1) SFR "MODE"
setting to first valid
transmitteddominant
bit
P_CAN_03_17
TXDCAN Dominant tTXDCAN_TO
Time-out
1.6
2.0
2.0
2.5
2.4
3.0
ms 2) 1) CAN Normal Mode P_CAN_03_18
BUS Dominant
Time-out
tBUS_CAN_TO
ms 2) 1) CAN
Normal/Receive-only
P_CAN_03_19
Mode
2) 1)
Time-out for bus
inactivity
tSILENCE
tBias
0.6
-
-
-
1.2
s
P_CAN_03_20
P_CAN_03_21
2) 1)
Bus Bias reaction
time
250
µs
1) Not subject to production test, specified by design
2) Tolerance defined by internal oscillator tolerance
3) Wake-up is signalized via VDDC ramping up
4) For WUP: time starts with end of last dominant phase of WUP
5) VSYM shall be observed during dominant and recessive state and also during the transition dominant to recessive and
vice versa while TXD is simulated by a square signal (50% duty cycle) with a frequency of up to 1 MHz (2 MBit/s)
6) ΔtRec = tbit(RXD) - tbit(BUS)
Datasheet, Z8F80164852
73
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics CANTRX
Table 43
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
CAN = 4.75 V to 5.25 V, RL = 60 Ω, CAN Normal mode, all voltages with respect to ground, positive current flowing
into pin (unless otherwise specified)
CAN Overtemperature Characteristics
V
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1)
1)
1)
CAN
TjCAN_OT
175
185
10
5
195
°C
P_CAN_04_01
overtemperature
threshold
CAN
TjCAN_OT,hys
-
-
K
P_CAN_04_02
P_CAN_04_03
overtemperature
hysteresis
CAN
tCAN_OT_FT
4
6
µs
overtemperature
filter time
1) Not subject to production test, specified by design
70%
TXD
30%
td(L),T
td(H),T
Vdiff=CANH-CANL
900mV
500mV
td(H),R
td(L),R
70%
RXD
30%
td(H),TR
Figure 18 Timing diagrams for dynamic characteristics
Datasheet, Z8F80164852
74
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics CANTRX
70%
TXD
30%
tLoop_f
5x tBit(TXD)
tBit(TXD)
Vdiff=CANH-CANL
900mV
tBit(Bus)
500mV
70%
RXD
30%
tLoop_r
Figure 19 From ISO 11898-2: tloop, tbit(TXD), tbit(Bus), tbit(RXD) definitions
tBit(RXD)
Datasheet, Z8F80164852
75
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General Purpose Ports (GPIO)
13
General Purpose Ports (GPIO)
13.1
Features overview
The TLE989x/TLE988x has many digital port pins, which can be used as General Purpose I/Os (GPIO) and are
connected to the on-chip peripheral units.
The TLE989x/TLE988x has port pins organized into three parallel ports: Port 0 (P0), Port 1 (P1) and Port 2 (P2).
Each port pin has a pair of internal pull-up and pull-down devices that can be individually enabled or disabled.
P0 and P1 are bidirectional and can be used as general purpose input/output (GPIO) or to perform alternate
input/output functions for the on-chip peripherals. When configured as an output, the open drain mode can
be selected. On Port 2 (P2) analog inputs are shared with general purpose digital inputs.
The GPIOs provide a generic and flexible software and hardware interface for all standard digital I/Os. Each
port has the same software interfaces for the operation as General Purpose I/O and it further provides the
connectivity to the on-chip peripherals and the control for the pad characteristics. :
The GPIO provides following features:
•
Bidirectional port features (P0, P1)
•
•
•
•
•
•
•
•
•
P0/P1: Configurable pin direction
P0/P1: Configurable pull-up/pull-down devices
P0/P1: Configurable open drain mode
P0/P1: Configurable drive strength
P0/P1: Configurable slew rate
P0/P1: Transfer of data through digital inputs and outputs (general purpose I/O)
P0/P1: Possible readback of pin status when GPIO is configured as output (short detection)
P0/P1: Alternate input/output for on-chip peripherals
P0/P1: up to seven alternate output connections from peripherals selectable. The three configuration
bits per GPIO are located in the same register
•
•
•
P0/P1: separate input and output registers, which allows to evaluate the input while the output is active
(plausibility check)
P0/P1: dedicated output modification registers (enabling set, clear, toggle functionality) to avoid read-
modify-write operations
P0/P1: default configuration during bootup is input and floating (no pull-up/pull-down)
•
•
Analog port features (P2)
•
•
•
•
P2: Configurable pull-up/pull-down devices
P2: Transfer of data through digital inputs
P2: Alternate inputs for on-chip peripherals
P2: Disabling of digital input stage on shared analog input ports
Wake-up feature
•
Configurable wake-up from stop mode via GPIO (rising edge only, falling edge only, both edges), e.g. for
wake-up on a sensor signal
•
•
In total 6 port pins can be configured for wake-up, freely selectable from P0/P1/P2
No lost wake-up, independent from the timing relationship between the wake-up event and the stop-
entry command
Datasheet, Z8F80164852
76
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General Purpose Ports (GPIO)
13.2
Block diagram
Port 0 and Port 1
Port slice
Pad
Pull
devices
Control
registers
AHB
Data
registers
Alternate
inputs
Alternate
outputs
Pn.x
Tristate
inputs
Port_BlockDiagram.vsdx
Figure 20 General structure of bidirectional port
Port 2
Port slice
Pad
Pull
devices
Control
registers
AHB
Data
registers
P2.x
Alternate
inputs
Analog
input
Port_Input_Diagram.vsdx
Figure 21 General structure of input port
Datasheet, Z8F80164852
77
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics GPIO
13.3
Electrical characteristics GPIO
13.3.1
Description of keep and force current
VDDP
keeper
current
PU Device
PUDSEL
P2.x
P1.x
P0.x
\PUDSEL
keeper
current
PD Device
VSS
Pull-Up-Down.vsd
Figure 22 Pull-up/pull-down device
Datasheet, Z8F80164852
78
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics GPIO
internal Pull-Up active
VIN
VIHmax (VDDP+0.3V)
VIH
IPU < IPUKT (min. 60 uA)
IPU > IPUFT (max. 1 mA)
Keep-range
Force-range
valid high
VIHmin (0.7 * VDDP
)
invalid digital input
VILmax (0.3 * VDDP
)
VIL
VILmin (-0.3V)
valid low
IPU definition (non-default): positive current flowing out of pin
internal Pull-Down active
VIN
VIHmax (VDDP+0.3V)
IPD > IPDFT (max. 1 mA)
Force-range
VIH
valid high
VIHmin (0.7 * VDDP
)
invalid digital input
VILmax (0.3 * VDDP
)
IPD < IPDKT (min. 60 uA)
VIL
VILmin (-0.3V)
Keep-range
valid low
Pull-currents.vsd
All values in brackets are for information only
Figure 23 Pull currents, Keep and Force Current
Datasheet, Z8F80164852
79
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics GPIO
13.3.2
Port 0, Port 1, TMS and Reset DC characteristics
Note:
Operating Conditions apply.
Keeping signal levels within the limits specified in this table ensures operation without overload
conditions. For signal levels outside these specifications, also refer to the specification of the
overload current IOV
.
Table 44
DC Characteristics Port0, Port1, TMS, Reset
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Input low voltage
VIL
-0.3
-
-
-
-
-
-
-
-
-
-
0.3 *
VDDP
V
V
V
V
2.55V≤VDDP≤5.5V
P_GPIO_01_01
P_GPIO_01_02
P_GPIO_01_03
P_GPIO_01_04
Input high voltage VIH
0.7 *
VDDP
VDDP +
0.3
2.55V≤VDDP≤5.5V
Input Hysteresis
Input Hysteresis
Hys
0.11 *
VDDP
-
1) 4.5V≤VDDP≤5.5V;
Series Resistance=0Ω
1) 2.55V≤VDDP<4.5V;
Series Resistance=0Ω
Hysext
IOZ2
0.04 *
VDDP
-
Input leakage
current
-5
-22
60
-
+5
+22
-
µA Tj≤85°C; 0V<VIN<VDDP P_GPIO_01_05
Input leakage
current
IOZ2ext
IPUKT
IPUFT
IPDKT
IPDFT
CIO
µA 0V<VIN<VDDP
P_GPIO_01_06
P_GPIO_01_07
P_GPIO_01_08
P_GPIO_01_09
P_GPIO_01_10
Pull-up keep
threshold
µA 2) 3) 4.5V≤VDDP≤5.5V;
VIN=VIHmin
mA 2) 3) 4.5V≤VDDP≤5.5V;
VIN=VILmax
µA 2) 4.5V≤VDDP≤5.5V;
VIN=VILmax
mA 2) 4.5V≤VDDP≤5.5V;
VIN=VIHmin
Pull-up force
threshold
1
Pull-down keep
threshold
60
-
-
Pull-down force
threshold
1
1)
Pin capacitance
-
-
-
-
10
pF
P_GPIO_01_11
P_GPIO_01_13
4) 5)
Output low voltage VOL_max_cur
(max. current)
1.0
V
V
V
V
I ≤IOLmax ;
OL
2.55V≤VDDP≤5.5V
4) 5)
Output low voltage VOL_nom_cur
(nom. current)
-
-
-
-
0.4
I ≤IOLnom
;
P_GPIO_01_14
P_GPIO_01_15
P_GPIO_01_16
OL
2.55V≤VDDP≤5.5V
4) 5) 6)
Outputhighvoltage VOH_max_cur
(max. current)
VDDP
1.0
-
-
-
-
I ≤IOHmax ;
OH
2.55V≤VDDP≤5.5V
4) 5) 6)
Outputhighvoltage VOH_nom_cur
VDDP
I ≤IOHnom ;
OH
(nom. current)
0.4
2.55V≤VDDP≤5.5V
Datasheet, Z8F80164852
80
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics GPIO
Table 44
DC Characteristics Port0, Port1, TMS, Reset (cont’d)
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Output Slope
(strong driver,
sharp edge), rise /
fall time
tslope,sharp
-
-
-
-
15
5
ns
ns
7) CL≤100pF
7) CL≤20pF
P_GPIO_01_17
P_GPIO_01_18
Output Slope
(medium driver),
rise / fall time
tslope,medium
-
-
-
-
50
12
ns
ns
7) CL≤100pF
7) CL≤20pF
P_GPIO_01_19
P_GPIO_01_20
1) Not subject to production test, specified by design
2) Keep current: Limit the current through this pin below the threshold so that the enabled pull device can keep the pin
level.
Force current: Drive at least the threshold current through this pin to override the pin level driven by the enabled pull
device.
See also figure "Pull currents, Keep and Force Current".
These values apply to the fixed pull-devices in dedicated pins and to the user-selectable pull-devices in general
purpose IO pins.
3) IPU definition (non-default): positive current flowing out of pin
4) The maximum deliverable output current of a port driver depends on the selected output driver mode. The limit for
pin groups must be respected.
5) IOLnom, IOLmax, IOHnom, IOHmax: see Table "Current Limits for Port Output Drivers"
6) IOH definition (non-default): positive current flowing out of pin
7) 20% / 80% of VDDP
Datasheet, Z8F80164852
81
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics GPIO
Table 45
Current Limits for Port Output Drivers
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1) 2)
1) 2)
1) 2)
Output Current,
Strong Driver
IOLHs5
IOLHm5
IOLHw5
IOLHs3
IOLHm3
IOLHw3
-
-
-
-
-
-
1.6
5
mA
mA
mA
V
V
V
≥4.5V
≥4.5V
≥4.5V
P_GPIO_02_01
P_GPIO_02_02
P_GPIO_02_03
P_GPIO_02_04
P_GPIO_02_05
P_GPIO_02_06
DDP
DDP
DDP
Output Current,
Medium Driver
1.0
3
Output Current,
Weak Driver
0.25 0.5
Output Current,
Strong Driver
1.0
0.8
3
mA 1) 2) 2.55V≤VDDP<4.5V
mA 1) 2) 2.55V≤VDDP<4.5V
mA 1) 2) 2.55V≤VDDP<4.5V
Output Current,
Medium Driver
1.8
Output Current,
Weak Driver
0.15 0.3
1) Typ. values: Nominal Output Current (IOLnom, IOHnom).
Max. values: Maximum Output Current (IOLmax, IOHmax).
Values are valid for both Lowside current and Highside current.
2) IOH definition (non-default): positive current flowing out of pin
Datasheet, Z8F80164852
82
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics GPIO
13.3.3
Port 2 DC characteristics
Note:
Operating Conditions apply.
Keeping signal levels within the limits specified in this table ensures operation without overload
conditions. For signal levels outside these specifications, also refer to the specification of the
overload current IOV
.
Table 46
DC Characteristics Port 2
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Input low voltage
VIL_P2
-0.3
-
-
-
-
-
-
-
-
-
-
-
0.3 *
VDDP
V
V
V
V
2.55V≤VDDP≤5.5V
P_GPIO_03_01
P_GPIO_03_02
P_GPIO_03_03
P_GPIO_03_04
Input high voltage VIH_P2
0.7 *
VDDP
VDDP +
0.3
2.55V≤VDDP≤5.5V
Input Hysteresis
Input Hysteresis
HysP2
0.11 *
VDDP
-
-
1) 4.5V≤VDDP≤5.5V;
Series Resistance=0Ω
1) 2.55V≤VDDP<4.5V;
Series Resistance=0Ω
HysP2ext
IOZ1_P2
0.04 *
VDDP
Input leakage
current
-400
-1
60
-
+400 nA 2) Tj≤85°C; 0V<VIN<5.1V P_GPIO_03_05
Input leakage
current
IOZ1_P2ext
IPUKT_P2
IPUFT_P2
IPDKT_P2
IPDFT_P2
CIO_P2
+1
-
µA 2) 0V<VIN<5.1V
P_GPIO_03_06
P_GPIO_03_07
P_GPIO_03_08
P_GPIO_03_09
P_GPIO_03_10
P_GPIO_03_11
Pull-up keep
threshold
µA 3) 4) 4.5V≤VDDP≤5.5V;
VIN=VIHmin
mA 3) 4) 4.5V≤VDDP≤5.5V;
VIN=VILmax
µA 3) 4.5V≤VDDP≤5.5V;
VIN=VILmax
mA 3) 4.5V≤VDDP≤5.5V;
VIN=VIHmin
Pull-up force
threshold
1
Pull-down keep
threshold
60
-
-
Pull-down force
threshold
1
1)
Pin capacitance
(digital
-
10
pF
inputs/outputs)
1) Not subject to production test, specified by design
2) An additional error current will flow if an overload current flows through an adjacent pin.
3) Keep current: Limit the current through this pin below the threshold so that the enabled pull device can keep the pin
level.
Force current: Drive at least the threshold current through this pin to override the pin level driven by the enabled pull
device.
See also figure "Pull currents, Keep and Force Current".
4) IPU definition (non-default): positive current flowing out of pin
Datasheet, Z8F80164852
83
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
High-Voltage Monitor Input (MON)
14
High-Voltage Monitor Input (MON)
14.1
Features overview
The High-Voltage Monitor Input (MON) is dedicated to monitor external voltage levels above or below the
threshold VMONth. Each MONx input can further be used to create a wake-up event by detecting a level change
while crossing the threshold. This applies to any system operation mode, especially for the power-down
modes. Furthermore each MONx input can be sampled by the ADC1 as an analog input. It can also be used as
a high-voltage PWM input signal for Timer21.
The MON provides following features:
•
•
•
•
•
High-voltage inputs with threshold voltage 3 V (typ.)
Wake-up capability for system Stop mode and system Sleep mode
Edge sensitive wake-up feature configurable for transitions from low to high, high to low or both directions
MON input level status (high/low) can be read in Active mode
MON inputs can also be evaluated with ADC1 in Active mode to sense high-voltage signals, using adjustable
threshold values for interrupt generation
•
•
•
Selectable pull-up and pull-down current sources available
MON inputs can be selected as inputs for Timer21 to evaluate high-voltage PWM input signals
MON inputs can be used for edge detection (interrupt generation for transitions from low to high, high to
low or both directions)
14.2
Block diagram
VDD5V_PD
MON
to ADC1 / ADC2
+
-
to UART1, T21
(only MON1)
to SCU (interrupt request)
(with fixed digital filter)
MONx
to PMU (wake-up event)
(with configurable digital filter)
Logic (in MON and PMU)
SFR (in PMU and SCU)
VRef
MONx_3V_block_diagram_UM.vsdx
Figure 24 Block diagram MON
Datasheet, Z8F80164852
84
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics MON
14.3
Electrical characteristics MON
14.3.1
MON characteristics
Table 47
Electrical Characteristics Monitoring Input
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Wake-
up/monitoring
threshold voltage
VMONth
2
3
3.8
V
withoutexternalserial P_MON_02_01
resistor Rs (with Rs:dV
= IPD/PU* Rs);
Threshold
hysteresis
VMONth,hys
0.1
-
0.7
V
in all modes; without P_MON_02_02
external serial resistor
Rs (with Rs:dV = IPD/PU
Rs);
*
Pull-up current
IPU, MON
-20
3
-10
10
-
-3
20
2
µA VMON_IN=3.8V
µA VMON_IN=2V
µA 1) 0V<VMON_IN<40V
P_MON_02_03
P_MON_02_04
P_MON_02_05
Pull-down current IPD, MON
Input leakage
current
ILK,MON
-2
1) Valid for enabled module. Pull-up and pull down current functionality disabled; ADC1 off.
Datasheet, Z8F80164852
85
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Analog Reference Voltage Generation (ARVG)
15
Analog Reference Voltage Generation (ARVG)
15.1
Features overview
The Analog Reference Voltage Generation module (ARVG) is responsible for the generation of reference
voltages that can be used by the various analog peripherals in the device.
The ARVG provides following features:
•
•
•
VREF1V2 internal reference voltage generation (VREF1V2, 1.211 V typ.) for ADC2 and the NVM
VREF1V2 is monitored by ADC1
VAREF reference voltage generation (VREF5V, 5 V typ.) for ADC1, CSA, CSC and SDADC; VAREF has a pin and
needs a buffer cap to VAGND (see CVAREF)
•
•
VAREF has an overcurrent (undervoltage) monitor (VAREF_OC)
VAREF has an overvoltage monitor within the PMU (VAREF_OV), for more details please refer to the Power
Management Unit (PMU) chapter
15.2
Block diagram
ARVG
VAREF
VAREF_IRQ.
OC_IS
IRQ
To SCU and NVIC
AHB
VAREFUVF/
VAREFUVR
OC
VAREF_IRQ.
OC_STS
VAREF_IEN.
OC_IEN
tVAREFOCFT
VAREF_CTRL.
EN
&
VREF5V
VAREFSUP
VGEN_REF
VAREF
Can be used as reference for
ADC1, CSA/CSC, SDADC
Monitored by PMU
VAGND
VREF1V2
VREF1V2
Used as reference for
ADC2 and NVM
Bandgap
VREF1V2
VDDC
Monitored by ADC1
CFU_STS.
VAREF_1V2_UP
ARVG.vsdx
Figure 25 Block diagram ARVG
Datasheet, Z8F80164852
86
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics ARVG
15.3
Electrical characteristics ARVG
15.3.1
VREF1V2 DC characteristics
Table 48
VREF1V2 DC Specification
VS = 3 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1.188 1.211 1.22
Reference output
voltage
VREF1V2
V
all parameters within P_ARVG_02_01
specification limits
1) 2)
Temperature drift ΔVREF1V2
0
-
1
%
P_ARVG_02_02
1) ΔVREF1V2 = (VREF1V2,max - VREF1V2,min) / VREF1V2,min where VREF1V2,min is minimum VREF1V2 over temperature range and VREF1V2,max
is maximum VREF1V2 over temperature range
2) Not subject to production test, specified by design
Datasheet, Z8F80164852
87
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics ARVG
15.3.2
VREF5 DC characteristics
Table 49
VREF5 DC Specification
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Reference output
voltage
VREF5V
4.9
5
5.1
V
all parameters within P_ARVG_03_01
specification limits
1) 2)
Temperature drift ΔVREF5V
0
-
-
1
%
P_ARVG_03_08
Power-up time
tWAKE
50
200
µs
VREF5V_ENABLE to
99.9% of the final
value; Cext=100nF
P_ARVG_03_02
VAREF required
buffer capacitance
CVAREF
0.1
-
1
µF
2) the specified
capacitor value is a
value including
tolerances;
P_ARVG_03_03
ESR<100mOhm
VAREF
VAREFUVF
VAREFUVR
IVAREF
2.33
3.44
2.48 2.85
V
V
P_ARVG_03_04
P_ARVG_03_05
undervoltage
(overcurrent)
threshold falling
2)
VAREF
3.74
4
undervoltage
(overcurrent)
threshold rising
2)
2)
VAREF output
current
0
-
20
µA
µs
P_ARVG_03_06
P_ARVG_03_07
VAREF OC filter time tVAREFOCFT
3.6
4
4.4
1) ΔVREF5V = (VREF5V,max - VREF5V,min) / VREF5V,min where VREF5V,min is minimum VREF5V over temperature range and VREF5V,max is
maximum VREF5V over temperature range
2) Not subject to production test, specified by design
Datasheet, Z8F80164852
88
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Analog Digital Converter 1 (ADC1)
16
Analog Digital Converter 1 (ADC1)
16.1
Features overview
The ADC1 is a successive approximation analog to digital converter which can be used for analog signal
measurement especially optimized for BLDC motor control. It has a deterministic behavior regarding to the
sample event and conversion timing, even for a sequence of conversions. The ADC1 operates greatly
autonomous in background avoiding real-time critical interaction by the CPU or DMA.
The ADC1 provides following features:
•
A/D kernel performance:
–
–
–
–
12-bit resolution for all analog inputs
High accuracy of typ. 0.5% of the input range (MVACC, HVACC1
)
Fast sampling time (tsampMV, tsampHV, tsampSHx
)
Fast total conversion time (typ. 800 ns for MV/HV inputs and 1600 ns for SHx inputs)
•
•
Analog inputs ANx:
–
–
–
Up to 11 middle voltage inputs (range MVRNG)
8 factory calibrated high voltage inputs (range HVRNG1)
Referenced to VAREF/VAGND via internal VAREF or VDDEXT voltage regulators
Digital channels with channel control and result generation:
–
–
–
–
Each analog input can be freely assigned to one or more out of 20 possible digital channels
Each digital channel has its own result register with a result event (IRQ capable)
One out of 4 conversion classes can be assigned to a digital channel
Up to 4 digital comparators with 8-bit upper and lower thresholds can monitor a channel result and
generate a compare event (IRQ and/or interconnect signal)
–
–
Up to 4 first order IIR filter s with programmable characteristics can be assigned to a channel result
Programmable repeat feature for each channel
•
•
Trigger and gating control:
–
For deterministic control of complex conversion sequences with respect to time-accuracy and time-
equidistancy
–
–
36 trigger inputs can be selected for hardware or software-based start event of a conversion sequence
16 gating inputs can be selected for hardware or software-based gating of a trigger event
Sequencer:
–
–
–
Allows to build complex and variable conversion schemes
Up to 4 independent sequences with up to 4 digital channels can be freely assembled
Hardware or software-based trigger of a sequence with deterministic end of sequence event (IRQ
capable)
–
–
Possible trigger features: self-trigger or next-sequence-trigger (round robin capable)
Shadow mechanism for data coherency when updating the sequencer configuration on-the-fly
•
Conversion class control:
–
–
–
Programmable sample time adjustment to adapt to the analog input characteristic
Programmable noise reduction feature (oversampling, averaging, sample point adjust)
Programmable broken wire detection feature for external sensors
Datasheet, Z8F80164852
89
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Analog Digital Converter 1 (ADC1)
–
Programmable calibration feature to compensate drift and temperature effects
•
Interrupt and DMA:
–
The ADC1 events can be routed to 4 interrupt node pointers (with 4 IRQ lines)
ADC1 events can be mapped to 8 DMA channels
–
16.2
Block diagram
ADC1
To
Sequencer Control
Sequencer
Channel Control
CLKIN
GTSQx[D:A]
TRGSQx[H:A]
IRQ[3:0]
NVIC
Trigger and gating
inputs (CCU7)
Trigger
Logic
Channel
Class
Channel
Config
SQ[1:0]
CH[7:0]
CMPUP0
CMPLO0
To
DMA
Shadow transfer requests
and enable (CCU7)
From GPIO (P2.x)
EXSTR[F:A]
EXTSTE
ADC Kernel
Result Generation
AN[26:0]
Result
Filter
VS, VCP, SHx, MONx,
CSA, REF1V2
To
Attenuators
A/D
Calibration
CMPUP[3:0]
CMPLO[3:0]
peripheral
interconnects
Compare
VAREF
VAGND
From VAREF
ADC1_BlockDiagram.vsd
Figure 26 Block diagram ADC1
Datasheet, Z8F80164852
90
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics ADC1
16.3
Electrical characteristics ADC1
16.3.1
A/D converter characteristics ADC1
Table 50
A/D converter ADC1, Timing parameters
VS = 4.2 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Reference ground VAGND
-0.05
-
0.05
V
@VAGND pin; tested P_ADC1_01_05
with VAREF=VREF5V,
VAGND = n.c., blocking
cap 100nF between
VAREF and VAGND
Module Clock
Frequency
fadc
5
-
-
-
-
40
-
MHz Internal ADC1 clock
P_ADC1_01_36
P_ADC1_01_38
P_ADC1_01_44
P_ADC1_01_40
derived from module
input clock via CLKDIV
Sample Time HV
input
tsampHV
200
1000
200
ns
ns
ns
1) STC has to be
programmed
accordingly
1) STC has to be
programmed
accordingly
1) STC has to be
programmed
accordingly
Sample Time SHx tsampSHx
input
-
Sample Time MV
input
tsampMV
-
1) Not subject to production test, specified by design
Table 51
A/D converter ADC1, Performance parameters
VS = 4.2 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified), LSB = VAREF/4096
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Integral
Nonlinearity
INLE
-4
-1
-7
-6
-
-
4
2
7
6
2
LSB
P_ADC1_01_18
Differential
Nonlinearity
DNLE
TUEHV
TUEMV
RMS1
-
LSB 1) No two consecutive P_ADC1_01_20
missing codes
2) 1)
Total Unadjusted
Error for HV inputs
-
LSB
LSB
LSB
P_ADC1_01_30
P_ADC1_01_28
P_ADC1_01_32
2) 1)
1)
Total Unadjusted
Error for MV inputs
-
RMS Noise 1
1.5
Datasheet, Z8F80164852
91
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics ADC1
Table 51
A/D converter ADC1, Performance parameters (cont’d)
VS = 4.2 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified), LSB = VAREF/4096
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
RMS Noise 3
RMS3
-
-
1.4
LSB 1) With averaging of 4 P_ADC1_01_34
oversampling
conversions
3) 4) 5) 1)
Negative overload KOVAN
coupling factor
-
-
0.0001
5
P_ADC1_01_08
3) 4) 5) 1)
Positive overload
coupling factor
KOVAP
-
-
0.0001
5
P_ADC1_01_09
Discharge current lbwd
for broken wire
detection setting 0
60
80
100
800
34
µA
µA
P_ADC1_01_06
P_ADC1_01_07
Discharge current lbwdh
for broken wire
detection setting 1
480
-
640
-
Analog input
resistance
RAIN
kΩ 1) This is the internal P_ADC1_01_12
resistive path from
ANx pad via mux to
the cap field
Switched
CAIN
-
-
660
fF
1) This is the
P_ADC1_01_13
capacitance at ANx
capacitance which
must be charged by
the analog source
within the minimum
sampling time
Analog reference
input resistance
RAREF
-
-
-
-
7
kΩ 1) This is the internal P_ADC1_01_15
resistive path from
VAREF pad to cap field
Switched
capacitance at
VAREF
CAREF
330
fF
1) This is the
P_ADC1_01_17
capacitance which
must be charged by
VAREF source with the
first successive
approximation cycle
Power Supply
Rejection Ratio for
High Voltage Inputs
PSSRHV
PSSRMV
25
5
-
-
-
-
dB 1) @VDDP with 3 kHz, P_ADC1_01_42
100 mV peak-to peak
ripple
dB 1) @VDDP with 3 kHz, P_ADC1_01_43
Power Supply
Rejection Ratio for
Mid Voltage Inputs
100 mV peak-to peak
ripple
1) Not subject to production test, specified by design
2) TUE = (INL × GE) + OE, without channel calibration.
Datasheet, Z8F80164852
92
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics ADC1
3) The overload coupling factor KOVAN/KOVAP (K) defines the worst case relation of an overload condition (Iov) at one
pin to the resulting leakage current (Ileaktot) into an adjacent pin: Ileaktot = ±K × |Iov| + Ioz1. Thus the overload
condition can cause an an additional error voltage at an adjacent analog input pin.
4) Overload current is allowed in following operation modes: unpowered, active and sleep mode.
5) Overload conditions occur if the standard operating conditions are exceeded, i.e. the input voltage Vin at the pin
exceeds the specified range: Vin > VDDP + 0.3 V (Iov > 0) or Vin < -0.3 V (Iov < 0).
Datasheet, Z8F80164852
93
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics ADC1
16.3.2
Analog inputs characteristics
Table 52
HV inputs with attenuator type 0 (ATT_TYP0)
VS = 5.5 V to 40 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Nominal HV input HVRNG0
voltage range 0
0
-
25.09
V
not calibrated
P_ADC1_02_01
P_ADC1_02_02
Accuracy of
measurement with
ATTTYP0
HVACC0
-250
-
250
mV 1) not calibrated
1) Not subject to production test; referenced to Vin.
Table 53
HV inputs with attenuator type 1 (ATT_TYP1)
VS = 5.5 V to 40 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Nominal HV input HVRNG1
voltage range 1
0
-
35.555 V
P_ADC1_03_01
P_ADC1_03_03
Accuracy of
HVACC1_1
HVACC1_2
HVACC1_3
-125
-
125
150
235
mV 1) with calibration
enabled (CALENi=1);
0V<VIN≤10.6V
measurement with
ATTTYP1 at input
voltage range 1
Accuracy of
-150
-235
-
-
mV 1) with calibration
enabled (CALENi=1);
10.6V<VIN≤17.7V
P_ADC1_03_04
P_ADC1_03_02
measurement with
ATTTYP1 at input
voltage range 2
Accuracy of
mV 1) with calibration
enabled (CALENi=1);
17.7V<VIN≤35.5V
measurement with
ATTTYP1 at input
voltage range 3
1) Five points of transfer curve for each analog input; @hot and @cold temperature; each point averaged over
16 measurements.
Datasheet, Z8F80164852
94
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics ADC1
Table 54
MV inputs with attenuator type 2 (ATT_TYP2)
VS = 5.5 V to 40 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Nominal MV input MVRNG
voltage range
0
-
5
V
with calibration
enabled (CALENi=1);
in case VAREF is
externally supplied
the condition VAREF <
VDDP + 0.3 V must be
met
P_ADC1_04_01
Accuracy of
measurement with
ATTTYP2
MVACC
-35
-60
-
-
35
60
mV 1) with calibration
enabled (CALENi=1)
P_ADC1_04_02
Accuracy of
measurement with
ATTTYP2
MVACC_CSA
mV for CSA (ADC1 channel P_ADC1_04_03
18); G=40 ;
CTRL2.OFFS_SEL<1:0
>=00B
-90
-
90
mV for CSA (ADC1 channel P_ADC1_04_04
18)
1) Five points of transfer curve for each analog input; @hot and @cold temperature; each point averaged over
16 measurements.
Datasheet, Z8F80164852
95
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Monitoring Analog Digital Converter 2 (ADC2)
17
Monitoring Analog Digital Converter 2 (ADC2)
17.1
Features overview
The ADC2 is a successive approximation analog to digital converter which is used for diagnosis of internal
system voltages. The ADC2 has a pre-configured sequence of conversions with a deterministic timing. It runs
fully autonomous in background, provides the digital results and generates events for interrupts and
interconnects.
The ADC2 has following features:
•
A/D kernel performance:
–
–
–
–
–
10-bit resolution for all analog inputs
Wide input range for middle and high voltage inputs from typ. 5 V to 50 V (MVRNG, HVRNG0/1/2/3
)
High accuracy of typ. 1% of the input range (MVACC, HVACC0/1/2/3
Fast sampling time (tsampMV, tsampHV
Fast total conversion time (typ. 1 µs for MV and typ. 2 µs for HV inputs)
)
)
•
•
Analog inputs ANx:
–
–
–
8 factory calibrated middle voltage inputs (range MVRNG
)
Up to 7 factory calibrated high voltage inputs (ranges HVRNG0/1/2/3
)
Referenced to internally generated VREF1V2 reference voltage (see the Analog Reference Voltage
Generation (ARVG) chapter)
Digital channels with channel control and result generation:
–
–
Each analog input is assigned to one digital channel and has a separate result register
6 digital channels are pre-set for monitoring and protection function for BDRV and CANTRX
(NMI capable)
–
2 freely selectable digital comparators with programmable upper and lower thresholds (8-bit) for user
defined monitoring (IRQ capable)
–
–
2 freely selectable first order IIR filters with programmable characteristics for result post-processing
Results can be read at any time by user software
•
•
Sequencer:
One fixed conversion sequence is pre-programmed and runs in a round-robin scheme autonomously in
background
Interrupt and DMA:
–
–
The ADC2 events can generate a NMI
–
The ADC2 events can be mapped to 2 interrupt node pointers (with 2 IRQ lines)
Datasheet, Z8F80164852
96
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Monitoring Analog Digital Converter 2 (ADC2)
17.2
Block diagram
ADC2
Sequencer Control
Sequencer
Channel Control
IRQ[1:0]
IRQ3
CLKIN
Trigger
Logic
Channel
Class
Channel
Config
ADC Kernel
Result Generation
AN[14:0]
Result
Filter
Attenuators
A/D
Calibration
CMPUP[4:0]
CMPLO[4:0]
VREF1V2
GND
Compare
ADC2_BlockDiagram.vsd
Figure 27 Block diagram ADC2
Datasheet, Z8F80164852
97
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics ADC2
17.3
Electrical characteristics ADC2
17.3.1
A/D converter characteristics ADC2
Table 55
A/D Converter - Timing and AC specification
VS = 3 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Analog clock
frequency
fADC2
5
-
40
MHz Internal ADC2 clock
derived from module
input clock via CLKDIV
P_ADC2_02_02
Sampling time for tsampHV
high voltage inputs
1400
400
-
-
-
-
ns
P_ADC2_02_03
P_ADC2_02_05
Sampling time for tsampMV
medium voltage
input
ns
1) 2)
RMS noise
RMS
0
-
1.8
LSB
P_ADC2_02_10
1) Design characterization: 5000 samples @ VIN=4.75V; value @ 1 sigma
2) Not subject to production test, specified by design
Table 56
A/D Converter - DC specification
VS = 3 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Differential
nonlinearity
DNLE
INLE
-0.99
-
2
LSB no missing codes
P_ADC2_03_01
Integral
-2
-
2
LSB maximum deviation P_ADC2_03_02
nonlinearity
from linear best fit line
1)
Gain error
GE
OE
-1.2
-3
-
-
1.2
3
%
P_ADC2_03_03
P_ADC2_03_04
Offset error
LSB 2) VS=13.5V;
fADC2=30MHz
2)
Total unadjusted
error
TUE
-8
4
-
8
LSB
P_ADC2_03_05
P_ADC2_03_06
P_ADC2_03_07
2)
On resistance of a RAON_HV
HV analog input
5.5
180
7.5
310
kΩ
2)
Input capacitance CAIN_HV
80
fF
of a HV analog input
Datasheet, Z8F80164852
98
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics ADC2
Table 56
A/D Converter - DC specification (cont’d)
VS = 3 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
2)
On resistance of a RAON_MV
MV analog input
8
13
19
kΩ
P_ADC2_03_08
P_ADC2_03_09
2)
Input capacitance CAIN_MV
of a MV analog
input
325
435
545
fF
1) After analog input calibration, including temperature drift of GE and VREF1V2; temperature drift of GE and
temperature drift of VREF1V2 may compensate each other; GE is relative to the full scale range; the GE at half scale
range is only half of the full scale range error
2) Not subject to production test, specified by design
17.3.2
Attenuators characteristics
Table 57
Attenuator type 0 for HV inputs
VS = 3 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Nominal HV input HVRNG0
0
-
25.83
V
HVRNG0=VREF1V2(typ)/ P_ADC2_04_01
voltage range 0
ATTTYP0
1)
Accuracy of
measurement with
ATTTYP0
HVACC0
-220
-
220
mV
P_ADC2_04_02
1) Five points of transfer curve for each analog input; @hot and @cold temperature; each point averaged over
16 measurements
Table 58
Attenuator type 1 for HV inputs
VS = 3 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Nominal HV input HVRNG1
0
-
31.00
V
HVRNG1=VREF1V2(typ)/ P_ADC2_05_01
voltage range 1
ATTTYP1
Accuracy of
measurement with
ATTTYP1
HVACC1
-250
-275
-
-
250
275
mV 1) VS≥5.5V
mV 1) VS<5.5V
P_ADC2_05_02
P_ADC2_05_03
1) Five points of transfer curve for each analog input; @hot and @cold temperature; each point averaged over
16 measurements
Datasheet, Z8F80164852
99
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics ADC2
Table 59
Attenuator type 2 for HV inputs
VS = 3 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Nominal HV input HVRNG2
0
-
51.67
V
HVRNG2=VREF1V2(typ)/ P_ADC2_06_01
voltage range 2
ATTTYP2
1)
Accuracy of
measurement with
ATTTYP2
HVACC2
-500
-450
-
-
500
450
mV
P_ADC2_06_02
mV 1) Tj≤150°C
P_ADC2_06_03
1) Five points of transfer curve for each analog input; @hot and @cold temperature; each point averaged over
16 measurements
Table 60
Attenuator type 3 for HV inputs
VS = 3 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Nominal HV input HVRNG3
0
-
8.15
V
HVRNG3=VREF1V2(typ)/ P_ADC2_07_01
voltage range 3
ATTTYP3
1)
Accuracy of
measurement with
ATTTYP3
HVACC3
-100
-
100
mV
P_ADC2_07_02
1) Five points of transfer curve for each analog input; @hot and @cold temperature; each point averaged over
16 measurements
Table 61
Attenuator type 4 for MV inputs
VS = 3 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Nominal MV input MVRNG
0
-
5.34
V
MVRNG=VREF1V2(typ)/ P_ADC2_08_01
voltage range
ATTTYP4
Accuracy of
measurement with
ACCTYP4
MVACC
-50
-
50
mV 1) MV measurements P_ADC2_08_02
are dependent on
VDDP, therefore
MV_ACC is valid for
VIN < VDDP + 0.2 V
1) Five points of transfer curve for each analog input; @hot and @cold temperature; each point averaged over
16 measurements
Datasheet, Z8F80164852
100
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Current Sense Amplifier (CSA)
18
Current Sense Amplifier (CSA)
18.1
Features overview
The Current Sense Amplifier (CSA) in Figure 28 can be used to measure near-ground differential voltages via
ADC1. Its gain and output offset voltage are digitally programmable through internal control registers.
Linear calibration has to be applied to achieve high gain accuracy, e.g. end-of-line calibration including the
shunt resistor.
Figure 28 shows how the current sense amplifier can be used as a low-side current sense amplifier where the
motor current is converted to a voltage by means of a shunt resistor RSH. A differential amplifier input is used
in order to eliminate measurement errors due to voltage drop across the stray resistance RStray and differences
between the external and internal ground. If the voltage at one or both inputs (CSAP/CSAN) is out of the
operating range it has to be taken into account that the input circuit is overloaded and needs a certain
specified recovery time.
In general, the external low pass filter should suppress electromagnetic interferences (EMI).
The CSA provides following features:
•
•
•
•
•
•
The CSA amplifies a near-ground differential input voltage to a single-ended output voltage
The CSA has programmable gain settings of G = 10, 20, 40, 60
The CSA output voltage has a programmable offset
The CSA output voltage can be measured by the ADC1
The CSA output voltage offset can be measured by the ADC1 independently from the CSA input conditions
The CSA output voltage offset is derived from the ADC1 reference voltage VAREF
Datasheet, Z8F80164852
101
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Current Sense Amplifier (CSA)
18.2
Block diagram
VSD
CSA
VAREF
VAGND
MOSFET
bridge
Output
offset
generator
CSAOUT_OFF
CSAOUT
LP filter
RCSAFILT
CSC
CSAP
CSAN
CSAADC
ADC1
CCSAFILT
RCSAFILT
RSH
G
MI_CLK
AHB
CCSAFILT
RStray
GND
Figure 28 Block diagram CSA
Datasheet, Z8F80164852
102
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics CSA
18.3
Electrical characteristics CSA
18.3.1
Description of electrical parameters
Supply range
The CSA is operational for the whole VS supply range
Current consumption
The CSA contributes to the overall device current consumption for the
operation modes active, stop, sleep. The overall targets must be
achieved.
•
•
•
•
Difference of input voltages: VCSAIN_DIFF = VCSAP - VCSAN
Within this range the CSA characteristic is linear
Differential linear input voltage
range
Within this range the CSA errors are inside the specified limits
Symmetry of input voltage range depends on VCSAOUT_OFF
Common mode input voltage range Voltage range for VCSAP and VCSAN
•
•
•
•
•
•
•
•
•
Transfer function: VCSAOUT = VCSAOUT_OFF + G * (VCSAP - VCSAN)
Single-ended linear output voltage
range
Within this range the CSA characteristic is linear
Within this range the CSA errors are inside the specified limits
Defines VCSAOUT under the condition VCSAP = VCSAN
Determines the symmetry of input voltage range
Nominal gain factors are 10, 20, 40, 60
Maximum deviation from best fit line
Output voltage offset range
Differential gain factor
Linearity error
15 mV/1LSB12
Maximum differential input offset
Input differential mode offset
(VCSAP - VCSAN = VINOFF) which is allowed to be added in order to get
VCSAOUT_OFF at the CSA output
Input resistance
Differential resistance between CSAP and CSAN input
CMRR = -20*log(differential mode gain/common mode gain)
Settling time upon a wide input range swing (into the saturation range)
Time the CSA needs to settle after power on
Common mode rejection ratio
Output settling time
Settling time after power on
Datasheet, Z8F80164852
103
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics CSA
18.3.2
Transfer characteristic and error definition
VCSAOUT
VAREF
Non-linear
range
VCSAOUT@MAX
ELIN
Linear
range
VCSAOUT=VCSAOUT_OFF
Z
Best fit line
G
VCSAIN_DIFF=0
(VCSAP=VCSAN
Vin
Possible curve
)
VCSAIN_DIFF
VCSAOUT@MIN
Zoom
VAGND
Figure 29 CSA transfer characteristic
Vdiff
Vdiffover
Vdiffmax
t
Vout
Error Band
t
Tset
Figure 30 CSA settling time
Datasheet, Z8F80164852
104
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics CSA
18.3.3
CSA characteristics
Table 62
Electrical Characteristics Current Sense Amplifier
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Differential Linear VCSAIN_DIFF
Input Voltage
Range
0
-
-
-
-
3 / G
V
VCSAIN_DIFF=VCSAP-VCSAN
minimum setting for
VCSAOUT_OFF
,
P_CSA_01_09
-1.5 /
G
1.5 / G V
V
CSAIN_DIFF=VCSAP-VCSAN
,
P_CSA_01_10
P_CSA_01_11
P_CSA_01_12
maximum setting for
VCSAOUT_OFF
Common Mode
Input Voltage
Range
VCSAx_CM
-2.0
2.0
3.5
V
V
Single-Ended
Linear Output
Voltage Range
VCSAOUT
0.39
Output Voltage
Offset
VCSAOUT_OFF
0.45
0.95
1.45
1.95
9.85
19.7
39.4
59.1
-15
0.5
1
0.55
1.05
1.55
2.05
10.15
20.3
40.6
60.9
15
V
V
V
V
CTRL2.OFFS_SEL<1:0 P_CSA_01_13
>=00b
CTRL2.OFFS_SEL<1:0 P_CSA_01_27
>=01b
1.5
2
CTRL2.OFFS_SEL<1:0 P_CSA_01_28
>=10b
CTRL2.OFFS_SEL<1:0 P_CSA_01_29
>=11b
Differential Gain
G
10
20
40
60
-
CTRL2.GAIN_SEL<1:0> P_CSA_01_14
=00B
CTRL2.GAIN_SEL<1:0> P_CSA_01_15
=01B
CTRL2.GAIN_SEL<1:0> P_CSA_01_16
=10B
CTRL2.GAIN_SEL<1:0> P_CSA_01_17
=11B
Linearity error
ELIN
mV maximum deviation P_CSA_01_18
from best fit line; G=40
Input Differential
Mode Offset
VINOFF
-1.3
-
1.3
mV G=40 ; VCSAN=0V;
CSAP=0V;
P_CSA_01_19
V
CTRL2.OFFS_SEL<1:0
>=00B
-3
-
3
mV
P_CSA_01_31
Additional Input
Offset
VCSAIN_OFF
-15% 20
+15% mV CTRL2.ADD_INP_OFF P_CSA_01_30
S=1b
Datasheet, Z8F80164852
105
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics CSA
Table 62
Electrical Characteristics Current Sense Amplifier (cont’d)
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Input Bias Current ICSAx
-300
1
-
0
µA VCSAN=0V; VCSAP=0V
P_CSA_01_20
Input Resistance
RIN
1.3
1.6
kΩ Differential resistance P_CSA_01_22
between CSAP and
CSAN
Common Mode
Rejection Ratio
CMRRCSA
TSET
58
-
80
-
dB VCSAP-VCSAN=0V; -
2V≤VCSAx≤2V; G=40
P_CSA_01_24
P_CSA_01_25
Output Settling
Time
800
1400 ns
Time until the CSA
output voltage settles
and stays within the
error band under all
input conditions
Datasheet, Z8F80164852
106
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Current Sense Comparator (CSC)
19
Current Sense Comparator (CSC)
19.1
Features overview
The Current Sense Comparator (CSC) is used for fast detection and reaction on overcurrent on the shunt
measurement by the CSA.
The CSC provides following features:
•
The CSC compares the CSA output voltage against a programmable threshold voltage to detect positive
overcurrents through the shunt
•
•
•
•
•
•
•
•
The CSC threshold voltage is derived from the ADC1 reference voltage
The CSC provides a programmable filter time
The CSC event can trigger a CCU7.CTRAP event
The CSC event can trigger an interrupt request
The CSC event can switch off the bridge driver output safely (safe switch off in case of overcurrent)
The CSC output status is indicated by a volatile level indication flag showing the actual status
The CSC output status is indicated by a sticky status flag which must be cleared by software
The CSC output status is indicated by an interrupt request flag
19.2
Block diagram
CSC
VAREF
VAGND
INOFF
AHB
Threshold
generator
MI_CLK
MCLK
CSC_BIST_FAIL
CSC_EN
CSC_OC
IRQ
CSA
Filter
INP
Figure 31 Block diagram CSC
Datasheet, Z8F80164852
107
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics CSC
19.3
Electrical characteristics CSC
19.3.1
CSC characteristics
Table 63
Electrical Characteristics Current Sense Comparator
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
CSC overcurrent
threshold
VCSC_THR
tCSC_FILT
VCSAOU
-
3.5
2.3
4.4
6.5
8.5
2
V
programmable by SFR P_CSC_01_01
T_OFF
CSC filter time
1.7
2
4
6
8
-
µs
µs
µs
µs
µs
CTRL2.TFILT_SEL=00 P_CSC_01_02
b
3.6
5.5
7.5
-
CTRL2.TFILT_SEL=01 P_CSC_01_03
b
CTRL2.TFILT_SEL=10 P_CSC_01_04
b
CTRL2.TFILT_SEL=11 P_CSC_01_05
b
CSC reaction time tCSC_REACT
P_CSC_01_10
Datasheet, Z8F80164852
108
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Temperature Sensor Unit (TMPSNS)
20
Temperature Sensor Unit (TMPSNS)
20.1
Features overview
The SoC integrates multiple temperature sensors spread across the die. These monitors are located and
associated with critical blocks such as:
•
•
•
•
PMU module (VDDP and VDDEXT linear regulators)
CAN transceiver module
Gate driver module (2-stage charge pump), TEMP0
SoC core logic, TEMP1
This chapter describes the behavior of the temperature sensors TEMP0 and TEMP1. The overtemperature
protection mechanisms associated with the PMU and the CAN transceiver are described in the respective
module chapters.
The TMPSNS provides following features:
•
Two dedicated temperature sensors to measure the on-chip temperature at different locations:
–
–
TEMP0 measures the die temperature in the charge pump of gate driver module
TEMP1 measures the die temperature in the center of the chip (i.e. system temperature)
•
•
Positive output slope of 2.5 mV/°C typ. over the full Tj = -40°C to +175°C temperature range
Temperature sensors connect internally to the multiple inputs analog-to-digital converter (ADC2). The
ADC2 post-processing and digital comparator features are used for background temperature monitoring
•
•
•
ADC2 raises an overtemperature shutdown flag (CP_OT) when the die temperature in the charge pump
(TEMP0) exceeds the threshold value (190°C typ.)
ADC2 raises an overtemperature warning flag (SYS_OTWARN) when the system temperature (TEMP1)
exceeds the threshold value (135°C typ.)
ADC2 raises an overtemperature shutdown flag (SYS_OT) when the system temperature (TEMP1) exceeds
the threshold value (190°C typ.). This event will automatically transition the SoC into Fail-sleep system
power mode (refer to WAKE_FAIL_STS.SYS_OT bit description)
Datasheet, Z8F80164852
109
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Temperature Sensor Unit (TMPSNS)
20.2
Block diagram
SCU
CANTRX
BDRV
CANTRX_ON
CANTRX_SD
CANTRX_SD
XTAL_FAIL_STS
SYS_OTWARN
BDRV_ON
BDRV_SD
BDRV_SD
CP_OTSD
VMSUP
ADC2
CP_OT
PMU
VMSUP
VTEMP0
VTEMP1
CMPCFG4
Buffer
Ch13
Ch14
{
{
CP_OTWARN
SYS_OT
Buffer
CMPCFG5
SYS_OTWARN
Thermal sensor
1
Thermal sensor
2
GNDVSS
EN
Bias Control
Note 1: Thermal sensor (TEMP0) is located in the charge pump of the gate driver module
Note 2: Thermal sensor (TEMP1) is located in the center of the chip
GNDVSS
Figure 32 Block diagram TMPSNS
Datasheet, Z8F80164852
110
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics TMPSNS
20.3
Electrical characteristics TMPSNS
TMPSNS characteristics
20.3.1
Table 64 Temperature Sensor Specifications
VS = 3 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Accuracy 1
Accuracy 2
Accuracy 3
Acc1
Acc2
Acc3
a
-10
-10
-5
-
10
10
5
K
-40°C<Tj<85°C
P_TEMP_02_04
P_TEMP_02_05
P_TEMP_02_06
P_TEMP_02_07
-
K
125°C<Tj<175°C
-
K
85°C≤Tj≤125°C
1)
Offset coefficient
(a)
-
678
-
mV
1)
Gain coefficient (b)
b
-
2.5
-
mV/
°C
P_TEMP_02_08
1) Not subject to production test, specified by design
Table 65 System Thermal Shutdown
VS = 3 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
System Thermal
Shutdown
Tj_SYS_TSD
180
190
200
°C
P_TEMP_03_01
Threshold
Bridge Driver
Thermal Shutdown
Threshold
Tj_BDRV_TSD
180
190
200
°C
P_TEMP_03_02
Datasheet, Z8F80164852
111
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
BEMF Comparators (BEMFC)
21
BEMF Comparators (BEMFC)
21.1
Feature overview
For rotor position detection of a BLDC motor the BEMF (Back ElectroMotive Force) information can be used.
This BEMF information is always sensed in the phase which is currently not active. Therefore, at each motor
phase, a comparator compares the BEMF voltage against a virtual star point built by the other two motor
phases and provides post-processing features to generate valid zero-crossing events.
The BEMFC provides following features:
•
•
The BEMF comparator module consists of 3 BEMF comparators, one for each SHx pin
The BEMF comparators compare the voltage at the corresponding SHx pin to a “virtual star point” voltage
which is the average of the voltages at the remaining two SHy and SHz pins (see VBEMFC_TH
)
•
•
The BEMF comparators provide low settling time tBEMFC_D
The BEMF comparators can be switched off if not needed to avoid additional power consumption and
undesired input currents in power down modes
•
•
The BEMF comparator output signals are spike filtered with a programmable filter time
The BEMF comparators have each a blanking filter which can be enabled to mask oscillations during a
programmable time after switching the corresponding motor phases
•
•
The BEMF comparators have each a demagnetisation filter which can be enabled to automatically remove
demagnetisation pulses from the BEMF comparator output signal to get only valid zero-crossing events
Interrupts can be triggered on BEMF comparator status changes at rising and/or falling edge
21.2
Block diagram
BEMF Comparator 1
MI_CLK
SH1
+
-
Demag
Filter 1
Blanking
Filter 1
Spike
Filter 1
TFILT_CLK
SH2
SH3
INA[3:1]
INB[3:1]
INC[6:1]
TRIGA
BEMF Comparator 2
SH2
+
-
Demag
Filter 2
Blanking
Filter 2
Spike
Filter 2
TRIGB
SH1
SH3
PH[3:1]_ZC_STS
BEMF Comparator 3
PHXZC_TRIG
IRQ[2:0]
SH3
+
-
Demag
Filter 3
Blanking
Filter 3
Spike
Filter 3
SH2
SH1
Figure 33 Block diagram BEMFC
Datasheet, Z8F80164852
112
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics BEMFC
21.3
Electrical characteristics BEMFC
21.3.1
Threshold and hysteresis
VBEMFC_TH = VSHx – (VSHy + VSHz) / 2
max. VBEMFC_TH
min. VBEMFC_HYST
0
t
max. VBEMFC_HYST
min. VBEMFC_TH
BEMFCx output
Figure 34 BEMFC threshold and hysteresis definition
21.3.2
BEMFC characteristics
Table 66
Electrical Characteristics
VS = 4.4 V to 28 V, VSD = 5.4 V to 29 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1) 2)
Detection
threshold
VBEMFC_TH
-50
-
-
-
50
40
1
mV
mV
µs
P_BEMFC_01_01
P_BEMFC_01_02
P_BEMFC_01_03
Comparator
hysteresis
VBEMFC_HYST
5
Comparator delay tBEMFC_D
-
Voltage step on VSHx
from 0 V to VSD + 500
mV; VSHy=0V; VSHz=VSD
1) Comparison against "virtual star point": VBEMFC_TH = VSHx - (VSHy + VSHz) / 2
2) Not subject to production test, specified by design
Datasheet, Z8F80164852
113
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Sigma Delta ADC (SDADC)
22
Sigma Delta ADC (SDADC)
22.1
Features overview
There is one Sigma Delta ADC (SDADC) module with two independent channels with input stage, 2nd order
modulator, 3rd order CIC filter, result handling and synchronization feature. The SDADC is optimized for the
usage of external AMR/GMR/TMR type sensors. The application configuration is shown in Figure 35, the block
diagram in Figure 36.
The SDADC has following features:
•
Performance
–
–
–
–
–
Sampling frequency up to 20 MHz (typ.), MCLK, fS
Input frequency of up to 1 kHz (typ.), fIN
Linear input range of ±3.75 V (typ.), VDIFF_lin
RMS noise of less than 1 mV (typ.), Vrms
SNDR of 72 dB (typ.), SNDR
•
•
Input stages
–
–
–
Configurable for differential or single ended input types
Two possible inputs selectable for usage of two sensors in time multiplex
Offset compensation feature
Modulator (2nd order type)
–
–
–
–
Normal mode (use modulator and demodulator together)
External demodulator mode (modulator’s output as alternate function, demodulator external)
External modulator mode (modulator bypassed, demodulator inputs via GPIOs)
Dither unit for dead zone cancellation and idle tone reduction
•
•
Demodulator (3rd order CIC filter type)
–
–
–
–
–
Linear programmable decimation factor (DECF) from 16 to 512 with automatic result scaling
16-bit signed filter result (s16 format, internally s29)
Two filter modes: continues or triggered (synchronization feature to PWM)
Timestamping upon external trigger to capture the age of a result (synchronization feature to PWM)
Programmable digital comparator thresholds three modes (range, over-, undervoltage)
Interrupts, DMA and events
–
SDADC events can be mapped to 2 interrupt node pointers (with 2 IRQ lines)
Result events can be mapped to 2 DMA requests
–
–
Compare events are connected to GPIOs, CCU7 and GPT12
Datasheet, Z8F80164852
114
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Sigma Delta ADC (SDADC)
22.2
Block diagram
Power Stage
Compute
Motor Control
CPU
Timer
System
CAPCOM7
2 or 3~ Bridge Driver
Current Sense
M
Gear
S1
S2
Meas-ADC
12 Bit
BEMF
Comparator
TLE988/9x
Communication
CAN/UART/SSC
Input/Output
Sensor Interface
Sigma Delta
sin
cos
sin
cos
ADC
sin
cos
14 Bit
Differential or single ended
sensor interface
SDADC_Application.vsdx
Figure 35 Application diagram SDADC
From/to GPIOs
From SCU
SDADC
From
ARVG or
VDDEXT
VAREF
VAGND
VREF DOUT0 DOUT1 DIN0 DIN1
MCLK
Clock Control
Channel 0
VREF DOUT0 DIN0
Input Stage
IN0PA
IN0PB
IN0P
+
IRQ[1:0]
RES0
CMP0
NVIC
DMA
Event
Hand-
ling
Result 0
3rd
order
CIC
From
GPIOs
2nd
order
MOD
Comparator 0
-
DEC
CNT
Peripheral
inter-
connects
IN0NA
IN0NB
VAGND
IN0N
filter
TRGSD0A
TRGSD0B
Timestamp 0
SYNCSTART
MCLK
Channel 1
VREF DOUT1 DIN1
Input Stage
IN1PA
IN1PB
IN1P
+
IRQ[1:0]
RES1
CMP1
NVIC
DMA
Event
Hand-
ling
Result 1
From
GPIOs
3rd
order
CIC
2nd
order
MOD
Comparator 1
-
DEC
CNT
Peripheral
inter-
connects
IN1NA
IN1NB
VAGND
IN1N
filter
TRGSD1A
TRGSD1B
Timestamp 1
SYNCSTART
MCLK
SDADC_FunctionalBlock.vsd
Figure 36 Block diagram SDADC
Datasheet, Z8F80164852
115
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics SDADC
22.3
Electrical characteristics SDADC
22.3.1
SDADC characteristics
Table 67
SDADC characteristics
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Sampling
frequency
fS
5
-
20
MHz fS is identical to MCLK P_SDADC_01_02
Decimation factor DECF
16
0
-
-
512
P_SDADC_01_03
Input voltage
VIN
VAREF
V
V
Input voltage on
SDADC.INxP or
SDADC.INxN x={0,1}
P_SDADC_01_04
Differential linear
input voltage
VDIFF_lin
-3.75
-4
-
-
3.75
4
VDIFF = VINxP - VINxN
;
P_SDADC_01_06
VINxP, VINxN within VIN
range; x={0,1}
Differential non-
VDIFF_nonlin
V
VDIFF = VINxP - VINxN
;
P_SDADC_01_07
linear input voltage
VINxP, VINxN within VIN
range; x={0,1}
Single ended linear VSNGL_lin
input voltage
0
-
-
-
3.75
V
V
V
VSNGL = VINxP; VINxN = 0 V; P_SDADC_01_08
x={0,1}
Single ended non- VSNGL_nonlin
linear input voltage
0
4
-
VSNGL = VINxP; VINxN = 0 V; P_SDADC_01_09
x={0,1}
Full scale voltage
VFS
3.75
At VDIFF = ±VFS;
P_SDADC_01_10
RESULTmax resp.
RESULTmin is reached
(defined as linear
voltage range)
Input frequency
RMS noise
fIN
0
-
-
1
kHz
P_SDADC_01_11
VRMS
0.69 2.4
mV 1) Tested with DECF = P_SDADC_01_12
128 and VREF =
VREF5V
Effective resolution ERES
10.61 12.4
-
-
-
Bits 1) Calculated, ERES = P_SDADC_01_13
ld(VFS/VRMS
)
Effective number of ENOB
bits
-
-
11.7
72
Bits 1) ENOB = (SNDR -
1.76dB) / 6.02dB
P_SDADC_01_14
SNDR with a fully
differential sinus -
6dBFS
SNDR
dB 1) Characterized, not P_SDADC_01_15
tested in production
Datasheet, Z8F80164852
116
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics SDADC
Table 67
SDADC characteristics (cont’d)
VS = 5.5 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Filter result linear RESULTlin
range
-16384 -
16383 LSB Linear range,
represented in two's
P_SDADC_01_16
complement;
RESULT= (VDIFF / VREF) ×
GAIN × (214 - 1)
Filter result non-
linear range
RESULTnonlin
-32768 -
32767 LSB Linear range,
P_SDADC_01_17
represented in two's
complement;
RESULT= (VDIFF / VREF) ×
GAIN × (214 - 1)
2)
Input gain
Gain ratio
GAIN
GR
-
4/3
-
P_SDADC_01_18
P_SDADC_01_19
0.99
-
1.01
GR = GCH0 / GCH1;
channel mismatch
due to gain mismatch
1)
Dynamic input
impedance
ZIN
tup
0.1
-
0.25
-
1
MOh
m
Z = 1 / (2 × fS × CIN) P_SDADC_01_21
IN
Power up time
100
µs
Time after module
RESET inactive to
analog part in
operating condition
3) 4) 1)
P_SDADC_01_23
Coupling factor for KOVAN
negative overload
current
-
-
-
-
0.0001
0.0001
P_SDADC_01_24
P_SDADC_01_25
3) 1)
Coupling factor for KOVAP
positive overload
current
1) Not subject to production test, specified by design
2) Defined by design
3) The overload coupling factor KOVAN/KOVAP (K) defines the worst case relation of an overload condition (Iov) at one
pin to the resulting leakage current (Ileaktot) into an adjacent pin: Ileaktot = ±K × |Iov| + Ioz1. Thus the overload
condition can cause an an additional error voltage at an adjacent analog input pin.
4) Overload current is allowed in following operation modes: unpowered, active and sleep mode.
Datasheet, Z8F80164852
117
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics SDADC
Input Stage
Equivalent Circuit
Csample
INxPA/B
Cparasitic
C
IN
V
DIFF
GND
Z
IN
Cparasitic
Csample
1
s
ZIN =
INxNA/B
2*f *CIN
SDADC_Cin.vsdx
Figure 37 Input stage equivalent circuit
Datasheet, Z8F80164852
118
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Timer20 (T20) and Timer21 (T21)
23
Timer20 (T20) and Timer21 (T21)
23.1
Features overview
Two functionally identical timers are implemented: Timer20 and Timer21. The description also use the name
as Timer2.
The timer modules are general purpose 16-bit timers. Timer2 can function as a timer or counter in each of its
modes. As a timer, it counts with an input clock of fT2_CLK/12 (if prescaler is disabled). As a counter, Timer2
counts 1-to-0 transitions on pin T2. In the counter mode, the maximum resolution for the count is fT2_CLK/24
(if prescaler is disabled).
The T20 and T21 provides following features:
•
16-bit auto-reload mode
selectable up or down counting
–
•
•
One channel 16-bit capture mode
T20 and T21 can be configured as trigger source for ADC1
23.1.1
Block diagram
TF2
SCU
Interrupt
EXF2
Control
P0.x
P1.x
P2.x
T2
SCU
Clock
Control
fT2_CLK
TIMER2
Module
(Kernel)
GPIO
and
Interconnection
T2EX
SCU
Peripheral
Management
T2xSUS
T2x_DIS
EXF2
Figure 38 Block diagram Timer2
Datasheet, Z8F80164852
119
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General Purpose Timer Units (GPT12)
24
General Purpose Timer Units (GPT12)
24.1
Features overview
The General Purpose Timer Unit blocks GPT1 and GPT2 have very flexible multifunctional timer structures
which may be used for timing, event counting, pulse width measurement, pulse generation, frequency
multiplication, and other purposes.
They incorporate five 16-bit timers that are grouped into the two timer blocks GPT1 and GPT2. Each timer in
each block may operate independently in a number of different modes such as Gated timer or Counter mode,
or may be concatenated with another timer of the same block.
Each block has alternate input/output functions and specific interrupts associated with it. Input signals can
be selected from several sources.
The GPT module is clocked with clock fGPT_CLK
.
The GPT12 provides following features:
•
Features block GPT1:
•
•
•
•
fGPT_CLK/4 maximum resolution
3 independent timers/counters
Timers/counters can be concatenated
4 operating modes:
•
•
•
•
Timer mode
Gated Timer mode
Counter Mode
Incremental Interface mode
•
Reload and Capture functionality
•
Features block GPT2:
•
•
•
•
fGPT_CLK/2 maximum resolution
2 independent timers/counters
Timers/counters can be concatenated
3 operating modes:
•
•
•
Timer mode
Gated Timer mode
Counter mode
•
Extended capture/reload functions
Datasheet, Z8F80164852
120
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
General Purpose Timer Units (GPT12)
24.2
Block diagram
GPT12
AHB
Clock control
2n : 1
CLKIN
T2IN[B:A]
GPT1
T2EUD[B:A]
Mode
control
T2
T3
T4
T3IN[D:A]
T3EUD[D:A]
T4IN[D:A]
T3OUT
T6OUT
Input
select
T4EUD[D:A]
GPT2
T5IN[B:A]
T5EUD[B:A]
T6IN[B:A]
T6EUD[B:A]
CAPIN[D:A]
Mode
control
T5
CAPREL
T6
Input
select
T2IRQ
T3IRQ
T4IRQ
T5IRQ
T6IRQ
CRIRQ
Event generation
Status Interrupt
GPT12_BD.vsdx
Figure 39 Block diagram GPT12
Datasheet, Z8F80164852
121
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Capture/Compare Unit 7 (CCU7)
25
Capture/Compare Unit 7 (CCU7)
25.1
Features overview
The CCU7 is a high-resolution 16-bit capture and compare unit with application-specific modes, mainly for
AC drive control. Special operating modes support the control of Brushless DC-motors using Hall sensors or
Back-EMF detection. Furthermore, block commutation and control mechanisms for multi-phase machines are
supported.
This chapter gives an overview over the different building blocks and their main features.
The CCU7 provides following features:
•
Timer T12 block features:
–
–
Six compare channels
Supports generation of three-phase PWM (six outputs, individual signals for high-side and low-side
switches)
–
–
–
–
16-bit resolution, maximum count frequency (peripheral clock)
Dead-time control for each channel to avoid short-circuits in the power stage
Concurrent update of T12 registers
Center-aligned and edge-aligned PWM can be generated, as well as rising edge and duration PWM
pulses
–
–
–
Single-shot mode supported
Start can be controlled by external events
Capability of counting external events
•
Timer T13 block features:
–
–
–
–
–
–
–
–
One independent compare channel with one output
16-bit resolution, maximum count frequency (peripheral clock)
Concurrent update of T13 registers
Can be synchronized to T12
Event generation at period-match and compare-match
Single-shot mode supported
Start can be controlled by external events
Capability of counting external events
•
Timer T14, T15 and T16 block features:
–
–
–
–
–
–
–
–
–
Each with one independent compare channel with one output
16-bit resolution, maximum count frequency (module clock)
Dead-time control for each channel to avoid short-circuits in the power stage
Concurrent update of T14, T15 and T16 registers
Can be synchronized to T12
Event generation at period-match and compare-match
Single-shot mode supported
Start can be controlled by external events
Capability of counting external events
Datasheet, Z8F80164852
122
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Capture/Compare Unit 7 (CCU7)
•
Additional specific functions:
–
Block commutation support for brushless DC-drives with programmable state pattern, event-triggered
next state switching and background speed capture
–
–
–
–
–
Programmable Hall-sensor pattern detection with noise filter
Integrated error handling
Fast emergency stop without CPU load via external signal (CTRAP)
Control modes for multi-channel AC-drives
Output levels can be selected and adapted to the power stage
25.2
Block diagram
The CCU7 is comprised of a timer T12 block with six capture/compare channels, and a timer T13, T14, T15 and
T16 block with one compare channel each. The T12 channels can independently generate PWM signals or
accept capture triggers, or they can jointly generate control signal patterns to drive AC-motors or inverters.
CCU7
fPWM
CCU7
CLKIN
T13HR[H:A]
T14HR[H:A
Clock Control
Interrupt Control
SR[3:0]
events
CC70/71/72
COUT70/71/72
COUT73
C73ST
C73STn
T13
C73
T12_ZM
T12_OM
T12_PM
T14R, C74ST
T14
T15
T16
C74
C75
C76
T15R, C75ST
T16R, C76ST
T15HR[H:A]
T16HR[H:A]
T13/14/15/16_PM
CC70/1/2DT
CC70/1/2DTn
Dead-
Time
Control
CM_70/71/72
CM_70B/71B/72B
CM_73/74/75/76
Modulation
Control
CC70/1/2ST
C70/1/2BST
CC70
CC70/71/72/73ST
C70/71/72BST
C74/75/76ST
C70B
CC71
C71B
CC72
C72B
MCMP.0...5
TRPS
T12HR[H:A]
Multi-Channel
CCPOS0/1/2[D:A]
T12
CCPOS0/1/2
CTRAP
Hall Logic
CC70/1/2IN[D:A]
CTRAP[D:A]
CM_CHE
T12_ST
Trap Control
CCU7_BlockDiagram.vsdx
Figure 40 Block diagram CCU7
Datasheet, Z8F80164852
123
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Bridge Driver (BDRV)
26
Bridge Driver (BDRV)
26.1
Features overview
The BDRV module consists of 6 gate drivers to control external normal-level n-channel MOSFETs arranged in
3 half bridges for 3-phase motor control applications.
The BDRV provides the following features:
•
Flexible control by SFRs of Bridge Driver module, PWM output signals of CCU7 module, or alternate
functions of GPIOs
•
Current-driven output stages to control external n-channel MOSFET gates with flexibly programmable
gate current profile
•
•
Adjustable cross-conduction protection
High-current discharge mode to reduce dead times and to keep external MOSFETs off during fast
transients
•
•
•
•
•
•
•
Safe switch-off path to switch off the Bridge Driver in a defined way in the case of errors
Passive pull-down mode to keep external MOSFETs off if the Bridge Driver is disabled
Active brake mode with reduced current consumption to statically switch on external MOSFETs
Timing measurements of on/off delays and on/off slope durations
Adaptive control mode with automatic adjustment of gate current values
Integrated 2-stage charge pump for low-voltage operation and statical MOSFET gate control
Adjustable voltage monitoring of Bridge Driver supply voltage (VSD) and charge pump output voltage
(VCP)
•
•
•
Adjustable short-circuit detection in on and off state
Open-load detection in off state
Overtemperature detection and shutdown
Datasheet, Z8F80164852
124
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Bridge Driver (BDRV)
26.2
Block diagram
VCP
VSD
VSD
VSD_OV
overvoltage
comparator
2-stage
charge pump
CP2H
CP2L
CP1H
CP1L
SAFE_ENABLE
SAFE_SHUTDOWN
SSO_HCDIS
Safe enable
& shutdown
VDH
BDRV_SD
High-side
driver
INA[3:1]
INB[3:1]
INC[6:1]
GHx
SHx
Vth
VCP_LOTH1
VCP_UPTH
VSD_LOTH
VSD_UPTH
VSD_CP1ST
CP_OTSD
Control &
Diagnosis
Low-side
driver
GLx
SL
MI_CLK
TFILT_CLK
IRQ[1:0]
Vth
AHB
Figure 41 Block diagram BDRV
Datasheet, Z8F80164852
125
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics BDRV
26.3
Electrical characteristics BDRV
26.3.1
Description of electrical parameters
26.3.1.1 Switch-on parameters
Figure 42 shows the detailed behavior of the gate driver output stage in the switch-on phase and the
corresponding electrical characteristic parameters.
Control
Signal
OFF
ON
SRon_SHx = 0
SRon_SHx ≠ 0, VGS<VGS(on)
tdly(on)
trise(on)
I
max.
typ.
Gate
Charge
Current
Ichgx
ΔIchg_avg_%
*)
min.
Igate
20%
t
V
VDS
max.
VGxxy
min.
VGS=VGS(on)
External
MOSFET
Voltages
tsat(on)
VGS
t
Pre-Charge
Post-Charge
On Slope
Off
On
*) positive current flowing out of Gx pin
Figure 42 Detailed behavior of the gate driver output stage in the switch-on phase
After an initial turn-on delay time tdly(on) the gate charge current Igate rises and after additional trise(on) reaches
its specified minimum limit Ichgx@MIN and stays stable until the gate-to-source voltage of the external MOSFET
reaches VGS = VGS(on). During the slope at the corresponding SHx pin (i.e. the slew rate SRon_SHx ≠ 0) the average
gate current deviates less than ΔIchg_avg_% from the programmed nominal current Ichgx. The gate of the external
MOSFET is further charged to the high-level output voltage of the gate driver VGxxy. The time from exceeding
V
GS = VGS(on) and reaching VGxxy@MIN is defined by tsat(on)
.
Datasheet, Z8F80164852
126
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics BDRV
26.3.1.2 Switch-off parameters
Figure 43 shows the detailed behavior of the gate driver output stage in the switch-off phase and the
corresponding electrical characteristic parameters.
Control
Signal
ON
OFF
SRoff_SHx = 0
SRoff_SHx ≠ 0, VGS>VGS(off)
tdly(off)
trise(off)
I
Gate
Discharge
Current
max.
typ.
Idischgx
ΔIdischg_avg_%
*)
min.
Igate
20%
t
V
External
MOSFET
Voltages
VDS
VGS
VGS=VGS(off)
t
Pre-Discharge
Post-Discharge
Off Slope
On
Off
*) positive current flowing into Gx pin
Figure 43 Detailed behavior of the gate driver output stage in the switch-off phase
After an initial turn-off delay time tdly(off) the gate discharge current Igate rises and reaches its specified
maximum limit Idischg@MAX after trise(off) and stays stable until the gate-to-source voltage of the external MOSFET
reaches VGS = VGS(off). During the slope at the corresponding SHx pin (i.e. slew rate SRoff_SHx ≠ 0) the average gate
discharge current deviates less than ΔIdischg_avg_% from the programmed nominal current Idischgx
.
26.3.1.3 Gate current settling behavior
At the transition between two different gate current value settings, the actual gate driver output current
settles within tset(seq) to the new gate current value:
Datasheet, Z8F80164852
127
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics BDRV
Gate current
value setting
in-1
in
in+1
tn-1
tn
tn+1
Gate current
duration
tset(seq)
I
max.
typ.
in
Gate current
profile
min.
Igate
max.
typ.
in-1
min.
max.
typ.
in+1
tset(seq)
min.
t
igate_sequencer_settling.vsdx
Figure 44 Gate current settling time
26.3.1.4 Timing measurement
Figure 45 shows the thresholds VSH(high) and VSH(low) and the propagation delays tcdly(high) and tcdly(low) of the
high-speed voltage comparators during one PWM cycle of VSHx
:
Low-Side
OFF
ON
OFF
Control
Signal
V
VVDH
VSH(high)
Half-Bridge
Voltages
VSHx
VSH(low)
t
tcdly(high)
tcdly(high)
SH_high
SH_low
Comparator
Output
Signals
tcdly(low)
tcdly(low)
Figure 45 Timing measurement comparator thresholds and delays
Datasheet, Z8F80164852
128
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics BDRV
26.3.2
MOSFET driver output characteristics
Table 68 MOSFET Driver Output
VS = 4.4 V to 28 V, VSD = 5.4 V to 29 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1)
Gate charge current Ichg0
Gate charge current Ichg3
Gate charge current Ichg7
Gate charge current Ichg15
Gate charge current Ichg31
Gate charge current Ichg63
1.5
4
8
mA
mA
mA
mA
mA
I
=0D ;
P_BDRV_02_01
P_BDRV_02_02
P_BDRV_02_03
P_BDRV_02_04
P_BDRV_02_05
P_BDRV_02_06
P_BDRV_02_07
CHARGE
VGSx≤VGS(on) ; VSD≥8V
1)
5
10
18
45
125
340
-
15
I
=3D ;
CHARGE
VGSx≤VGS(on) ; VSD≥8V
1)
12
24
I
=7D ;
CHARGE
VGSx≤VGS(on) ; VSD≥8V
1)
33
57
I
=15D ;
CHARGE
VGSx≤VGS(on) ; VSD≥8V
1)
100
290
-25%
150
390
+25%
I
=31D ;
CHARGE
VGSx≤VGS(on) ; VSD≥8V
mA ICHARGE=63D ;
VGSx≤VGS(on) ; VSD≥8V
Gate charge current Δ I chg_avg_%
dynamic average
1) Reference: typ. Ichgx
SRon_SHx=165V/µs;
;
deviation
VGSx≤VGS(on)
1)
Gate discharge
current
Idischg0
Idischg3
Idischg7
Idischg15
Idischg31
Idischg63
1.5
5
5
8
mA
mA
mA
mA
mA
I
=0D ;
P_BDRV_02_08
P_BDRV_02_09
P_BDRV_02_10
P_BDRV_02_11
P_BDRV_02_12
P_BDRV_02_13
P_BDRV_02_14
DISCHARGE
V
GSx≥VGS(off) ; VSD≥8V
1)
Gate discharge
current
10
20
50
125
360
-
15
I
=3D ;
DISCHARGE
V
GSx≥VGS(off) ; VSD≥8V
1)
Gate discharge
current
13
27
I
=7D ;
DISCHARGE
V
GSx≥VGS(off) ; VSD≥8V
1)
Gate discharge
current
37
63
I
=15D ;
DISCHARGE
V
GSx≥VGS(off) ; VSD≥8V
1)
Gate discharge
current
100
310
150
410
+28%
I
=31D ;
DISCHARGE
VGSx≥VGS(off) ; VSD≥8V
Gate discharge
current
mA IDISCHARGE=63D ;
VGSx≥VGS(off) ; VSD≥8V
Gate discharge
Δ I dischg_avg_% -28%
1) Reference: typ.
current dynamic
average deviation
Idischgx
SRoff_SHx=165V/µs;
GSx≥VGS(off) ; VSD≥8V
;
V
High level output
voltage Gxx vs. Sxx
VGxx1
10
11
12
V
2) All other drivers
enabled but not ON;
CL=15nF; ICP=18.9mA;
RGS=100kΩ; VSD≥8V
P_BDRV_02_17
Datasheet, Z8F80164852
129
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics BDRV
Table 68 MOSFET Driver Output (cont’d)
VS = 4.4 V to 28 V, VSD = 5.4 V to 29 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
High level output
voltage Gxx vs. Sxx
VGxx2
7
-
12
V
V
2) All other drivers
enabled but not ON;
CL=15nF; ICP=16.2mA;
RGS=100kΩ; VSD=7V
2) All other drivers
enabled but not ON;
CL=7nF; ICHARGE≤31D ;
P_BDRV_02_18
High level output
voltage Gxx vs. Sxx
VGxx3
7
-
12
P_BDRV_02_20
P_BDRV_02_22
I
CP=7.6mA;
RGS=100kΩ; Tj≤150°C;
SD=5.4V
V
High level output
voltage GLx vs. GND
/ GHx vs. SHx -
VGxx_ABK
7
-
12
V
all other Drivers
enabled but not ON;
CL=15nF; RGS=100kΩ;
VSD=5.4V
Active Brake Mode
1)
External MOSFET
gate-to-source
voltage - MOSFET
on
VGS(on)
5
7
-
-
-
-
V
V
V
V
=5.4V
=8V
P_BDRV_02_25
P_BDRV_02_26
SD
1)
SD
1)
1)
External MOSFET
gate-to-source
voltage - MOSFET
off
VGS(off)
-
-
-
-
2
V
V
I
<31D
≥31D
P_BDRV_02_27
P_BDRV_02_28
DISCHARGE
3.5
I
DISCHARGE
Rise time
trise3_3nf
40
40
70
70
100
100
ns
ns
1) 25-75% of VGxx1
CL=3.3nF; ICHARGE=max
; IDISCHARGE=max ;
VSD≥8V
;
P_BDRV_02_29
P_BDRV_02_30
Fall time
tfall3_3nf
1) 75-25% of VGxx1
;
CL=3.3nF; ICHARGE=max
; IDISCHARGE=max ;
VSD≥8V
Rise time
Fall time
Rise time
trisemax
tfallmax
trisemin
50
50
5
-
-
-
350
350
25
ns
ns
µs
25-75% of VGxx1
CL=10nF; ICHARGE=max ;
DISCHARGE=max ; VSD≥8V
75-25% of VGxx1
CL=10nF; ICHARGE=max ;
DISCHARGE=max ; VSD≥8V
1) 25-75% of VGxx1
;
P_BDRV_02_31
P_BDRV_02_32
P_BDRV_02_33
I
;
I
;
CL=10nF; ICHARGE=min ;
IDISCHARGE=min ; VSD≥8V
Datasheet, Z8F80164852
130
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics BDRV
Table 68 MOSFET Driver Output (cont’d)
VS = 4.4 V to 28 V, VSD = 5.4 V to 29 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Fall time
tfallmin
5
-
-
-
25
µs
ns
ns
1) 75-25% of VGxx1
CL=10nF; ICHARGE=min ;
DISCHARGE=min ; VSD≥8V
25-75% of VGxx1
CL=10nF; ICHARGE=max ;
IDISCHARGE=max ; VSD≥8V
;
P_BDRV_02_34
I
Absolute rise - fall tr_f(diff)LSx
time difference for
all LSx
-
100
100
;
P_BDRV_02_35
P_BDRV_02_36
P_BDRV_02_38
Absolute rise - fall tr_f(diff)HSx
time difference for
all HSx
-
25-75% of VGxx1
CL=10nF; ICHARGE=max ;
DISCHARGE=max ; VSD≥8V
;
I
Resistor between
GHx/GLx and GND
RGGND
10
15
13.5 17
20 27
kOh
m
Resistor between
SHx and GND
RSHGN
kOh 3) This resistance is the P_BDRV_02_39
m
resistance between
GHx and GND
connected through a
diode to SHx. As a
consequence the
voltage at SHx can rise
up to 0,6V typ. before
it gets discharged
through the resistor.
Effective
RONCCP
2.5
5
10
Oh 50mA forced into Gx, P_BDRV_02_40
dischargeRDSON
m
Sx grounded;
DISCHARGE=63D ; VCP=VSD
I
+14.0V; VSD=13.5V
Input propagation tP(ILN)min
time (LS on)
3
3
3
3
-
-
12
12
µs
µs
µs
µs
ns
1) "ON"=1 to 25% of
VGxx1; CL=10nF;
ICHARGE=min
1) "ON"=0 to 75% of
P_BDRV_02_42
P_BDRV_02_43
P_BDRV_02_44
P_BDRV_02_45
P_BDRV_02_46
Input propagation tP(ILF)min
time (LS off)
-
V
Gxx1; CL=10nF;
DISCHARGE=min
1) "ON"=1 to 25% of
VGxx1; CL=10nF;
I
Input propagation tP(IHN)min
time (HS on)
-
12
ICHARGE=min
1) "ON"=0 to 75% of
VGxx1; CL=10nF;
Input propagation tP(IHF)min
time (HS off)
-
12
I
DISCHARGE=min
"ON"=1 to 25% of
Gxx1; CL=10nF;
CHARGE=max
Input propagation tP(ILN)max
time (LS on)
200
350
V
I
Datasheet, Z8F80164852
131
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics BDRV
Table 68 MOSFET Driver Output (cont’d)
VS = 4.4 V to 28 V, VSD = 5.4 V to 29 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Input propagation tP(ILF)max
time (LS off)
-
-
-
-
200
200
200
-
300
350
300
100
ns
ns
ns
ns
"ON"=0 to 75% of
Gxx1; CL=10nF;
DISCHARGE=max
"ON"=1 to 25% of
Gxx1; CL=10nF;
P_BDRV_02_47
V
I
Input propagation tP(IHN)max
time (HS on)
P_BDRV_02_48
P_BDRV_02_49
P_BDRV_02_50
V
ICHARGE=max
Input propagation tP(IHF)max
time (HS off)
"ON"=0 to 75% of
VGxx1; CL=10nF;
I
DISCHARGE=max
"ON"=1 to 25% of
Gxx1; CL=10nF;
CHARGE=max
Absolute input
tPon(diff)LSx
tPoff(diff)LSx
tPon(diff)HSx
tPoff(diff)HSx
propagation time
difference between
propagation times
for all LSx (LSx on)
V
I
Absolute input
-
-
-
-
-
-
100
100
100
ns
ns
ns
"ON"=0 to 75% of
Gxx1; CL=10nF;
DISCHARGE=max
P_BDRV_02_51
P_BDRV_02_52
P_BDRV_02_53
propagation time
difference between
propagation times
for all LSx (LSx off)
V
I
Absolute input
"ON"=1 to 25% of
Gxx1; CL=10nF;
CHARGE=max
propagation time
difference between
propagation times
for all HSx (HSx on)
V
I
Absolute input
"ON"=0 to 75% of
Gxx1; CL=10nF;
DISCHARGE=max
propagation time
difference between
propagation times
for all HSx (HSx off)
V
I
1) Not subject to production test, specified by design
2) The value of ICP replicates the average load on the charge pump coming from 20-kHz PWM operation of 6 MOSFETs,
having each a max. gate capacitance of the specified CL, under the assumption that the low-side gates are charged up
to VGxx1@TYP and the high-side gates are charged up to the respective VGxxy@MIN
.
3) This resistance is connected through a diode between SHx and GHx to ground.
Datasheet, Z8F80164852
132
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics BDRV
26.3.3
Charge-discharge current timing characteristics
Table 69 Charge-Discharge Current Timing Characteristics
VS = 4.4 V to 28 V, VSD = 5.4 V to 29 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Charge current
delay time
tdly(on)
-
-
-
-
-
35
35
50
-
90
ns
ns
ns
ns
ns
1) from ″ON″=1 to 20% P_BDRV_03_01
of Ichgx (x=0...63);
CL=10nF
1) from 20% of Ichgx to P_BDRV_03_02
Ichgx@MIN (x=0...63);
Charge current rise trise(on)
time
70
CL=10nF
Gate Source
Voltage Saturation
Time
tsat(on)
100
150
75
1) from VGS=VGS(on) to
0.9*VGxxy@MIN;CL=10nF;
ICHARGE=63 ; VSD≥8V
P_BDRV_03_03
Charge current
settling time -
sequencer mode
tset_chg(seq)
2) 1) from any ICHARGE(n) P_BDRV_03_04
to ICHARGE(n+1) = 0D or
63D; CL=10nF
Discharge current tset_dischg(seq)
settling time -
-
3) 1) from any
P_BDRV_03_05
IDISCHARGE(n) to
sequencer mode
IDISCHARGE(n+1) = 0D or
63D; CL=10nF
Discharge current tdly(off)
delay time
-
-
25
25
80
70
ns
ns
1) from "ON"=0 to 20% P_BDRV_03_06
of Idischgx (x=0...63);
CL=10nF
Discharge current trise(off)
1) from 20% of Idischgx to P_BDRV_03_07
rise time
Idischgx@MIN (x=0...63);
CL=10nF
1) Not subject to production test, specified by design
2) ICHARGE(n) and ICHARGE(n+1) are consecutive gate charge current set points in sequencer mode.
3) IDISCHARGE(n) and IDISCHARGE(n+1) are consecutive gate discharge current set points in sequencer mode.
Datasheet, Z8F80164852
133
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics BDRV
26.3.4
Timing measurement comparators characteristics
Table 70 Timing Measurement Comparators
VS = 4.4 V to 28 V, VSD = 5.4 V to 29 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Low-side timing
measurement
comparator
VSH(low)
2
-
-
-
-
2.5
V
P_BDRV_04_01
threshold voltage
High-side timing
measurement
comparator
VSH(high)
VSD
2.5V
-
VSD-2V V
P_BDRV_04_02
P_BDRV_04_03
P_BDRV_04_04
threshold voltage
1)
1)
Delay of low-side
timing
measurement
comparator
tcdly(low)
5
20
25
ns
Delay of high-side tcdly(high)
timing
5
ns
measurement
comparator
1) Not subject to production test, specified by design
Datasheet, Z8F80164852
134
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics BDRV
26.3.5
Drain source monitoring characteristics
Table 71 Drain source monitoring
VS = 4.4 V to 28 V, VSD = 5.4 V to 29 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
-25% 0.125 +25%
Drain source
monitoring
threshold
VDSMONVTH
V
BDRV_CTRL3.DSMON P_BDRV_05_01
VTH<2:0>=000B
1)
-20% 0.25 +20%
V
P_BDRV_05_02
BDRV_CTRL3.DSMON
VTH<2:0>=001B
1)
-15% 0.5
+15%
V
V
V
V
V
V
P_BDRV_05_03
BDRV_CTRL3.DSMON
VTH<2:0>=010B
1)
-15% 0.75 +15%
-15% 1.00 +15%
-15% 1.25 +15%
P_BDRV_05_04
BDRV_CTRL3.DSMON
VTH<2:0>=011B
1)
P_BDRV_05_05
BDRV_CTRL3.DSMON
VTH<2:0>=100B
1)
P_BDRV_05_06
BDRV_CTRL3.DSMON
VTH<2:0>=101B
1)
-15% 1.5
+15%
P_BDRV_05_07
BDRV_CTRL3.DSMON
VTH<2:0>=110B
1)
-15% 1.75 +15%
P_BDRV_05_08
BDRV_CTRL3.DSMON
VTH<2:0>=111B
Drain source
monitoring filter
time
tDS_FILT
0.7
1.7
3.6
7.5
0.7
1.7
3.6
7.5
1
2
4
8
1
2
4
8
1.3
2.3
4.4
8.5
1.3
2.3
4.4
8.5
µs
µs
µs
µs
µs
µs
µs
µs
1) SFR setting 0
1) SFR setting 1
1) SFR setting 2
1) SFR setting 3
1) SFR setting 0
1) SFR setting 1
1) SFR setting 2
1) SFR setting 3
P_BDRV_05_09
P_BDRV_05_10
P_BDRV_05_11
P_BDRV_05_12
P_BDRV_05_13
P_BDRV_05_14
P_BDRV_05_15
P_BDRV_05_16
Drain source
monitoring
blanking time
tDS_BLANK
1) Not subject to production test, specified by design
Datasheet, Z8F80164852
135
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics BDRV
26.3.6
Open load diagnosis currents characteristics
Table 72 Open load diagnosis currents
VS = 4.4 V to 28 V, VSD = 5.4 V to 29 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Pull-Up diagnosis IPUDiag
current
-750
900
200
-
-
-
-350
µA IDISCHARGE=0 ; VSD≥6.4V; P_BDRV_06_01
VSHx=5V; Vs≥5.4V
Pull-Down
IPDDiag
1600 µA IDISCHARGE=0 ; VSD≥6.4V; P_BDRV_06_02
VSHx=5V; Vs≥5.4V
diagnosis current
Effective Pull-Down IPDDiag_OD
diagnosis current
overdrive
-
µA IDISCHARGE=0 ; VSD≥6.4V; P_BDRV_06_03
VSHx=5V; Vs≥5.4V
26.3.7
Charge pump characteristics
Table 73 Charge pump
VS = 4.4 V to 28 V, VSD = 5.4 V to 29 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Output voltage VCP VCPmin1
8
-
11
V
1) Bridge Driver
P_BDRV_07_01
vs. VSD
enabled but not ON;
C
C
CP1=220nF;
CP2=220nF;
ICP=7.6mA; VSD=5.4V;
CP=250kHz
f
Single-Stage Mode VCPsingle
Output voltage VCP
vs. VSD
11.7
-
16
V
1) Bridge Driver
P_BDRV_07_02
P_BDRV_07_03
enabled but not ON,
Charge Pump in
single-stage mode;
C
CP1=220nF;
CCP2=220nF;
CP=18.9mA; VSD=18V;
CP=250kHz
I
f
Regulated output VCP
11.7
-
16
V
1) Bridge Driver
voltage VCP vs. VSD
enabled but not ON;
C
C
CP1=220nF;
CP2=220nF;
ICP=18.9mA; VSD≥8V;
fCP=250kHz
Datasheet, Z8F80164852
136
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Electrical characteristics BDRV
Table 73 Charge pump (cont’d)
VS = 4.4 V to 28 V, VSD = 5.4 V to 29 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C,
all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Turn ON Time
tON_VCP
10
-
70
µs
2) 1) from
P_BDRV_07_04
CPCLK_EN='1' to 25%
of VCP; CCP1=220nF;
CCP2=220nF;
CVCP=470nF; VSD≥8V;
f
CP=250kHz
Rise time
trise_VCP
20
-
96
µs
2) 1) from 25% to 75% P_BDRV_07_05
of VCP; CCP1=220nF;
CCP2=220nF;
CVCP=470nF; VSD≥8V;
fCP=250kHz
1) Not subject to production test, specified by design
2) This time applies when bit DRV_CP_CLK_CTRL.CPCLK_EN is set
26.3.8
VSD overvoltage characteristics
Table 74 VSD Overvoltage
VS = 4.4 V to 28 V, Grade 0 devices: Tj = -40°C to +175°C, Grade 1 devices: Tj = -40°C to +150°C, all voltages with
respect to ground, positive current flowing into pin (unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1)
1)
1)
VSD Overvoltage
Rising
VSD_OV
32
1.3
10
-
38
2.5
14
V
P_BDRV_08_01
P_BDRV_08_02
P_BDRV_08_03
VSD Overvoltage
Hysteresis
VSD_OV_hyst
tVSD_OV_filt
1.9
12
V
VSD Overvoltage
Filter Time
µs
1) Not subject to production test, specified by design
Datasheet, Z8F80164852
137
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Package information
27
Package information
Figure 46 PG-TQFP-48-10
Datasheet, Z8F80164852
138
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Package information
Figure 47 PG-LQFP-64-28
Figure 48 PG-LQFP-64-31
Datasheet, Z8F80164852
139
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Package information
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant
with government regulations the device is available as a green product. Green products are RoHS-Compliant
(i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Further information on packages
https://www.infineon.com/packages
Datasheet, Z8F80164852
140
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Abbreviations
28
Abbreviations
The following acronyms and terms are used within this document. List see in Table 75.
Table 75 Acronyms
Acronyms
100TP
AHB
Name
100 Time Programmable
Advanced High-performance Bus
Advanced Peripheral Bus
Automotive Safety Integrity Level
Back Electro Magnetic Force
Controller Area Network
Charge Pump for MOSFET driver
Direct Memory Access
APB
ASIL
BEMF
CAN
CP
DMA
ECC
Error Correction Code
EEPROM
FS
Electrically Erasable Programmable Read Only Memory
Functional Safety
FSM
Finite State Machine
GPIO
HiZ
General Purpose Input Output
High impedance
IEN
Interrupt Enable
LDO
Low DropOut voltage regulator
Long Open Window (for WDT)
Least Significant Bit
LOW
LSB
LQFP
MCTRL
MCU
MPU
MRST
MSB
MTSR
N-FET
NMI
Low profile Quad Flat Package
Motor control
Micro Controller Unit
Memory Protection Unit
Master Receive Slave Transmit
Most Significant Bit
Master Transmit Slave Receive
N-channel Field Effect Transistor
Non-Maskable Interrupt
Nested Vector Interrupt Controller
Non-Volatile Memory
NVIC
NVM
OSC
Oscillator
OT
Overtemperature
OTP
One Time Programmable
Peripheral Bridge
PBA
PC
Program Counter
Datasheet, Z8F80164852
141
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Abbreviations
Table 75 Acronyms (cont’d)
Acronyms
PD
Name
Pull Down
PLL
Phase Locked Loop
PMU
PPB
Power Management Unit
Private Peripheral Bus
PSRAM
PSW
PU
Program Static Random Access Memory
Program Status Word
Pull Up
PWM
RAM
ROM
SCB
Pulse Width Modulation
Random Access Memory
Read Only Memory
Short Circuit to Battery
Short Circuit to Ground
Single Error Correction Double Error Detection
Special Function Register
System on Chip
SCG
SECDED
SFR
SoC
SOW
SPI
Short Open Window (for WDT)
Serial Peripheral Interface
Static Random Access Memory
Safe Switch Off (path)
SRAM
SSO
SWD
TAP
Arm® Serial Wire Debug
Test Access Port (for test and debug)
Temperature Compensation Control Register
Test Mode Select
TCCR
TMS
TSD
Thermal Shut Down
TQFP
UART
UV
Thin Quad Flat Package
Universal Asynchronous Receiver Transmitter
Undervoltage
VBG
Voltage reference Band Gap
Voltage Controlled Oscillator
Watchdog timer in SCU-DM
VCO
WDT
Datasheet, Z8F80164852
142
Rev. 1.1
2023-06-19
MOTIX™ TLE989x/TLE988x
Microcontroller with CAN-FD and NFET Driver for BLDC Applications
Revision history
29
Revision history
Revision Date
Changes
Rev. 1.1 2023-06-19 Updated P_GEN_10_13
Rev. 1.0 2023-05-15 Initial version
Datasheet, Z8F80164852
143
Rev. 1.1
2023-06-19
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Edition 2023-06-19
Published by
Infineon Technologies AG
81726 Munich, Germany
event be regarded as a guarantee of conditions or and conditions and prices, please contact the nearest
characteristics ("Beschaffenheitsgarantie").
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Document reference
Z8F80164852
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