TLE8108EM [INFINEON]
采用智能电源技术的智能 8 通道低边开关TLE8108EM专为动力总成应用而设计，配有串行外设接口（SPI），用于控制和诊断。所有通道都具有过流/过温保护功能，并通过有源箝位电路进行增强，以驱动传感负载。可以通过 MSC 进行负载状态检测：接地（SCG），开路负载（OL）和电池短路（SCB）短路。4个输入引脚，可用于开关的直接PWM控制。;
| 型号： | TLE8108EM |
| 厂家： | 
Infineon |
| 描述： | 采用智能电源技术的智能 8 通道低边开关TLE8108EM专为动力总成应用而设计，配有串行外设接口（SPI），用于控制和诊断。所有通道都具有过流/过温保护功能，并通过有源箝位电路进行增强，以驱动传感负载。可以通过 MSC 进行负载状态检测：接地（SCG），开路负载（OL）和电池短路（SCB）短路。4个输入引脚，可用于开关的直接PWM控制。 电池 开关 驱动 光电二极管 接口集成电路 驱动器 |
| 文件： | 总30页 (文件大小：1608K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TLE 8108 EM
Smart 8-Channel Low Side Relay Driver with SPI Interface
coreFLEX TLE8108EM
Data Sheet
Rev. 1.0, 2011-03-23
Automotive Power
TLE 8108 EM
Smart 8-Channel Low Side Switch
Table of Contents
Table of Contents
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
3.1
3.2
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
4.1
4.2
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
5.1
Electrical and functional Description of the Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Functional Description of Supply and Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Power Supply and Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Switching Inputs IN1 to IN4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Power Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Inductive Output Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1.1
5.1.2
5.2
5.2.1
5.2.2
5.3
6
Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Overtemperature Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Reverse Polarity Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Protection Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.1
6.2
6.3
6.4
7
Diagnosis Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.1
Diagnosis Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8
Serial Peripheral Interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
SPI Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Daisy Chain Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
SPI Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SPI Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
8.1
8.2
8.3
8.3.1
8.4
9
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
10
11
Data Sheet
2
Rev. 1.0, 2011-03-23
Smart 8-Channel Low Side Relay Driver with SPI Interface
coreFLEX
TLE8108EM
1
Overview
Features
•
•
•
•
•
•
•
4 input pins providing flexible PWM configuration
Active Clamping
Low Power Consumption Mode (Standby)
16 bit SPI for diagnostics and control
Daisy chain capability also compatible with 8bit SPI devices
Green product (RoHS compliant)
AEC qualified
PG-SSOP-24
Description
The TLE8108EM is an 8-Channel Low Side Switch in PG-SSOP-24 package providing embedded protective
functions.
It is especially designed as relay driver for powertrain automotive applications.
A serial peripheral interface (SPI) is implemented for control and diagnosis of the device and the load.
Four configurable direct inputs are available to control the outputs in PWM.
The device is monolithically integrated. The internal switches are power n-MOSFETs.
Table 1
Supply voltage
Max. ON State resistance at Tj = 150°C for each channel RDS(ON,max) 1.7Ω
Basic Electrical Data
VDD
4.5V ... 5.5V
Continuos load current
IL (cont)
400mA
Overload switch off threshold
Output leakage current per channel
Minimal drain to source clamping voltage
Maximum SPI clock frequency
ID (OVL,min) 500mA
ID (STB,max) 5µA
VDS(CL)
41V
fSCLK,max
5MHz
Type
Package
PG-SSOP-24
Marking
TLE8108EM
Data Sheet
3
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Overview
Diagnostic Feedback Information
•
•
•
•
•
Latched diagnostic information via SPI register
Overtemperature detection (DOT)
Overload detection corresponding Short Circuit to Battery (SCB) in ON state.
Open load detection in OFF state (OL)
Short Circuit to GND detection in OFF state (SCG)
Protection Functions
•
•
•
Overload switch off
Overtemperature switch off
Electrostatic discharge (ESD)
Application
•
•
Resistive, inductive and capacitive loads
Especially designed for driving relays in automotive applications
General Information
The TLE8108EM is an 8-Channel Low Side Relay Switch designed for typical automotive relays, providing
embedded protective functions. The PG-SSOP-24 package is used to get a footprint optimized solution. The 16 bit
serial peripheral interface (SPI) is utilized for control and diagnosis of the device and the loads. The SPI interface
provides daisy chain capability.
The TLE8108EM is equipped with 4 input pins that can be used to directly control their dedicated channels thus
offering flexibility in design and PCB layout. The input multiplexer is controlled via SPI.
The device provides full diagnosis of the load, which is open load, short circuit to ground, as well as a short circuit
to battery detection. The SPI diagnosis bits indicate latched fault conditions that may have occurred.
Each output stage is protected against short circuit. In case of Overload, the affected channel switches off. There
are temperature sensors for each channel to protect the device in case of Overtemperature.
The device is supplied by a single power supply. It is operating at 5V nominal value.
The internal switches are power n-MOSFETs. The inputs are ground referenced CMOS compatible. The device
is monolithically integrated in Smart Power Technology.
All output pins are available at one side of the device while the other side bundles the signals to the microcontroller,
thus facilitating the PCB layout.
It is possible to set each channel in a Clear Mode (CLR) in order to clear Diagnosis flags; in CLR state output is
switched off and diagnosis currents are disabled.
A Standby mode of the Device (STB) can be entered if all the channels are set into CLR state; in STB mode the
power consumpiton is reduced to the minimum.
Data Sheet
4
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Block Diagram
2
Block Diagram
VDD
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
Standby
Control
RST
IN1
IN2
IN3
IN4
Input MUX,
Control
Temperature
OUT8
Control,
Diagnostic,
Protection
Functions
Sensor
Short Circuit
Detection
CS
SCLK
SI
SPI
Open Load
Detection
SO
Diagnosis
Register
Gate Control
GND
Block Diagram.vsd
Figure 1
Block Diagram for the TLE8108EM
Data Sheet
5
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
TOP VIEW
GND
1
24
23
22
21
20
19
18
17
16
15
14
13
VDD
CS
GND
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
GND
2
3
SI
4
RST
SCLK
SO
5
6
Cooling
TAB
7
N.U.
IN1
8
9
IN2
10
11
12
IN3
IN4
GND
VDD
Pin Configuration.vsd
Figure 2
Pin Configuration
3.2
Pin Definitions and Functions
1)
Pin
Symbol
I/O
Function
Power Supply
13,24 VDD
-
Supply voltage; Connected to 5V voltage with reverse protection diode
and filter against EMC; Both pins must be connected to the supply without
parasitic resistors
1,2,11,12 GND
-
-
Ground; common ground for digital, analog and power; Pins must be
connected together without parasitic resistors
Cooling GND
TAB
Cooling TAB (bottom side); Internally connected to ground; Pin must be
connected externally to ground without parasitic resistors
Power Stages
3
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
O
O
O
O
O
O
O
O
Output channel 1; Drain of power transistor channel 1
Output channel 2; Drain of power transistor channel 2
Output channel 3; Drain of power transistor channel 3
Output channel 4; Drain of power transistor channel 4
Output channel 5; Drain of power transistor channel 5
Output channel 6; Drain of power transistor channel 6
Output channel 7; Drain of power transistor channel 7
Output channel 8; Drain of power transistor channel 8
4
5
6
7
8
9
10
Inputs
17
IN1
I
PD Active Low; Control input; Digital input 3.3V or 5V; If not used, pin must be
connected to GND
Data Sheet
6
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Pin Configuration
1)
Pin
Symbol
I/O
Function
16
IN2
I
PD Active Low; Control input; Digital input 3.3V or 5V; If not used, pin must be
connected to GND
15
14
IN3
IN4
I
I
PD Active Low; Control input; Digital input 3.3V or 5V; If not used, pin must be
connected to GND
PD Active Low; Control input; Digital input 3.3V or 5V; If not used, pin must be
connected to GND
18
21
SPI
23
20
22
19
N.C.
RST
I
I
PD Not Connected; pin must be tied to GND
PD Active Low; Reset input pin; Digital input 3.3V or 5V
CS
I
PU Active Low; SPI chip select; Digital input 3.3V or 5V
PD Active Low; Serial clock; Digital input 3.3V or 5V
PD Active Low; Serial data in; Digital input 3.3V or 5V.
Serial data out; Digital output with voltage level referring to VDD
SCLK
SI
I
I
SO
O2)
1) O=Output;
I=Input;
PD=integrated pull-down resistor;
PU=integrated pull-up resistor
2) SO is set to tristate if SPI is inactive (CS is high or RST is low)
Data Sheet
7
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Absolute Maximum Ratings 1)
Unless otherwise specified: Tj = -40°C to +150°C; VDD = 4.5V to 5.5V
All voltages with respect to ground, positive current flowing into pin
Pos.
Parameter
Symbol
Limit Values
Max.
Unit Conditions
Min.
Power Supply
4.1.1
4.1.2
Supply voltage
VDD
-0.3
0
5.5
36
V
V
-
-
Output voltage for short circuit protection VDS_SC
(single pulse)
Power Stages
4.1.3
Load current
ID
-0.5
-0.3
0.5
41
A
V
-
4.1.4
Voltage at power transistor
VDS
Active Clamped
Clamping Energy - Singel Pulse 2)
4.1.5
Single Clamping Energy
per Channel
EAS
-
20
mJ
ID = 0.18A
1 Single Pulse
Logic Pins
3)
3)
3)
3)
3)
3)
4.1.6
4.1.7
4.1.8
4.1.9
4.1.10
4.1.11
IN1 to IN4; Voltage at input pins
VIN
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
V
V
V
V
V
V
DD + 0.3
V
V
V
V
V
V
RST; Voltage at reset pin
VRST
VCS
VSCLK
VSI
DD + 0.3
DD + 0.3
DD + 0.3
DD + 0.3
DD + 0.3
CS; Voltage at chip select
SCLK; Voltage at serial clock pin
SI; Voltage at serial input pin
SO; Voltage at serial output pin
VSO
Temperatures
4.1.12
4.1.13
Junction Temperature
Tj
Tj
-40
-40
150
165
°C
°C
-
Junction Temperature
Dynamic
Conditions,
100h max total
4.1.14
Storage Temperature
Tstg
-55
-4
150
4
°C
kV
-
ESD Susceptibility
4.1.15
ESD Resistivity
VESD
HBM4)
1) Not subject to production test, specified by design.
2) Triangular Pulse Shape (Inductance Discharge): ID(t) = ID(0)×(1 - t / tpulse); 0 < t < tpulse
3) Level must not exceed VDD+0.3V < 5.5V
.
4) ESD susceptibility, HBM according to EIA/JESD 22-A114-F
Note:Stress above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note:Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Data Sheet
8
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
General Product Characteristics
4.2
Thermal Resistance
Note:This thermal data was generated in accordance with JEDEC JESD51 standards.
For more information go to www.jedec.org.
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
-
Max.
4.2.1
4.2.2
Junction to Case
RthJC
RthJA
-
-
7
-
K/W
K/W
P
P
TOT = 1W 1) 2) 3)
TOT = 1W 1) 2) 3)
Junction to Ambient (2s2p)
40
1) Not subject to production test, specified by design.
2) Homogenous power distrubution over all channels (all power stages equally heated), dependent on cooling setup.
3) Refer to Figure 3 for the setup.
Dimensions:
Metallization:
Thermal Vias:
76.2 x 114.3 x 1.5 mm³ , FR4
JEDEC 2s2p (JESD 51-7) + (JESD 51-5)
F =0.3mm; plating 25µm; 10 pcs. for PG-SSOP-24
70µm modeled (traces)
35µm, 90% metallization
35µm, 90% metallization
70µm, 5% metallization
Rth PCB setup.vsd
Figure 3
PG-SSOP-24 PCB setup
Data Sheet
9
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Electrical and functional Description of the Device
5
Electrical and functional Description of the Device
The TLE8108EM is a 8-Channel Low Side Relay Switch.
The power stages are composed of n-MOSFET transistors.
5.1
Functional Description of Supply and Input Pins
Power Supply and Reset
5.1.1
The TLE8108EM is supplied by a single power supply line VDD with two input pins which must be connected
together. After power supply start-up, the input registers of the device are programmed to OFF mode for all
channels. The output registers must be reset to their default values by programming the Clear mode for all
channels once.
Capacitors at the supply pins VDD to GND are recommended.
There is a reset pin available. Low level at this pin causes all registers to be set to their default values and the
quiescent supply currents are minimized. This is also true for the Standby Mode in case all channels are
programmed to Clear. Figure 4 shows the timing requirements for the RST pin to be enabled and for the device
to wake up.
RST
tRST
t
DEVICE
STATUS
tWU
READY
NOT READY
READY
t
Reset Timing.vsd
Figure 4
Reset Timings
Data Sheet
10
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Electrical and functional Description of the Device
5.1.2
Switching Inputs IN1 to IN4
There are four input pins available at TLE8108EM, which can be configured to be used for control of the output
stages. The SPI INn parameter selects the input pin to be used. Figure 5 shows the input circuit of TLE8108EM.
CHANNEL 4
CHANNEL 3
CHANNEL 2
IN4
CHANNEL 1
IN3
IN2
IN1
CLR/STB
OFF
ON
DMOS
CLR/STB
IIN1
IN1
RST
CHANNEL 8
CHANNEL 7
CHANNEL 6
CHANNEL 5
CLR/STB
OFF
RST
ON
DMOS
CLR/STB
IN5
RST
Input Logic.vsd
Figure 5
Input Matrix and Logic
The current sink to ground ensures that the channels switch off in case of an open input pin. The zener diode
protects the input circuit against ESD pulses. After power-on reset or after an external reset the device enters the
OFF mode for all channels. During an external reset or a power-on reset, the output stages are set to Clear mode.
Data Sheet
11
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Electrical and functional Description of the Device
5.2
Power Outputs
5.2.1
Inductive Output Clamp
When switching off inductive loads, the potential at pin OUT rises to VDS(CL) potential, because the inductance
intends to continue driving the current. The voltage clamping is necessary to prevent destruction of the device.
See Figure 6 for more details. Nevertheless, the maximum allowed load inductance is limited. If a dedicated
output enters clamping mode, the channel can be turned on again after clamping has disappeared.
OUT
IL
RL
LOAD
LL
VDS(CL)
VBAT
GND
Clamping Principle.vsd
Figure 6
Internal Clamping Principle
Clamping Energy
During demagnetization of inductive loads, energy has to be dissipated in the TLE8108EM. This energy can be
calculated with following equation:
LL
-----
RL
V
DS(CL) – VBAT
RL ⋅ IL
-------------------------------------
VDS(CL) – VBAT
⎛
⋅ ln 1 +
⎝
⎞
⎠
-------------------------------------
E = VDS(CL)
⋅
⋅ IL –
(1)
RL
The maximum energy which is converted into heat, is limited by the thermal design of the component.
Application hint: It is recommended to consider the real behavior of the load (RL and LL vs. temperature and
•
vs. current) at each operating condition. Typical small signal parameters provided in the Datasheet of the load
(actuator) might not represent the real behavior under operating conditions.
Data Sheet
12
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Electrical and functional Description of the Device
5.2.2
Timing Diagrams
The power transistors are switched on and off with a dedicated slope via the IN bits of the serial peripheral interface
SPI or by the dedicated input pins and the input mode which is also programmed by SPI. The switching times tON
and tOFF are designed equally. If all channels are programmed into Clear mode together, the overall power
consumption is reduced to a minimum. To switch the channel on again, OFF mode must be programmed and a
wake up time twu(Stdby) has to expire before sending the ON command. This procedure is shown in Figure 7.
Switching from ON to:
Switching ON from:
OFF or CLR
OFF or CLR or STB (All-CLR )
CS
CS
SPI
SPI
ON
OFF; CLR; STB
t
t
VDS
tOFF
VDS
tON
80%
20%
80%
20%
t
t
Switching ON from: All Channels in CLR State (Standby Mode)
CS
SPI
SPI
ON
OFF
t
VDS
tWU
tON
80%
20%
t
Timing Diagrams.vsd
Figure 7
Timing Diagrams (Resistive Load)
In Input Mode, a high signal at the input pin is equivalent to a SPI ON command and a low signal to SPI OFF
command respectively. Please refer to Chapter 8.3 for details on operation modes.
Data Sheet
13
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Electrical and functional Description of the Device
5.3
Electrical Characteristics
Note:Characteristics show the deviation of parameters at given supply voltage and junction temperature. Typical
values show the typical parameters expected from manufacturing.
Electrical Characteristics: Supply, Inputs, Reset and Power Stages
All voltages with respect to ground, positive currents are flowing into pin
unless otherwise specified: VDD = 4.5V to 5.5V, Tj = -40°C to +150°C
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
Power Supply
5.3.1
5.3.2
Supply voltage
VDD
4.5
-
-
-
5.5
5.5
V
Supply current
all channels on
IDD(ON)
mA
5.3.3
Supply standby current
IDD(STB)
-
-
80
μA
V
CS = VDD
all channels in Clear mode
VSI = 0V
V
V
SCLK = 0V
RST = 0V
5.3.4
5.3.5
Supply reset current
IDD(RST)
-
-
-
-
40
μA
Power-on reset threshold voltage VDD(PO)
4.0
V
Output Characteristics
5.3.6
On-state resistance per channel
RDS(ON)
-
0.8
-
Ω
IL = 400mA 1)
Tj = 25°C
-
-
-
-
-
1.7
400
5
Ω
IL = 400mA
Tj = 150°C
1)
5.3.7
5.3.8
5.3.9
Continuous load current
IL(cont)
-
mA
μA
V
All Channels ON
Output leakage current in Standby ID(STB)
Mode (per channel)
-
V
DS = 13.5V
Output clamping voltage
VDS(CL)
41
50
I
DS = 20mA
Input Characteristics
L level of pins IN1..IN4
H level of pins IN1..IN4
V
-
-
5.3.10
5.3.11
VIN(L)
VIN(H)
0
-
0.6
5.5
40
V
2.0
1
-
5.3.12 L input pull-down current through IIN(L)
10
μA
VIN = 0.6V 1)
pin IN
H input pull-down current through pin IN
μA
V
IN = VDD = 5V
5.3.13
IIN(H)
10
40
80
Reset Characteristics
5.3.14 L level of pin RST
VRST(L)
VRST(H)
0.3
-
0.2*
VDD
V
-
5.3.15 H level of pin RST
0.4*
-
VDD
V
-
VDD
5.3.16 L input pull-down current through IRST(L)
1
10
40
40
μA
μA
V
V
RST = 0.6V 1)
pin RST
5.3.17 H input pull-down current through IRST(H)
10
80
RST = VDD = 5V
pin RST
Timings
1)
5.3.18 Reset wake up time (Figure 4)
twu
-
-
200
μs
Data Sheet
14
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Electrical and functional Description of the Device
Electrical Characteristics: Supply, Inputs, Reset and Power Stages (cont’d)
All voltages with respect to ground, positive currents are flowing into pin
unless otherwise specified: VDD = 4.5V to 5.5V, Tj = -40°C to +150°C
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
50
5
Typ.
-
Max.
1)
5.3.19 Reset signal duration (Figure 4)
tRST
tON
-
μs
μs
5.3.20 Turn on time
15
50
V
BAT = 13.5V
resistive load
DS = 180mA
VBAT = 13.5V
V
DS = 20% VBAT (Figure 7)
all channels
I
5.3.21 Turn off time
tOFF
5
-
15
-
50
µs
V
DS = 80% VBAT (Figure 7)
resistive load
1)
5.3.22 Standby Mode wake up time (All
twu(Stdby)
200
ms
channels in CLR state) (Figure 7)
Clamping Energy - Repetitive 1) 2) 3) 4)
5.3.23 Repetitive Clamping Energy
per Channel
EAR
-
-
-
-
13
18
mJ
mJ
ID = 0.17A
106 cycles
ID = 0.2A
104 cycles
1) Not subject to production test, specified by design.
2) Either one of the values has to be considered as worst case limitation.
3) This lifetime statement is an anticipation based on an extrapolation of Infineon's qualification test results. The actual lifetime
of a component depends on its form of application and type of use etc. and may deviate from such statement. The lifetime
statement shall in no event extend the agreed warranty period.
4) Triangular Pulse Shape (Inductance Discharge): ID(t) = ID(0)×(1 - t / tpulse); 0 < t < tpulse
.
Data Sheet
15
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Protection Functions
6
Protection Functions
The device provides embedded protective functions. Integrated protection functions are designed to prevent IC
destruction under fault conditions described in this Data Sheet. Fault conditions are considered as “outside”
normal operating range. Protection functions are not designed for continuous repetitive operation.
6.1
Overload Protection
The TLE8108EM is protected in case of Overload or short circuit of the load. After time tOFF(OVL), the overloaded
channel n switches off and the according diagnosis information is stored into the corresponding diagnosis register.
The channel can be switched on again with the corresponding command after programming the Clear mode to
reset the diagnosis register. Please refer to the example from Figure 8 for details.
Channel
Command
ON
OFF
ON
CLR
ON
t
tOFF(OVL2)
Reset of
SCB entry
ID
ID(OVL2)
Overload
Removed
ID(OVL1)
t
tOFF(OVL1)
Shutdown at Overload
Overload Timing.vsd
Figure 8
6.2
Overtemperature Protection
In case of Overload, a temperature sensor for each channel causes an overheated channel n to switch off to
prevent destruction and the according diagnosis information is stored into the corresponding diagnosis register.
The channel can be switched on again after programming the Clear mode and sending the ON command
afterwards. Please refer to Chapter 7 for information on diagnosis features.
6.3
Reverse Polarity Protection
In case of reverse polarity, the intrinsic body diode of the n-MOSFET generates power to be dissipated. The
reverse current through the intrinsic body diode of the power transistor has to be limited by the connected load.
The VDD supply pins must be protected against reverse polarity externally.
Data Sheet
16
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Protection Functions
6.4
Protection Characteristics
Note:Characteristics show the deviation of parameters at given supply voltage and junction temperature. Typical
values show the typical parameters expected from manufacturing.
Electrical Characteristics: Protection
All voltages with respect to ground, positive currents are flowing into pin
unless otherwise specified: VDD = 4.5V to 5.5V, Tj = -40°C to +150°C
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
Overload Protection
6.4.1
6.4.2
6.4.3
Overload current Threshold Low
all channels (Figure 8)
ID(OVL1)
ID(OVL2)
0.5
-
0.95
-
A
-
1)
Overload current Threshold High
all channels (Figure 8)
2.8*
ID(OVL1)
A
Overload shut-down delay time
Long
tOFF(OVL1) 11
-
50
μs
Valid for Overload
current Threshold
Low
6.4.4
Overload shut-down delay time
Short
tOFF(OVL2) 1.5
-
35
-
μs
Valid for Overload
current Threshold
High 1)
Overtemperature Protection
6.4.5 Thermal shut down temperature
1) Not subject to production test, specified by design
1)
Tj(SC)
165
-
°C
Data Sheet
17
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Diagnosis Features
7
Diagnosis Features
The SPI of TLE8108EM provides diagnosis information about the device and about the load. The following
diagnosis states are implemented:
•
•
Short circuit to battery (SCB): Can be detected if stages are turned on
Short circuit to ground (SCG): Can be detected if stages are turned off (channel either in OFF or in input mode
with the dedicated input low)
•
•
Open load (OL): Can be detected if stages are turned off (channel either in OFF or in input mode with dedicated
input low)
Diagnosis of Overtemperature (DOT): Is set in case the thermal shut down temperature Tj(SC) is reached, if the
output is turned on (either ON-state or input mode and channel turned on via parallel INx). In case the thermal
shut down temperature Tj(SC) is reached during clamping in OFF state, DOT is set and the dedicated channel
can only be switched on again after a Clear mode is programmed, the temperature got below the shut down
threshold and the clamping has vanished. In case the thermal shut down temperature Tj(SC) is reached in OFF
state without clamping, there is no diagnosis entry and the channel can be switched on again after the thermal
shut down temperature Tj(SC) falls below the threshold.
In Clear mode (CLR) there is no diagnostic function.
For each output channel there are 2 bits in the diagnosis register coding the different failures; Refer to Chapter 8.3
for encoding details.
A short circuit to ground (SCG) will overwrite an open load (OL), but an open load (OL) will not overwrite a short
circuit to ground (SCG). In order to detect an open load (OL) after a short circuit to ground (SCG), the output has
to be programmed in Clear mode and again in either OFF mode or input mode with low input level.
Failure Mode
Comment
Open load or short circuit
to ground
•
No diagnosis when channel n is switched on (either channel in ON mode or channel
in input mode and corresponding input signal is H)
•
•
No diagnosis when channel n is in Clear mode
Diagnosis when channel n is in input mode and corresponding input signal is L:
According to the voltage level at the output pin, the corresponding failure is latched
into the diagnosis register after the filtering time td has expired.
Diagnosis when channel n is in OFF mode: According to voltage level at the output
pin, the corresponding failure is latched into the diagnosis register after the filtering
time td has expired.
•
Data Sheet
18
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Diagnosis Features
Failure Mode
Comment
Overtemperature
•
In OFF state without clamping an Overtemperature will not be recognized. The
channel can be switched on after the event vanishes without any diagnosis entry.
In OFF state when the output voltage is limited to the clamping voltage, an
Overtemperature event will be recognized immediately at occurrence. Switching the
channel(s) on is possible when the Overtemperature and the clamping events
disappear and the dedicated channel(s) is (are) programmed to Clear mode.
In ON state when overtemperature occurs, the corresponding failure is stored into
the diagnosis register and the affected channel(s) is(are) switched off. To switch the
channel on again, the overtemperature event must disappear and the dedicated
channel(s) must be programmed to Clear mode
•
•
•
Overload
(Short Circuit to battery)
Diagnosis in ON state when the dedicated channel(s) is (are) programmed to ON
mode or input mode with input H. When Overload is detected, the affected
channel(s) is (are) switched off after time tOFF(OVL) and the corresponding failure is
latched into the diagnosis register. To switch the channel(s) ON again, the Overload
event must disappear and the dedicated channel(s) must be programmed to Clear
mode.
If, when the output stage is on, a SCB is detected the device turns the output stage off and the output stage can
not be turned on again unless Clear mode is entered for the corresponding channel.
It could happen that when the SCB is detected another failure has already been stored in the corresponding
register (OL or SCG); In this case the previous failure information, if not already been read, is lost.
If SCB is stored in the corresponding register and the output detects an OL or SCG, this OL or SCG will not be
stored until the previous SCB has been cleared by entering Clear Mode (CLR). In order to detect OL or SCG then,
an active OFF command needs to be adressed or, while a low input value is set on the dedicated input, input mode
has to be programmed. The final OL or SCG diagnosis information can be obtained when the next SPI command
is transmitted.
After power on sequence, the device must be programmed into Standby Mode, that means all channels in Clear
mode, to have proper diagnosis information afterwards.
7.1
Diagnosis Characteristics
In order to detect the failures in OFF status, there are 2 thresholds (VDS(SCG) and VDS(OL)) and an internal voltage
regulating mechanism with 2 diagnosis currents with current limits for each output.
In OFF state, the internal mechanism tends to regulate the output to the middle value between VDS(SCG) and VDS(OL)
achieving it only in case of OL. In case of SCG the output is pulled to GND by the short-circuit. In case of normal
function, in OFF state, the output voltage is above VDS(OL)
The diagnosis currents are switched off in case the output is in CLR mode.
The OL, SCB, SCG and DOT fault conditions are not stored until an integrated filter time has expired
Data Sheet
19
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Diagnosis Features
Output Stage OFF
ID
ID(PD)max
OL
OK
ID(PD)min
0
VDS
ID(PU)max
SCG
ID(PU)min
VDS(SCG)
VDS(OL)
Diagnosis Currents.vsd
Figure 9
SCG and OL diagnosis function (overview only)
Note:Characteristics show the deviation of parameters at given supply voltage and junction temperature. Typical
values show the typical parameters expected from manufacturing.
Electrical Characteristics: Diagnosis
All voltages with respect to ground, positive currents are flowing into pin
unless otherwise specified: VDD = 4.5V to 5.5V, Tj = -40°C to +150°C
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
OFF State Diagnosis
7.1.1
7.1.2
7.1.3
7.1.4
7.1.5
Open load detection threshold
voltage
VDS(OL)
VDD
* 0.45
-
-
-
-
-
VDD
* 0.62
V
-
-
Short circuit to Ground threshold
voltage
VDS(SCG) VDD
VDD
* 0.25
V
* 0.13
Output pull-down diagnosis current ID(PD)
per channel
30
80
μA
μA
μs
V
V
DS = 13.5V
DS = 0V
Output pull-up diagnosis current
per channel
ID(PU)
-150
30
-50
200
Diagnosis filter time for diagnosis of td
SCG and OL states
Data Sheet
20
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Serial Peripheral Interface (SPI)
8
Serial Peripheral Interface (SPI)
The diagnosis and control interface is based on a serial peripheral interface (SPI).
The SPI is a full duplex synchronous serial slave interface, which uses four lines: SO, SI, SCLK and CS. Data is
transferred by the lines SI and SO at the data rate given by SCLK. The falling edge of CS indicates the beginning
of a data access. Data is sampled in on line SI at the falling edge of SCLK and shifted out on line SO at the rising
edge of SCLK. Each access must be terminated by a rising edge of CS. A modulo 8 counter ensures that data is
taken only, when a multiple of 8 bit has been transferred, while the minimum of 16 bit is also taken into
consideration. Therefore the interface provides daisy chain capability even with 8 bit SPI devices.
MSB
MSB
14
14
13
13
12
12
11
11
10
10
09
09
08
08
07
07
06
06
05
05
04
04
03
03
02
02
01
01
LSB
LSB
SO
SI
CS
SCLK
t
SPI interface.vsd
Figure 10 Serial peripheral Interface
The SPI protocol is described in Section 8.3. It is reset to the default values after programming the device into
Standby mode (all the channels in Clear mode).
8.1
SPI Signal Description
There is one internal register where the diagnosis information is stored and a shift register used for transmitting
the information via SO.
CS - Chip Select:
The system microcontroller selects the TLE8108EM by means of the CS pin. Whenever the pin is in low state, data
transfer can take place. When CS is in high state, any signals at the SCLK and SI pins are ignored and SO is
forced into a high impedance state.
CS High to Low transition:
•
•
The information which is stored in the internal diagnosis register is transferred into the shift register.
SO changes from high impedance state to high or low state depending on the logic OR combination between
the transmission error flag (TER) and the signal level at pin SI. The transmission error flag is set after any kind
of reset, so a reset between two SPI commands is indicated. For details, please refer to Figure 11. This
information stays available till the first rising edge of SCLK.
Data Sheet
21
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Serial Peripheral Interface (SPI)
TER
1
0
SI
OR
SO
SO
SI
SPI
S
CS
SCLK
S
Transmission Error.vsd
Figure 11 Transmission Error Flag on SO Line
CS Low to High transition:
Data from shift register is transferred into the input matrix register only if a multiple of 8 SCLK signals after the
falling edge of CS has been detected, while the minimum valid length of 16 clocks for the 16-bit register
TLE8108EM is taken into account.
SCLK - Serial Clock:
This input pin clocks the internal shift register. The serial input (SI) transfers data into the shift register on the falling
edge of SCLK while the serial output (SO) shifts diagnostic information out on the rising edge of the serial clock.
It is essential that the SCLK pin is in low state whenever chip select CS makes any transition.
SI - Serial Input:
Serial input data bits are shifted in at this pin, the most significant bit first. SI information is read on the falling edge
of SCLK. Please refer to Section 8.3 for further information.
SO - Serial Output:
Data is shifted out serially at this pin, the most significant bit first. SO is in high impedance state until the CS pin
goes to low state. New data will appear at the SO pin following the rising edge of SCLK. Please refer to Section 8.3
for further information.
Data Sheet
22
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Serial Peripheral Interface (SPI)
8.2
Daisy Chain Capability
The SPI of TLE8108EM provides daisy chain capability. In this configuration several devices are activated by the
same CS signal (MCS). The SI line of one device is connected with the SO line of another device (see Figure 12),
to build a chain. The terminations of the chain are connected with the output and input of the master device, MO
and MI respectively. The master device provides the master clock MCLK, which is connected to the SCLK line of
each device in the chain.
Slave 1
SO
Slave 2
SO
Slave 3
SI SO
MO
SI
SI
SCLK
CS
SCLK
CS
SCLK
CS
SPI
SPI
SPI
MCLK
MCS
MI
SPI Daisy Chain.vsd
Figure 12 Daisy Chain Configuration
In the SPI block of each device, there is a shift register where one bit from SI line is shifted at each SCLK. The bit
shifted out can be seen at SO. After 16 SCLK cycles, the data transfer for one TLE8108EM has been finished. In
single chip configuration, the CS line must go high to make the device accepting the transferred data. In daisy
chain configuration the data shifted out at device #1 is shifted in at device #2. When using multiple devices in daisy
chain, the number of transferred bits must correspond to the number of the register bits of all chained devices.
Figure 13 shows an example with 3 SPI devices, where #1 and #3 are 16-bit SPI and #2 has a 8-bit SPI. To get
a successful transmission, there must be (2*16 + 1*8)-bit shifted through the devices. After that, the MCS line can
go high.
MI
MO
SO device 3
SI device 3
SO device 2
SI device 2
SO device 1
SI device 1
MCS
MCLK
t
SPI Daisy Chain data Transfer.vsd
Figure 13 Data Transfer in Daisy Chain Configuration
Data Sheet
23
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Serial Peripheral Interface (SPI)
8.3
SPI Protocol
The SPI protocol of the TLE8108EM provides two registers. The input register and the diagnosis register. The
diagnosis register contains 8 pairs of diagnosis flags, the input register contains the input multiplexer configuration.
After power-on reset, all input register bits are set to 1 which is the OFF state.
SI
Default: FFFFH
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
IN8
IN7
IN6
IN5
IN4
IN3
IN2
IN1
Field
Bits
Type
Description
INn
(n = 8-1)
15:14,
13:12,
11:10,
9:8,
7:6,
5:4,
W
Input Register Channel n
00B Clear Mode:
Channel switched off.
Diagnosis flags are cleared.
Diagnosis currents are disabled.
01B Input Mode:
3:2,
1:0
Channel is switched according to signal at input pin.
Diagnosis currents are enabled in OFF state.
10B ON mode:
Channel is switched on.
Diagnosis currents are disabled.
11B OFF mode (default state):
Channel is switched off.
Diagnosis currents are enabled.
If all channels are in Clear Mode, the device enters the Standby Mode a power down status with minimum current
consumption.
SO
161)
Reset Value: FFFFH
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
OUT8 OUT8 OUT7 OUT7 OUT6 OUT6 OUT5 OUT5 OUT4 OUT4 OUT3 OUT3 OUT2 OUT2 OUT1 OUT1
_DIA2 _DIA1 _DIA2 _DIA1 _DIA2 _DIA1 _DIA2 _DIA1 _DIA2 _DIA1 _DIA2 _DIA1 _DIA2 _DIA1 _DIA2 _DIA1
TER
1) This bit is valid between CS HI-LO and first SCLK LO-HI transition.
OUTn_DIA2 OUTn_DIA1
Description
1
1
0
0
1
0
1
0
Power stage ok
Short circuit to battery (SCB) or diagnostic overtemperature (DOT)
Open load (OL)
Short circuit to GND (SCG)
Data Sheet
24
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Serial Peripheral Interface (SPI)
8.3.1
Timing Diagrams
0.7 VDD
0.2 VDD
CS
tSCLK(P)
tSCLK(H) tSCLK(L)
tCS(td)
tCS(lead)
tCS(lag)
0.7 VDD
0.2 VDD
SCLK
tSI(su)
tSI(h)
0.7 VDD
0.2 VDD
SI
MSB
tSO(en)
tSO(v)
tSO(dis)
0.7 VDD
SO
MSB
LSB
0.2 VDD
SPI Timing Diagram.vsd
Figure 14 Timing Diagram
8.4
SPI Characteristics
Note:Characteristics show the deviation of parameters at given supply voltage and junction temperature. Typical
values show the typical parameters expected from manufacturing.
Electrical Characteristics: Serial Peripheral Interface (SPI)
All voltages with respect to ground, positive currents are flowing into pin
unless otherwise specified: VDD = 4.5V to 5.5V, Tj = -40°C to +150°C
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
Input Characteristics (CS, SCLK, SI)
8.4.1
8.4.2
L level of pin
CS
SCLK
SI
0
-
0.2*
VDD
V
-
VCS(L)
VSCLK(L)
VSI(L)
H level of pin
0.4*
-
VDD
V
-
CS
SCLK
SI
VDD
VCS(H)
VSCLK(H)
VSI(H)
8.4.3
8.4.4
8.4.5
L input pull-up current through CS ICS(L)
3
3
1
17
15
10
40
40
60
μA
μA
μA
VDD=5V
V
CS = 0V
H input pull-up current through CS ICS(H)
VDD=5V
1)
V
1)
CS = 0.4*VDD
L input pull-down current through
pin
SCLK
SI
ISCLK(L)
ISI(L)
V
SCLK = 0.6V
VSI = 0.6V
Data Sheet
25
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Serial Peripheral Interface (SPI)
Electrical Characteristics: Serial Peripheral Interface (SPI) (cont’d)
All voltages with respect to ground, positive currents are flowing into pin
unless otherwise specified: VDD = 4.5V to 5.5V, Tj = -40°C to +150°C
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
8.4.6
H-input pull-down current through
10
40
80
μA
VDD=5V
pin
SCLK
SI
V
SCLK = VDD
ISCLK(H)
ISI(H)
VSI = VDD
Output Characteristics (SO)
8.4.7
8.4.8
L level output voltage
H level output voltage
VSO(L)
VSO(H)
0
-
-
0.6
V
V
I
I
SO = 2mA
VDD
-
VDD
SO = -1.5mA
0.4
8.4.9
Output tristate leakage current
ISO(OFF)
-10
-
10
μA
VCS = VDD
Timings
8.4.10 Serial clock frequency
8.4.11 Serial clock period
8.4.12 Serial clock high time
8.4.13 Serial clock low time
fSCLK
0
-
-
-
-
-
5
-
MHz
ns
1) CL = 50pF
1)
tSCLK(P)
tSCLK(H)
tSCLK(L)
tCS(lead)
200
50
50
250
1)
1)
1)
-
ns
-
ns
8.4.14 Enable lead time (falling CS to
rising SCLK)
-
ns
1)
8.4.15 Enable lag time (falling SCLK to
rising CS)
tCS(lag)
tCS(td)
250
250
-
-
-
-
ns
ns
1) 2)
8.4.16 Transfer delay time (rising CS to
falling CS)
8.4.17
a)
b)
1)
1)
Data setup time (SI to falling SCLK) tSI(su)
Data hold time (falling SCLK to SI) tSI(h)
20
20
-
-
-
-
ns
ns
8.4.18 Output enable time (falling CS to
SO valid)
tSO(en)
tSO(dis)
tSO(v)
-
-
-
-
-
-
200
200
100
ns
ns
ns
CL = 50pF 1)
CL = 50pF 1)
CL = 50pF 1)
8.4.19 Output disable time (rising CS to
SO tristate)
8.4.20 Output data valid time with
capacitive load
1) Not subject to production test, specified by design.
2) Diagnosis flag update needs the time specified in Chapter 7.1 to get valid information
Data Sheet
26
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Application Information
9
Application Information
Note:The following information is given as a hint for the implementation of the device only and shall not be
regarded as a description or warranty of a certain functionality, condition or quality of the device.
Figure 15 shows a simplified application circuit. VDD needs to be externally reverse polarity protected.
VBAT
+5V
100nF
VDD
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
Relay
IN1
IN2
IN3
IN4
4.7nF
Load
VCC
GPIO
RST
4.7nF
µC
Low Side
XC2000
Gate Control
CS
SCLK
SPI
SPI
SO
SI
GND
GND
Application Diagram.vsd
Figure 15 Application Diagram
Note:This is a very simplified example of application circuit. The function must be verified in the real application.
•
Application hint: It is suggest to connect a 4.7nF capacitor directly at each output pin for improved EMC
performances
For further information you may contact http://www.infineon.com
Data Sheet
27
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Package Outlines
10
Package Outlines
0.35 x 45°
2x
1)
0.1
3.9
0.1 C D
0.08
C
C
0.65
Seating Plane
2)
0.05
0.2
0.25
6
M
M
0.2
D
0.2
C A-B D 24x
D
Bottom View
A
1
12
24
13
1
12
24
13
B
0.25
6.4
0.1 C A-B 2x
0.1
8.65
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion of 0.13 max.
Figure 16 PG-SSOP-24 (Plastic Dual Small Outline Package)
6.4
8
0.3
1.8
2.3
6.5
0.45
0.65
Index Marking
Figure 17 PG-SSOP-24 Footprint and Packing
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environment friendly products and to be compliant with
government regulations, the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-
free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Please specify the needed package (e.g. green package) when an order is placed.
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
Dimensions in mm
Data Sheet
28
Rev. 1.0, 2011-03-23
TLE 8108 EM
Smart 8-Channel Low Side Switch
Revision History
11
Revision History
Revision
Date
Changes
Released Data Sheet
Rev. 1.0
2011-03-24
Data Sheet
29
Rev. 1.0, 2011-03-23
Edition 2011-03-23
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2011 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
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