TLE4997E2 [INFINEON]

The Infineon linear Hall IC TLE4997has been designed specifically to meet the demands of highly accurate rotation and position detection, as well as for current measurement applications. The sensor provides a ratiometric analog output voltage, which is ideally suited to Analog-to-Digital (A/D) conversion with the supply voltage as a reference. The IC is produced in BiCMOS technology with high voltage capability and also provides reverse polarity protection. Digital signal processing using a 16-bit DSP architecture and digital temperature compensation guarantees excellent stability over a long period of time. The minimum overall resolution is 12 bits. Nevertheless, some internal stages work with resolutions up to 20 bits.;
TLE4997E2
型号: TLE4997E2
厂家: Infineon    Infineon
描述:

The Infineon linear Hall IC TLE4997has been designed specifically to meet the demands of highly accurate rotation and position detection, as well as for current measurement applications. The sensor provides a ratiometric analog output voltage, which is ideally suited to Analog-to-Digital (A/D) conversion with the supply voltage as a reference. The IC is produced in BiCMOS technology with high voltage capability and also provides reverse polarity protection. Digital signal processing using a 16-bit DSP architecture and digital temperature compensation guarantees excellent stability over a long period of time. The minimum overall resolution is 12 bits. Nevertheless, some internal stages work with resolutions up to 20 bits.

输出元件 传感器 换能器
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Data Sheet, V 2.10, April 2020  
TLE4997E2  
Programmable Linear Hall Sensor  
Sensors  
N e v e r s t o p t h i n k i n g .  
Edition 2020-04  
Published by Infineon Technologies AG,  
Am Campeon 1-12,  
85579 Neubiberg, Germany  
© Infineon Technologies AG 2020.  
All Rights Reserved.  
Attention please!  
The information herein is given to describe certain components and shall not be considered as a guarantee of  
characteristics.  
Terms of delivery and rights to technical change reserved.  
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding  
circuits, descriptions and charts stated herein.  
Information  
For further information on technology, delivery terms and conditions and prices please contact your nearest  
Infineon Technologies Office (www.infineon.com).  
Warnings  
Due to technical requirements components may contain dangerous substances. For information on the types in  
question please contact your nearest Infineon Technologies Office.  
Infineon Technologies Components may only be used in life-support devices or systems with the express written  
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure  
of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support  
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain  
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may  
be endangered.  
TLE4997E2  
Revision History:  
2020-04  
V 2.10  
Previous Version: V 2.09, January 2018  
Page  
All  
Subjects (major changes since last revision)  
Updated product name to TLE4997E2  
Table 5: removed unintended content  
16  
We Listen to Your Comments  
Any information within this document that you feel is wrong, unclear or missing at all?  
Your feedback will help us to continuously improve the quality of this document.  
Please send your proposal (including a reference to this document) to:  
sensors@infineon.com  
TLE4997E2  
Page  
Table of Contents  
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Target Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
1.1  
1.2  
1.3  
2
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Principle of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Further Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Transfer Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
2.1  
2.2  
2.3  
2.4  
2.5  
3
4
5
Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Electrical and Magnetic Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
6
Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Magnetic Field Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Gain Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Offset Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
DSP Input Low Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
DAC Input Interpolation Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
6.1  
6.2  
6.3  
6.4  
6.5  
6.6  
7
Error Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
Voltages Outside the Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
Open Circuit of Supply Lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
Not Correctable EEPROM Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26  
7.1  
7.2  
7.3  
8
Temperature Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27  
8.1  
Parameter Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28  
9
Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29  
Calibration Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30  
Programming Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31  
Laboratory Evaluation Programmer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31  
9.1  
9.2  
9.3  
10  
11  
Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32  
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33  
Data Sheet  
4
V 2.10, 2020-04  
TLE4997E2  
Page  
List of Figures  
Figure 1  
Figure 2  
Figure 3  
Figure 4  
Figure 5  
Figure 6  
Figure 7  
Figure 8  
Figure 9  
Figure 10  
Figure 11  
Pin Configuration and Hall Cell Location . . . . . . . . . . . . . . . . . . . . . . . . 8  
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Examples of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Ratiometry Error Band . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Signal Processing Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
DSP Input Filter (Magnitude Plot) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
DAC Input Filter (Magnitude Plot) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Clamping Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
EEPROM Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30  
Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32  
PG-SSO-3-10 (Plastic Green Single Small Outline Package) . . . . . . . 33  
Data Sheet  
5
V 2.10, 2020-04  
TLE4997E2  
Page  
List of Tables  
Table 1  
Table 2  
Table 3  
Table 4  
Table 5  
Table 6  
Table 7  
Table 8  
Table 9  
Table 10  
Table 11  
Table 12  
Table 13  
Table 14  
Table 15  
Table 16  
Table 17  
Table 18  
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Magnetic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Range Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Low Pass Filter Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
Low Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
Undervoltage and Overvoltage (All values with RL 10k). . . . . . . . . . 25  
Open Circuit (OBD Parameters) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
EEPROM Error Signalling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26  
Temperature Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27  
Calibration Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29  
Programming Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31  
Data Sheet  
6
V 2.10, 2020-04  
Programmable Linear Hall Sensor  
TLE4997E2  
1
Overview  
1.1  
Features  
• High linear and ratiometric push-pull rail-to-rail output  
signal  
• 20-bit Digital Signal Processing  
• Digital temperature compensation  
• 12-bit overall resolution  
• Operates from -40°C up to 150°C  
• Low drift of output signal over temperature and lifetime  
• Programmable parameters stored in EEPROM with single bit error correction:  
– magnetic range and magnetic sensitivity (gain)  
– zero field voltage (offset)  
– bandwidth  
– polarity of the output slope  
– clamping option  
– temperature coefficient for all common magnets  
– memory lock  
• Re-programmable until memory lock  
• Single supply voltage 4.5 - 5.5 V (4 - 7 V in extended range)  
• Operation between -200 mT and +200 mT within three ranges  
• Slim 3-pin package (Green)  
• Reverse polarity and overvoltage protection for all pins  
• Output short circuit protection  
• On-board diagnostics (wire breakage detection, undervoltage, overvoltage)  
• Digital readout of internal temperature and magnetic field values in calibration mode.  
• Individual programming and operation of multiple sensors with common power supply  
• Two-point calibration of magnetic transfer function  
• Precise calibration without iteration steps  
• High immunity against mechanical stress, EMC, ESD  
Type  
Marking  
Ordering Code  
Package  
TLE4997  
4997E2  
SP000235288  
PG-SSO-3-10  
Data Sheet  
7
V 2.10, 2020-04  
TLE4997E2  
Overview  
1.2  
Target Applications  
• Robust replacement of potentiometers  
– No mechanical abrasion  
– Resistant to humidity, temperature, pollution and vibration  
• Linear and angular position sensing in automotive applications like pedal position,  
suspension control, valve or throttle position, headlight levelling and steering angle  
• High current sensing for battery management, motor control, and electronic fuse  
1.3  
Pin Configuration  
Figure 1 shows the location of the Hall element in the chip and the distance between the  
Hall probe and the surface of the package.  
±0.05  
±0.1  
0.38  
2.03  
Center of  
Hall Probe  
Branded Side  
Hall-Probe  
1
2
3
AEP03717  
Figure 1  
Pin Configuration and Hall Cell Location  
Pin Definitions and Functions  
Table 1  
Pin No.  
Symbol  
Function  
1
2
3
Supply voltage / programming interface  
Ground  
V
DD  
GND  
OUT  
Output voltage / programming interface  
Data Sheet  
8
V 2.10, 2020-04  
TLE4997E2  
General  
2
General  
2.1  
Block Diagram  
Figure 2 shows a simplified block diagram.  
VDD  
Interface  
Supply  
Bias  
EEPROM  
enable  
A
A
D
HALL  
OUT  
D
D
A
VDD  
DSP  
Temp.  
Sense  
OBD  
GND  
ROM  
Figure 2  
2.2  
Block Diagram  
Functional Description  
The linear Hall IC TLE4997E2has been designed specifically to meet the demands of  
highly accurate rotation and position detection, as well as for current measurement  
applications.  
The sensor provides a ratiometric analog output voltage, which is ideally suited to  
Analog-to-Digital (A/D) conversion with the supply voltage as a reference.  
The IC is produced in BiCMOS technology with high voltage capability and also provides  
reverse polarity protection.  
Digital signal processing using a 16-bit DSP architecture and digital temperature  
compensation guarantees excellent stability over a long period of time.  
The minimum overall resolution is 12 bits. Nevertheless, some internal stages work with  
resolutions up to 20 bits.  
Data Sheet  
9
V 2.10, 2020-04  
TLE4997E2  
General  
2.3  
Principle of Operation  
• A magnetic flux is measured by a Hall-effect cell.  
• The output signal from the Hall-effect cell is converted from Analog to Digital signals.  
• The chopped Hall-effect cell and continuous-time A to D conversion provide very low  
and stable magnetic offset.  
• A programmable Low-Pass filter reduces the noise.  
• The temperature is measured and A to D converted.  
• Temperature compensation is processed digitally using a second order function.  
• Digital processing of output voltage is based on zero field and sensitivity value.  
• The output voltage range can be clamped by digital limiters.  
• The final output value is D to A converted.  
• The output voltage is proportional to the supply voltage (ratiometric DAC).  
• An On-Board-Diagnostics (OBD) circuit connects the output to VDD  
or GND in case of errors.  
2.4  
Further Notes  
Product qualification is based on “AEC Q100” (Automotive Electronics Council - Stress  
test qualification for integrated circuits).  
Data Sheet  
10  
V 2.10, 2020-04  
TLE4997E2  
General  
2.5  
Transfer Functions  
The examples in Figure 3 show how easily different magnetic field ranges can be  
mapped to the output voltage.  
• Polarity Mode:  
Unipolar: Only North- or South-oriented magnetic fields are measured.  
Bipolar: Magnetic fields can be measured in both orientations.  
The limit points must not be symmetric to the zero field point.  
• Inversion: The gain values can be set positive or negative.  
V
OUT (V)  
5 200  
VOUT (V)  
5
B (mT)  
50  
VOUT (V)  
5
B (mT)  
100  
B (mT)  
0
0
0
0
VOUT  
0
0
VOUT  
-50  
-100  
-200  
Example 1:  
- Bipolar  
Example 2:  
- Unipolar  
- Big offset  
Example 3:  
- Bipolar  
- Inverted (neg. gain)  
- Output for 3.3 V  
Examples of Operation  
Figure 3  
Note: Due to the ratiometry, voltage drops at the VDD line are imaged in the output  
signal.  
Data Sheet  
11  
V 2.10, 2020-04  
TLE4997E2  
Maximum Ratings  
3
Maximum Ratings  
Table 2  
Absolute Maximum Ratings  
Parameter  
Symbol  
Limit Values  
min. max.  
-40 150  
Unit Notes  
Storage temperature  
Junction temperature  
TST  
TJ  
°C  
°C  
V
-40  
170  
For 96h 1)  
4)  
Voltage on VDD pins with VDD  
-20 2)  
20 3)  
R
150 K/W  
THja  
respect to ground (VSS  
)
Supply current  
@ overvoltage  
IDDov  
-
52  
-
mA  
mA  
V
Supply current  
@ reverse voltage  
Voltage on output pin with VOUTov -16 5)  
IDDrev  
- 75  
16 3)  
RTHja 150 K/W  
respect to ground (VSS  
)
Vout may be > VDD  
Magnetic field  
BMAX  
-
-
unlimited  
4.0  
T
ESD protection  
kV  
According HBM  
V
ESD  
JESD22-A114-B 6)  
1)  
For limited time only. Depends on customer temperature lifetime cycles. Please ask for support by Infineon.  
2)  
max 24 h @ -50°C Ta < 30°C  
max 10 min. @ 30°C Ta < 80°C  
max 30 sec. @ 80°C Ta < 125°C  
max 15 sec. @ 125°C Ta 150°C.  
3)  
4)  
5)  
6)  
max. 24 h @ TJ < 80°C.  
Guaranteed by laboratory characterization, tested at ±18V.  
Max. 1 ms @ TJ < 30°C; -8.5 V for 100 h @ TJ < 80°C.  
100 pF and 1.5 kΩ  
Note: Stresses above those listed under “Absolute Maximum Ratings” may cause  
permanent damage to the device. This is a stress rating only and functional  
operation of the device at these or any other conditions above those indicated in  
the operational sections of this specification is not implied. Furthermore, only  
single error cases are assumed. More than one stress/error case may also  
damage the device.  
Exposure to absolute maximum rating conditions for extended periods may affect  
device reliability. During absolute maximum rating overload conditions (VIN > VDD  
or VIN < VSS) the voltage on VDD pins with respect to ground (VSS) must not  
exceed the values defined by the absolute maximum ratings.  
Data Sheet  
12  
V 2.10, 2020-04  
TLE4997E2  
Operating Range  
4
Operating Range  
The following operating conditions must not be exceeded in order to ensure correct  
operation of the TLE4997E2. All parameters specified in the following sections of this  
document refer to these operating conditions, unless otherwise indicated.  
Table 3  
Operating Range  
Symbol Limit Values  
min. max.  
Parameter  
Unit  
Notes  
Supply voltage  
VDD  
4.5  
4
5.5  
7
V
V
Extended range 1)  
2)  
Output current  
IOUT  
RL  
-1  
1
mA  
kΩ  
Load resistance  
10  
10  
-
-
Pull-down to GND  
Pull-up to VDD  
Load capacitance  
Junction temperature 3) TJ  
CL  
0
210  
nF  
°C  
-40  
125  
150  
For 5000h  
For 1000h4) 5)  
Useful lifetime  
tLive  
-
16  
years  
1)  
For reduced output accuracy.  
2)  
For V  
within the range of 5% ... 95% of V  
.
OUT  
DD  
3)  
4)  
5)  
RTHja 150 K/W.  
For reduced magnetic accuracy.  
Not additive.  
Note: Keeping signal levels within the limits specified in this table ensures operation  
without overload conditions.  
Data Sheet  
13  
V 2.10, 2020-04  
TLE4997E2  
Electrical and Magnetic Parameters  
5
Electrical and Magnetic Parameters  
Table 4  
Electrical Characteristics  
Symbol Limit Values  
min. typ. max.  
Parameter  
Unit  
Notes  
Output voltage range  
VOUT  
5
6
-
95  
94  
% of  
VDD  
For TA 120°C  
For TA > 120°C  
1)  
Supply current  
IDD  
3
7.5 10  
mA  
mA  
Output current @ OUT  
shorted to supply lines  
IOUTsh -30  
-
30  
For operating supply  
voltage range only  
2)  
Zero field voltage  
VZERO -100  
ΔVZERO -10  
-10  
-
-
-
100  
10  
%
Of VDD  
Zero field voltage drift  
mV  
mV  
In lifetime 3)  
Error band ov. temp.3)  
10  
4)5)  
Ratiometry error  
ERAT  
RthJA  
RthJC  
tPon  
-0.25 -  
+0.25 %  
Of VDD  
Thermal resistance  
-
-
-
-
-
-
219 K/W  
Junction to air  
47  
K/W  
ms  
Junction to case  
Power on time  
1
Δ VOUT ± 5% of VDD  
Δ VOUT ± 1% of VDD  
10  
Power On Reset level  
VDDpon  
2
-
4
V
Output DAC quantization ΔVOUT  
Output DAC resolution  
Output DAC bandwidth fDAC  
1.22  
mV  
bit  
@ VDD = 5 V  
-
12  
-
3.2  
-
kHz  
Interpolation filter 6)  
Output noise  
Vnoise  
DNL  
tDS  
-
-
-
-
4.68 mVpp 5% exceeded 7)8)  
Differential non-linearity  
-1  
-
1
LSB  
Of output DAC  
@ 100 Hz 9)  
Signal delay  
250 µs  
1)  
Also in extended V range. For V  
within the range of 5%... 95% of V , I  
= 0mA.  
DD  
OUT  
DD OUT  
2)  
3)  
Programmable in steps of 1.22 mV ( @ VDD = 5V ).  
For Sensitivity S 25 mV/mT. For higher sensitivities the magnetic offset drift is dominant. This means that for  
the precalibrated (typical) 60mV/mT sensitivity the typical output drift might be given due to the allowed  
magnetic offset tolerence up to ±0.4mT x 60 mV/mT = ±24 mV.  
4)  
5)  
6)  
7)  
8)  
9)  
For 4.5 VVDD5.5 V and within nominal V  
range; see “Ratiometry” on Page 15 for details on E  
.
RAT  
OUT  
For the maximum error in the extended voltage range, see “Ratiometry” on Page 15.  
More information, see “DAC Input Interpolation Filter” on Page 22.  
100 mT range, sensitivity 60 mV/mT, LP-filter 244 Hz, 160 Hz external RC low pass filter as application circuit.  
’5% exceeded’ means that 5 of 100 continuously measured V samples are out of limit.  
OUT  
A sinusoidal magnetic field is applied, VOUT shows amplitude of 20% of VDD, no LP filter is selected.  
Data Sheet  
14  
V 2.10, 2020-04  
TLE4997E2  
Electrical and Magnetic Parameters  
Ratiometry  
The linear Hall sensor works like a potentiometer. The output voltage is proportional to  
the supply voltage. The division factor depends on the magnetic field strength. This  
behavior is called “ratiometric”’.  
The supply voltage VDD should be used as the reference for the A/D Converter of the  
microcontroller. In this case, variations of VDD are compensated.  
The ratiometry error is defined as follows:  
V
OUT(VDD  
)
VOUT(5V)  
æ
ç
è
ö
÷
ø
------------------------------ --------------------------  
ERAT  
=
× 100 %  
5V  
VDD  
The ratiometry error band displays as a “Butterfly Curve”.  
%
1
ERAT  
0.75  
0.5  
0.25  
0
-0.25  
-0.5  
-0.75  
-1  
4
5
6
7
V
VDD  
Figure 4  
Ratiometry Error Band  
Note: Take care of possible voltage drops on the VDD and VOUT line degrading the  
result. Ideally, both values are acquired and their ratio is calculated to gain the  
highest accuracy. This method should be used especially during calibration.  
Data Sheet  
15  
V 2.10, 2020-04  
TLE4997E2  
Electrical and Magnetic Parameters  
Calculation of the Junction Temperature  
The total power dissipation PTOT of the chip increases its temperature above the ambient  
temperature. The power multiplied with the total thermal resistance R (Junction to  
thJA  
Ambient) leads to the final junction temperature. R  
is the sum of the addition of the  
thJA  
values of the two components Junction to Case and Case to Ambient.  
R
= RthJC + RthCA  
thJA  
TJ = TA + ΔT  
ΔT = R x PTOT = R  
x ( V x I + V  
x I )  
OUT  
I
, I  
> 0, if direction is into IC  
DD OUT  
thJA  
thJA  
DD  
DD  
OUT  
Example (assuming no noticeable load on Vout):  
VDD = 5 V  
IDD = 10 mA  
ΔT = 219 [K/W] x (5 [V] x 0.01 [A] + 0 [VA]) = 11 K  
For moulded sensors, the calculation with RthJC is more adequate.  
Magnetic Parameters  
Table 5  
Magnetic Characteristics  
Symbol Limit Values  
Parameter  
Unit  
Notes  
min. typ.  
max.  
1)  
Sensitivity  
± 12.5 -  
± 300 mV/mT  
S
Magnetic field range  
Integral nonlinearity  
Magnetic offset  
± 50  
-15  
± 1002) ± 200 mT  
Programmable 3)  
MFR  
INL  
BOS  
ΔBOS  
4)  
-
-
-
15  
400  
5
mV  
= ± 0.3% of VDD  
5) 6) 7)  
-400  
- 5  
μT  
Magnetic offset drift  
μT / °C Error band 7)  
1)  
Programmable in steps of 0.024%, @ VDD = 5 V and TJ = 25°C  
2)  
3)  
4)  
This range is also used for temperature and offset pre-calibration of the IC.  
Depending on the Offset and Gain settings, the output may saturate at lower fields.  
INL = Vout - Vout,lse with Vout,lse = least square error fit of Vout. Valid in the range (5% of VDD) < VOUT < (95% of  
VDD) for T 120°C and (6% of VDD) < VOUT < (94% of VDD) for 120°C < T 150°C  
J
J
5)  
6)  
7)  
In operating temperature range and over lifetime.  
For Sensitivity S > 25 mV / mT. For lower sensitivities, the zero field voltage drift is dominant.  
Measured at ± 100 mT range.  
Data Sheet  
16  
V 2.10, 2020-04  
TLE4997E2  
Signal Processing  
6
Signal Processing  
The flow diagram in Figure 5 shows the data processing algorithm.  
Range  
LP  
Gain  
Limiter  
(Clamp)  
Hall  
Sensor  
A
D
D
out  
X
+
A
X
LPDAC  
Offset  
Temperature  
Sensor  
TC2  
X
X
A
1
+
+
D
X
TC1  
-T0  
Stored in  
EEPROM  
Memory  
Temperature  
Compensation  
Figure 5  
Signal Processing Flow  
Magnetic Field Path  
• The analog output signal of the chopped Hall cell is converted in the continuous-time  
A/D Converter. The range of the chopped A/D Converter can bet set in several steps  
(see Table 6). This assures a suitable level for the A/D Converter.  
• After the A/D conversion, a digital low pass filter reduces the bandwidth (Table 10).  
• A multiplier amplifies the value according to the gain setting (see Table 8) plus  
temperature compensation.  
• The offset value is added (see Table 9).  
• A limiter reduces the resulting signal to 12 bits and feeds the D/A converter.  
Temperature Compensation  
(Details are listed in Chapter 8)  
• The output signal of the temperature cell is also A/D converted.  
• The temperature is normalized by subtraction of the T0 value (zero point of the  
quadratic function).  
• The linear path is multiplied with the TC1 value.  
Data Sheet  
17  
V 2.10, 2020-04  
TLE4997E2  
Signal Processing  
• In the quadratic path, the difference temperature is squared and multiplied with the  
TC2 value.  
• Both path outputs are added together to the gain value from the EEPROM.  
6.1  
Magnetic Field Ranges  
The working range of the magnetic field defines the input range of the A/D Converter. It  
is always symmetric to the zero field point. Any two points in the magnetic range can be  
selected to be the end points of the output curve. The output voltage represents the  
range between the two points.  
In the case of fields higher than the range values, the output signal may be distorted.  
The range must be set before the calibration of offset and gain.  
Table 6  
Range  
Low  
Range Setting  
Range in mT  
± 50  
Parameter R  
3
1
0
Mid  
± 100  
High  
± 200  
Table 7  
Range  
Parameter  
Symbol Limit Values  
min. max.  
Unit  
Notes  
1)  
Register size  
2
bit  
R
1)  
Ranges do not have a guaranteed absolute accuracy. The temperature pre-calibration is performed in the mid  
range (100 mT).  
Data Sheet  
18  
V 2.10, 2020-04  
TLE4997E2  
Signal Processing  
6.2  
Gain Setting  
The sensitivity is defined by the range and the gain setting. The output of the A/D  
Converter is multiplied with the gain value.  
Table 8  
Gain  
Parameter  
Symbol Limit Values  
min. max.  
Unit  
Notes  
Register size  
Gain range  
15  
- 4.0 3.9998  
244.14  
bit  
-
Unsigned integer value  
1)2)  
G
Gain  
Gain quantization steps ΔGain  
ppm  
Corresponds to 1/4096  
1)  
For gain values between - 0.5 and + 0.5, the numeric accuracy decreases.  
To obtain a flatter output curve, it is recommended to select a higher range setting.  
2)  
A gain value of +1.0 corresponds to a typical 40 mV/mT sensitivity (100 mT range, not guaranteed). Infineon  
pre-calibrates the samples to 60mV/mT (100mT range) in the final test, but does not guarantee the accuracy  
of this calibration. It is crucial to do a final calibration of each IC within the application using the Gain/V value.  
OS  
The gain value can be calculated by  
:
(G 16384)  
-----------------------------  
Gain =  
4096  
6.3  
Offset Setting  
The offset voltage corresponds to an output voltage with zero field at the sensor.  
Table 9  
Offset  
Parameter  
Symbol Limit Values  
min. max.  
Unit  
Notes  
Register size  
Offset range  
15  
-400 399  
1.22  
bit  
Unsigned integer value  
1)  
OS  
VOS  
ΔVOS  
% VDD  
mV  
Offset quantization  
steps  
@ VDD = 5 V  
generally VDD / 4095  
1)  
Infineon pre-calibrates the samples at zero field to 50% of V (100mT range) in the final test, but does not  
DD  
guarantee the accuracy of this calibration. It is crucial to do a final calibration of each IC within the application  
using the Gain/V value.  
OS  
The offset value can be calculated by:  
(OS 16384)  
---------------------------------  
× VDD  
VOS  
=
4096  
Data Sheet  
19  
V 2.10, 2020-04  
TLE4997E2  
Signal Processing  
6.4  
DSP Input Low Pass Filter  
A digital Low Pass Filter is placed between the Hall A/D Converter and the DSP to  
reduce the noise level. The Low Pass filter has a constant DC amplification of 0 dB (this  
is exactly a gain of 1), which means that its setting has no influence on the internal Hall  
A/D Converter value.  
The bandwidth can be set in 8 steps.  
Table 10  
Low Pass Filter Setting  
Cutoff frequency in Hz (at 3dB attenuation)1)  
Parameter LP  
0
1
2
3
4
5
6
78  
244  
421  
615  
826  
1060  
1320  
off 2)  
7
1)  
As this is a digital filter running with an RC-based oscillator, the cutoff frequency may vary within ±25%.  
The output low pass-interpolation filter behavior remains as main component in the signal path.  
2)  
Table 11  
Low Pass Filter  
Symbol Limit Values  
Parameter  
Unit  
Notes  
min. max.  
Register size  
3
bit  
%
LP  
Corner frequency  
variation  
Δ f  
- 25  
+ 25  
Note: In Low Pass filter setting 7 (filter off), the output noise increases. Because of  
higher DSP load, the current consumption also rises slightly.  
Data Sheet  
20  
V 2.10, 2020-04  
TLE4997E2  
Signal Processing  
Figure 6 shows the characteristic of the filter as a magnitude plot (the highest setting is  
marked). The “off” position would be a flat 0 dB line. In this case, the output decimation  
filter limits the bandwidth of the sensor. The update rate after the Low Pass filter is  
16 kHz.  
0
-1  
-2  
-3  
-4  
-5  
-6  
102  
103  
101  
Frequency (Hz)  
Figure 6  
DSP Input Filter (Magnitude Plot)  
Data Sheet  
21  
V 2.10, 2020-04  
TLE4997E2  
Signal Processing  
6.5  
DAC Input Interpolation Filter  
An interpolation filter is placed between the DSP and the output DAC. It cannot be  
switched off. This filter limits the frequency behavior of the complete system if the DSP  
input filter is disabled. The update rate after the interpolation filter is 256 kHz.  
0
-1  
-2  
-3  
-4  
-5  
-6  
102  
103  
104  
101  
Frequency (Hz)  
Figure 7  
DAC Input Filter (Magnitude Plot)  
Note: As this is a digital filter running with an RC-based oscillator, the cutoff frequency  
may vary within ±25%.  
Data Sheet  
22  
V 2.10, 2020-04  
TLE4997E2  
Signal Processing  
6.6  
Clamping  
The clamping function is useful for splitting the output voltage into the operating range  
and error ranges. If the magnetic field is outside the selected measurement range, the  
output voltage V is limited to the clamping values.  
out  
Table 12  
Clamping  
Parameter  
Symbol Limit Values  
min. max.  
Unit  
Notes  
Register size  
2 x 12  
99.98  
99.98  
1.22  
bit  
CL,CH  
1)  
1)  
Clamping voltage low VCLL  
Clamping voltage high VCLH  
0
0
% VDD  
% VDD  
mV  
Clamping quantization ΔVCLQ  
@ VDD = 5 V  
steps  
Clamping voltage drift ΔVCL  
-15  
-15  
15  
15  
mV  
in lifetime2)  
over temperature2)  
1)  
If clamping is set, it must be within the allowed output voltage range to be effective.  
2)  
Valid in the range (5% of VDD) < VOUT < (95% of VDD) for T 120°C  
J
and (6% of VDD) < VOUT < (94% of VDD) for 120°C < T 150°C  
J
The clamping values are calculated by:  
Clamping low voltage:  
CL  
4096  
-----------  
× VDD  
VCLL  
=
=
Clamping high voltage:  
CH  
-----------  
VCLH  
× VDD  
4096  
Note: For an exact setup, the register value may be re-adjusted due to the actual output  
voltage in the clamping condition. The output voltage range itself has electrical  
limits. See the Electrical Characteristics of V  
.
out  
Data Sheet  
23  
V 2.10, 2020-04  
TLE4997E2  
Signal Processing  
Figure 8 shows an example in which the magnetic field range between Bmin and Bmax  
is mapped to voltages between 0.8 V and 4.2 V.  
If it is not necessary to signal errors, the maximum output voltage range between 0.3 V  
and 4.7 V can be used.  
5
Vout (V)  
Error range  
VCLH  
4
3
2
1
0
Operating range  
VCLL  
Error range  
Bmin  
Bmax  
B (mT)  
Figure 8  
Clamping Example  
Note: The high value must be above the low value.  
If VCLL is set to a higher value than VCLH, the VCLH value is dominating. This would  
lead to a constant output voltage independent of the magnetic field strength.  
Data Sheet  
24  
V 2.10, 2020-04  
TLE4997E2  
Error Detection  
7
Error Detection  
Different error cases can be detected by the On-Board-Diagnostics (OBD) and reported  
to the microcontroller. The OBD is useful only when the clamping function is enabled. It  
is important to set the clamping threshold values inside the error voltage values shown  
in Table 13 and Table 14 to ensure that it is possible to distinguish between correct  
output voltages and error signals.  
7.1  
Voltages Outside the Operating Range  
The output signals error conditions, if VDD lies  
• inside the ratings specified in Table 2 "Absolute Maximum Ratings" on Page 12  
• outside the range specified in Table 3 "Operating Range" on Page 13.  
Table 13  
Undervoltage and Overvoltage (All values with RL 10k)  
Parameter  
Symbol Limit Values  
Unit  
Notes  
min.  
max.  
Undervoltage threshold VDDuv  
Overvoltage threshold VDDov  
3
7
4
V
V
V
8.3  
-
Output voltage  
@ undervoltage  
VOUTuv 0.95 x VDD  
3V VDD VDDuv  
Output voltage  
@ overvoltage  
VOUTov 0.97 x VDD  
-
V
V
DDov < VDD 16 V  
Supply current 1)  
IDDuv  
-
10  
mA  
@ undervoltage  
1)  
For overvoltage and reverse voltage, see Table 2 "Absolute Maximum Ratings" on Page 12.  
7.2  
Open Circuit of Supply Lines  
In the case of interrupted supply lines, the data acquisition device can alert the user. If  
two sensors are placed in parallel, the output of the remaining working sensor may be  
still used for an emergency operation.  
Table 14  
Open Circuit (OBD Parameters) 1)  
Parameter  
Symbol Limit Values  
Unit  
Notes  
min.  
max.  
Output voltage  
@ open VDD line  
VOUT  
VOUT  
0
0.18  
0.2  
V
V
TJ120°C  
120°C < TJ 150°C  
Output voltage  
@ open GND line  
4.82  
4.8  
5
TJ120°C  
120°C < TJ 150°C  
1)  
With VDD = 5 V and RL 10 kΩ pull-down or RL 20 kΩ pull-up.  
25  
Data Sheet  
V 2.10, 2020-04  
TLE4997E2  
Error Detection  
7.3  
Not Correctable EEPROM Errors  
The parity method is able to correct one single bit in one EEPROM line. One other single  
bit error in another line can also be detected. As this situation is not correctable, this  
status is signalled at the output pin by clamping the output value to VDD  
.
Table 15  
EEPROM Error Signalling  
Symbol Limit Values  
min. max.  
Parameter  
Unit  
Notes  
Output voltage @  
EEPROM error  
VOUT  
0.97 x VDD VDD  
V
Data Sheet  
26  
V 2.10, 2020-04  
TLE4997E2  
Temperature Compensation  
8
Temperature Compensation  
The magnetic field strength of a magnet depends on the temperature. This material  
constant is specific to different magnet types. Therefore, the TLE4997E2 offers a second  
order temperature compensation polynomial, by which the Hall signal output is multiplied  
in the DSP. There are three parameters for the compensation:  
• Reference temperature T0  
• A linear part (1st order) TC1  
• A quadratic part (2nd order) TC2  
The following formula describes the sensitivity dependent on the temperature in relation  
to the sensitivity at the reference temperature T0:  
S
TC(T) = 1 + TC1 × (T T0) + TC2 × (T T0)2  
For more information, see also the signal processing flow in Figure 5.  
The full temperature compensation of the complete system is done in two steps:  
1. Pre-calibration in the Infineon final test.  
The parameters TC1, TC2, T0 are set to maximally flat temperature characteristics  
regarding the Hall probe and internal analog processing parts.  
2. Overall System calibration.  
The typical coefficients TC1, TC2, T0 of the magnetic circuitry are programmed. This  
can be done deterministically, as the algorithm of the DSP is fully reproducible. The  
final settings of the TC1, TC2, T0 values are relative to the pre-calibrated values.  
Table 16  
Temperature Compensation  
Symbol Limit Values Unit  
min. max.  
Parameter  
Notes  
Register size TC1  
-
9
bit  
Unsigned integer values  
TL  
1)  
1
st order coefficient TC1 TC1  
Quantization steps of TC1 ΔTC1  
Register size TC2  
nd order coefficient TC2 TC2  
Quantization steps of TC2 ΔTC2  
-1000 2500 ppm/ °C  
15.26  
8
ppm/ °C  
bit  
-
Unsigned integer values  
2)  
TQ  
2
- 4  
4
ppm/ °C²  
ppm/ °C²  
bit  
0.119  
3
Register size T0  
-
Unsigned integer values  
TR  
T0  
Reference temperature  
- 48  
64  
°C  
3)  
Quantization steps of T0 ΔT0  
16  
°C  
1)  
Full adjustable range: -2441 to +5355 ppm/°C, can be only used after confirmation by Infineon  
Full adjustable range: -15 to +15 ppm/°C², can be only used after confirmation by Infineon  
A quantization step of 1°C is handled by algorithm (See Application Note).  
2)  
3)  
Data Sheet  
27  
V 2.10, 2020-04  
TLE4997E2  
Temperature Compensation  
8.1  
Parameter Calculation  
The parameters TC1, TC2 and T0 may be calculated by:  
TL 160  
----------------------  
65536  
TC1  
=
=
× 1000000  
× 1000000  
TQ 128  
-----------------------  
TC2  
8388608  
T0 = 16TR 48  
Now the output VOUT for a given field BIN at a specific temperature can be roughly  
calculated by:  
B
æ
ç
è
ö
÷
IN  
------------  
VOUT  
=
× STC × STCHall × S × V  
+ V  
OS  
o
DDø  
B
FSR  
BFSR is the full range magnetic field. It is dependent on the range setting (e.g 100 mT).  
So is the nominal sensitivity of the Hall probe times the Gain factor set in the EEPROM.  
STC is the temperature-dependent sensitivity factor calculated by the DSP.  
STCHall is the temperature behavior of the Hall probe.  
The pre-calibration at Infineon is performed such that the following condition is met:  
S
TC(TJ T0) × STCHall(TJ) ≈ 1  
Within the application, an additional factor BIN(T) / BIN(T0) will be given due to the  
magnetic system. STC needs now to be modified to STCnew so that the following condition  
is satisfied:  
B
IN(T)  
--------------------  
× STCnew(T) × STCHall(T) ≈ STC(T) × STCHall(T) ≈ 1  
B
IN(T0)  
Therefore, the new sensitivity parameters STCnew can be calculated from the  
pre-calibrated setup STC using the relation:  
B
IN(T)  
--------------------  
× STCnew(T) ≈ STC(T)  
B
IN(T0)  
Data Sheet  
28  
V 2.10, 2020-04  
TLE4997E2  
Calibration  
9
Calibration  
A special hardware interface to an external computing system and measurement  
equipment is required for calibration of the sensor. All calibration and setup bits can be  
written into a random access memory (RAM). This allows the EEPROM to remain  
untouched during the entire calibration process. Therefore, this temporary setup (using  
the RAM only) does not stress the EEPROM—and even allows a pre-verification1) of the  
setup before programming—as the number of EEPROM programming cycles is limited  
to provide a high data endurance.  
The digital signal processing is completely deterministic. This allows a two point  
calibration in one step without iterations. The two magnetic fields (here described as two  
“positions” of an external magnetic circuitry) need to be applied only once. Furthermore,  
a complete setup and calibration procedure can be performed requiring only one  
EEPROM programming cycle at the end2).  
After setting up the temperature coefficients, the calibrated Hall A/D Converter values of  
both positions need to be read and the sensor output signals (using a DAC test mode)  
need to be acquired for the corresponding end points. Using this data, the signal  
processing parameters can be immediately calculated with a program running on the  
external computing system.  
Note: The calibration and programming process must be performed only at the  
start of life of the device.  
Table 17  
Calibration Characteristics  
Symbol Limit Values  
min. max.  
Parameter  
Unit  
Notes  
Temperature of sensor at tCAL  
2 point calibration and  
programming  
10  
30  
°C  
2 point calibration  
accuracy1)  
ΔVCAL1 -10  
ΔVCAL2 -10  
10  
10  
mV  
mV  
Position 1  
Position 2  
1)  
Setup and validation performed at start of life.  
Note: Depending on the application and external instrumentation setup, the accuracy of  
the 2 point calibration can be improved.  
1)  
This feature is not required for a deterministic two-point setup to fulfill the specification.  
Details and basic algorithms for this step are available on request.  
2)  
Data Sheet  
29  
V 2.10, 2020-04  
TLE4997E2  
Calibration  
9.1  
Calibration Data Memory  
When the MEMLOCK bits are programmed (two redundant bits), the memory contents  
are frozen and may no longer be changed. Furthermore, the programming interface is  
locked out and the chip remains in Application Mode only. This prevents accidental  
programming due to environmental influences.  
Column Parity Bits  
User-Calibration Bits  
Pre-Calibration Bits  
Figure 9  
EEPROM Map  
A matrix parity architecture allows the automatic correction of any single bit error. Each  
row is protected by a row parity bit. The sum of bits set including this bit must be an odd  
number (ODD PARITY). Each column is additionally protected by a column parity bit.  
The sum of all the bits in the even positions (0, 2, etc.) of all lines must be an even  
number (EVEN PARITY); the sum of all the bits in the odd positions (1,3, etc.) must be  
an odd number (ODD PARITY). This mechanism of different parity calculations protects  
against many block errors (such as erasing a full line or even the entire EEPROM).  
When modifying the application bits (such as Gain, Offset, TC, etc.) the parity bits must  
be updated. For the column bits, the pre-calibration area must be also read out and  
considered for correct parity generation.  
Note: A specific programming algorithm must be followed to ensure the data retention.  
A separate detailed programming specification is available on request.  
Data Sheet  
30  
V 2.10, 2020-04  
TLE4997E2  
Calibration  
Table 18  
Programming Characteristics  
Symbol Limit Values  
Parameter  
Unit  
Notes  
min.  
max.  
Number of EEPROM  
programming cycles  
NPRG  
-
10  
Cycles Programming allowed  
1)  
only at start of lifetime  
Ambient temperature at TPRG  
10  
30  
°C  
programming  
Programming time  
Calibration memory  
tPRG  
100  
-
ms  
Bit  
Bit  
For complete memory 2)  
All active EEPROM bits  
All parity EEPROM bits  
135  
25  
-
-
Error correction  
1)  
1 cycle is the simultaneous change of 1 bit.  
2)  
Depending on clock frequency at VDD, write pulse 10ms ±1%, erase pulse 80ms ±1%.  
9.2  
Programming Interface  
The supply pin and the output pin are used as two-wire interface to transmit the  
EEPROM data to and from the sensor.  
This allows  
• communication with high data reliability  
• bus-type connection of several sensors  
In many applications, two sensors are used to measure the same parameter. This  
redundancy allows the operation to continue in an emergency mode. If both sensors use  
the same power supply lines, they can be programmed together in parallel.  
The data transfer protocol and programming is described in a separate document  
(TLE4997 Programming Guide).  
9.3  
Laboratory Evaluation Programmer  
For the programming of evaluation samples and QA (quality assurance) samples a  
programming equipment is available on request.  
Data Sheet  
31  
V 2.10, 2020-04  
TLE4997E2  
Application Circuit  
10  
Application Circuit  
Figure 10 shows the connection of multiple sensors to a microcontroller.  
Ref  
Voltage Tracker  
e.g.  
TLE4250  
ADCref  
ADCin1  
VDD  
10k  
TLE  
4997out  
GND  
47nF  
47nF  
100 nF  
10k 100 nF  
ADCin2  
ADCGND  
µC  
optional  
VDD  
10k  
TLE  
4997out  
GND  
47nF  
47nF  
100 nF  
10k 100 nF  
Figure 10  
Application Circuit  
Note: For calibration and programming, the interface must be connected directly to the  
output pin.  
The given application circuit must be regarded as only an example. It needs to be  
adapted according to the requirements of the specific application.  
Data Sheet  
32  
V 2.10, 2020-04  
TLE4997E2  
Package Outlines  
11  
Package Outlines  
45˚  
5˚  
±0.05  
4.06  
2 A  
B
±0.05  
1.5  
1.5  
±0.1  
0.5  
±0.05  
±0.05  
0.82  
0.36  
3x  
±0.05  
0.42  
0.5 B  
1
2
3
2 x 1.27 = 2.54  
±1  
12.7  
2
C
C
A
Adhesive  
Tape  
Tape  
±0.3  
±0.4  
4
0.25-0.15  
6.35  
±0.1  
±0.3  
0.39  
12.7  
Total tolerance at 19 pitches ±1  
1) No solder function area  
Molded body dimensions do not unclude plastic or metal protrusion of 0.15 max per side  
P-PG-SSO-3-10-PO V02  
Figure 11  
PG-SSO-3-10 (Plastic Green Single Small Outline Package)  
Data Sheet  
33  
V 2.10, 2020-04  
w w w . i n f i n e o n . c o m  
Published by Infineon Technologies AG  

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