Q67060-S6136 [INFINEON]

Addendum for PCN-Datasheet 2004-018-A; 增编的PCN -数据2004-018 -A
Q67060-S6136
型号: Q67060-S6136
厂家: Infineon    Infineon
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Addendum for PCN-Datasheet 2004-018-A
增编的PCN -数据2004-018 -A

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Addendum for PCN 2004-018-A  
BTS 5440 G  
Addendum for PCN-Datasheet 2004-018-A: BTS 5440 G  
This Addendum and PCN-Datasheet refers to the PCN 2004-018-A:  
“Minor datasheet adaption for BTS 5240 L, BTS 5240 G, BTS 5440 G “.  
The PCN-datasheet attached will be valid starting from August 2004.  
There are the following changes in the datasheet (on page 7):  
Old:  
Symbol  
VCLA(T-)  
min typ  
max Unit  
Current limit adjustment threshold voltage  
2.6  
-
-
-
-
V
3.6  
New:  
Symbol  
VCLA(T-)  
min typ  
max Unit  
Current limit adjustment threshold voltage  
2.0  
-
-
-
-
V
4.0  
PCN 2004-018-A: BTS 5440G  
Smart High-Side Power Switch  
Four Channels: 4 x 25mΩ  
IntelliSense  
Package  
Product Summary  
Operating voltage  
V
4,5...28  
V
bb(on)  
( Loaddump: 40 V )  
Active channels  
one  
25  
four parallel  
On-state resistance  
Nominal load current  
Current limitation  
R
6.5  
mΩ  
A
A
ON  
I
6.2  
13.9  
L(nom)  
IL(SCr)  
P-DSO-28-19  
Low  
High  
10  
40  
General Description  
N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and  
diagnostic feedback, monolithically integrated in Smart SIPMOS technology.  
Providing embedded protective functions.  
Extern adjustable current limitation.  
Application  
All types of resistive, inductive and capacitive loads  
µC compatible high-side power switch with diagnostic feedback for 12 V grounded loads  
Due to the adjustable current limitation best suitable for loads with high inrush currents, so as lamps  
Replaces electromechanical relays, fuses and discrete circuits  
Basic Functions  
Block Diagram  
Very low standby current  
CMOS compatible input  
Vbb  
Improved electromagnetic compatibility (EMC)  
Stable behaviour at low battery voltage  
IN1  
IS1  
IS2  
IN2  
Logic  
Channel 1  
Channel 2  
Load 1  
Protection Functions  
Reverse battery protection with external resistor  
Short circuit protection  
Overload protection  
Current limitation  
Thermal Shutdown  
Overvoltage protection with external resistor  
CLA 1/2  
Load 2  
IN3  
IS3  
IS4  
Logic  
Channel 3  
Channel 4  
Load 3  
IN4  
CLA 3/4  
Load 4  
GND  
Loss of GND and loss of V protection  
bb  
Electrostatic discharge Protection (ESD)  
Dia
g
nostic Functions: IntelliSense  
Proportional load current sense ( with defined fault signal during thermal shutdown and overload )  
Additional open load detection in OFF - state  
Suppressed thermal toggling of fault signal  
2004-Mar-08  
Page 1  
PCN 2004-018-A: BTS 5440G  
Functional diagram  
overvoltage  
protection  
current limit  
gate  
control  
+
VBB  
internal  
voltage  
supply  
charge  
pump  
clamp for  
logic  
inductive load  
OUT1  
temperature  
sensor  
IN1  
ESD  
LOAD  
openload  
dedection  
IS1  
Current  
sense  
CLA 1/2  
IN2  
control and protection circuit  
of  
IS2  
channel 2  
GND1/2  
OUT2  
OUT3  
OUT4  
IN3  
IS3  
control and protection circuit  
of  
channel 3  
CLA 3/4  
IN4  
control and protection circuit  
of  
IS4  
GND3/4  
channel 4  
2004-Mar-08  
Page 2  
PCN 2004-018-A: BTS 5440G  
Pin definition and function  
Pin  
Symbol  
Function  
1,14,  
15,28  
V
Positive power supply voltage. Design the wiring for the  
simultaneous max. short circuit currents from channel 1 to 4  
and also for low thermal resistance  
bb  
3
6
9
12  
IN1  
IN2  
IN3  
IN4  
Input 1,2,3,4 activates channel 1,2,3,4 in case of logic high signal  
25,26,27 OUT1  
22,23,24 OUT2  
19,20,21 OUT3  
16,17,18 OUT4  
Output 1,2,3,4 protected high-side power output of channel 1,2,3,4.  
Design the wiring for the max. short circuit current  
4
5
IS1  
IS2  
IS3  
IS4  
CLA 1/2  
CLA 3/4  
Diagnostic feedback 1...4 of channel 1 to 4  
On state: advanced current sense with defined signal in case  
of overload or short circuit  
10  
11  
7
13  
2
Off state: High on failure  
Current limit adjust; the current limit for channels 1/2 and 3/4 can  
be chosen as high ( potential < 2,6V ) or low ( potential > 3,6V ).  
GND 1/2 Ground of chip 1 ( channel 1,2 )  
GND 3/4 Ground of chip 2 ( channel 3,4 )  
8
Pin configuration  
(top view)  
V bb  
1
28 V bb  
GND ½  
2
3
4
5
6
7
8
9
27 OUT1  
26 OUT1  
25 OUT1  
24 OUT2  
23 OUT2  
22 OUT2  
21 OUT3  
20 OUT3  
19 OUT3  
18 OUT4  
17 OUT4  
16 OUT4  
15 V bb  
IN1  
IS1  
IS2  
IN2  
CLA ½  
GND ¾  
IN3  
IS3 10  
IS4 11  
IN4 12  
CLA ¾ 13  
V bb 14  
2004-Mar-08  
Page 3  
PCN 2004-018-A: BTS 5440G  
Maximum Ratings at T =25°C, unless otherwise specified  
j
Parameter  
Supply voltage (overvoltage protection see page 6)  
Symbol  
Value  
Unit  
V
1)  
V
V
V
V
28  
28  
bb  
2)  
Supply voltage for full short circuit protection;T = -40...150°C  
j
bb(SC)  
ON  
Maximum voltage across DMOS  
52  
3)  
4)  
Load dump protection V  
= V + V ; V = 13,5 V  
LoadDump  
4)  
A
S
A
Loaddump  
In = low or high; t = 400 ms; R = 2 Ω  
d
I
R = 2.25 Ω  
40  
L
R = 6.8 Ω  
53  
L
5)  
Load current (Short - circuit current, see page 7)  
Operating temperature range  
I
T
I
A
°C  
L
L(lim)  
-40...+150  
j
Storage temperature range  
T
-55...+150  
stg  
Dynamical temperature rise at switching  
Power dissipation (DC), all channels active  
dT  
60  
1,6  
K
W
6)  
P
T = 85 °C  
tot  
A
mH  
Maximal switchable inductance, single pulse  
Z
L(s)  
V =12V, T  
=150°C;  
(see diagrams on page 12)  
bb  
jstart  
I = 6 A, E = 0.319 J, R = 0 ,  
one channel:  
two parallel channels:  
9.8  
5.2  
L
AS  
L
I = 12 A, E = 0.679 J, R = 0 ,  
L
AS  
L
kV  
Electrostatic discharge voltage  
IN: V  
1,0  
ESD  
(Human Body Model)  
IS:  
2,0  
according to ANSI EOS/ESD - S5.1 - 1993 , ESD STM5.1 - 1998 OUT:  
Continuous input voltage  
Voltage at current limit adjustment pin  
Current through current limit adjustment pin  
Current through input pin (DC)  
4,0  
-10...16  
-10...16  
±5.0  
±5.0  
-5...+10  
V
V
V
IN  
CLA  
CLA  
IN  
mA  
I
I
I
Current through sense pin (DC)  
(see page 11)  
IS  
1
2
18...28 V for 100 hours  
only single pulse, R = 200 m; L = 8 µH ; R and L are describing the complete circuit impedance including  
L
line, contact and generator impedances.  
3
4
5
Supply voltage higher thanV  
require an external current limit for the GND (150resistor) and sense pin.  
bb(AZ)  
R = internal resistance of the load dump test pulse generator.  
I
Current limit is a protection function. Operation in current limitation is considered as "outside" normal operating  
range. Protection functions are not designed for continuous repetitive operation.  
6
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70µm thick) copper area for V  
bb  
connection. PCB is vertical without blown air.  
2004-Mar-08  
Page 4  
PCN 2004-018-A: BTS 5440G  
Electrical Characteristics  
Parameter and Conditions, each of the four channels  
Symbol  
Values  
Unit  
at T = -40...+150 °C, V = 9...16 V, unless otherwise specified  
min. typ. max.  
j
bb  
Thermal Resistance  
junction - soldering point  
1)  
R
each channel:  
one channel active:  
all channels active:  
-
-
-
40  
32  
25 K/W  
thJS  
2)  
R
thJA  
-
K/W  
junction - ambient  
Load Switching Capabilities and Characteristics  
On-state resistance (V to OUT),  
(see page 13)  
R
mΩ  
bb  
ON  
T = 25 °C, I = 5 A,  
each channel:  
each channel:  
two parallel channels:  
four parallel channels:  
-
-
-
-
21  
42  
11  
5.5  
25  
50  
13  
6.5  
j
L
T = 150 °C,  
j
T = 25 °C,  
j
T = 25 °C,  
j
2)  
A
Nominal load current  
I
L(nom)  
T = 85°C, T 150°C ,  
one channel active:  
two channels active, per channel:  
four channels active, per channel:  
5.7  
4.0  
3.1  
6.2  
4.4  
3.4  
-
-
-
a
j
-
40  
-
mV  
mA  
Output voltage drop limitation at small load currents V  
ON(NL)  
I = 0.5 A  
L
3)  
-
-
2
Output current while GND disconnected  
I
L(GNDhigh)  
( see diagram page 12 )  
V = 0 V  
IN  
1
2
Soldering point is measured at Vbb-pin  
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70µm thick) copper area for V  
bb  
connection. PCB is vertical without blown air.  
3
not subject to production test, specified by design  
2004-Mar-08  
Page 5  
PCN 2004-018-A: BTS 5440G  
Electrical Characteristics  
Parameter and Conditions, each of the four channels  
Symbol  
Values  
Unit  
at T = -40...+150 °C, V = 9...16 V, unless otherwise specified  
min. typ. max.  
j
bb  
Load Switching Capabilities and Characteristics  
1)  
-
-
90  
200  
220  
Turn-on time  
to 90% V  
t
µs  
OUT  
on  
R = 12 , V = 12 V  
L
bb  
1)  
100  
Turn-off time  
to 10% V  
t
off  
OUT  
R = 12 , V = 12 V  
L
bb  
1)  
0.1  
0.25 0.45  
V/µs  
Slew rate on  
10 to 30% V  
R = 12 , V = 12 V  
,
dV/dt  
OUT  
OUT  
on  
L
bb  
1)  
0.09 0.25  
0.4  
Slew rate off  
70 to 40% V  
,
-dV/dt  
off  
R = 12 , V = 12 V  
L
bb  
Operating Parameters  
2)  
4.5  
41  
-
47  
28  
52  
V
Operating voltage  
V
V
bb(on)  
3)  
Overvoltage protection  
= 40 mA  
bb(AZ)  
I
bb  
4)  
µA  
Standby current  
I
bb(off)  
(see diagram on page 13)  
T = -40...+25 °C, V = 0 V  
-
-
10  
-
15  
40  
j
IN  
T = 150 °C  
j
1
2
3
See timing diagram on page 14.  
18V...28V for 100 hours  
Supply voltages higher thanV  
require an external current limit for the status pin and GND pin (e.g. 150).  
in table of protection functions and circuit diagram on page 11.  
bb(AZ)  
See also V  
Out(CL)  
4
Measured with load; for the whole device; all channels off.  
2004-Mar-08  
Page 6  
PCN 2004-018-A: BTS 5440G  
Electrical Characteristics  
Parameter and Conditions, each of the four channels  
Symbol  
Values  
Unit  
at T = -40...+150 °C, V = 9...16 V, unless otherwise specified  
min. typ. max.  
j
bb  
Operating Parameters  
-
-
1.5  
1.6  
8
4
µA  
Off-State output current (included in I  
)
I
L(off)  
bb(off)  
V = 0 V, each channel  
IN  
1)  
mA  
Operating current  
I
GND  
V = 5 V, per active channel  
IN  
2)  
Protection Functions  
A
Current limit, ( see timing diagrams, page 15 )  
Low level; if potential at CLA = high  
High level; if potential at CLA = low  
I
L(LIM)  
7
40  
11  
50  
14  
60  
V
A
Current limit adjustment threshold voltage  
V
V
2.0  
-
-
-
-
CLA(T-)  
CLA(T+)  
4.0  
Repetitive short circuit current limit  
I
L(SCr)  
T = T (see timing diagrams on page 15)  
jt  
j
High level  
one active channel:  
two active channels :  
-
-
-
-
40  
40  
7
-
-
-
-
3)  
Low level  
one active channel:  
3)  
two active channels :  
7
ms  
V
Initial short circuit shutdown time  
= 25°C ; V = 13,5 V  
Output clamp (inductive load switch off)  
low level:  
high level:  
4)  
t
-
-
-
3.5  
0.75  
-15  
-
-
-
off(SC)  
T
j,start  
bb  
V
T
Out(CL)  
jt  
I = 40 mA  
L
Thermal overload trip temperature  
Thermal hysteresis  
150  
-
170  
10  
-
-
°C  
K
T  
jt  
1
Add I , if I > 0  
IS IS  
2
Integrated protection functions are designed to prevent IC destruction under fault conditions  
described in the data sheet. Fault conditions are considered as "outside" normal operating range.  
Protection functions are not designed for continuous repetitive operation.  
3
4
At the beginning of the short circuit the double current is possible for a short time.  
If channels are connected in parallel, output clamp is usually accomplished by the  
channel with the lowest V  
Out(CL)  
.
2004-Mar-08  
Page 7  
PCN 2004-018-A: BTS 5440G  
Electrical Characteristics  
Parameter and Conditions, each of the four channels  
Symbol  
Values  
Unit  
at T = -40...+150 °C, V = 9...16 V, unless otherwise specified  
min. typ. max.  
j
bb  
Diagnostic Characteristics  
2
11  
3.2  
23  
4.4  
35  
V
kΩ  
Open load detection voltage  
Internal output pull down  
V
OUT(OL)  
1)  
R
OUT(PD)  
V
= 13.5 V  
OUT  
Current sense ratio, static on-condition  
= I :I  
k
ILIS  
k
ILIS  
L IS  
I = 0.5 A  
4640 5800 6960  
4900 5400 5900  
4900 5350 5800  
L
I = 3 A  
L
I = 6 A  
L
2)  
5
6.2  
7.5  
V
Sense signal in case of fault-conditions  
in off-state  
V
fault  
Current saturation of sense fault signal  
Sense signal delay after thermal shutdown  
Current sense output voltage limitation  
I
t
V
4
-
5.4  
-
-
-
mA  
fault  
3)  
1.2 ms  
7.3  
delay(fault)  
6.5  
V
IS(lim)  
IS(LH)  
son(IS)  
slc(IS)  
I = 0 , I = 5 A  
IS  
L
-
-
-
-
-
-
5
µA  
µs  
Current sense leakage/offset current  
V = 5 V, I = 0 , V = 0  
I
t
t
IN  
L
IS  
400  
300  
Current sense settling time to I static ±10%  
IS  
4)  
after positive input slope , I = 0 to 5A  
L
Current sense settling time to I static ±10%  
IS  
4)  
after change of load current , I = 2.5 to 5A  
L
1
2
In case of floating output, the status doesn´t show open load.  
Fault condition means output voltage exceeds open load detection voltageV  
OUT(OL)  
3
In the case of thermal shutdown the V  
signal remains for t  
longer  
fault  
delay(fault)  
than the restart of the switch ( see diagram on page 16 ).  
4
not subject to production test, specified by design  
2004-Mar-08  
Page 8  
PCN 2004-018-A: BTS 5440G  
Electrical Characteristics  
Parameter  
Symbol  
Values  
Unit  
at T = -40...+150 °C, V = 9...16 V, unless otherwise specified  
min. typ. max.  
j
bb  
Diagnostic Characteristics  
Status invalid after negative input slope  
Status invalid after positive input slope  
with open load  
-
-
-
-
1.2 ms  
t
d(SToff)  
20  
t
µs  
d(STOL)  
1)  
Input Feedback  
2.0  
-
1.0  
-
3.5  
-
-
0.5  
-
5.5  
2.4  
-
Input resistance (see circuit page 11)  
Input turn-on threshold voltage  
Input turn-off threshold voltage  
Input threshold hysteresis  
R
kΩ  
I
V
V
V
IN(T+)  
IN(T-)  
-
V  
IN(T)  
IN(off)  
3
40 µA  
Off state input current  
I
V = 0.4 V  
IN  
20  
50  
90  
On state input current  
I
IN(on)  
V = 5 V  
IN  
2)  
Reverse Battery  
-
-
-
27  
-
V
mV  
Reverse battery voltage  
Drain-source diode voltage (V  
-V  
-V  
bb  
330  
> V )  
bb  
OUT  
ON  
T = 150 °C, I = -10 mA  
j
bb  
1
2
If ground resistors R  
are used, add the voltage drop across these resistor.  
GND  
Requires a 150resistor in GND connection. The reverse load current through the intrinsic drain-source diode  
has to be limited by the connected load. Power dissipation is higher compared to normal operating conditions  
due to the voltage drop across the drain-source diode. The temperature protection is not active during reverse  
current operation! Input and status currents have to be limited. (see max. ratings page 4 )  
2004-Mar-08  
Page 9  
PCN 2004-018-A: BTS 5440G  
Truth Table - for each of the four channels  
Input  
level  
Output  
level  
L
Diagnostic  
output  
1)  
Normal  
L
Z
Operation  
H
V
I = I / kilis  
bb  
IS  
L
Current  
Limitation  
Short circuit  
to GND  
Overtemperature  
H
V
V
bb  
fault  
1)  
2)  
L
H
L
H
L
L
L
L
L
V
V
Z
V
fault  
1)  
Z
V
fault  
Short circuit  
V
bb  
bb  
fault  
3)  
to V  
H
< I = I / kilis  
bb  
IS  
L
Open load  
L
H
>V  
V
Z
out(OL)  
fault  
1)  
V
bb  
L = " Low" Level Z = high impedance, potential depends on external circuit  
H = "High" Level = 5V typ., constant voltage independent of external sense resistor.  
V
fault  
Parallel switching of channels is possible by connecting the inputs and outputs parallel.  
The current sense ouputs have to be connected with a single sense resistor.  
Terms  
I
bb  
V
V
ON3  
Leadframe  
Leadframe  
ON1  
V
V
bb  
V
V
ON4  
bb  
V
ON2  
I
I
I
I
IN3  
IN4  
IN1  
IN2  
V
V
bb  
bb  
9
3
19  
20  
21  
25  
26  
27  
IN3  
IN1  
I
I
L3  
L4  
L1  
L2  
OUT3  
OUT4  
OUT1  
OUT2  
12  
10  
6
4
IN4  
IN2  
PROFET  
PROFET  
I
I
I
I
I
IS1  
IS2  
IS3  
IS4  
I
IS1  
IS3  
16  
17  
18  
22  
23  
24  
V
V
V
IN3  
IN1 IN2  
IN4  
11  
13  
5
7
IS2  
IS4  
V
OUT3  
V
V
V
V
IS1  
V
CLA3/4  
CLA1/2  
IS2  
IS4  
IS3  
OUT1  
GND3/4  
GND1/2  
V
V
2
V
8
V
OUT4  
OUT2  
CLA3/4  
CLA1/2  
I
GND  
I
GND  
Leadframe (V ) is connected to pin 1, 14, 15, 28  
bb  
1
2
3
L-potential by using a sense resistor  
Current limitation is only possible while the device is switched on.  
Low ohmic short to V may reduce the output current I and therefore also the sense current I .  
bb  
L
IS  
2004-Mar-08  
Page 10  
PCN 2004-018-A: BTS 5440G  
Input circuit ( ESD protection ), IN1...IN4  
Inductive and overvoltage output clamp,  
OUT1...OUT4  
R
I
IN  
+V  
+V  
bb  
bb  
V
V
Z
Z
ESD-ZD  
I
I
I
OUT  
OUT  
GND  
V
V OOUUTT  
The use of ESD zener diodes as voltage clamp  
at DC conditions is not recommended.  
GND  
GND  
Power GND  
Power GND  
V
clamped to V  
= -15 V typ.  
Out  
Out(CL)  
Sense-Status output, IS1...IS4  
ON-State: Normal operation: I = I /  
S
L kILIS  
Overvolt. Protection of logic part  
V
= I * R  
;
R
R
= 1knominal  
> 500Ω  
IS  
S
IS  
IS  
OUT1...OUT4  
IS  
+
V
bb  
V
Sense output  
logic  
Z2  
V
R
I
IS  
IN  
IS  
I
Logic  
IS  
IS  
V
f
V
Z1  
PROFET  
GND  
R
IS  
ESD-ZD  
R
R
GND  
IS  
GND  
Signal GND  
V
R
= 6,1V typ., V = 47V typ., R  
= 150,  
GND  
ESD zener diode: V  
ESD  
ON-State: Fault condition so as thermal shut down  
or current limitation  
= 6,1 V typ., max. 14 mA ;  
Z1  
IS  
Z2  
= 1k, R = 3,5ktyp.  
I
Sense output  
logic  
V
fault  
V
fault  
V
f
R
IS  
ESD-ZD  
GND  
V
= 6 V typ ; V  
fault  
< V  
under all conditions  
fault  
ESD  
OFF-State diagnostic condition:  
Open Load, if V  
> 3 V typ.; IN low  
OUT  
Int. 5V  
IS - ST  
RIS  
ESD-  
ZD  
GND  
ESD-Zener diode: 6,1V typ., max. 5mA; R  
ST(ON)  
< 375Ω  
at 1,6mA.. The use of ESD zener diodes as voltage clamp  
at DC conditions is not recommended.  
2004-Mar-08  
Page 11  
PCN 2004-018-A: BTS 5440G  
Vbb disconnect with energized inductive  
load  
Reverse battery protection  
OUT1...OUT4  
-
V
bb  
V
Z2  
V
hhigghh  
R
I
IN  
IN  
Logic  
OUT  
PROFET  
IS  
O U T  
IS  
V
Z1  
GND  
PR O FET  
-I  
G N D  
R
V
R
IS  
R
Load  
G N D  
bb  
Load G N D  
Signal G N D  
For inductive load currents up to the limits defined  
V
R
= 6,1V typ., V = 47V typ., R  
Z2  
= 150Ω  
Z1  
IS  
GND  
by Z each switch is protected against loss of V  
.
L
bb  
= 1k, R = 3,5ktyp.  
I
(max. ratings and diagram on page 12)  
In case of reverse battery the load current has to  
be limited by the load. Protection functions are  
not active.  
Consider at your PCB layout that in the case of Vbb  
disconnection with energized inductive load all the  
load current flows through the GND connection.  
Open load detection, OUT1...OUT4  
Inductive load switch-off energy  
dissipation  
Off-state diagnostic condition:  
Open load, if V  
> 3 V typ.; IN = low  
OUT  
E
bb  
V
bb  
E
AS  
E
E
R
Load  
E XT  
V
bb  
IN  
IS  
OFF  
OUT  
V
PROFET  
OUT  
L
=
L
GND  
Open load  
detection  
Logic  
unit  
Z
L
{
E
R
R
L
Signal GND  
2
Energy stored in load inductance: E = ½ * L * I  
L
While demagnetizing load inductance,  
the enérgy dissipated in PROFET is  
L
GND disconnect  
E
= E + E - E = V * i (t) dt,  
bb ON(CL) L  
AS  
L
R
V
bb  
IN  
with an approximate solution for R > 0:  
L
OUT  
PROFET  
IS  
GND  
I
L
* L  
I
L
* R  
L
V
V
V
E
AS  
=
*(Vbb+|VOUT (CL)| )*ln(1+  
)
V
bb  
IN  
IS  
GND  
2 * R  
L
|VOUT (CL)|  
Any kind of load.  
2004-Mar-08  
Page 12  
PCN 2004-018-A: BTS 5440G  
Typ. standby current  
Maximum allowable load inductance  
for a single switch off (one channel)  
I
= f(T ) ; V = 16 V ; V  
= low  
IN1...4  
bb(off)  
j
bb  
L =f(IL); T  
= 150°C, V = 12V, R = 0Ω  
jstart  
bb L  
16  
14  
12  
10  
8
1000  
100  
10  
1
6
4
2
0
-40 -20  
0
20 40 60 80 100 120 140 160  
0,1  
Tj [°C]  
0
5
10  
IL [A]  
15  
20  
Typ. on-state resistance  
= f(V ,T ); I = 5 A ; V = high  
R
ON  
bb  
j
L
in  
30  
28  
26  
24  
22  
20  
18  
16  
14  
12  
0
5
10  
15  
20  
25  
30  
35  
Vbb [V]  
2004-Mar-08  
Page 13  
PCN 2004-018-A: BTS 5440G  
Timing diagrams  
All channels are symmetric and consequently the diagrams are valid for channel 1 to channel 4.  
Figure 1a: Switching a resistive load,  
Figure 1c: Behaviour of sense output:  
Sense current (I ) and sense voltage (V )  
change of load current in on-condition  
S
S
as function of load current dependent on  
IN  
the sense resistor.  
Shown is V and I for three different  
S
S
VOUT  
sense resistors. Curve 1 refers to a low  
resistor, curve 2 to a medium-sized  
resistor and curve 3 to a big resistor.  
Note, that the sense resistor may not falls  
short of a minimum value of 500.  
t
on  
t
off  
t
t
slc(IS)  
IL  
slc(IS)  
V
S
Load 1  
Load 2  
V
ESD  
V
fault  
I ,V  
S
S
t
3
t
son(IS)  
2
1
I
The sense signal is not valid during settling time after  
turn on or change of load current. tslc(IS) = 300 µs typ.  
L
L
I
S
1
2
3
Figure 1b: V turn on  
bb  
IN  
I
I
L(lim)  
V
bb  
I = I / k  
S
L
ILIS  
V
= I * R ; R = 1knominal  
IS  
S
IS IS  
R
> 500Ω  
IS  
I
L
I ,V  
S
S
proper turn on under all conditions  
2004-Mar-08  
Page 14  
PCN 2004-018-A: BTS 5440G  
Figure 2a: Switching a lamp  
Figure 3a: Short circuit:  
Shut down by overtemperature,  
reset by cooling  
IN  
IN  
IS  
I
I
L(lim)  
L
VO U T  
I
L(SCr)  
IL  
t
delayfault  
V
fault  
t
V
S
Figure 2b: Switching a lamp with current limit:  
The behaviour of I and V is shown for a  
resistor, which refers to curve 1 in figure 1c  
S
S
Heating up may require several milliseconds,  
depending on external conditions.  
I
= 50A typ. increases with  
L(lim)  
IIN  
decreasing temperature.  
VOO  
U
T
Figure 3a: Turn on into short circuit,  
shut down by overtemperature, restart by cooling  
( channel 1 and 2 switched parallel )  
I LL  
IN1/2  
I
I  
I
+ I  
L1  
2 x I  
L2  
V
L(lim )  
V
u llt  
t
I
L(SCr)  
t
off(SC)  
, V  
S2  
t
delayfault  
V
S1  
V
fault  
2004-Mar-08  
Page 15  
PCN 2004-018-A: BTS 5440G  
1)  
Figure 4a: Overtemperature  
Figure 6a: Current sense ratio  
Reset if T < T  
j
jt  
The behaviour of I and V is shown for a resistor,  
7000  
S
S
k
ILIS  
which refers to curve 1 in figure 1c.  
IN  
6000  
5000  
4000  
I
L
I
S
I
[A]  
L
t
delay(fault)  
T
J
0 1 2 3 4 5 6 7 8 9 10 11 12 13  
t
Figure 5a:Open-load: detection in OFF-state,  
turn on/off to open load.  
Open load of channel 1; other channels normal  
opertaion.  
IN1  
toff  
toff  
VOUT1  
IL1  
tST delay  
tST delay  
IS  
V
fault  
t
= 250µs max.;  
t
= 500µs max.  
ST delay  
off  
with pull up resistor at output  
1
This range for the current sense ratio refers to all devices. The accuracy of the  
k
can  
ILIS  
be raised by calibrating the value of  
k
for every single device.  
ILIS  
2004-Mar-08  
Page 16  
PCN 2004-018-A: BTS 5440G  
Package and ordering code  
all dimensions in mm  
Published by  
Infineon Technologies AG,  
St.-Martin-Strasse 53,  
P-DSO-28-19  
Sales Code  
Ordering Code  
D-81669 München  
BTS 5440G  
Q67060-S6136  
© Infineon Technologies AG 2001  
All Rights Reserved.  
Attention please!  
The information herein is given to describe certain  
components and shall not be considered as  
a guarantee of characteristics.  
Terms of delivery and rights to technical change  
reserved.  
We hereby disclaim any and all warranties, including  
but not limited to warranties of non-infringement,  
regarding circuits, descriptions and charts stated herein.  
Infineon Technologies is an approved CECC  
manufacturer.  
Information  
For further information on technology, delivery  
terms and conditions and prices please contact  
your nearest Infineon Technologies Office in  
Germany or our Infineon Technologies  
Representatives worldwide (see address list).  
Warnings  
Due to technical requirements components may  
contain dangerous substances. For information  
on the types in question please contact your  
nearest Infineon Technologies Office.  
Infineon Technologies Components may only be  
used in life-support devices or systems with the  
express written approval of Infineon Technologies,  
if a failure of such components can reasonably be  
expected to cause the failure of that life-support  
device or system, or to affect the safety or  
effectiveness of that device or system. Life support  
devices or systems are intended to be implanted in  
the human body, or to support and/or maintain and  
sustain and/or protect human life. If they fail, it is  
reasonable to assume that the health of the user or  
other persons may be endangered.  
2004-Mar-08  
Page 17  

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