Q67040-S4131-A2_技术文档

SPD21N05L

SPU21N05L

®

SIPMOS Power Transistor

• N channel

• Enhancement mode

• Logic Level

• Avalanche-rated

• dv/dt rated

Pin 1

Pin 2

Pin 3

• 175°C operating temperature

G

D

S

Type

Package

P-TO252

P-TO251

Ordering Code

V_DS

I_D

R_DS(on

)

SPD21N05L

SPU21N05L

55 V

20 A

0.07

W

Q67040 - S4137- A2

Q67040 - S4131 - A2

W

Maximum Ratings

Parameter

Symbol

Values

Unit

Continuous drain current

I

A

D

T = 25 °C

20

14

C

T = 100 °C

C

Pulsed drain current

I

Dpuls

T = 25 °C

80

C

Avalanche energy, single pulse

E

mJ

AS

W

I = 20 A, V = 25 V, R = 25

D

DD

GS

L = 450 µH, T = 25 °C

90

20

j

Avalanche current,limited by T

I

A

jmax

AR

Avalanche energy,periodic limited by T

E

5.5

mJ

jmax

AR

Reverse diode dv/dt

dv/dt

kV/µs

I = 20 A, V = 40 V, di /dt = 200 A/µs

S

DS

F

T

= 175 °C

6

jmax

Gate source voltage

Power dissipation

V

±

14

V

GS

P

W

tot

T = 25 °C

55

C

Semiconductor Group

1

29/Jan/1998

SPD21N05L

SPU21N05L

Maximum Ratings

Parameter

Symbol

Values

Unit

Operating temperature

T

-55 ... + 175

°C

j

Storage temperature

T

stg

£

Thermal resistance, junction - case

Thermal resistance, junction - ambient (PCB mount)**

Thermal resistance, junction - ambient

IEC climatic category, DIN IEC 68-1

R

2.7

50

K/W

thJC

£

R

thJA

R

£

100

thJA

55 / 175 / 56

** when mounted on 1 " square PCB ( FR4 );for recommended footprint

Electrical Characteristics,

Parameter

at T = 25°C, unless otherwise specified

j

Symbol

Values

Unit

min.

typ.

max.

Static Characteristics

Drain- source breakdown voltage

= 0 V, I = 0.25 mA, T = 25 °C

V

(BR)DSS

V

55

-

GS

D

j

Gate threshold voltage

I = 40 µA

V

GS(th)

V

=V

1.2

1.6

2

GS DS, D

Zero gate voltage drain current

I

µA

DSS

V

= 50 V, V = 0 V, T = -40 °C

-

0.1

1

DS

GS

j

= 50 V, V = 0 V, T = 25 °C

0.1

-

GS

j

= 50 V, V = 0 V, T = 150 °C

100

GS

j

Gate-source leakage current

= 20 V, V = 0 V

I

nA

GSS

V

-

10

100

GS

DS

W

Drain-Source on-resistance

R

DS(on)

V

= 4.5 V, I = 14 A

-

0.057

0.034

0.07

0.04

GS

D

V

= 10 V, I = 14 A

D

Semiconductor Group

2

29/Jan/1998

SPD21N05L

SPU21N05L

Electrical Characteristics,

Parameter

at T = 25°C, unless otherwise specified

j

Symbol

min.

Values

typ.

Unit

max.

Dynamic Characteristics

Transconductance

g

S

fs

V

³

2 I

R I = 14 A

7

14

-

DS

* D * DS(on)max, D

Input capacitance

= 0 V, V = 25 V, f = 1 MHz

C

t

pF

iss

V

-

560

170

95

700

215

120

GS

DS

Output capacitance

= 0 V, V = 25 V, f = 1 MHz

oss

rss

V

-

GS

DS

Reverse transfer capacitance

= 0 V, V = 25 V, f = 1 MHz

V

GS

DS

Turn-on delay time

= 30 V, V = 4.5 V, I = 20 A

ns

d(on)

V

DD

GS

D

R = 10

W

-

15

35

15

25

55

25

G

Rise time

= 30 V, V = 4.5 V, I = 20 A

t

r

V

DD

GS

D

R = 10

W

G

Turn-off delay time

= 30 V, V = 4.5 V, I = 20 A

d(off)

V

DD

GS

D

R = 10

W

G

Fall time

f

V

= 30 V, V = 4.5 V, I = 20 A

GS D

DD

W

R = 10

-

15

25

1.2

23

36

-

G

Gate charge at threshold

= 40 V, I = 0.1 A, V =0 to 1 V

Q

V

nC

g(th)

V

0.8

15

DD

D

GS

Gate charge at 5.0 V

= 40 V, I = 20 A, V =0 to 5 V

g(5)

V

DD

D

GS

Gate charge total

= 40 V, I = 20 A, V =0 to 10 V

g(total)

(plateau)

V

24

DD

D

GS

Gate plateau voltage

= 40 V, I = 20 A

V

4.06

DD

D

Semiconductor Group

3

29/Jan/1998

SPD21N05L

SPU21N05L

Electrical Characteristics,

Parameter

at T = 25°C, unless otherwise specified

j

Symbol

min.

Values

typ.

Unit

max.

Reverse Diode

Inverse diode continuous forward current

I

A

S

T = 25 °C

-

20

C

Inverse diode direct current,pulsed

I

SM

T = 25 °C

-

80

C

Inverse diode forward voltage

V

t

V

SD

V

= 0 V, I = 40 A

1.12

50

0.12

1.8

75

GS

F

Reverse recovery time

ns

µC

rr

V = 30 V, I =l di /dt = 100 A/µs

R

F

S,

F

Reverse recovery charge

Q

rr

V = 30 V, I =l di /dt = 100 A/µs

0.18

R

F

S,

F

Semiconductor Group

4

29/Jan/1998

SPD21N05L

SPU21N05L

Power dissipation

Drain current

¦

I = (T )

D C

P

= (T )

tot

C

³

parameter: V

4 V

GS

60

W

22

A

50

45

40

35

30

25

20

15

10

5

18

P_tot

I_D

16

14

12

10

8

6

4

2

0

20 40 60 80 100 120 140 °C 180

0

20 40 60 80 100 120 140 °C 180

T_C

Safe operating area

Transient thermal impedance

¦

= (t )

th JC p

I = (V

)

Z

D

DS

parameter: D = 0.01, T = 25°C

parameter: D = t / T

C

p

10 ¹

K/W

10 ³

A

10 ⁰

I_D

Z_thJC

10 ²

t

= 28.0µs

p

10 ^-1

100 µs

D = 0.50

0.20

10 ^-2

10 ¹

0.10

0.05

0.02

10 ^-3

1 ms

0.01

single pulse

10 ms

10 ⁰

10 ^-4

10 ⁰

10 ¹

V 10 ²

10 ^-710 ^-610 ^-510 ^-410 ^-310 ^-210 ^-1s 10 ⁰

DC

V_DS

t_p

Semiconductor Group

5

29/Jan/1998

SPD21N05L

SPU21N05L

Typ. output characteristics

Typ. drain-source on-resistance

¦ (

I = V

)

R

= I )

D

DS

DS (on)

D

parameter: t = 80 µs

parameter: t = 80 µs, T = 25 °C

p

j

45

0.22

P

_tot= 55W

l

a

b

c

d

i

j

h

k

W

g

A

35

30

25

20

15

10

V

[V]

GS

a

0.18

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

8.0

10.0

I_D

R_{DS (on)}

b

c

d

e

f

0.16

0.14

0.12

0.10

0.08

0.06

0.04

e

g

h

i

d

j

k

l

e

f

c

a

g

h

i

j

V

[V] =

b

GS

a

5

0

c

d

e

f

g

h

i

j

0.02

0.00

b

23.05 4.0 4.5 5.0 5.5 6.0

6.5 7.0 8.0 10.0

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

V

5.0

0

4

8

12 16 20 24 28

A

36

V_DS

I_D

Typ. transfer characteristics I_D= f (V_GS

)

parameter: t = 80 µs

p

V

³

2 x I x R

DS

D

DS(on)max

80

A

I_D

60

50

40

30

20

10

0

1

2

3

4

5

6

7

8

V

V_GS

10

Semiconductor Group

6

29/Jan/1998

SPD21N05L

SPU21N05L

Gate threshold voltage

= f (T )

Drain-source on-resistance

¦

V

R

= (T )

GS(th)

j

DS (on)

j

parameter: I = 14 A, V = 4.5 V

parameter:V_GS=V_DS,I_D= 40µA

D

GS

0.24

3.0

V

W

2.6

0.20

V_GS(th)

2.4

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

R_{DS (on)}

0.18

0.16

0.14

0.12

0.10

0.08

0.06

0.04

98%

typ

max

typ

0.02

0.00

0.2

0.0

min

-60

-20

20

60

100

°C

T_j

180

-60

-20

20

60

100

140

V

T_j

200

Typ. capacitances

C = f (V

Forward characteristics of reverse diode

¦

)

I = (V

)

SD

DS

F

parameter: T , t = 80 µs

parameter:V = 0V, f = 1MHz

j

p

GS

10 ⁴

10 ²

pF

A

C

I_F

10 ³

10 ²

10 ¹

10 ⁰

10 ^-1

Ciss

Coss

Crss

= 25 °C typ

T_j

= 175 °C typ

= 25 °C (98%)

T_j= 175 °C (98%)

0

5

10

15

20

25

30

V

40

0.0

0.4

0.8

1.2

1.6

2.0

2.4

V

3.0

VDS

V_SD

Semiconductor Group

7

29/Jan/1998

SPD21N05L

SPU21N05L

Avalanche energy E_AS= f (T_j)

parameter:I_D=20A,V_DD=25 V

Typ. gate charge

¦

V

= (Q

)

GS

Gate

parameter: I

= 20 A

R_GS=25

W , L = 450µH

D puls

100

16

V

mJ

80

70

60

50

40

30

20

E_AS

V_GS

12

10

8

V

DS max

0,2

0,8

DS max

6

4

2

10

0

20

40

60

80 100 120 140

°C 180

4

8

12

16

20

24

28 nC 34

Q_Gate

T_j

Drain-source breakdown voltage

¦

= (T )

j

V

(BR)DSS

65

V

V_(BR)DSS

61

59

57

55

53

51

49

-60

-20

20

60

100

°C

T_j

180

Semiconductor Group

8

29/Jan/1998


型号：	Q67040-S4131-A2
厂家：	Infineon
描述：	SIPMOS Power Transistor SIPMOS功率晶体管晶体晶体管
文件：	总8页 (文件大小：146K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Q67040-S4131-A2 [INFINEON]

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