ISZ56DP15LM [INFINEON]
OptiMOS™ P-channel MOSFETs 150 V in PQFN 3.3x3.3 package represents the new technology targeted for battery management, load switch and reverse polarity protection applications. The main advantage of a P-channel device is the reduction of design complexity in medium and low power applications. Its easy interface to MCU, fast switching as well as avalanche ruggedness makes it suitable for high quality demanding applications. It is available in logic level featuring a wide RDS(on) range and improves efficiency at low loads due to low Qg.;
| 型号： | ISZ56DP15LM |
| 厂家： | 
Infineon |
| 描述： | OptiMOS™ P-channel MOSFETs 150 V in PQFN 3.3x3.3 package represents the new technology targeted for battery management, load switch and reverse polarity protection applications. The main advantage of a P-channel device is the reduction of design complexity in medium and low power applications. Its easy interface to MCU, fast switching as well as avalanche ruggedness makes it suitable for high quality demanding applications. It is available in logic level featuring a wide RDS(on) range and improves efficiency at low loads due to low Qg. |
| 文件： | 总11页 (文件大小：1358K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISZ56DP15LM
MOSFET
OptiMOSTMꢀPower-Transistor,ꢀ-150ꢀV
PG-TSDSON-8ꢀFL
8
5
Features
6
7
6
7
5
8
•ꢀP-channel,ꢀlogicꢀlevel
•ꢀOptimizedꢀforꢀhighꢀandꢀlowꢀswitchingꢀfrequency
•ꢀSuperiorꢀthermalꢀresistance
•ꢀ100%ꢀavalancheꢀtested
•ꢀPb-freeꢀleadꢀplating;ꢀRoHSꢀcompliant
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21
1
4
2
3
3
2
4
1
Productꢀvalidation
FullyꢀqualifiedꢀaccordingꢀtoꢀJEDECꢀforꢀIndustrialꢀApplications
Drain
Pin 5-8
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Parameter
Value
-150
560
Unit
*1
Gate
Pin 4
VDS
V
Source
Pin 1-3
RDS(on),max
ID
mΩ
A
*1: Internal body diode
-6.7
Qoss
-8.7
nC
nC
QGꢀ(0V...4.5V)
-15.2
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
ISZ56DP15LM
PG-TSDSON-8 FL
56DP15L
-
Final Data Sheet
1
Rev.ꢀ2.0,ꢀꢀ2022-10-13
OptiMOSTMꢀPower-Transistor,ꢀ-150ꢀV
ISZ56DP15LM
TableꢀofꢀContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Final Data Sheet
2
Rev.ꢀ2.0,ꢀꢀ2022-10-13
OptiMOSTMꢀPower-Transistor,ꢀ-150ꢀV
ISZ56DP15LM
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀTA=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
-
-
-
-
-
-
-
-
-6.7
-4.8
-4.8
-1.35
VGS=-10ꢀV,ꢀTC=25ꢀ°C
VGS=-10ꢀV,ꢀTC=100ꢀ°C
Continuous drain current1)
ID
A
VGS=-4.5ꢀV,ꢀTC=100ꢀ°C
VGS=-10ꢀV,TA=25°C,RthJA=60°C/W2)
Pulsed drain current3)
Avalanche energy, single pulse4)
ID,pulse
EAS
-
-
-
-
-27
210
20
A
TA=25ꢀ°C
-
mJ
V
ID=-5.5ꢀA,ꢀRGS=25ꢀΩ
Gate source voltage
VGS
-20
-
-
-
-
-
62.5
2.5
TC=25ꢀ°C
Power dissipation
Ptot
W
TA=25ꢀ°C,ꢀRthJA=60ꢀ°C/W2)
IEC climatic category; DIN IEC 68-1:
55/175/56
Operating and storage temperature
Tj,ꢀTstg
-55
-
175
°C
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction - case
RthJC
RthJA
-
1.24
2.4
°C/W -
°C/W -
Thermal resistance, junction - ambient,
6 cm² cooling area
-
-
60
1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature
as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual
environmental conditions.
2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
3) See Diagram 3 for more detailed information
4) See Diagram 13 for more detailed information
Final Data Sheet
3
Rev.ꢀ2.0,ꢀꢀ2022-10-13
OptiMOSTMꢀPower-Transistor,ꢀ-150ꢀV
ISZ56DP15LM
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
atꢀTj=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Typ.
-
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
-150
-1
Max.
Drain-source breakdown voltage
Gate threshold voltage
V(BR)DSS
VGS(th)
-
V
V
VGS=0ꢀV,ꢀID=-250ꢀµA
VDS=VGS,ꢀID=-724ꢀµA
-1.5
-2
-
-
-0.1
-10
-1
-100
VDS=-150ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C
VDS=-150ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
IDSS
µA
nA
IGSS
-
-10
-100
VGS=-20ꢀV,ꢀVDS=0ꢀV
-
-
460
453
560
550
VGS=-10ꢀV,ꢀID=-5ꢀA
VGS=-4.5ꢀV,ꢀID=-4ꢀA
RDS(on)
mΩ
Gate resistance
RG
gfs
-
5
-
-
Ω
-
Transconductance
6
12
S
|VDS|≥2|ID|RDS(on)max,ꢀID=-5ꢀA
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance1)
Output capacitance1)
Reverse transfer capacitance1)
Ciss
Coss
Crss
-
-
-
1100 1400 pF
VGS=0ꢀV,ꢀVDS=-75ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=-75ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=-75ꢀV,ꢀf=1ꢀMHz
48
12
62
21
pF
pF
VDD=-75ꢀV,ꢀVGS=-10ꢀV,ꢀID=-5ꢀA,
RG,ext=1.6ꢀΩ
Turn-on delay time
Rise time
td(on)
tr
td(off)
tf
-
-
-
-
12.4
14.8
49.6
24.8
-
-
-
-
ns
ns
ns
ns
VDD=-75ꢀV,ꢀVGS=-10ꢀV,ꢀID=-5ꢀA,
RG,ext=1.6ꢀΩ
VDD=-75ꢀV,ꢀVGS=-10ꢀV,ꢀID=-5ꢀA,
RG,ext=1.6ꢀΩ
Turn-off delay time
Fall time
VDD=-75ꢀV,ꢀVGS=-10ꢀV,ꢀID=-5ꢀA,
RG,ext=1.6ꢀΩ
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics2)ꢀ
Values
Typ.
-3.2
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Gate to source charge
Gate charge at threshold
Gate to drain charge1)
Switching charge
Gate charge total1)
Gate plateau voltage
Gate charge total1)
Output charge1)
Qgs
-
-
-
-
-
-
-
-
-
-
nC
nC
VDD=-75ꢀV,ꢀID=-5ꢀA,ꢀVGS=0ꢀtoꢀ-4.5ꢀV
VDD=-75ꢀV,ꢀID=-5ꢀA,ꢀVGS=0ꢀtoꢀ-4.5ꢀV
VDD=-75ꢀV,ꢀID=-5ꢀA,ꢀVGS=0ꢀtoꢀ-4.5ꢀV
VDD=-75ꢀV,ꢀID=-5ꢀA,ꢀVGS=0ꢀtoꢀ-4.5ꢀV
VDD=-75ꢀV,ꢀID=-5ꢀA,ꢀVGS=0ꢀtoꢀ-4.5ꢀV
VDD=-75ꢀV,ꢀID=-5ꢀA,ꢀVGS=0ꢀtoꢀ-4.5ꢀV
VDD=-75ꢀV,ꢀID=-5ꢀA,ꢀVGS=0ꢀtoꢀ-10ꢀV
VDS=-75ꢀV,ꢀVGS=0ꢀV
Qg(th)
Qgd
-1.65
-7.6
-11.4 nC
Qsw
Qg
-9.1
-
nC
nC
V
-15.2 -19
Vplateau
Qg
-2.9
-30
-
-40
nC
Qoss
-8.7
-11.6 nC
1) Defined by design. Not subject to production test.
2) See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.ꢀ2.0,ꢀꢀ2022-10-13
OptiMOSTMꢀPower-Transistor,ꢀ-150ꢀV
ISZ56DP15LM
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
Max.
-6.5
-26
Diode continuous forward current
Diode pulse current
IS
-
-
-
-
-
-
-
A
A
V
TC=25ꢀ°C
IS,pulse
VSD
trr
TC=25ꢀ°C
Diode forward voltage
-0.82 -1.2
72.3
222.2 444.4 nC
VGS=0ꢀV,ꢀIF=-5ꢀA,ꢀTj=25ꢀ°C
VR=-75ꢀV,ꢀIF=-5ꢀA,ꢀdiF/dt=-100ꢀA/µs
VR=-75ꢀV,ꢀIF=-5ꢀA,ꢀdiF/dt=-100ꢀA/µs
Reverse recovery time1)
Reverse recovery charge1)
144.6 ns
Qrr
1) Defined by design. Not subject to production test.
Final Data Sheet
5
Rev.ꢀ2.0,ꢀꢀ2022-10-13
OptiMOSTMꢀPower-Transistor,ꢀ-150ꢀV
ISZ56DP15LM
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
70
7
60
50
40
30
20
10
0
6
5
4
3
2
1
0
0
25
50
75
100
125
150
175
200
0
25
50
75
100
125
150
175
200
TCꢀ[°C]
TCꢀ[°C]
Ptot=f(TC)
ID=f(TC);ꢀ|VGS|≥10ꢀV
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
102
102
single pulse
0.01
0.02
1 µs
0.05
0.1
0.2
0.5
10 µs
101
101
100 µs
1 ms
100
100
10-1
10-2
10 ms
DC
10-1
10-2
100
101
102
103
10-6
10-5
10-4
10-3
10-2
10-1
100
-VDSꢀ[V]
tpꢀ[s]
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T
Final Data Sheet
6
Rev.ꢀ2.0,ꢀꢀ2022-10-13
OptiMOSTMꢀPower-Transistor,ꢀ-150ꢀV
ISZ56DP15LM
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
10
1250
-10 V
8
1000
-5 V
-4.5 V
-4 V
-3.5 V
-3 V
-2.8 V
-5 V
6
4
2
0
750
500
250
0
-3 V
-4.5 V
-4 V
-3.5 V
-10 V
-2.8 V
0
1
2
3
4
5
0
2
4
6
8
10
12
14
-VDSꢀ[V]
-IDꢀ[A]
ID=f(VDS),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
RDS(on)=f(ID),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
10
1400
1200
25 °C
8
6
4
2
0
175 °C
1000
800
600
175 °C
400
25 °C
200
0
0
2
4
6
8
10
3
4
5
6
7
8
9
10
-VGSꢀ[V]
-VGSꢀ[V]
ID=f(VGS),ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj
RDS(on)=f(VGS),ꢀID=-5ꢀA;ꢀparameter:ꢀTj
Final Data Sheet
7
Rev.ꢀ2.0,ꢀꢀ2022-10-13
OptiMOSTMꢀPower-Transistor,ꢀ-150ꢀV
ISZ56DP15LM
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
2.5
2.0
-7240 µA
2.0
1.5
1.0
0.5
0.0
1.6
1.2
-724 µA
0.8
0.4
0.0
-75 -50 -25
0
25 50 75 100 125 150 175 200
-75 -50 -25
0
25 50 75 100 125 150 175 200
Tjꢀ[°C]
Tjꢀ[°C]
RDS(on)=f(Tj),ꢀID=-5ꢀA,ꢀVGS=-10ꢀV
VGS(th=f(Tj),ꢀVGS=VDS;ꢀparameter:ꢀID
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
104
102
25 °C
25 °C, max
150 °C
150 °C, max
103
102
101
100
Ciss
101
Coss
100
Crss
10-1
0
25
50
75
100
125
150
0.00
0.25
0.50
0.75
1.00
1.25
1.50
-VDSꢀ[V]
-VSDꢀ[V]
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz
IF=f(VSD);ꢀparameter:ꢀTj
Final Data Sheet
8
Rev.ꢀ2.0,ꢀꢀ2022-10-13
OptiMOSTMꢀPower-Transistor,ꢀ-150ꢀV
ISZ56DP15LM
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
101
10
-30 V
-75 V
-120 V
8
6
4
2
0
100 °C
25 °C
100
125 °C
10-1
100
101
102
103
0
4
8
12
16
20
24
28
32
tAVꢀ[µs]
-Qgateꢀ[nC]
IAS=f(tAV);ꢀRGS=25ꢀΩ;ꢀparameter:ꢀTj,start
VGS=f(Qgate),ꢀID=-5ꢀAꢀpulsed,ꢀTj=25ꢀ°C;ꢀparameter:ꢀVDD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagram Gate charge waveforms
174
170
166
162
158
154
150
146
142
138
134
-75 -50 -25
0
25 50 75 100 125 150 175 200
Tjꢀ[°C]
VBR(DSS)=f(Tj);ꢀID=-250ꢀµA
Final Data Sheet
9
Rev.ꢀ2.0,ꢀꢀ2022-10-13
OptiMOSTMꢀPower-Transistor,ꢀ-150ꢀV
ISZ56DP15LM
5ꢀꢀꢀꢀꢀPackageꢀOutlines
PACKAGE - GROUP
NUMBER:
PG-TSDSON-8-U03
REVISION: 03
DATE: 20.10.2020
MILLIMETERS
DIMENSIONS
MIN.
MAX.
1.10
0.44
A
b
0.90
0.24
c
(0.20)
D
3.20
2.19
1.54
3.20
2.01
0.10
3.40
2.39
1.74
3.40
2.21
0.30
D1
D2
E
E1
E2
e
0.65
0.06
L
0.30
0.40
0.50
0.50
0.60
0.70
L1
L2
aaa
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TSDSON-8ꢀFL,ꢀdimensionsꢀinꢀmm
Final Data Sheet
10
Rev.ꢀ2.0,ꢀꢀ2022-10-13
OptiMOSTMꢀPower-Transistor,ꢀ-150ꢀV
ISZ56DP15LM
RevisionꢀHistory
ISZ56DP15LM
Revision:ꢀ2022-10-13,ꢀRev.ꢀ2.0
Previous Revision
Revision Date
Subjects (major changes since last revision)
Release of final version
2.0
2022-10-13
Trademarks
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documentꢀandꢀanyꢀapplicableꢀlegalꢀrequirements,ꢀnormsꢀandꢀstandardsꢀconcerningꢀcustomer’sꢀproductsꢀandꢀanyꢀuseꢀofꢀthe
productꢀofꢀInfineonꢀTechnologiesꢀinꢀcustomer’sꢀapplications.
Theꢀdataꢀcontainedꢀinꢀthisꢀdocumentꢀisꢀexclusivelyꢀintendedꢀforꢀtechnicallyꢀtrainedꢀstaff.ꢀItꢀisꢀtheꢀresponsibilityꢀofꢀcustomer’s
technicalꢀdepartmentsꢀtoꢀevaluateꢀtheꢀsuitabilityꢀofꢀtheꢀproductꢀforꢀtheꢀintendedꢀapplicationꢀandꢀtheꢀcompletenessꢀofꢀtheꢀproduct
informationꢀgivenꢀinꢀthisꢀdocumentꢀwithꢀrespectꢀtoꢀsuchꢀapplication.
Information
Forꢀfurtherꢀinformationꢀonꢀtechnology,ꢀdeliveryꢀtermsꢀandꢀconditionsꢀandꢀpricesꢀpleaseꢀcontactꢀyourꢀnearestꢀInfineon
TechnologiesꢀOfficeꢀ(www.infineon.com).
Warnings
Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,
pleaseꢀcontactꢀtheꢀnearestꢀInfineonꢀTechnologiesꢀOffice.
TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.
Final Data Sheet
11
Rev.ꢀ2.0,ꢀꢀ2022-10-13
相关型号：
ISZ810P06LM
OptiMOS™ P-channel MOSFETs 60 V in PQFN 3.3x3.3 package represents the new technology targeted for battery management, load switch and reverse polarity protection applications. The main advantage of a P-channel device is the reduction of design complexity in medium and low power applications. Its easy interface to MCU, fast switching as well as avalanche ruggedness makes it suitable for high quality demanding applications. It is available in logic level featuring a wide RDS(on) range and improves efficiency at low loads due to low Qg.
INFINEON
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