IRS2308S [INFINEON]
HALF-BRIDGE DRIVER; 半桥驱动器
| 型号： | IRS2308S |
| 厂家： | 
Infineon |
| 描述： | HALF-BRIDGE DRIVER |
| 文件： | 总21页 (文件大小：387K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet No.PD60266
(S)PbF
IRS2308
HALF-BRIDGE DRIVER
Features
Packages
•
•
•
Floating channel designed for bootstrap operation
Fully operational to +600 V
Tolerant to negative transient voltage, dV/dt
immune
•
•
•
•
•
•
•
•
•
Gate drive supply range from 10 V to 20 V
Undervoltage lockout for both channels
3.3 V, 5 V, and 15 V input logic compatible
Cross-conduction prevention logic
Matched propagation delay for both channels
Outputs in phase with inputs
8-Lead PDIP
IRS2308
8-Lead SOIC
IRS2308S
Logic and power ground +/- 5 V offset.
Internal 540 ns deadtime
Lower di/dt gate driver for better
Feature Comparison
noise immunity
Cross-
conduction
prevention
logic
•
RoHS compliant
Input
logic
Deadtime
(ns)
t
/t
on off
Part
Ground Pins
COM
SS/COM
COM
SS/COM
COM
SS/COM
(ns)
Description
2106
21064
2108
21084
2109
HIN/LIN
no
none
220/200
220/200
750/200
The IRS2308/IRS23084 are high volt-
age, high speed power MOSFET and
IGBT drivers with dependent high-side
and low-side referenced output channels.
Proprietary HVIC and latch immune
CMOS technologies enable ruggedized
monolithic construction. The logic input
V
V
V
Internal 540
Programmable 540 - 5000
Internal 540
LIN
HIN/
yes
yes
IN/SD
21094
Programmable 540 - 5000
yes
yes
160/140
220/200
HIN/LIN
HIN/LIN
Internal 100
Internal 540
2304
2308
COM
COM
is compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high
pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used
to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V.
Typical Connection
up to 600 V
VCC
VCC
VB
HO
VS
HIN
LIN
HIN
LIN
TO
LOAD
COM
LO
(Refer to Lead Assignments for correct pin configuration). This diagram shows electrical connections only.
Please refer to our Application Notes and DesignTips for proper circuit board layout.
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1
IRS2308(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol
Definition
High-side floating absolute voltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side and logic fixed supply voltage
Low-side output voltage
Min.
Max.
Units
V
V
-0.3
625
B
S
V
- 25
V
B
V
B
+ 0.3
+ 0.3
25
B
S
V
V
V
- 0.3
HO
V
-0.3
-0.3
- 0.3
CC
V
LO
V
V
+ 0.3
+ 0.3
CC
CC
V
Logic input voltage (HIN & LIN )
Allowable offset supply voltage transient
V
IN
SS
dV /dt
S
—
—
—
—
—
—
-50
—
50
V/ns
W
(8 lead PDIP)
(8 lead SOIC)
(8 lead PDIP)
(8 lead SOIC)
1.0
0.625
125
200
P
D
Package power dissipation @ T ≤ +25 °C
A
Rth
Thermal resistance, junction to ambient
°C/W
°C
JA
T
J
Junction temperature
150
150
300
T
S
T
L
Storage temperature
Lead temperature (soldering, 10 seconds)
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The V and V offset rating are tested with all supplies biased at a 15 V differential.
S
SS
Symbol
Definition
Min.
Max.
Units
V
B
High-side floating supply absolute voltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side and logic fixed supply voltage
Low-side output voltage
V
+ 10
V + 20
S
S
V
Note 1
600
S
V
HO
V
CC
V
V
B
S
V
10
0
20
V
V
LO
CC
CC
V
IN
Logic input voltage
COM
-40
V
°C
T
A
Ambient temperature
125
Note 1: Logic operational for V of -5 V to +600 V. Logic state held for V of -5 V to -V . (Please refer to the Design Tip
S
S
BS
DT97-3 for more details).
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2
IRS2308(S)PbF
Dynamic Electrical Characteristics
V
(V , V ) = 15 V, V = COM, C = 1000 pF, T = 25 °C, DT = V unless otherwise specified.
BIAS CC BS
L
A
SS
SS
Symbol
Definition
Min. Typ. Max. Units Test Conditions
t
Turn-on propagation delay
—
—
—
—
—
220
200
0
300
280
46
V = 0 V
S
on
off
t
Turn-off propagation delay
V
S
= 0 V or 600 V
MT
Delay matching
t
- t
| on off |
t
Turn-on rise time
Turn-off fall time
100
35
220
80
r
f
V
= 0 V
S
ns
t
Deadtime: LO turn-off to HO turn-on(DT
HO turn-off to LO turn-on (DT
LO-HO) &
DT
400
—
540
0
680
60
HO-LO)
MDT
Deadtime matching = DT
- DT
LO-HO HO-LO
|
|
Static Electrical Characteristics
V
(V , V ) = 15 V, V = COM, DT= V
and T = 25 °C unless otherwise specified. The V , V and I param-
SS A IL IH, IN
BIAS CC BS
SS
eters are referenced to V /COM and are applicable to the respective input leads: HIN and LIN. The V , I and R
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
SS
O
O,
on
Symbol
Definition
Min. Typ. Max. Units Test Conditions
V
Logic “1” input voltage for HIN & LIN
2.5
—
—
0.8
0.2
0.1
50
IH
V
= 10 V to 20 V
CC
V
Logic “0” input voltage for HIN & LIN
—
—
IL
V
V
OH
High level output voltage, V
- V
O
—
0.05
0.02
—
BIAS
I
= 2 mA
O
V
OL
Low level output voltage, V
—
O
I
LK
Offset supply leakage current
Quiescent V supply current
—
V = V = 600 V
B S
µA
I
20
0.4
—
60
1.0
5
150
1.6
20
QBS
BS
V
= 0 V or 5 V
IN
I
Quiescent V supply current
CC
mA
QCC
I
Logic “1” input bias current
Logic “0” input bias current
HIN = 5 V, LIN = 5 V
HIN = 0 V, LIN = 0 V
IN+
µA
I
IN-
—
1
5
V
V
and V supply undervoltage positive going
CC BS
CCUV+
8.0
7.4
0.3
8.9
8.2
0.7
9.8
9.0
—
V
threshold
V and V supply undervoltage negative going
CC
BSUV+
V
CCUV-
BS
V
V
threshold
BSUV-
V
CCUVH
Hysteresis
V
BSUVH
V
= 0 V,
O
I
Output high short circuit pulsed current
Output low short circuit pulsed current
97
290
600
—
—
O+
PW ≤ 10 µs
= 15 V,
mA
V
O
I
250
O-
PW ≤ 10 µs
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3
IRS2308(S)PbF
Functional Block Diagram
VB
UV
DETECT
HO
VS
R
R
Q
PULSE
FILTER
HV
LEVEL
SHIFTER
S
VSS/COM
LEVEL
SHIFT
HIN
PULSE
GENERATOR
DT
DEADTIME &
SHOOT-THROUGH
PREVENTION
VCC
LO
UV
DETECT
VSS/COM
LEVEL
SHIFT
DELAY
LIN
COM
VSS
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4
IRS2308(S)PbF
Lead Definitions
Symbol Description
HIN
Logic input for high-side gate driver output (HO), in phase
LIN
Logic input for low-side gate driver output (LO), in phase
High-side floating supply
V
B
HO
High-side gate driver output
High-side floating supply return
Low-side and logic fixed supply
Low-side gate driver output
V
V
S
CC
LO
COM
Low-side return
Lead Assignments
V
V
1
2
3
4
V
CC
B
8
7
1
2
3
4
V
CC
B
8
7
HO
HO
HIN
LIN
HIN
LIN
V
S
V
S
6
5
6
5
LO
LO
COM
COM
8 Lead PDIP
8 Lead SOIC
IRS2308PbF
IRS2308SPbF
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5
IRS2308(S)PbF
LIN
50%
50%
t
HIN
LIN
HIN
t
t
t
f
on
off
90%
r
90%
HO
LO
HO
LO
10%
10%
Figure 1. Input/Output Timing Diagram
Figure 2. Switching Time Waveform Definitions
LIN
50
%
50
%
HIN
90%
DT
10%
HO
LO
LO-HO
DT
HO-LO
90%
10%
MDT=
DT
LO-HO
- DT
HO-LO
Figure 3. Deadtime Waveform Definitions
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6
IRS2308(S)PbF
500
400
300
200
100
0
500
400
300
200
100
0
Max.
Typ.
Max.
Typ.
-50 -25
0
25
50
75
100 125
10
12
14
16
18
20
o
Temperature ( C)
V
Supply Voltage (V)
BIAS
Figure 4A. Turn-On Time
Figure 4B. Turn-On Time
vs. Temperature
vs. Supply Voltage
500
400
300
200
100
0
500
400
300
200
100
0
Max.
Max.
Typ.
Typ.
10
12
14
16
18
20
-50 -25
0
25
50
o
75 100 125
Temperature ( C)
Supply Voltage (V)
V
BIAS
Figure 5A. Turn-Off Propagation Delay
F u 5B. Turn-O f Propagation Delay
igre
vs. Temperature
vs. Supply Voltage
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7
IRS2308(S)PbF
500
400
300
200
100
0
500
400
300
200
100
0
Max.
Max.
Typ.
Typ.
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature(oC)
VBIAS Supply Voltage (V)
Figure6A. Turn-OnRiseTime
Figure 6B. Turn-On Rise Time
vs. Supply Voltage
vs. Temperature
200
150
100
200
150
100
Max.
Max.
50
0
50
0
Typ.
Typ.
-50
-25
50
75
100
125
10
14
16
18
20
025
12
Temperature(oC)
Input Voltage (V)
Figure 7A. Turn-Off Fall Time
vs. Temperature
Figure 7B. Turn-Off Fall Time
vs. Supply Voltage
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8
IRS2308(S)PbF
1000
800
600
400
200
1000
800
600
400
200
Max.
Typ.
Max.
Typ.
Min.
Min.
-50 -25
0
25
50
o
75 100 125
10
12
14
16
18
20
Temperature ( C)
V
Supply Voltage (V)
BIAS
Figure 8A. Deadtime vs. Temperature
Figure 8A. Deadtime vs. Supply Voltage
5
4
3
2
5
4
3
2
1
Min.
Min.
1
10
12
14
16
18
20
-50
-25
0
25
50
75
100 125
o
Supply Voltage (V)
V
Temperature ( C)
BIAS
Figure 9B. Logic “1” Input Voltage
Figure 9A. Logic “1” Input Voltage
vs. Supply Voltage
vs. Temperature
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9
IRS2308(S)PbF
4
3
2
1
0
4
3
2
1
0
Max.
Max.
10
12
14
16
18
20
-50
-25
0
25
50
75
100 125
o
Temperature (C)
V
BIAS
Supply Voltage (V)
Figure 10A. Logic “0” Input Voltage
Figure 10A. Logic “0” Input Voltage
vs. Supply Voltage
vs. Temperature
0.5
0.4
0.3
0.2
0.1
0.0
0.5
0.4
0.3
0.2
0.1
0.0
Max.
Max.
Typ.
Typ.
-50 -25
0
25
50
75 100 125
10
12
14
16
18
20
o
Temperature ( C)
V
Supply Voltage (V)
BIAS
Figure 11A. High Level Output Voltage
Figure11A. HighLevelOutputVoltage
vs. Supply Voltage
vs. Temperature
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10
IRS2308(S)PbF
0.5
0.4
0.3
0.2
0.1
0
0.5
0.4
0.3
0.2
0.1
0.0
Max.
Typ.
Max.
Typ.
-50 -25
0
25
50
75 100 125
10
12
14
16
18
20
o
Temperature ( C)
V
Supply Voltage (V)
BIAS
Figure 12B. Low Level Output Voltage
Figure 12A. Low Level Output Voltage
vs. Temperature
vs. Supply Voltage
300
240
180
120
60
300
240
180
120
60
Max.
Max.
0
0
-50 -25
0
25
50
75 100 125
0
100
200
300
400
500
600
o
Temperature (C)
V
Boost Voltage (V)
B
Figure 13A. Offset Supply Leakage Current
Figure 13A. Offset Supply Leakage Current
vs. Supply Voltage
vs. Temperature
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11
IRS2308(S)PbF
300
240
180
120
60
300
240
180
120
60
Max.
Max.
Typ.
Min.
Typ.
Min.
0
0
-50 -25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature ( )
C
o
V
Supply Voltage (V)
BS
Figure 14A. VBS Supply Current
Figure 14B. VBS Supply Current
vs. Temperature
vs. Supply Voltage
3.0
2.4
1.8
1.2
0.6
0.0
3
2.4
1.8
1.2
0.6
0
Max.
Typ.
Min.
Max.
Typ.
Min.
-50 -25
0
25
50
75
100 125
10
12
14
16
18
20
o
Temperature ( )
C
V
SupplyVoltage(V)
CC
Figure 15A. V Supply Current
CC
Figure 14B. VCC Supply Current
vs. Temperature
vs. Supply Voltage
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12
IRS2308(S)PbF
50
40
30
20
10
0
50
40
30
20
10
0
Max.
Typ.
Max.
Typ.
-50 -25
0
25
50
75
100 125
10
12
14
16
18
20
o
Temperature ( C)
V
Supply Voltage (V)
CC
Figure 16B. Logic “1” Input Current
Figure 16A. Logic “1” Input Current
vs. Supply Voltage
vs. Temperature
6
5
4
3
2
1
0
6
5
4
3
Max
Max
2
1
0
10
12
14
16
18
20
-50 -25
0
25
50
75
100 125
o
Temperature ( C)
Supply Voltage (V)
Figure 17A. Logic “0” Input Bias Current
vs. Temperature
Figure 17B. Logic “0” Input Bias Current
vs. Supply Voltage
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13
IRS2308(S)PbF
12
11
10
9
11
10
9
Max.
Typ.
Max.
Typ.
8
8
7
Min.
Min.
7
6
-50 -25
0
25
50
75
100 125
-50 -25
0
25
50
75
100 125
o
o
Temperature (C)
Temperature ( C)
Figure 19. V Undervoltage Threshold (-)
Figure 18. VUndervoltage Threshold (+)
cc
cc
vs. Temperature
vs. Temperature
12
11
10
9
11
10
9
Max.
Typ.
Max.
Typ.
8
8
7
Min.
Min.
7
6
-50 -25
0
25
50
75
100 125
-50
-25
0
25
Temperature (C)
50
75
100 125
o
o
Temperature (C)
Figure 20. V Undervoltage Threshold (+)
BS
Figure 21. V Undervoltage Threshold (-)
BS
vs. Temperature
vs. Temperature
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14
IRS2308(S)PbF
500
400
300
200
100
0
500
400
300
200
100
0
Typ.
Typ.
Max.
Max.
-50 -25
0
25
50
75 100 125
10
12
14
16
18
20
o
Temperature ( C)
V
BIAS
Supply Voltage (V)
Figure 22A. Output Source Current
Figure 22B. Output Source Current
vs. Temperature
vs. Supply Voltage
1000
800
600
400
200
0
1000
800
600
400
200
0
Typ.
Typ.
Max.
Max.
-50 -25
0
25
50
75 100 125
10
12
14
16
lta
18
)
20
o
o
V
S
u
p
p
ly
V
o
g
e
(V
Temperature ( C)
BIAS
Figure 23A. Output Sink Current
Figure 23B. Output Sink Current
v
s.
T
e
m
p
e
r
a
t
u
r
e
vs. Supply Voltage
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15
IRS2308(S)PbF
0
-2
Typ.
-4
-6
-8
-10
10
12
14
16
18
20
V
Floating Supply Voltage (V)
BS
Figure 24. MaximumVS Negative Offset
vs. Supply Voltage
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16
IRS2308(S)PbF
140
120
100
80
140
120
100
80
140 V
70 V
0 V
140 V
70 V
0 V
60
60
40
40
20
20
1
10
Frequency (kHz)
Figure 25. IRS2308 vs. Frequency (IRFBC20),
gate=33Ω, VCC=15 V
100
1000
1
10
Frequency (kHz)
Figure 26. IRS2308 vs. Frequency (IRFBC30),
=22 Ω, VCC=15 V
100
1000
R
R
gate
140 V
70 V
140
120
100
80
140
120
100
80
0 V
140 V
70 V
0 V
60
60
40
40
20
20
1
10
100
1000
1
10
Frequency (kHz)
Figure 28. IRS2308 vs. Frequency (IRFPE50),
=10Ω, VCC=15 V
100
1000
Frequency (kHz)
Figure 27. IRS2308 vs. Frequency (IRFBC40),
=15Ω, VCC=15 V
R
gate
R
gate
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17
IRS2308(S)PbF
140
120
100
80
140
120
100
80
140 V
70 V
140 V
70 V
0 V
0 V
60
60
40
40
20
20
1
10
Frequency (kHz)
Figure 29. IRS2308S vs. Frequency (IRFBC20),
=33Ω, VCC=15 V
100
1000
1
10
Frequency (kHz)
Figure 30. IRS2308S vs. Frequency (IRFBC30),
=22Ω, VCC=15 V
100
1000
R
gate
R
gate
140 V 70 V
140 V 70 V 0 V
140
120
100
80
140
120
100
80
0 V
60
60
40
40
20
20
1
10
100
1000
1
10
Frequency (kHz)
Figure 31. IRS2308S vs. Frequency (IRFBC40),
=15Ω, VCC=15 V
100
1000
Frequency (kHz)
Figure 32. IRS2308S vs. Frequency (IRFPE50),
=10Ω, VCC=15 V
R
R
gate
gate
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18
IRS2308(S)PbF
Case outlines
01-6014
01-3003 01 (MS-001AB)
8-Lead PDIP
INCHES
MILLIMETERS
DIM
A
D
B
MIN
.0532
MAX
.0688
.0098
.020
MIN
1.35
0.10
0.33
0.19
4.80
3.80
MAX
1.75
0.25
0.51
0.25
5.00
4.00
FOOTPRINT
8X 0.72 [.028]
5
A
A1 .0040
b
c
.013
.0075
.189
.0098
.1968
.1574
8
1
7
2
6
3
5
6
D
E
e
H
E
.1497
0.25 [.010]
A
.050 BASIC
1.27 BASIC
6.46 [.255]
4
e 1 .025 BASIC
0.635 BASIC
H
K
L
y
.2284
.0099
.016
0°
.2440
.0196
.050
8°
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
3X 1.27 [.050]
e
6X
8X 1.78 [.070]
K x 45°
e1
A
C
y
0.10 [.004]
8X c
8X L
A1
B
8X b
7
0.25 [.010]
C A
5
6
7
DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
01-6027
01-0021 11 (MS-012AA)
8-Lead SOIC
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19
IRS2308(S)PbF
LOADED TAPE FEED DIRECTION
Tape & Reel
8-Lead SOIC
A
A
B
H
D
F
C
NOTE : CONTROLLING
DIMENSION IN MM
E
G
CA R RIE R TA P E D IM E NS IO N FO R 8 S O ICN
M etr ic
Im p erial
Co d e
M in
7 .9 0
3 .9 0
11 .7 0
5 .4 5
6 .3 0
5 .1 0
1 .5 0
1 .5 0
M ax
8.1 0
4.1 0
1 2.30
5.5 5
6.5 0
5.3 0
n/a
M in
M ax
0 .3 18
0 .1 61
0 .4 84
0 .2 18
0 .2 55
0 .2 08
n/ a
A
B
C
D
E
F
0.31 1
0.15 3
0 .4 6
0.21 4
0.24 8
0.20 0
0.05 9
0.05 9
G
H
1.6 0
0 .0 62
F
D
B
C
A
E
G
H
RE E L D IM E NS IO N S FO R 8 S O IC N
M etr ic
Im p erial
Co d e
M in
32 9. 60
20 .9 5
12 .8 0
1 .9 5
98 .0 0
n /a
14 .5 0
12 .4 0
M ax
3 30 .2 5
2 1.45
1 3.20
2.4 5
1 02 .0 0
1 8.40
1 7.10
1 4.40
M in
1 2 .9 76
0.82 4
0.50 3
0.76 7
3.85 8
n /a
M ax
13 .0 0 1
0 .8 44
0 .5 19
0 .0 96
4 .0 15
0 .7 24
0 .6 73
0 .5 66
A
B
C
D
E
F
G
H
0.57 0
0.48 8
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20
IRS2308(S)PbF
LEADFREE PART MARKING INFORMATION
Part number
Date code
IRSxxxxx
IR logo
YWW?
?XXXX
Pin 1
Identifier
Lot Code
(Prod mode - 4 digit SPN code)
?
MARKING CODE
P
Lead Free Released
Non-Lead Free
Released
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
8-Lead PDIP IRS2308PbF
8-Lead SOIC IRS2308SPbF
8-Lead SOIC Tape & Reel IRS2308STRPbF
The SOIC-8 is MSL2 qualified.
This product has been designed and qualified for the industrial level.
Qualification standards can be found at www.irf.com
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 11/27/2006
www.irf.com
21
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