IRLSL4030 [INFINEON]
The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters. ;型号: | IRLSL4030 |
厂家: | Infineon |
描述: | The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters. |
文件: | 总11页 (文件大小:391K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 97370
IRLS4030PbF
IRLSL4030PbF
Applications
l DC Motor Drive
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
HEXFET® Power MOSFET
D
VDSS
100V
RDS(on) typ.
3.4m
4.3m
180A
Ω
Ω
G
max.
ID
S
Benefits
l Optimized for Logic Level Drive
l Very Low RDS(ON) at 4.5V VGS
l Superior R*Q at 4.5V VGS
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l Fully Characterized Capacitance and Avalanche
SOA
l Enhanced body diode dV/dt and dI/dt Capability
l Lead-Free
S
S
D
D
G
G
TO-262
D2Pak
IRLS4030PbF
IRLSL4030bF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current c
Max.
180
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
130
A
730
PD @TC = 25°C
370
W
Maximum Power Dissipation
Linear Derating Factor
2.5
W/°C
V
VGS
± 16
Gate-to-Source Voltage
21
Peak Diode Recovery e
dv/dt
TJ
V/ns
°C
-55 to + 175
Operating Junction and
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
300
Avalanche Characteristics
Single Pulse Avalanche Energy d
EAS (Thermally limited)
305
mJ
A
Avalanche Current c
IAR
See Fig. 14, 15, 22a, 22b
Repetitive Avalanche Energy f
EAR
mJ
Thermal Resistance
Symbol
Parameter
Typ.
–––
Max.
0.40
40
Units
°C/W
RθJC
Junction-to-Case jk
RθJA
–––
Junction-to-Ambient (PCB Mount) ij
www.irf.com
1
02/12/09
IRLS/SL4030PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Min. Typ. Max. Units
100 ––– –––
––– 0.10 ––– V/°C Reference to 25°C, ID = 5mAc
Conditions
VGS = 0V, ID = 250µA
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
V
∆V(BR)DSS/∆TJ
RDS(on)
–––
–––
1.0
3.4
3.6
–––
4.3
4.5
2.5
20
V
GS = 10V, ID = 110A f
mΩ
VGS = 4.5V, ID = 92A f
VGS(th)
IDSS
Gate Threshold Voltage
V
V
V
V
V
V
DS = VGS, ID = 250µA
DS = 100V, VGS = 0V
DS = 100V, VGS = 0V, TJ = 125°C
GS = 16V
Drain-to-Source Leakage Current
––– –––
µA
––– ––– 250
––– ––– 100
––– ––– -100
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
nA
GS = -16V
RG(int)
–––
2.1
–––
Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 25V, ID = 110A
320 ––– –––
S
–––
–––
–––
–––
–––
87
27
45
42
74
130
–––
–––
–––
–––
ID = 110A
Qgs
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
VDS = 50V
nC
Qgd
VGS = 4.5V f
Qsync
ID = 110A, VDS =0V, VGS = 4.5V
DD = 65V
td(on)
V
tr
Rise Time
––– 330 –––
––– 110 –––
––– 170 –––
––– 11360 –––
––– 670 –––
––– 290 –––
––– 760 –––
––– 1140 –––
ID = 110A
ns
td(off)
Turn-Off Delay Time
RG = 2.7Ω
VGS = 4.5V f
tf
Fall Time
Ciss
Input Capacitance
VGS = 0V
Coss
Output Capacitance
VDS = 50V
Crss
Reverse Transfer Capacitance
ƒ = 1.0MHz
pF
Coss eff. (ER)
Coss eff. (TR)
V
GS = 0V, VDS = 0V to 80V h
GS = 0V, VDS = 0V to 80V g
Effective Output Capacitance (Energy Related)
h
V
Effective Output Capacitance (Time Related)
g
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
IS
D
S
Continuous Source Current
MOSFET symbol
––– ––– 180
A
(Body Diode)
Pulsed Source Current
(Body Diode)ꢁc
showing the
integral reverse
G
ISM
––– ––– 730
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
––– –––
1.3
–––
–––
–––
V
TJ = 25°C, IS = 110A, VGS = 0V f
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 85V,
–––
–––
–––
50
60
88
ns
IF = 110A
di/dt = 100A/µs f
Qrr
Reverse Recovery Charge
nC
A
––– 130 –––
––– 3.3 –––
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.05mH
RG = 25Ω, IAS = 110A, VGS =10V. Part not recommended for use
above this value .
ISD ≤ 110A, di/dt ≤ 1330A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
ꢀ Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
.
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniquea refer to applocation
note # AN- 994 echniques refer to application note #AN-994.
R is measured at T approximately 90°C.
θ
J
RθJC value shown is at time zero.
2
www.irf.com
IRLS/SL4030PbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.7V
2.5V
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.7V
2.5V
TOP
TOP
BOTTOM
BOTTOM
2.5V
2.5V
60µs PULSE WIDTH
≤
60µs PULSE WIDTH
≤
Tj = 175°C
Tj = 25°C
1
0.1
1
10
100
1000
0.1
1
10
100
1000
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
10
2.5
2.0
1.5
1.0
0.5
0.0
I
= 110A
D
V
= 10V
GS
T = 175°C
J
T = 25°C
J
V
= 50V
DS
60µs PULSE WIDTH
≤
1.0
1
2
3
4
5
-60 -40 -20 0 20 40 60 80 100120140160180
T , Junction Temperature (°C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
100000
10000
1000
5.0
V
= 0V,
= C
f = 1 MHZ
GS
I = 110A
D
C
C
C
+ C , C
SHORTED
V
V
= 80V
= 50V
iss
gs
gd
ds
DS
DS
= C
rss
oss
gd
4.0
3.0
2.0
1.0
0.0
= C + C
ds
gd
C
iss
C
oss
C
rss
100
1
10
, Drain-to-Source Voltage (V)
100
0
20
40
60
80
100
V
Q , Total Gate Charge (nC)
G
DS
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
www.irf.com
3
IRLS/SL4030PbF
1000
10000
1000
100
10
OPERATION IN THIS AREA
T = 175°C
J
LIMITED BY R (on)
DS
100
100µsec
T = 25°C
J
10
1
10msec
DC
1msec
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
2.0
0.1
1
0.0
0.5
1.0
1.5
2.5
0
1
10
100
1000
V
, Source-to-Drain Voltage (V)
SD
V
, Drain-to-Source Voltage (V)
DS
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
125
120
115
110
105
100
95
200
Id = 5mA
180
160
140
120
100
80
60
40
20
0
90
25
50
75
100
125
150
175
-60 -40 -20 0 20 40 60 80 100120140160180
T
, Case Temperature (°C)
T , Temperature ( °C )
J
C
Fig 9. Maximum Drain Current vs.
Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
4.5
1400
1200
1000
800
600
400
200
0
I
D
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
TOP
17A
40A
BOTTOM 110A
-20
0
20
40
60
80
100 120
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
V
Drain-to-Source Voltage (V)
DS,
Fig 11. Typical COSS Stored Energy
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
4
www.irf.com
IRLS/SL4030PbF
1
0.1
D = 0.50
0.20
0.10
0.05
R1
R1
R2
R2
R3
R3
Ri (°C/W) τi (sec)
0.01
0.02
0.01
τ
JτJ
τ
τ
Cτ
0.0477 0.000071
0.1631 0.000881
0.1893 0.007457
τ
1τ1
τ
2 τ2
3τ3
Ci= τi/Ri
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
∆
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
1
Allowed avalanche Current vs avalanche
∆Τ
pulsewidth, tav, assuming
Tstart = 150°C.
j = 25°C and
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
350
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
TOP
BOTTOM 1.0% Duty Cycle
= 110A
Single Pulse
300
250
200
150
100
50
I
D
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Starting T , Junction Temperature (°C)
J
Fig 15. Maximum Avalanche Energy vs. Temperature
www.irf.com
5
IRLS/SL4030PbF
40
35
30
25
20
15
10
5
2.5
I
= 73A
= 85V
F
V
R
2.0
1.5
T = 25°C
J
T = 125°C
J
I
I
I
= 250µA
= 1.0mA
= 1.0A
D
D
D
1.0
0.5
0.0
0
0
200
400
600
800
1000
-75 -50 -25
0
25 50 75 100 125 150 175
di /dt (A/µs)
T
, Temperature ( °C )
F
J
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
35
800
I = 110A
F
I = 73A
F
720
640
560
480
400
320
240
160
80
30
25
20
15
10
5
V
= 85V
V
= 85V
R
R
T = 25°C
T = 25°C
J
J
T = 125°C
J
T = 125°C
J
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt (A/µs)
di /dt (A/µs)
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
880
I = 110A
F
800
V
= 85V
R
720
640
560
480
400
320
240
160
80
T = 25°C
J
T = 125°C
J
0
200
400
600
800
1000
di /dt (A/µs)
F
Fig. 20 - Typical Stored Charge vs. dif/dt
6
www.irf.com
IRLS/SL4030PbF
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
D.U.T
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Current
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
2
GS
0.01Ω
t
p
I
AS
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
RD
VDS
V
DS
90%
VGS
D.U.T.
RG
+
VDD
-
VGS
10%
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
.2µF
12V
.3µF
+
V
DS
D.U.T.
-
Vgs(th)
V
GS
3mA
I
I
D
G
Qgs1
Qgs2
Qgd
Qgodr
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
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7
IRLS/SL4030PbF
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
D2Pak (TO-263AB) Part Marking Information
25
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
8
www.irf.com
IRLS/SL4030PbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
25
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
www.irf.com
9
IRLS/SL4030PbF
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
1.85 (.073)
11.60 (.457)
11.40 (.449)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 02/09
10
www.irf.com
IMPORTANT NOTICE
The information given in this document shall in no For further information on the product, technology,
event be regarded as a guarantee of conditions or delivery terms and conditions and prices please
characteristics (“Beschaffenheitsgarantie”) .
contact your nearest Infineon Technologies office
(www.infineon.com).
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement
of intellectual property rights of any third party.
WARNINGS
Due to technical requirements products may
contain dangerous substances. For information on
the types in question please contact your nearest
Infineon Technologies office.
In addition, any information given in this document
is subject to customer’s compliance with its
obligations stated in this document and any
applicable legal requirements, norms and
standards concerning customer’s products and any
use of the product of Infineon Technologies in
customer’s applications.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized
representatives
of
Infineon
Technologies, Infineon Technologies’ products may
not be used in any applications where a failure of
the product or any consequences of the use thereof
can reasonably be expected to result in personal
injury.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
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