IRFR9N20D [INFINEON]
Power MOSFET(Vdss=200V, Rds(on)max=0.38ohm, Id=9.4A); 功率MOSFET ( VDSS = 200V , RDS(ON)最大值= 0.38ohm ,ID =输出高达9.4A )型号: | IRFR9N20D |
厂家: | Infineon |
描述: | Power MOSFET(Vdss=200V, Rds(on)max=0.38ohm, Id=9.4A) |
文件: | 总10页 (文件大小:128K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 93919A
IRFR9N20D
IRFU9N20D
SMPS MOSFET
HEXFET® Power MOSFET
Applications
l High frequency DC-DC converters
VDSS
RDS(on) max
ID
200V
0.38Ω
9.4A
Benefits
l Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
D-Pak
I-Pak
IRFR9N20D
IRFU9N20D
Absolute Maximum Ratings
Parameter
Max.
9.4
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
6.7
A
38
PD @TC = 25°C
Power Dissipation
86
W
W/°C
V
Linear Derating Factor
0.57
± 30
5.0
VGS
dv/dt
TJ
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Operating Junction and
V/ns
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
°C
300 (1.6mm from case )
Typical SMPS Topologies
l Telecom 48V input Forward Converter
Notes through are on page 10
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1
6/29/00
IRFR9N20D/IRFU9N20D
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
200 ––– –––
––– 0.23 ––– V/°C Reference to 25°C, ID = 1mA
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
VGS(th)
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
––– ––– 0.38
3.0 ––– 5.5
Ω
VGS = 10V, ID = 5.6A
VDS = VGS, ID = 250µA
VDS = 200V, VGS = 0V
VDS = 160V, VGS = 0V, TJ = 150°C
VGS = 30V
V
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
IDSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
IGSS
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 50V, ID = 5.6A
ID = 5.6A
gfs
4.3
–––
–––
–––
–––
–––
–––
–––
––– –––
18 27
4.7 7.1
9.0 14
S
Qg
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 160V
VGS = 10V,
VDD = 100V
7.5 –––
16 –––
13 –––
9.3 –––
ID = 5.6A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 11Ω
VGS = 10V
VGS = 0V
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
––– 560 –––
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
97 –––
29 –––
VDS = 25V
pF
ƒ = 1.0MHz
––– 670 –––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 160V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 160V ꢀ
–––
–––
40 –––
74 –––
Avalanche Characteristics
Parameter
Single Pulse Avalanche Energy
Typ.
–––
–––
–––
Max.
100
5.6
Units
mJ
EAS
IAR
Avalanche Current
A
EAR
Repetitive Avalanche Energy
8.6
mJ
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
–––
–––
Max.
1.75
50
Units
RθJC
RθJA
RθJA
Junction-to-Ambient (PCB mount)*
Junction-to-Ambient
°C/W
110
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
IS
Continuous Source Current
(Body Diode)
MOSFET symbol
9.4
38
––– –––
––– –––
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
S
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.3
––– 130 –––
––– 560 –––
V
TJ = 25°C, IS = 5.6A, VGS = 0V
TJ = 25°C, IF = 5.6A
ns
nC
Qrr
ton
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFR9N20D/IRFU9N20D
100
100
10
1
VGS
VGS
15V
12V
10V
8.0V
7.0V
6.5V
6.0V
TOP
15V
12V
10V
8.0V
7.0V
6.5V
6.0V
TOP
BOTTOM 5.5V
BOTTOM 5.5V
10
5.5V
1
5.5V
20µs PULSE WIDTH
20µs PULSE WIDTH
°
T = 25 C
J
°
T = 175 C
J
0.1
0.1
0.1
0.1
1
10
100
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
3.0
100
10
9.4A
=
I
D
2.5
2.0
1.5
1.0
0.5
0.0
°
T = 175 C
J
°
T = 25 C
J
1
V
= 50V
DS
V
GS
= 10V
20µs PULSE WIDTH
0.1
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
4
6
8
10 12
T , Junction Temperature ( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRFR9N20D/IRFU9N20D
20
16
12
8
I
D
= 5.6A
10000
V
= 0V,
f = 1 MHZ
GS
V
V
V
= 160V
= 100V
= 40V
C
= C + C
,
C
ds
SHORTED
DS
DS
DS
iss
gs
gd
C
= C
gd
rss
C
= C + C
oss
ds
gd
1000
100
10
Ciss
Coss
Crss
4
FOR TEST CIRCUIT
SEE FIGURE 13
1
10
100
1000
0
0
5
10
15
20 25
30
V
, Drain-to-Source Voltage (V)
DS
Q
, Total Gate Charge (nC)
G
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
100
10
100
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10
10us
°
T = 175 C
J
100us
1
1ms
1
10ms
°
T = 25 C
J
°
T = 25 C
C
°
T = 175 C
Single Pulse
J
V
= 0 V
GS
1.2
0.1
0.2
0.1
0.4
V
0.6
0.8
1.0
1.4
1
10
100
1000
,Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRFR9N20D/IRFU9N20D
RD
10.0
8.0
6.0
4.0
2.0
0.0
VDS
VGS
D.U.T.
RG
+VDD
-
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
175
°
, Case Temperature ( C)
T
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
1
D = 0.50
0.20
0.10
0.05
P
DM
0.1
0.01
0.02
0.01
SINGLE PULSE
t
1
(THERMAL RESPONSE)
t
2
Notes:
1. Duty factor D =
t / t
1 2
2. Peak T = P
x Z
+ T
thJC C
J
DM
0.00001
0.0001
0.001
0.01
0.1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR9N20D/IRFU9N20D
200
160
120
80
1 5V
I
D
TOP
2.3A
4.0A
BOTTOM 5.6A
DRIVER
L
V
G
DS
D.U.T
R
+
V
D D
-
I
A
AS
20V
0.01
t
Ω
p
Fig 12a. Unclamped Inductive Test Circuit
40
V
(BR)DSS
0
t
25
50
75
100
125
150
175
p
°
Starting T , Junction Temperature ( C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
Q
G
50KΩ
.2µF
12V
.3µF
Q
Q
GD
GS
+
V
DS
D.U.T.
-
V
V
GS
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFR9N20D/IRFU9N20D
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFR9N20D/IRFU9N20D
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
2.38 (.09 4)
2.19 (.08 6)
6.73 (.265 )
6.35 (.250 )
1.14 (.045)
0.89 (.035)
- A
-
1.27 (.050 )
0.88 (.035 )
5 .46 (.215 )
5 .21 (.205 )
0.58 (.02 3)
0.46 (.01 8)
4
6.4 5 (.2 45)
5.6 8 (.2 24)
6.2 2 (.2 45)
5.9 7 (.2 35)
10 .42 (.4 10 )
9.40 (.37 0)
1.02 (.04 0)
1.64 (.02 5)
LE AD A SS IG N M E NTS
1 - G A TE
1
2
3
2 - D R A IN
0 .51 (.02 0)
M IN.
- B
-
3 - S O U R CE
4 - D R A IN
1 .5 2 (.06 0)
1 .1 5 (.04 5)
0.89 (.035 )
0.64 (.025 )
3X
0 .5 8 (.0 23)
0 .4 6 (.0 18)
1.1 4 (.0 45)
0.7 6 (.0 30)
2X
0.25 (.01 0)
M
A M B
N O TE S :
2.28 (.09 0)
1
2
3
4
D IM E N S IO N IN G & TO LE R A N C IN G P E R A N S I Y 14.5 M , 1 982 .
C O N TR O LL ING D IM EN SIO N : IN C H .
4 .57 (.18 0)
C O N FO R M S TO JE D E C O U TLIN E TO -252 AA .
D IM E N S IO N S SH O W N A R E B EF O R E S O LD ER D IP ,
S O LD ER D IP M A X. +0.16 (.0 06).
D-Pak (TO-252AA) Part Marking Information
8
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IRFR9N20D/IRFU9N20D
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
6 .73 (.26 5)
6 .35 (.25 0)
2.38 (.094)
2.19 (.086)
- A
-
0.58 (.023)
0.46 (.018)
1.27 (.050)
0.88 (.035)
5 .4 6 (.21 5)
5 .2 1 (.20 5)
L EAD A SSIG N M EN TS
1 - G ATE
4
2 - D RA IN
6.4 5 (.245)
5.6 8 (.224)
3 - SO U R C E
4 - D RA IN
6 .22 (.2 45)
5 .97 (.2 35)
1.52 (.060)
1.15 (.045)
1
2
3
- B
-
N O TE S:
1
2
3
4
D IM EN SIO N IN G
&
TO LER AN C IN G P ER AN SI Y14.5M , 198 2.
2.28 (.0 90)
1.91 (.0 75)
9.65 (.380)
8.89 (.350)
C O NTR OL LIN G D IM EN SIO N : IN C H .
C O NF O R MS TO JEDE C O UTLINE TO -25 2AA.
D IM EN SIO N S S HO W N A R E BE FO RE SO L DE R D IP,
SO LDE R DIP M AX. +0.16 (.006).
1.14 (.045 )
0.76 (.030 )
1 .14 (.04 5)
0 .89 (.03 5)
3X
0.89 (.0 35)
0.64 (.0 25)
3X
0.25 (.010 )
M
A M B
0.58 (.023)
0.46 (.018)
2.28 (.09 0)
2X
I-Pak (TO-251AA) Part Marking Information
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9
IRFR9N20D/IRFU9N20D
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED D IRECTIO N
FEED DIR ECTION
N O TES
:
1. CO NTRO LLING D IMENSIO N : M ILLIM ETER.
2. ALL D IM EN SION S ARE SHO W N IN M ILLIM ETERS ( INCHES ).
3. OU TLINE C ON FO RMS TO EIA-481 & EIA-541.
13 INCH
16 m m
NO TES :
1. OU TLINE CON FO RMS TO EIA-481.
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature.
Starting TJ = 25°C, L = 6.4mH
RG = 25Ω, IAS = 5.6A.
ꢀCoss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
ISD ≤ 5.6A, di/dt ≤ 110A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
,
* When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer to application note #AN-994.
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Data and specifications subject to change without notice. 6/00
10
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