IRF830AS [INFINEON]
Power MOSFET(Vdss=500V, Rds(on)max=1.40ohm, Id=5.0A); 功率MOSFET （ VDSS = 500V ， RDS（ON）最大值= 1.40ohm ，ID = 5.0A ）
| 型号： | IRF830AS |
| 厂家： | 
Infineon |
| 描述： | Power MOSFET(Vdss=500V, Rds(on)max=1.40ohm, Id=5.0A) |
| 文件： | 总10页 (文件大小：155K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD- 92006A
SMPS MOSFET
IRF830AS/L
HEXFET® Power MOSFET
Applications
VDSS
500V
RDS(on) max
ID
5.0A
l Switch Mode Power Supply (SMPS)
l Uninterruptable Power Supply
l High Speed Power Switching
1.40Ω
Benefits
l Low Gate Charge Qg Results in Simple
Drive Requirement
l Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current
l Effective Coss specified (See AN 1001)
D2Pak
TO-262
Absolute Maximum Ratings
Parameter
Max.
5.0
Units
A
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
3.2
20
3.1
PD @TA = 25°C
PD @TC = 25°C
W
Power Dissipation
74
Linear Derating Factor
0.59
W/°C
V
VGS
dv/dt
TJ
Gate-to-Source Voltage
± 30
Peak Diode Recovery dv/dt
Operating Junction and
5.3
V/ns
-55 to + 150
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
°C
300 (1.6mm from case )
Typical SMPS Topologies:
l Two Transistor Forward
l Half Bridge and Full Bridge
Notes through ꢀare on page 10
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1
5/4/00
IRF830AS/L
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
500 ––– –––
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.60 –––
V/°C Reference to 25°C, ID = 1mA
VGS = 10V, ID = 3.0A
VDS = VGS, ID = 250µA
VDS = 500V, VGS = 0V
VDS = 400V, VGS = 0V, TJ = 125°C
VGS = 30V
RDS(on)
VGS(th)
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
––– ––– 1.4
2.0 ––– 4.5
Ω
V
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
IDSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
IGSS
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 50V, ID = 3.0A
ID = 5.0A
gfs
2.8 ––– –––
S
Qg
––– ––– 24
––– ––– 6.3
––– ––– 11
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 400V
VGS = 10V, See Fig. 6 and 13
–––
–––
–––
–––
10 –––
21 –––
21 –––
15 –––
VDD = 250V
ID = 5.0A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 14Ω
RD = 49Ω,See Fig. 10
VGS = 0V
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
––– 620 –––
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
93 –––
4.3 –––
VDS = 25V
pF
ƒ = 1.0MHz, See Fig. 5
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 400V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 400V ꢀ
––– 886 –––
–––
–––
27 –––
39 –––
Avalanche Characteristics
Parameter
Single Pulse Avalanche Energy
Typ.
Max.
230
5.0
Units
mJ
EAS
IAR
–––
–––
–––
Avalanche Current
A
EAR
Repetitive Avalanche Energy
7.4
mJ
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
Max.
1.7
Units
°C/W
RθJC
RθJA
Junction-to-Ambient ( PCB Mounted, steady-state)*
–––
40
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
IS
Continuous Source Current
(Body Diode)
MOSFET symbol
5.0
20
––– –––
––– –––
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
S
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.5
––– 430 650
––– 2.0 3.0
V
TJ = 25°C, IS = 5.0A, VGS = 0V
ns
TJ = 25°C, IF = 5.0A
Qrr
ton
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRF830AS/L
100
10
1
100
10
VGS
15V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
TOP
TOP
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
1
4.5V
4.5V
0.1
0.01
20µs PULSE WIDTH
20µs PULSE WIDTH
°
°
T = 150 C
J
T = 25 C
J
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
10
2.5
5.0A
=
I
D
2.0
1.5
1.0
0.5
0.0
°
T = 150 C
J
°
T = 25 C
J
1
V
= 50V
DS
V
= 10V
GS
20µs PULSE WIDTH
0.1
4.0
-60 -40 -20
0
20 40 60 80 100 120 140 160
°
5.0
6.0
7.0 8.0
T , Junction Temperature ( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRF830AS/L
20
16
12
8
10000
I = 5.0A
D
V G S = 0V,
f = 1MHz
Ciss = Cgs + Cgd
,
Cds SHORTED
V
V
V
= 400V
= 250V
= 100V
DS
DS
DS
Crss = C gd
Coss = Cds + C gd
1000
100
10
C
C
iss
oss
4
C
rss
FOR TEST CIRCUIT
SEE FIGURE 13
1
0
A
0
4
8
12
16
20
24
1
10
100
1000
Q
, Total Gate Charge (nC)
V
, Drain-to-Source Voltage (V)
G
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
100
10
1
100
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10us
10
100us
°
T = 150 C
J
1ms
1
°
T = 25 C
J
10ms
°
T = 25 C
C
°
T = 150 C
Single Pulse
J
V
= 0 V
GS
0.1
0.2
0.1
0.4
SD
0.6
0.8
1.0
1.2
10
100
1000
10000
V
,Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRF830AS/L
RD
5.0
4.0
3.0
2.0
1.0
0.0
VDS
VGS
10V
D.U.T.
RG
+VDD
-
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
T
75
100
125
150
°
, Case Temperature ( C)
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
1
D = 0.50
0.20
0.10
0.05
P
DM
0.1
t
1
0.02
0.01
t
2
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D =
t / t
1 2
2. Peak T = P
x Z
+ T
C
J
DM
thJC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF830AS/L
500
400
300
200
100
0
1 5V
I
D
TOP
2.2A
3.2A
BOTTOM 5.0A
DRIVER
L
V
G
DS
D.U.T
R
+
V
D D
-
I
A
AS
20V
0.01
t
Ω
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
°
Starting T , Junction Temperature ( C)
J
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
Vs. Drain Current
Q
G
10 V
790
7 8 5
780
7 7 5
770
Q
Q
GD
GS
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
+
V
DS
D.U.T.
-
A
0.0
1.0
2.0
3.0
4.0
5.0
V
GS
I
, Avalanc he Current (A)
av
3mA
I
I
D
G
Current Sampling Resistors
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
Fig 13b. Gate Charge Test Circuit
6
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IRF830AS/L
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFET
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7
IRF830AS/L
D2Pak Package Outline
10.54 (.415)
10.29 (.405)
10.16 (.400)
REF.
- B -
1.32 (.052)
4.69 (.185)
4.20 (.165)
1.40 (.055)
- A -
M AX.
1.22 (.048)
2
6.47 (.255)
6.18 (.243)
1.78 (.070)
1.27 (.050)
15.49 (.610)
14.73 (.580)
2.79 (.110)
2.29 (.090)
1
3
2.61 (.103)
2.32 (.091)
5.28 (.208)
4.78 (.188)
8.89 (.350)
REF.
1.40 (.055)
1.14 (.045)
1.39 (.055)
1.14 (.045)
3X
0.55 (.022)
0.46 (.018)
0.93 (.037)
0.69 (.027)
3X
5.08 (.200)
0.25 (.010)
M
B A M
MINIMUM RECOM MENDED FOOTPRINT
11.43 (.450)
8.89 (.350)
LEAD ASSIGNMENTS
1 - GATE
NO TES:
1
2
3
4
DIM ENSIONS AFTER SO LDER DIP.
17.78 (.700)
2 - DRAIN
3 - SOURCE
DIM ENSIONING & TOLERANCING PER ANSI Y14.5M , 1982.
CONTROLLING DIM ENSION : INCH.
HEATSINK & LEAD DIM ENSIONS DO NOT INCLUDE BURRS.
3.81 (.150)
2.54 (.100)
2.08 (.082)
2X
2X
Part Marking Information
D2Pak
A
INTERNATIONAL
RECTIFIER
LOGO
PART NUM BER
F530S
9246
1M
DATE CODE
(YYW W )
9B
ASSEM BLY
YY
=
YEAR
= W EEK
LOT CODE
W W
8
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IRF830AS/L
Package Outline
TO-262 Outline
Part Marking Information
TO-262
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9
IRF830AS/L
Tape & Reel Information
D2Pak
TR R
1 .60 (.0 63)
1 .50 (.0 59)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEE D D IREC TIO N
TR L
11.60 (.457)
11.40 (.449)
1 .85 (.0 73)
1 .65 (.0 65)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED D IRE CTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
M AX.
60.00 (2.362)
M IN.
30.40 (1.197)
M AX.
NO TES
1. CO M FORM S TO EIA-418.
2. CO NTROLLING DIM ENSIO N: M ILLIM ETER.
3. DIM ENSION M EASURED
:
26.40 (1.039)
24.40 (.961)
4
@ HUB.
3
4. INCLUDES FLANGE DISTORTION
@
O UTER EDGE.
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 18mH
ꢀCoss eff. is a fixed capacitance that gives the same charging time
RG = 25Ω, IAS = 5.0A. (See Figure 12)
as Coss while VDS is rising from 0 to 80% VDSS
ISD ≤ 5.0A, di/dt ≤ 370A/µs, VDD ≤ V(BR)DSS
TJ ≤ 150°C
,
Uses IRF830A data and test conditions
* When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
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Data and specifications subject to change without notice. 5/00
10
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