IRF7823PBF [INFINEON]
Power MOSFET Selection for Non-Isolated DC/DC Converters; 功率MOSFET选择的非隔离式DC / DC转换器
| 型号： | IRF7823PBF |
| 厂家： | 
Infineon |
| 描述： | Power MOSFET Selection for Non-Isolated DC/DC Converters |
| 文件： | 总10页 (文件大小：669K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 97050
IRF7823PbF
HEXFET® Power MOSFET
Applications
VDSS
30V
RDS(on) max
Qg
9.1nC
l High Frequency Point-of-Load
Synchronous Buck Converter for
Applications in Networking &
Computing Systems
8.7m @V = 10V
:
GS
A
l Optimized for Control FET applications
A
1
2
3
4
8
S
S
S
G
D
7
D
Benefits
l Very Low RDS(on) at 4.5V VGS
l Low Gate Charge
6
D
5
D
SO-8
l Fully Characterized Avalanche Voltage
and Current
Top View
l 100% Tested for RG
Absolute Maximum Ratings
Parameter
Max.
30
Units
V
VDS
Drain-to-Source Voltage
V
Gate-to-Source Voltage
± 20
13
GS
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
I
I
I
@ TA = 25°C
D
D
@ TA = 70°C
11
A
100
2.5
1.6
DM
Power Dissipation
P
P
@TA = 25°C
@TA = 70°C
W
D
D
Power Dissipation
Linear Derating Factor
Operating Junction and
0.02
-55 to + 150
W/°C
°C
T
J
T
Storage Temperature Range
STG
Thermal Resistance
Parameter
Junction-to-Drain Lead
Junction-to-Ambient
Typ.
–––
Max.
20
Units
°C/W
Rθ
Rθ
JL
–––
50
JA
Notes through ꢀ are on page 10
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1
10/06/05
IRF7823PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
30 ––– –––
Conditions
VGS = 0V, ID = 250µA
BVDSS
V
∆ΒVDSS/∆TJ
RDS(on)
Breakdown Voltage Temp. Coefficient ––– 0.024 ––– V/°C Reference to 25°C, ID = 1mA
Static Drain-to-Source On-Resistance
–––
–––
1.35
–––
–––
–––
–––
–––
27
6.9
9.3
8.7
VGS = 10V, ID = 13A
VGS = 4.5V, ID = 10A
mΩ
11.9
2.35
VGS(th)
∆VGS(th)
IDSS
Gate Threshold Voltage
1.8
V
V
DS = VGS, ID = 25µA
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
-5.1
–––
–––
–––
––– mV/°C
1.0
150
100
µA
nA
S
V
V
V
DS = 24V, VGS = 0V
DS = 24V, VGS = 0V, TJ = 125°C
GS = 20V
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
––– -100
VGS = -20V
gfs
Qg
–––
9.1
2.7
0.84
3.2
2.4
4.0
5.8
2.0
7.2
8.2
10
–––
14
VDS = 15V, ID = 10A
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Qgs1
Qgs2
Qgd
Qgodr
Qsw
Qoss
Rg
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
–––
–––
–––
–––
–––
–––
3.0
VDS = 15V
nC VGS = 4.5V
ID = 10A
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
See Fig. 17 & 18
Output Charge
nC VDS = 16V, VGS = 0V
Gate Resistance
Turn-On Delay Time
Rise Time
Ω
td(on)
tr
td(off)
tf
–––
–––
–––
–––
VDD = 16V, VGS = 4.5V
ID = 10A
Turn-Off Delay Time
Fall Time
ns Clamped Inductive Load
See Fig. 15
2.7
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
––– 1110 –––
VGS = 0V
–––
–––
240
110
–––
–––
pF VDS = 15V
ƒ = 1.0MHz
Avalanche Characteristics
Parameter
Typ.
–––
–––
Max.
230
10
Units
mJ
Single Pulse Avalanche Energy
EAS
IAR
Avalanche Current
A
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
MOSFET symbol
IS
D
S
Continuous Source Current
–––
–––
3.1
(Body Diode)
Pulsed Source Current
A
showing the
integral reverse
G
ISM
–––
–––
100
(Body Diode)
p-n junction diode.
VSD
trr
Diode Forward Voltage
–––
–––
–––
–––
7.8
9.0
1.0
12
14
V
T = 25°C, I = 10A, V = 0V
J S GS
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
ns T = 25°C, I = 10A, VDD = 15V
J F
Qrr
ton
di/dt = 500A/µs
See Fig. 16
nC
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRF7823PbF
1000
100
10
1000
100
10
VGS
10V
VGS
10V
TOP
TOP
5.0V
4.5V
3.5V
3.0V
2.7V
2.5V
2.3V
5.0V
4.5V
3.5V
3.0V
2.7V
2.5V
2.3V
BOTTOM
BOTTOM
1
2.3V
1
0.1
0.01
2.3V
60µs PULSE WIDTH
Tj = 150°C
≤
60µs PULSE WIDTH
Tj = 25°C
≤
0.1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.0
I
= 13A
D
V
= 10V
GS
100
10
1
1.5
1.0
0.5
T
= 25°C
J
T
= 150°C
J
V
= 15V
DS
≤
60µs PULSE WIDTH
0.1
1
2
3
4
5
-60 -40 -20
0
20 40 60 80 100 120 140 160
T
J
, Junction Temperature (°C)
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
vs. Temperature
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3
IRF7823PbF
10000
12.0
10.0
8.0
V
= 0V,
= C
f = 1 MHZ
GS
I = 10A
D
C
C
C
+ C , C
SHORTED
iss
gs
gd
ds
= C
rss
oss
gd
V
V
= 24V
= 15V
DS
DS
= C + C
ds
gd
C
iss
1000
100
10
6.0
C
oss
C
rss
4.0
2.0
0.0
1
10
, Drain-to-Source Voltage (V)
100
0
2
4
6
8
10 12 14 16 18 20
V
Q , Total Gate Charge (nC)
DS
G
Fig 6. Typical Gate Charge vs.
Fig 5. Typical Capacitance vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
100
10
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
100µsec
1msec
T
= 150°C
J
T
= 25°C
J
10msec
1
1
0.1
0.01
T
= 25°C
A
Tj = 150°C
Single Pulse
V
= 0V
GS
0.1
0.2
0.4
SD
0.6
0.8
1.0
1.2
0
1
10
100
V
, Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRF7823PbF
14
12
10
8
2.5
2.0
1.5
1.0
0.5
I
= 50µA
D
6
4
2
0
25
50
75
100
125
150
-75 -50 -25
0
25 50 75 100 125 150
T
, Ambient Temperature (°C)
T
, Temperature ( °C )
A
J
Fig 10. Threshold Voltage vs. Temperature
Fig 9. Maximum Drain Current vs.
Case Temperature
100
10
D = 0.50
0.20
0.10
0.05
0.02
0.01
1
R1
R1
R2
R2
R3
R3
Ri (°C/W)
τ
i (sec)
7.520 0.013427
τ
τ
J τJ
τ
AτA
0.1
1 τ1
τ
τ
2 τ2
3 τ3
25.573
16.913
1.1097
36.9
Ci= τi/Ri
Ci= τi/Ri
0.01
0.001
0.0001
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Ta
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
1000
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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5
IRF7823PbF
30
25
20
15
10
1000
800
600
400
200
0
I
= 13A
I
D
D
TOP
0.82A
1.1A
BOTTOM 10A
T
= 125°C
J
T
= 25°C
5
0
J
2
4
6
8
10
25
50
75
100
125
150
Starting T , Junction Temperature (°C)
J
V
Gate -to -Source Voltage (V)
GS,
Fig 13. Maximum Avalanche Energy
Fig 12. On-Resistance vs. Gate Voltage
vs. Drain Current
LD
VDS
15V
VDD
DRIVER
+
L
V
DS
D.U.T
D.U.T
AS
R
VGS
G
V
DD
-
I
A
Pulse Width < 1µs
Duty Factor < 0.1%
V
2
GS
0.01
Ω
t
p
Fig 15a. Switching Time Test Circuit
Fig 14a. Unclamped Inductive Test Circuit
V
(BR)DSS
VDS
t
90%
p
10%
VGS
td(on)
td(off)
tf
tr
I
AS
Fig 15b. Switching Time Waveforms
Fig 14b. Unclamped Inductive Waveforms
6
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IRF7823PbF
Driver Gate Drive
P.W.
P.W.
D =
Period
D.U.T
Period
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Current Regulator
Id
Vds
Same Type as D.U.T.
Vgs
50KΩ
.2µF
.3µF
12V
+
V
DS
D.U.T.
-
Vgs(th)
V
GS
3mA
I
I
Qgs1
Qgs2
Qgd
Qgodr
G
D
Current Sampling Resistors
Fig 18. Gate Charge Waveform
Fig 17. Gate Charge Test Circuit
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7
IRF7823PbF
Power MOSFET Selection for Non-Isolated DC/DC Converters
Synchronous FET
Control FET
The power loss equation for Q2 is approximated
by;
Special attention has been given to the power losses
in the switching elements of the circuit - Q1 and Q2.
Power losses in the high side switch Q1, also called
the Control FET, are impacted by the Rds(on) of the
MOSFET, but these conduction losses are only about
one half of the total losses.
P = P
+ P + P*
loss
conduction
drive
output
P = Irms 2 × Rds(on)
loss ( )
Power losses in the control switch Q1 are given
by;
+ Q × V × f
(
)
g
g
⎛
⎜
Qoss
⎞
⎠
Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput
+
×V × f + Q × V × f
(
)
in
rr
in
⎝ 2
This can be expanded and approximated by;
*dissipated primarily in Q1.
P
= I 2 × Rds(on)
(
)
loss
rms
For the synchronous MOSFET Q2, Rds(on) is an im-
portant characteristic; however, once again the im-
portance of gate charge must not be overlooked since
it impacts three critical areas. Under light load the
MOSFET must still be turned on and off by the con-
trol IC so the gate drive losses become much more
significant. Secondly, the output charge Qoss and re-
verse recovery charge Qrr both generate losses that
are transfered to Q1 and increase the dissipation in
that device. Thirdly, gate charge will impact the
MOSFETs’ susceptibility to Cdv/dt turn on.
⎛
⎛
Qgd
ig
⎞
Qgs2
ig
⎞
⎟
⎜
⎟
⎜
+ I ×
× V × f + I ×
× V × f
in
in
⎝
⎠
⎝
⎠
+ Q × V × f
(
)
g
g
⎛ Qoss
⎞
⎠
+
×V × f
in
⎝
2
This simplified loss equation includes the terms Qgs2
The drain of Q2 is connected to the switching node
of the converter and therefore sees transitions be-
tween ground and Vin. As Q1 turns on and off there is
a rate of change of drain voltage dV/dt which is ca-
pacitively coupled to the gate of Q2 and can induce
a voltage spike on the gate that is sufficient to turn
the MOSFET on, resulting in shoot-through current .
The ratio of Qgd/Qgs1 must be minimized to reduce the
potential for Cdv/dt turn on.
and Qoss which are new to Power MOSFET data sheets.
Qgs2 is a sub element of traditional gate-source
charge that is included in all MOSFET data sheets.
The importance of splitting this gate-source charge
into two sub elements, Qgs1 and Qgs2, can be seen from
Fig 16.
Qgs2 indicates the charge that must be supplied by
the gate driver between the time that the threshold
voltage has been reached and the time the drain cur-
rent rises to Idmax at which time the drain voltage be-
gins to change. Minimizing Qgs2 is a critical factor in
reducing switching losses in Q1.
Qoss is the charge that must be supplied to the out-
put capacitance of the MOSFET during every switch-
ing cycle. Figure A shows how Qoss is formed by the
parallel combination of the voltage dependant (non-
linear) capacitances Cds and Cdg when multiplied by
the power supply input buss voltage.
Figure A: Qoss Characteristic
8
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IRF7823PbF
SO-8 Package Outline (Dimensions are shown in millimeters (inches)
SO-8 Part Marking
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9
IRF7823PbF
SO-8 Tape and Reel
Dimensions are shown in millimeters (inches)
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Starting TJ = 25°C, L = 4.3mH, RG = 25Ω, IAS = 10A.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
When mounted on 1 inch square copper board.
ꢀ Rθ is measured at TJ approximately 90°C.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.10/05
10
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相关型号：
IRF7831PBF
HEXFET Power MOSFET ( VDSS = 30V , RDS(on)max = 3.6mヘ@VGS = 10V , Qg(typ.) = 40nC )
INFINEON
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