IR3536AMTRPBF [INFINEON]
Digital Multi-Phase Buck Controller; 数字多相降压控制器
| 型号： | IR3536AMTRPBF |
| 厂家： | 
Infineon |
| 描述： | Digital Multi-Phase Buck Controller |
| 文件： | 总3页 (文件大小：496K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IR3536A
IR3538A
Digital Multi-Phase Buck Controller
FEATURES
DESCRIPTION
6-phase & 8-phase dual output PWM Controller
The IR3536A and IR3538A are dual-loop digital multi-phase
buck controllers. The IR3536A drive up to 6 phases and the
IR3538A drives up to 8 phases. The IR3536A and IR3538A
are fully Intel® VR12 and AMD® SVI/PVI compliant on both
loops and provide a Vtt tracking function for DDR memory.
Phases are flexibly assigned between Loops 1 & 2
Intel® VR12, AMD® 3.4MHz SVI/PVI & Memory
modes
Overclocking & Gaming Mode with Vmax setting
The IR3536A and IR3538A include the IR Efficiency
Shaping Technology to deliver exceptional efficiency at
minimum cost across the entire load range.
IR Variable Gate Drive optimizes the MOSFET gate drive
voltage based on real-time load current. IR Dynamic Phase
Control adds/drops phases based upon load current.
The IR3536A and IR3538A can be configured to enter 1-
phase operation and active diode emulation mode
automatically or by command.
Switching frequency from 200kHz to 1.2MHz per
phase
IR Efficiency Shaping Features including Variable
Gate Drive and Dynamic Phase Control
Programmable 1-phase or 2-phase for Light Loads
and Active Diode Emulation for Very Light Loads
IR Adaptive Transient Algorithm (ATA) on both loops
minimizes output bulk capacitors and system cost
Auto-Phase Detection with auto-compensation
IR’s unique Adaptive Transient Algorithm (ATA), based on
proprietary non-linear digital PWM algorithms, minimizes
output bulk capacitors.
Per-Loop Fault Protection: OVP, UVP, OCP, OTP, CFP
I2C/SMBus/PMBus system interface for telemetry
of Temperature, Voltage, Current & Power for
both loops
The I2C/PMBus interface can communicate with up to 16
IR3536A and IR3538A based VR loops. Device
configuration and fault parameters are easily defined using
the IR Intuitive Power Designer (DPDC) GUI
and stored in on-chip NVM.
Non-Volatile Memory (NVM) for custom
configuration
Compatible with IR ATL and 3.3V Tri-state Drivers
+3.3V supply voltage; -20ºC to 85ºC ambient
operation
The IR3536A and IR3538A provides extensive OVP, UVP,
OCP and OTP fault protection and includes thermistor
based temperature sensing with VR_HOT signal.
Pb-Free, RoHS, 7x7 48-pin & 8x8 56-pin QFN, MSL2
package
NVM storage saves pins and enables a small package size.
The IR3536A and IR3538A also include numerous features
like register diagnostics for fast design cycles and platform
differentiation, truly simplifying
VRD design and enabling fastest time-to-market with its
“set-and-forget” methodology.
APPLICATIONS
Intel ® VR12 & AMD® SVI & PVI based systems
DDR Memory with Vtt tracking
Overclocked & Gaming platforms
PIN DIAGRAM
Figure 1: IR3536A Package Top View
Figure 2: IR3538A Package Top View
1
June 21, 2013 | FINAL | V1.09
IR3536A
IR3538A
Digital Multi-Phase Buck Controller
ORDERING INFORMATION
IR353AM
Packing
Package
Part Number
Programming
Default
Qty
P/PBF – Lead Free
TR – Tape & Reel / TY - Tray
TR=3000
TY=2600
IR3536AMTRPBF
IR3536AMTYPBF
QFN
TR=3000
TY=2600
IR3538AMTRPBF
IR3538AMTYPBF
IR3536AMxxyyTRP1
yy – Configuration File ID
xx – Customer ID
QFN
QFN
Default
TR=3000
TR=3000
Customer Configuration
Customer Configuration
QFN
IR3538AMxxyyTRP1
Package Type (QFN)
Notes:
Part –
1. Customer Specific Configuration File, where
xx = Customer ID and yy = Configuration File
(Codes assigned by IR Marketing).
6: IR3536A
8: IR3538A
Figure 3: IR3536A Package Top View, Enlarged
Figure 4: IR3538A Package Top View, Enlarged
2
June 21, 2013 | FINAL | V1.09
IR3536A
IR3538A
Digital Multi-Phase Buck Controller
FUNCTIONAL BLOCK DIAGRAM
V18A
VCC
LDO
RCSP_L2
VID_2
RSCM_L2
AFE_2
1.8V
VSEN_L2
VRTN_L2
ITOT_2
Vout1_Error
Voltage
ADC
PWM1
PWM2
PWM3
PWM4
RCSP
RSCM
Vout2_Error
AFE_1
VSEN
VRTN
VID_1
ISEN1
Mode Control
PWM Generator
IP1
IRTN1
.
.
.
.
.
.
PWM5
PWM6
.
.
.
Phase_
Period_1
Control
and
Monitoring
ISENx
IRTNx
IPx
Phase_
Period_2
ITOT_1
Σ
PWM7
IR3536/
CHL8326 CHL8328
IR3538/
Only for
IR3538A
x
y
z
3
4
6
4
5
8
PWM8
Iout
Vin
ISENy
VAR_GATE
IPy
IRTNy
.
.
.
.
.
.
.
.
.
ITOT_2
Vout
ISENz
IRTNz
Temp
IPz
Current ADC
Σ
Fault Bus
System Clock
IP1
.
.
.
IP6
System Clock
ADC Clocks
MUX Clocks
IP7
.
.
.
Only for
IR3538/CHL8328
1Intel/MPoL mode
2AMD mode
IP8
Phase_Period_1
TSEN2
Phase_Period_2
VID_1
TSEN
VID_2
Monitor ADC
Iout
Vin
VINSEN
Reference,
Oscillator,
State Control,
Interfaces,
Registers and
NVM
V3_3
EN
Temp
SV_CLK1/SVC_VID[3]2
Fault Bus
SV_DIO1/SVD_VID[2]2
SV_ALERT#1/VID[4]2
VR_HOT#1/
VRHOT_ICRIT#2
SMB_DIO
SMB_CLK
VR_READY1/PWRGD2
VR_READY_L21/
PWROK2
SMB_ALERT
PSI1/VID[5]2
GPO_A
Only for
C
IR3538A
SV_ADDR1/VID[1]2
PM_ADDR1/
GPO_B
PM_ADDR_VID[0]2
CFP1/VFIXEN_PSI2
RRES
Figure 5: IR3536A / IR3538A Functional Block Diagram
3
June 21, 2013 | FINAL | V1.09
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