IPT030N12N3 G [INFINEON]
IPT030N12N3 G在额外的击穿电压裕度和低导通电阻 (RDS(on)) 之间达到了出色平衡,是电池供电设备的理想选择。英飞凌 OptiMOS™ 功率 MOSFET 120V 技术 符合 TO-Leadless 封装要求, 针对大电流应用进行了优化。TOLL 封装是高功率密度应用的理想解决方案,与 D2PAK 7 引脚相比,封装尺寸减小了30%,且封装电感更低。;![IPT030N12N3 G](http://pdffile.icpdf.com/pdf2/p00368/img/icpdf/IPT030N12N3-_2247998_icpdf.jpg)
型号: | IPT030N12N3 G |
厂家: | ![]() |
描述: | IPT030N12N3 G在额外的击穿电压裕度和低导通电阻 (RDS(on)) 之间达到了出色平衡,是电池供电设备的理想选择。英飞凌 OptiMOS™ 功率 MOSFET 120V 技术 符合 TO-Leadless 封装要求, 针对大电流应用进行了优化。TOLL 封装是高功率密度应用的理想解决方案,与 D2PAK 7 引脚相比,封装尺寸减小了30%,且封装电感更低。 电池 |
文件: | 总11页 (文件大小:1035K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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IPT030N12N3ꢀG
MOSFET
OptiMOSTMꢀ3ꢀPower-Transistor,ꢀ120ꢀV
HSOF
Features
Tab
•ꢀN-channel,ꢀnormalꢀlevel
•ꢀVeryꢀlowꢀon-resistanceꢀRDS(on)
•ꢀExcellentꢀgateꢀchargeꢀxꢀRDS(on)ꢀproductꢀ(FOM)
•ꢀ100%ꢀavalancheꢀtested
1
2
3
4
5
•ꢀOptimizedꢀforꢀlowꢀvoltageꢀmotorꢀdrivesꢀapplication
•ꢀOptimizedꢀforꢀbatteryꢀpoweredꢀapplications
•ꢀIdealꢀforꢀbatteryꢀmanagementꢀswitchꢀapplication
•ꢀSuitableꢀforꢀhighꢀfrequencyꢀswitchingꢀandꢀDC/DCꢀconverters
•ꢀPb-freeꢀleadꢀplating;ꢀRoHSꢀcompliant
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21
6
7
8
Drain
Tab
Productꢀvalidation
FullyꢀqualifiedꢀaccordingꢀtoꢀJEDECꢀforꢀIndustrialꢀApplications
Gate
Pin 1
Source
Pin 2-8
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Parameter
Value
120
3
Unit
VDS
V
RDS(on),max
ID
mΩ
A
237
182
158
Qoss
nC
nC
QG
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
IPT030N12N3 G
PG-HSOF-8
030N12N3
-
Final Data Sheet
1
Rev.ꢀ2.1,ꢀꢀ2020-11-23
OptiMOSTMꢀ3ꢀPower-Transistor,ꢀ120ꢀV
IPT030N12N3ꢀG
TableꢀofꢀContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Final Data Sheet
2
Rev.ꢀ2.1,ꢀꢀ2020-11-23
OptiMOSTMꢀ3ꢀPower-Transistor,ꢀ120ꢀV
IPT030N12N3ꢀG
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀTA=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
VGS=10ꢀV,ꢀTC=25ꢀ°C
VGS=10ꢀV,ꢀTC=100ꢀ°C
-
-
-
-
-
-
237
168
24
Continuous drain current1)
ID
A
VGS=10ꢀV,ꢀTA=25ꢀ°C,
RTHJA=40ꢀ°C/W2)
Pulsed drain current3)
Avalanche energy, single pulse4)
ID,pulse
EAS
-
-
-
-
948
900
20
A
TA=25ꢀ°C
-
mJ
V
ID=100ꢀA,ꢀRGS=25ꢀΩ
Gate source voltage
VGS
-20
-
-
-
-
-
375
3.8
TC=25ꢀ°C
Power dissipation
Ptot
W
TA=25ꢀ°C,ꢀRTHJA=40ꢀ°C/W2)
IEC climatic category; DIN IEC 68-1:
55/175/56
Operating and storage temperature
Tj,ꢀTstg
-55
-
175
°C
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
0.2
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction - case
RthJC
RthJA
-
0.4
°C/W -
°C/W -
Thermal resistance, junction - ambient,
6 cm² cooling area
-
-
-
-
40
62
Thermal resistance, junction - ambient,
minimal footprint2)
RthJA
°C/W -
1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature
at 25°C. For higher case temperature please refer to Diagram 2. De-rating will be required based on the actual
environmental conditions.
2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
3) See Diagram 3 for more detailed information
4) See Diagram 13 for more detailed information
Final Data Sheet
3
Rev.ꢀ2.1,ꢀꢀ2020-11-23
OptiMOSTMꢀ3ꢀPower-Transistor,ꢀ120ꢀV
IPT030N12N3ꢀG
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
atꢀTj=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
120
2
Typ.
Max.
Drain-source breakdown voltage
Gate threshold voltage
V(BR)DSS
VGS(th)
-
-
V
V
VGS=0ꢀV,ꢀID=1ꢀmA
3
4
VDS=VGS,ꢀID=270ꢀµA
-
-
0.1
10
1
100
VDS=100ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C
VDS=100ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C
Zero gate voltage drain current
IDSS
µA
nA
Gate-source leakage current
Drain-source on-state resistance
Gate resistance1)
IGSS
RDS(on)
RG
-
-
-
-
10
100
VGS=20ꢀV,ꢀVDS=0ꢀV
2.5
1.3
180
3
-
mΩ VGS=10ꢀV,ꢀID=100ꢀA
Ω
-
Transconductance
gfs
-
S
|VDS|≥2|ID|RDS(on)max,ꢀID=100ꢀA
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance1)
Output capacitance1)
Reverse transfer capacitance1)
Ciss
Coss
Crss
-
-
-
10000 13000 pF
1300 1700 pF
VGS=0ꢀV,ꢀVDS=60ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=60ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=60ꢀV,ꢀf=1ꢀMHz
61
110
-
pF
ns
VDD=60ꢀV,ꢀVGS=10ꢀV,ꢀID=100ꢀA,
RG,ext=1.6ꢀΩ
Turn-on delay time
Rise time
td(on)
tr
td(off)
tf
-
-
-
-
21.2
VDD=60ꢀV,ꢀVGS=10ꢀV,ꢀID=100ꢀA,
RG,ext=1.6ꢀΩ
19.8
51.8
22.9
-
-
-
ns
ns
ns
VDD=60ꢀV,ꢀVGS=10ꢀV,ꢀID=100ꢀA,
RG,ext=1.6ꢀΩ
Turn-off delay time
Fall time
VDD=60ꢀV,ꢀVGS=10ꢀV,ꢀID=100ꢀA,
RG,ext=1.6ꢀΩ
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics2)ꢀ
Values
Typ.
52
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Gate to source charge
Gate charge at threshold
Gate to drain charge1)
Switching charge
Gate charge total1)
Gate plateau voltage
Output charge1)
Qgs
-
-
-
-
-
-
-
-
nC
nC
nC
nC
nC
V
VDD=60ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=60ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=60ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=60ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=60ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=60ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDS=60ꢀV,ꢀVGS=0ꢀV
Qg(th)
Qgd
31
-
37
56
-
Qsw
58
Qg
158
5.2
198
-
Vplateau
Qoss
182
242
nC
1) Defined by design. Not subject to production test.
2) See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.ꢀ2.1,ꢀꢀ2020-11-23
OptiMOSTMꢀ3ꢀPower-Transistor,ꢀ120ꢀV
IPT030N12N3ꢀG
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Typ.
-
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
237
948
1.2
Diode continuous forward current
Diode pulse current
IS
-
-
-
-
-
A
TC=25ꢀ°C
IS,pulse
VSD
trr
-
A
TC=25ꢀ°C
Diode forward voltage
0.9
85
V
VGS=0ꢀV,ꢀIF=100ꢀA,ꢀTj=25ꢀ°C
VR=60ꢀV,ꢀIF=100ꢀA,ꢀdiF/dt=100ꢀA/µs
VR=60ꢀV,ꢀIF=100ꢀA,ꢀdiF/dt=100ꢀA/µs
Reverse recovery time1)
Reverse recovery charge1)
170
450
ns
nC
Qrr
225
1) Defined by design. Not subject to production test.
Final Data Sheet
5
Rev.ꢀ2.1,ꢀꢀ2020-11-23
OptiMOSTMꢀ3ꢀPower-Transistor,ꢀ120ꢀV
IPT030N12N3ꢀG
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
400
250
350
300
250
200
150
100
50
200
150
100
50
0
0
0
25
50
75
100
125
150
175
200
0
25
50
75
100
125
150
175
200
TCꢀ[°C]
TCꢀ[°C]
Ptot=f(TC)
ID=f(TC);ꢀVGS≥10ꢀV
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
104
101
single pulse
0.01
0.02
0.05
0.1
0.2
1 µs
103
102
101
100
10-1
10-2
100
10 µs
0.5
100 µs
10-1
10-2
10-3
1 ms
10 ms
DC
100
101
102
103
10-5
10-4
10-3
10-2
10-1
100
VDSꢀ[V]
tpꢀ[s]
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T
Final Data Sheet
6
Rev.ꢀ2.1,ꢀꢀ2020-11-23
OptiMOSTMꢀ3ꢀPower-Transistor,ꢀ120ꢀV
IPT030N12N3ꢀG
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
1000
8
8 V
10 V
6 V
7
800
4.5 V
6
7 V
5
600
400
200
0
5 V
4
3
2
1
0
7 V
10 V
8 V
6 V
5 V
4.5 V
0
1
2
3
4
5
0
100
200
300
400
500
VDSꢀ[V]
IDꢀ[A]
ID=f(VDS),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
RDS(on)=f(ID),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
800
8
700
600
500
400
300
200
7
175 °C
6
5
4
3
2
25 °C
175 °C
100
1
0
25 °C
0
0
1
2
3
4
5
6
7
0
3
6
9
12
15
VGSꢀ[V]
VGSꢀ[V]
ID=f(VGS),ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj
RDS(on)=f(VGS),ꢀID=100ꢀA;ꢀparameter:ꢀTj
Final Data Sheet
7
Rev.ꢀ2.1,ꢀꢀ2020-11-23
OptiMOSTMꢀ3ꢀPower-Transistor,ꢀ120ꢀV
IPT030N12N3ꢀG
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
2.4
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
2.0
1.6
1.2
0.8
0.4
0.0
2700 µA
270 µA
-80
-40
0
40
80
120
160
200
-80
-40
0
40
80
120
160
200
Tjꢀ[°C]
Tjꢀ[°C]
RDS(on)=f(Tj),ꢀID=100ꢀA,ꢀVGS=10ꢀV
VGS(th=f(Tj),ꢀVGS=VDS;ꢀparameter:ꢀID
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
105
103
25 °C
25 °C, max
175 °C
175 °C, max
104
103
102
101
Ciss
102
101
100
Coss
Crss
0
20
40
60
80
100
120
0.00
0.25
0.50
0.75
1.00
1.25
1.50
VDSꢀ[V]
VSDꢀ[V]
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz
IF=f(VSD);ꢀparameter:ꢀTj
Final Data Sheet
8
Rev.ꢀ2.1,ꢀꢀ2020-11-23
OptiMOSTMꢀ3ꢀPower-Transistor,ꢀ120ꢀV
IPT030N12N3ꢀG
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
103
10
24 V
60 V
96 V
8
6
4
2
0
102
25 °C
101
100 °C
150 °C
100
100
101
102
103
0
20
40
60
80
100
120
140
160
tAVꢀ[µs]
Qgateꢀ[nC]
IAS=f(tAV);ꢀRGS=25ꢀΩ;ꢀparameter:ꢀTj,start
VGS=f(Qgate),ꢀID=100ꢀAꢀpulsed,ꢀTj=25ꢀ°C;ꢀparameter:ꢀVDD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagram Gate charge waveforms
131
129
127
125
123
121
119
117
115
113
-80
-40
0
40
80
120
160
200
Tjꢀ[°C]
VBR(DSS)=f(Tj);ꢀID=1ꢀmA
Final Data Sheet
9
Rev.ꢀ2.1,ꢀꢀ2020-11-23
OptiMOSTMꢀ3ꢀPower-Transistor,ꢀ120ꢀV
IPT030N12N3ꢀG
5ꢀꢀꢀꢀꢀPackageꢀOutlines
1) partially covered with Mold Flash
MILLIMETERS
INCHES
DIM
MIN
2.20
0.70
9.70
0.42
0.40
10.28
MAX
2.40
0.90
9.90
0.50
0.60
10.58
MIN
MAX
0.094
0.035
0.390
0.020
0.024
0.416
DOCUMENT NO.
Z8B00169619
A
b
0.087
0.028
0.382
0.017
0.016
0.405
b1
b2
c
0
SCALE
D
2
D2
E
3.30
0.130
9.70
10.10
0.382
0.398
0
2
E1
E4
E5
e
7.50
8.50
0.295
0.335
4mm
9.46
1.20 (BSC)
0.372
0.047 (BSC)
EUROPEAN PROJECTION
H
11.48
6.55
11.88
6.75
0.452
0.258
0.468
0.266
H1
H2
H3
H4
N
7.15
3.59
3.26
8
0.281
0.141
0.128
8
ISSUE DATE
20-02-2014
K1
L
4.18
0.165
1.60
1.00
2.10
1.30
0.063
0.039
0.083
0.051
L1
L2
L4
0.70
0.60
0.028
0.024
REVISION
02
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-HSOF-8,ꢀdimensionsꢀinꢀmm/inches
Final Data Sheet
10
Rev.ꢀ2.1,ꢀꢀ2020-11-23
OptiMOSTMꢀ3ꢀPower-Transistor,ꢀ120ꢀV
IPT030N12N3ꢀG
RevisionꢀHistory
IPT030N12N3 G
Revision:ꢀ2020-11-23,ꢀRev.ꢀ2.1
Previous Revision
Revision Date
Subjects (major changes since last revision)
1.1
2.0
2.1
Release preliminary version
Release of final version
Correct typo
2020-08-11
2020-08-31
2020-11-23
Trademarks
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Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,
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automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.
Final Data Sheet
11
Rev.ꢀ2.1,ꢀꢀ2020-11-23
相关型号:
![](http://pdffile.icpdf.com/pdf2/p00368/img/page/IPT039N15N5_2247727_files/IPT039N15N5_2247727_1.jpg)
![](http://pdffile.icpdf.com/pdf2/p00368/img/page/IPT039N15N5_2247727_files/IPT039N15N5_2247727_2.jpg)
IPT039N15N5
英飞凌无引脚 TO 封装型 OptiMOS™ 功率 MOSFET 针对大电流应用进行优化,如叉车、轻型电动车 (LEV)、电动工具、负载点 (POL)、电信和电熔丝。此外,封装尺寸缩小了 60%,设计更为紧凑。相较于 D²PAK 7 引脚封装,无引脚 TO 封装尺寸大幅减少了 30%。同时封装高度也降低了 50%,在机架式或刀片服务器等空间狭小的应用中表现出显著优势。
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